Circuit board and method of manufacturing the same

Abstract

The application discloses a circuit board and a manufacturing method thereof. The manufacturing method comprises the following steps: stacking a plurality of first core boards, and arranging a second core board on an outer layer; the second core board comprises a first metal layer, a dielectric layer and a second metal layer which are stacked; the first metal layer is arranged towards the first core board; and the second metal layer is arranged away from the first core board to form a first sub-board; drilling a through hole on the first sub-board, and plating metal on the hole wall surface of the drilled through hole; etching the second metal layer on the second core board to expose the dielectric layer; obtaining a second sub-board, and pressing the second sub-board on the exposed side of the dielectric layer. The manufacturing method of the circuit board directly etches the second metal layer after the through hole is subjected to copper plating to form a metal layer with uneven thickness on the surface of the second metal layer, and then the second metal layer is etched to expose the dielectric layer, and the second sub-board is pressed on the surface of the dielectric layer; the first metal layer with uniform thickness is used as a signal layer, the signal transmission between the multi-layer circuit board sub-boards is stable, and the signal transmission loss is effectively reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit board manufacturing, in particular to a circuit board and a manufacturing method thereof. BACKGROUND

[0002] Printed circuit board is an important electronic connector. With the development of electronic products towards multi-function, miniaturization and high performance, circuit boards are also developing towards high level, high density and high signal integrity. Among them, high-level circuit boards are usually formed by pressing multiple sub-boards.

[0003] During the manufacturing of the sub-boards, a through hole is formed on the sub-boards, and then copper plating is performed on the through hole to metalize the through hole. During the copper plating process, it is inevitable that the surface of the sub-boards will be covered with metal of uneven thickness. The side of the sub-boards that is pressed against another sub-board is a signal layer. In order to stabilize the signal transmission and avoid signal transmission loss after the two sub-boards are pressed together, the thickness of the metal layer of the signal layer needs to be uniform. The traditional processing method is to continue plating metal on one side of the signal layer after the metalized hole is manufactured and the metal layer of the signal layer is formed with uneven thickness, to increase the thickness of the metal layer of the signal layer, and then to etch the metal layer to reduce the thickness of the metal layer as the signal layer, so as to finally obtain a metal signal layer with uniform thickness.

[0004] However, during the process of plating to increase the thickness of the metal layer and etching to reduce the thickness of the metal layer, it is still difficult to control the uniform thickness of the metal layer. After the metal layer is pressed against another sub-board on its surface as a signal layer, the multi-layer board inevitably has problems of signal transmission fluctuation and signal transmission loss. SUMMARY

[0005] The technical problem solved by the present application is to provide a circuit board and a manufacturing method thereof, to solve the problems of signal transmission fluctuation and signal transmission loss caused by uneven thickness of the signal layer of the existing multi-layer board.

[0006] To solve the above technical problem, the first technical solution adopted by the present application is to provide a circuit board manufacturing method, comprising: stacking a plurality of first core boards, and setting a second core board on the outer layer, the second core board comprising a first metal layer, a dielectric layer and a second metal layer stacked, the first metal layer being arranged towards the first core board, and the second metal layer being arranged away from the first core board, to form a first sub-board; drilling a through hole on the first sub-board, and plating metal on the hole wall surface of the drilled through hole; etching the second metal layer on the second core board to expose the dielectric layer; obtaining a second sub-board, and pressing the second sub-board on the exposed side of the dielectric layer.

[0007] The step of laminating the first core plates and setting the second core plate on the outer layer comprises: setting the second core plate on the outer layer and bonding the first core plates and the second core plate through the first adhesive layer, wherein the thickness of the first adhesive layer is 6 mils, the thickness of the first core plate is 6 mils, and the thickness of the second core plate is 2 mils.

[0008] The step of etching the second metal layer on the second core plate to expose the dielectric layer further comprises: avoiding the outer layer of the first sub-plate from being etched by pasting a film on the outer layer of the first sub-plate away from the second core plate.

[0009] The step of pressing the second sub-plate on the exposed side of the dielectric layer comprises: the second sub-plate is another first sub-plate, and the exposed side of the dielectric layer of the first sub-plate is pressed and bonded together with the exposed side of the dielectric layer of the other first sub-plate.

[0010] The step of pressing the second sub-plate on the exposed side of the dielectric layer comprises: the second sub-plate is another first sub-plate, and the exposed side of the dielectric layer of the first sub-plate is pressed and bonded together with the exposed side of the dielectric layer of the other first sub-plate.

[0011] The step of laminating the first core plates and setting the second core plate on the outer layer comprises: setting the second core plate on the outer layer and bonding the first core plates and the second core plate through the first adhesive layer, wherein the thickness of the first adhesive layer is 6 mils, the thickness of the first core plate is 6 mils, and the thickness of the second core plate is 2 mils.

[0012] The step of etching the second metal layer on the second core plate to expose the dielectric layer further comprises: avoiding the outer layer of the first sub-plate from being etched by pasting a film on the outer layer of the first sub-plate away from the second core plate.

[0013] The step of etching the second metal layer on the second core plate to expose the dielectric layer further comprises: avoiding the outer layer of the first sub-plate from being etched by pasting a film on the outer layer of the first sub-plate away from the second core plate.

[0014] The step of pressing the second sub-plate on the exposed side of the dielectric layer comprises: the second sub-plate is another first sub-plate, and the exposed side of the dielectric layer of the first sub-plate is pressed and bonded together with the exposed side of the dielectric layer of the other first sub-plate.

[0015] To solve the above technical problems, the second technical solution adopted by the present application is to provide a circuit board made by the circuit board manufacturing method described in any of the above.

[0016] The beneficial effect of the present application is that: different from the prior art, the present application provides a circuit board manufacturing method, comprising: stacking a plurality of first core boards, and arranging a second core board on the outer layer, the second core board comprising a first metal layer, a dielectric layer and a second metal layer stacked, the first metal layer is arranged towards the first core board, and the second metal layer is arranged away from the first core board, to form a first sub-board; drilling a through hole on the first sub-board, and plating metal on the hole wall surface of the drilled through hole; etching the second metal layer on the second core board to expose the dielectric layer; obtaining a second sub-board, and pressing the second sub-board on the exposed side of the dielectric layer. In the present application, the first metal layer of the second core board is used as a signal layer, and the second metal layer is used as an auxiliary layer. The first metal layer is a circuit pattern with uniform thickness. After the through hole is subjected to copper plating on the surface of the second metal layer to form a metal layer with uneven thickness, the second metal layer is directly etched off to expose the dielectric layer, and the second sub-board is pressed on the surface of the dielectric layer. The first metal layer with uniform thickness is used as a signal layer, so that the signal transmission between the multi-layer circuit board sub-boards is stable, and the signal transmission loss is effectively reduced. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor. Among them:

[0018] Figure 1 is a flowchart of the first embodiment of the circuit board manufacturing method of the present application;

[0019] Figures 2a-2d is a flowchart of the second embodiment of the circuit board manufacturing method of the present application;

[0020] Figure 3 is a flowchart of the third embodiment of the circuit board manufacturing method of the present application;

[0021] Figure 4 is a structural schematic diagram of an embodiment of the circuit board of the present application.

[0022] Corresponding reference signs: 200, first sub-board; 210 / 410, first core board; 220, second core board; 221 / 421, first metal layer; 222 / 422, dielectric layer; 223, second metal layer; 230, first adhesive layer; 240, second adhesive layer; 450, copper foil layer. DETAILED DESCRIPTION

[0023] With reference to the drawings and embodiments of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application.

[0024] The terms used in the embodiments of the present application are merely for the purpose of describing the specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. "Plural" generally includes at least two, but does not exclude the case of including at least one.

[0025] It should be understood that the term "and / or" used herein is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in this paper generally represents that the front and rear associated objects are a "or" relationship.

[0026] It should be understood that the terms "include", "contain" or any other variant used herein are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the elements defined by the statement "include" do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0027] The existing multilayer circuit board is prone to cause uneven thickness of the metal layer of the outer layer when manufacturing the metalized hole of the sub-board, and after pressing another sub-board, the uneven thickness of the metal layer as a signal layer will cause signal transmission fluctuation and signal transmission loss.

[0028] Based on the above problems, the present application provides a circuit board and a manufacturing method thereof, which can effectively solve the above problems.

[0029] The circuit board and the manufacturing method thereof provided by the present application will be described in detail below in combination with the drawings and embodiments.

[0030] Please refer to Figure 1 , Figure 1 is a flowchart of the first embodiment of the circuit board manufacturing method of the present application. In one aspect of the present application, a circuit board manufacturing method is provided. Please refer to Figure 1In one specific embodiment, the circuit board manufacturing method of the present application comprises:

[0031] S11: stack a plurality of first core boards, and dispose a second core board on the outer layer, the second core board comprising a first metal layer, a dielectric layer and a second metal layer stacked, the first metal layer being disposed towards the first core board, and the second metal layer being disposed away from the first core board, to form a first sub-board.

[0032] Specifically, two first core boards are stacked in the embodiment, and in other embodiments, three, four or more first core boards can be stacked. The two surfaces of the first core board are also covered with metal layers. The metal layers on the two surfaces of the first core board and the first metal layer and the second metal layer on the two surfaces of the second core board can be made of one of copper, aluminum, gold, silver and their alloys or metal-filled organic matter. In the embodiment, the metal material is selected as copper, and the first core board and the second core board are both double-sided copper-clad boards. After the first sub-board is formed, the first metal layer of the second core board serves as a signal layer, and the metal layers on the two surfaces of the first core board serve as conductive layers. In order to make the first sub-board have a logic circuit satisfying different functions, the first metal layer and the metal layers on the two surfaces of the first core board need to be patterned before being pressed. Specifically, the patterned first core board and the second core board can be subjected to film pasting, exposure, development and etching. After the patterned first core board and the second core board are pressed, a cutting process is further included. Specifically, the stacked and pressed board is placed on a cutting machine, and the first sub-board with a required size is cut according to the required size, to form the first sub-board.

[0033] S12: drill a through hole in the first sub-board, and plate metal on the hole wall surface of the drilled through hole.

[0034] This step is to form a metallized hole, and the formed metallized hole is used to electrically connect the layers of the first sub-board. In this embodiment, a target machine is used to preset a position on the first sub-board, and then a special drilling machine is used to drill a through hole. The metal material plated on the hole wall surface of the through hole can be one of copper, aluminum, gold, silver and their alloys or metal-filled organic matter. In the embodiment, the metal material is selected as copper, and the copper plating process can be copper deposition followed by electroplating. The copper deposition is to immerse the first sub-board in a copper deposition solution to form a thin copper layer on the hole wall of the through hole, and then the thin copper layer is thickened by electroplating. The number and position of the through holes are adjusted according to the design requirements of the logic circuit.

[0035] It can be understood that in the copper deposition and electroplating process of plating metal on the hole wall surface of the through hole, it is difficult to avoid that a certain amount of copper is formed on the second metal layer of the second core board of the first sub-board, and the copper is a thin layer with uneven thickness, which finally causes the uneven thickness of the second metal layer.

[0036] Further, in a specific embodiment, after the first plate through hole and the metalized through hole are processed, a back drilling process is further included. The back drilling process is to use a drill bit larger than the through hole diameter to control the depth of drilling and remove the metal on the wall of the metalized through hole within a certain depth. The back drilling process is because the electrical connection between each conductive layer signal layer of the first sub-plate is logically designed according to the needs, and not all layers need to be electrically connected through a through hole. For the conductive layers that do not need to be electrically connected, the metal on the wall between the two through holes is removed after back drilling to disconnect them, thereby meeting the design needs of the logical circuit.

[0037] Further, after the metalized through hole is formed, the through hole needs to be resin plugged and planed. Specifically, the process is to fill the through hole with resin material, then bake the resin material to solidify it, and finally plane the solidified resin that overflows outside the through hole. In this embodiment, the resin material is epoxy resin, and the advantage of resin plugging is that the solidified epoxy resin fills the metalized through hole to protect the through hole.

[0038] S13: Etching the second metal layer on the second core plate to expose the dielectric layer.

[0039] In the foregoing step, during the metal plating process of the wall of the through hole, unevenly distributed metal is inevitably formed on the second metal layer. When another plate member is laminated on the unevenly distributed metal layer, the layer as a signal layer will cause problems of signal transmission fluctuation and signal transmission loss. The existing processing scheme is to continue electroplating on the surface of the second metal layer with uneven thickness to increase the thickness of the second metal layer, and then etching the second metal layer to thin it to the target layer thickness. However, electroplating to thicken the second metal layer and etching to thin the second metal layer are ultimately difficult to make the second metal layer have a uniform thickness. The problems of signal transmission loss and fluctuation still exist.

[0040] In this embodiment, the second metal layer with uneven thickness outside the second core plate is used as an auxiliary layer, and the first metal layer with uniform thickness inside the second core plate after being patterned is used as a signal layer. The second metal layer with uneven thickness is directly etched to remove it. This step effectively avoids the signal transmission problems caused by the second metal layer with uneven thickness as a signal layer. In this embodiment, the second metal layer on the second core plate is removed by chemical etching of the second metal layer with an etching solution, and the dielectric layer is exposed.

[0041] S14: Obtain a second sub-plate and laminate the second sub-plate on the exposed side of the dielectric layer.

[0042] Specifically, the exposed side of the dielectric layer of the first sub-plate is laminated with the second sub-plate, and the first sub-plate and the second sub-plate are laminated and fixed by an adhesive.

[0043] In the embodiment, after the first sub-board and the second sub-board are laminated, the laminated board is drilled and the through holes are metallized. The conductive layers and the signal layers of the first sub-board are electrically connected to the second sub-board through the metallized through holes. The number and position of the through holes are adjusted according to requirements.

[0044] Further, in a specific embodiment, after the through holes of the laminated board are drilled and the through holes are metallized, the through holes are back-drilled. The back-drilling is performed by using a drill bit larger than the through hole to remove the metal on the wall of the metallized through hole within a certain depth. The back-drilling is because the electrical connection between the conductive layers and the signal layers of the laminated board is logically designed according to requirements, and not all layers need to be electrically connected through a through hole. For the conductive layers that do not need to be electrically connected, the metal on the wall between the through holes is removed after back-drilling to disconnect them, meeting the design requirements of the logical circuit.

[0045] The circuit board manufacturing method in the embodiment is characterized in that the second core board is laminated on one side of the first sub-board, the second core board includes a first metal layer in the inner layer and a second metal layer in the outer layer, the first metal layer is a circuit pattern with uniform thickness, and after the through holes are copper-plated to form a metal layer with non-uniform thickness on the surface of the second metal layer, the second metal layer is etched to expose the dielectric layer, and the second sub-board is laminated on the surface. The first metal layer with uniform thickness is used as a signal layer to stabilize the signal transmission between the multi-layer circuit board sub-boards and effectively reduce the signal transmission loss.

[0046] Please refer to Figures 2a-2d , Figures 2a-2d is a flowchart of the second embodiment of the circuit board manufacturing method provided by the present application.

[0047] Please refer to Figure 2a , a plurality of first core boards 210 are laminated, and a second core board 220 is arranged on an outer layer. The second core board 220 includes a first metal layer 221, a dielectric layer 222, and a second metal layer 223 which are laminated. The first metal layer 221 is arranged towards the first core board 210, and the second metal layer 223 is arranged away from the first core board 210 to form a first sub-board 200. The plurality of first core boards 210 and the second core board 220 are bonded by a first adhesive layer 230, wherein the thickness of the first adhesive layer 230 is 6 mils, the thickness of the first core board 210 is 6 mils, and the thickness of the second core board 220 is 2 mils.

[0048] In the embodiment, the first sub-board 200 includes two first core boards 210, and in other embodiments, the first sub-board 200 can include three, four or more first core boards 210 arranged in a stack. A second core board 220 is arranged on one side of the first sub-board 200. The first adhesive layer 230 is made of PP glue, and in other embodiments, the first adhesive layer 230 can also be other insulating glue. The thickness of each first core board 210 and each first adhesive layer 230 is the same, which can make the thickness of the final multi-layer board consistent and ensure the signal transmission rate between each layer stable and consistent.

[0049] The first metal layer 221 and the metal layer on the other side of the first core board 210 are patterned before pressing, specifically, film pasting, exposure, development and etching. After the first core board 210 and the second core board 220 are pressed and patterned, the board is cut to form the first sub-board 200 with the required size.

[0050] Referring to Figure 2b A through hole (not shown) is drilled in the first sub-board 200, and the hole wall surface of the drilled through hole is plated with metal.

[0051] This step refers to step S12, which will not be described here.

[0052] Referring to Figure 2c The outer layer of the first sub-board 200 away from the second core board (not shown in the figure) is pasted with a film to prevent the outer layer of the first sub-board 200 away from the second core board from being etched. The second metal layer (not shown in the figure) on the second core board is etched to expose the dielectric layer 222.

[0053] Specifically, in the embodiment, the first sub-board 200 has a second core board arranged on one side, and the other side is a first core board 210. Only the side of the first sub-board 200 with the second core board is pressed with another board, so it is necessary to ensure that the signal layer metal on the side of the pressed another board is flat. When etching, only the second metal layer on the side of the second core board needs to be etched, and the dielectric layer 222 is exposed. Pasting a film on the first core board 210 on the other side of the first sub-board 200 can effectively protect the metal layer of the first core board 210 from being etched when it is corroded in the etching solution.

[0054] Referring to Figure 2d A second sub-board is obtained, and the second sub-board is pressed on the side of the dielectric layer 222 exposed by the first sub-board (not shown in the figure). The second sub-board is another first sub-board, and the side of the dielectric layer 222 exposed by the first sub-board (not shown in the figure) is pressed together with the side of the dielectric layer 222 exposed by the other first sub-board.

[0055] Specifically, in this embodiment, the two first sub-boards are contact-bonded together with the medium layer 222 exposed after etching on one side, wherein the first sub-board and the other first sub-board are contact-bonded by the second adhesive layer 240, and the total thickness of the unetched part of the second core board (not marked in the figure) of the first sub-board, the unetched part of the second core board of the other first sub-board, and the second adhesive layer 240 is 6 mil. The total thickness of the unetched part of the second core board of the first sub-board, the unetched part of the second core board of the other first sub-board, and the second adhesive layer 240 is 6 mil, which is the same as the thickness of the first core board 210 in the first sub-board and the thickness of the first adhesive layer 230. Finally, the interlayer medium thickness of the multi-layer board is uniform, which ensures that the signal transmission rate between each layer is consistent and stable. The material of the second adhesive layer 240 is PP glue, and in other embodiments, the second adhesive layer 240 can also be other insulating glue.

[0056] After the first sub-board and the other first sub-board are contact-bonded, the same as step S14 of the first embodiment, the contact-bonded board is further processed to drill through holes and metalize the through holes. Each conductive layer and signal layer of the first sub-board is electrically connected to the other first sub-board through the metalized through holes. The number and position of the drilled through holes are adjusted according to requirements. Further, back drilling processing of the metalized through holes can also be included, which is not described in detail here.

[0057] Further, in this embodiment, after the second core board is arranged on one side of the first sub-board, the second metal layer of the second core board is etched, and another first sub-board also provided with a second core board on one side is contact-bonded on the exposed medium layer 222. In other embodiments, the second core board can be arranged on both sides of the first sub-board, and the second metal layer of the second core board on both sides is etched, and then another sub-board is contact-bonded on both sides of the first sub-board, wherein the difference between the other sub-board and the first sub-board is that the other sub-board is provided with a second core board on one side and is etched by the second metal layer. Finally, the composite board is composed of three sub-boards, and the sub-board in the middle layer and the sub-boards on both sides are contact-bonded together by the first metal layer 221 with uniform thickness as the signal layer.

[0058] The circuit board manufacturing method in this embodiment arranges the second core board on one side of the first sub-board, the second core board includes the first metal layer with uniform thickness in the inner layer and the second metal layer with uneven thickness on the outer layer. After the through hole is copper-plated to form a second metal layer with uneven thickness on the surface, the second metal layer is etched directly, the medium layer is exposed, and another first sub-board subjected to the same processing is contact-bonded on the surface, so that the first metal layer with uniform thickness is used as the signal layer, the signal transmission between the multiple sub-boards of the multi-layer circuit board is stable, and the signal transmission loss is effectively reduced.

[0059] Please refer to Figure 3 , Figure 3is a flowchart of a third embodiment of a circuit board manufacturing method provided in the present application.

[0060] S31: Stack a plurality of first core boards, and set a second core board at both outer layers, the second core board comprising a first metal layer, a dielectric layer and a second metal layer stacked, the first metal layer being arranged towards the first core board, and the second metal layer being arranged away from the first core board, to form a first sub-board, the plurality of first core boards and the second core board being bonded by a first adhesive layer, and the second core board being set at both outer layers, wherein the thickness of the first adhesive layer is controlled to be 6 mil, the thickness of the first core board is 6 mil, and the thickness of the second core board is 2 mil.

[0061] In the present embodiment, the first sub-board comprises two first core boards, and in other embodiments, the first sub-board can comprise three, four or more first core boards stacked. Different from the second embodiment, in the present embodiment, the first sub-board is provided with a second core board on both sides, and to make the first sub-board have a logic circuit satisfying different functions, the first metal layer and the metal layer on both sides of the first core board also need to be patterned before being pressed, which can be film pasting, exposure and etching after development. After the first core board and the second core board are pressed, a cutting process is further included, specifically, the stacked and pressed board is placed on a cutting machine, and the first sub-board with a required size is cut according to the required size, to form the first sub-board.

[0062] S32: Drill a through hole in the first sub-board, and plate a metal on the hole wall surface of the drilled through hole.

[0063] This step refers to step S12, which will not be described here.

[0064] S33: Etch the second metal layer of the second core board at both outer layers of the first sub-board to expose the dielectric layer.

[0065] Specifically, different from the second embodiment, in the present embodiment, the first sub-board is provided with a second core board on both sides, and before etching, no dry film protection process is needed, the second metal layer of the second core board at both outer layers of the first sub-board is etched, and the dielectric layer on both sides is exposed.

[0066] S34: Obtain a second sub-board, and press the second sub-board on the side where the dielectric layer is exposed. The second sub-board is a copper foil layer, and the dielectric layer exposed at both outer layers of the first sub-board respectively contacts and presses the copper foil layer.

[0067] Specifically, in the embodiment, the medium layers exposed on the two sides of the first sub-board after etching are both in contact with the copper foil layer. The first sub-board is in contact with the copper foil layer through the third adhesive layer. The total thickness of the unetched part of the second core layer of the outer layer of the first sub-board and the third adhesive layer and the copper foil layer in contact with the third adhesive layer is 6 mil. The total thickness of the unetched part of the second core layer of the outer layer of the first sub-board and the third adhesive layer and the copper foil layer in contact with the third adhesive layer is 6 mil, which is the same as the thickness of the first core layer in the first sub-board and the thickness of the first adhesive layer. The thickness of the third adhesive layer is the same as the thickness of the first core layer in the first sub-board and the thickness of the first adhesive layer. Finally, the interlayer thickness of the multilayer board is consistent, which ensures that the signal transmission rate between the layers is consistent and stable. The material of the third adhesive layer is PP glue. In other embodiments, the third adhesive layer can also be other insulating glue.

[0068] After the first sub-board and the copper foil layer are laminated, the through hole drilling and the metalized through hole processing are further included, which is the same as step S14 of the first embodiment. The conductive layers and the signal layers of the first sub-board are electrically connected to the copper foil layer through the metalized through holes. The number and position of the through holes are adjusted according to the requirements. Further, back drilling processing of the metalized through holes can also be included, which will not be described in detail here.

[0069] The circuit board manufacturing method in the embodiment includes laminating the second core layer on both sides of the first sub-board. The second core layer includes the first metal layer in the inner layer and the second metal layer in the outer layer. The first metal layer is a circuit pattern with uniform thickness. After the through hole is copper plated and the second metal layer surface is formed into a metal layer with uneven thickness, the second metal layer on both sides is directly etched to expose the medium layer. The copper foil layer is laminated on both surfaces. The two uniform thickness first metal layers are used as signal layers to stabilize the signal transmission between the multilayer circuit board and effectively reduce the signal transmission loss.

[0070] Correspondingly, the application also provides a circuit board. Please refer to Figure 4 In a specific embodiment, the circuit board of the application includes:

[0071] The first sub-board (not labeled in the figure) includes a first core layer 410 laminated and arranged. The first metal layer 421 is arranged on both sides of the first core layer 410. The copper foil layer 450 is laminated and arranged on both sides of the first metal layer 421. The circuit board provided by the application includes a manufacturing process of laminating the second core layer on both sides of the first sub-board. The second core layer includes the first metal layer 421 in the inner layer and the second metal layer in the outer layer. The first metal layer 421 is a circuit pattern with uniform thickness. After the through hole is copper plated and the second metal layer surface is formed into a metal layer with uneven thickness, the second metal layer on both sides is directly etched to expose the medium layer. The copper foil layer 450 is laminated on both surfaces. The two uniform thickness first metal layers 421 are used as signal layers to stabilize the signal transmission between the multilayer circuit board and effectively reduce the signal transmission loss.

[0072] The above merely provides the implementation of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent principle transformation, or direct or indirect application in other related technical fields, which is based on the content of the present application and the accompanying drawings, is also included in the patent protection scope of the present application.

Claims

1. A method of manufacturing a circuit board, characterized by, The application relates to a circuit board manufacturing method. A plurality of first core plates are stacked, and a second core plate is arranged on the outer layer, the second core plate comprising a first metal layer, a dielectric layer and a second metal layer which are stacked, the first metal layer being arranged towards the first core plate, and the second metal layer being arranged away from the first core plate to form a first sub-board; Through holes are drilled in the first sub-board, and the hole walls of the through holes are plated with metal; The second metal layer on the second core plate is etched to expose the dielectric layer; A second sub-board is obtained, and the second sub-board is laminated on the exposed side of the dielectric layer.

2. The method of manufacturing a circuit board according to claim 1, wherein The step of stacking a plurality of first core plates and arranging a second core plate on the outer layer comprises: A second core plate is arranged on the outer layer, and a plurality of first core plates and the second core plate are bonded by a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mil, the thickness of the first core plate is controlled to be 6 mil, and the thickness of the second core plate is controlled to be 2 mil.

3. The method of manufacturing a circuit board according to claim 2, wherein Before the step of etching the second metal layer on the second core plate to expose the dielectric layer, the method further comprises: A film is attached to the outer layer of the first sub-board away from the second core plate to prevent the outer layer of the first sub-board away from the second core plate from being etched.

4. The method of manufacturing a circuit board according to claim 3, wherein The step of laminating the second sub-board on the exposed side of the dielectric layer comprises: The second sub-board is another first sub-board, and the exposed side of the dielectric layer of the first sub-board is laminated together with the exposed side of the dielectric layer of another first sub-board.

5. The circuit board manufacturing method according to claim 4, wherein The first sub-board and another first sub-board are laminated together by a second adhesive layer, wherein the total thickness of the unetched part of the second core plate of the first sub-board, the unetched part of the second core plate of another first sub-board and the second adhesive layer is controlled to be 6 mil.

6. The method of manufacturing a circuit board according to claim 1, wherein The step of stacking a plurality of first core plates and arranging a second core plate on the outer layer comprises: Two second core plates are arranged on the outer layer, and a plurality of first core plates and the second core plates are bonded by a first adhesive layer, wherein the thickness of the first adhesive layer is controlled to be 6 mil, the thickness of the first core plate is controlled to be 6 mil, and the thickness of the second core plate is controlled to be 2 mil.

7. The circuit board manufacturing method according to claim 6, wherein The second metal layer of the second core plate on the two outer layers of the first sub-board is etched to expose the dielectric layer.

8. The circuit board manufacturing method according to claim 7, wherein The second sub-board is a copper foil layer, and the copper foil layer is laminated on the exposed dielectric layers on the two outer layers of the first sub-board.

9. The circuit board manufacturing method according to claim 8, wherein The first sub-board and the copper foil layer are laminated together by a third adhesive layer, wherein the total thickness of the unetched part of the second core plate on the two outer layers of the first sub-board, the third adhesive layer and the copper foil layer is controlled to be 6 mil.

10. A circuit board, characterized by The circuit board is manufactured by the method of any one of claims 1 to 9. The circuit board is manufactured by the method of any one of claims 1 to 9.

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