Communication chip power system and communication chip

By introducing a power system consisting of a main power interface, a transmit power interface, a DC-DC module, and a multi-level LDO module into the communication chip, the problems of high noise, multiple interfaces, and high power consumption in the communication chip are solved. This achieves independent power supply and noise isolation between modules, reduces power consumption, and improves anti-interference performance.

CN116961686BActive Publication Date: 2025-12-19TECHTOTOP MICROELECTRONICS
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202310940690.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-28
Publication Date
2025-12-19
Estimated Expiration
2043-07-28

AI Technical Summary

Technical Problem

Existing communication chips suffer from problems such as high power supply noise, excessive interface usage, and high power consumption.

Method used

The communication chip power system includes a main power interface, a transmit power interface, a DC-DC module, a multi-level LDO module, and a power management module. The power management module controls the switching and output voltage of each power module, achieving independent power supply and noise isolation between modules, reducing the number of DC-DC modules, and using on-chip DC-DC modules to improve power consumption efficiency.

Benefits of technology

It effectively isolates the impact of noise sources on sensitive circuits, reduces power interface occupancy, lowers the power consumption of communication chips, and improves anti-interference performance and power utilization.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN116961686B_ABST
    Figure CN116961686B_ABST
Patent Text Reader

Abstract

The application discloses a communication chip power supply system and a communication chip, wherein a power management module in the communication chip power supply system is connected with a main power supply interface through a first primary LDO module, a baseband transceiver module, a radio frequency receiving module and a radio frequency transmitting low-voltage module are connected with an output end of a DC-DC module through a secondary LDO module respectively, an input end of the DC-DC module is connected with the main power supply interface, and a radio frequency transmitting high-voltage module is connected with a transmitting power supply interface through a second primary LDO module. The secondary LDO module is used to prevent the level inversion noise of the DC-DC module from affecting the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module, the radio frequency transmitting high-voltage module is separately provided with the primary LDO module for power supply, external power supply ripple is isolated, the anti-interference performance of the communication chip is improved, and noise is effectively isolated. The on-chip DC-DC module is used, the power consumption utilization rate is improved, and the overall power consumption is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to the technical field of chip power supply, in particular to a communication chip power supply system and a communication chip. BACKGROUND

[0002] The communication chip is used in a terminal, and provides radio frequency transmitting and radio frequency receiving functions for the terminal to realize the communication function of the terminal.

[0003] At present, in order to realize the radio frequency transmitting and receiving functions, a baseband transceiver module, a radio frequency receiving module, a radio frequency transmitting low-voltage module and a radio frequency transmitting high-voltage module are arranged in the communication chip, and when the communication chip is powered, the baseband transceiver module, the radio frequency receiving module, the radio frequency transmitting low-voltage module and the radio frequency transmitting high-voltage module are directly powered by a DC-DC module, on the one hand, the DC-DC is used to realize the voltage conversion output by adjusting the high-low level duty cycle, and the output voltage inevitably has level inversion noise, on the other hand, each DC-DC module is directly powered by an external voltage, which increases the power supply interface of the communication chip, and the power consumption is high when the number of DC-DC modules is large. SUMMARY

[0004] The purpose of the embodiment of the present application is to provide a communication chip power supply system and a communication chip to solve the problems of large noise, more occupied communication chip interface and high power consumption in the existing communication chip power supply scheme.

[0005] To solve the above problems, the embodiment of the present application adopts the following technical scheme:

[0006] In a first aspect, the present application provides a communication chip power supply system applied to a communication chip including a baseband transceiver module, a radio frequency receiving module, a radio frequency transmitting low-voltage module and a radio frequency transmitting high-voltage module, the communication chip power supply system comprising: a main power supply interface, a transmitting power supply interface, a DC-DC module, a first primary LDO module, a second primary LDO module, a power management module and a secondary LDO module, the power management module is connected with the main power supply interface through the first primary LDO module, the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module are connected with the output end of the DC-DC module through a secondary LDO module respectively, the input end of the DC-DC module is connected with the main power supply interface, the radio frequency transmitting high-voltage module is connected with the transmitting power supply interface through the second primary LDO module, and the power management module is connected with the DC-DC module, the first primary LDO module, the second primary LDO module and each secondary LDO module respectively.

[0007] The power management module is configured to control the power switch and output voltage of the DC-DC module, the first primary LDO module, the second primary LDO module and each secondary LDO module.

[0008] In an optional embodiment, the communication chip further comprises an IO PAD group, the output end of the first primary LDO module is further connected to a low-voltage power supply input end of the IO PAD group, and the main power supply interface is connected to a high-voltage power supply input end of the IO PAD group.

[0009] In an optional embodiment, the communication chip further comprises a Flash PAD group, and the power supply system of the communication chip further comprises a third primary LDO module, an input end of the third primary LDO module is connected to the main power supply interface, and an output end of the third primary LDO module is respectively connected to a high-voltage power supply end of the Flash PAD group and an external Flash of the communication chip, so as to provide high-voltage working voltage for the Flash PAD group and supply power for the external Flash, and an output end of the secondary LDO module connected to the baseband transceiver module is connected to a low-voltage power supply end of the Flash PAD group, so as to provide low-voltage working voltage for the Flash PAD group.

[0010] In an optional embodiment, the communication chip further comprises a crystal oscillator clock processing module, and the power supply system of the communication chip further comprises a fourth primary LDO module, an input end of the fourth primary LDO module is connected to the main power supply interface, and an output end of the fourth primary LDO module is respectively connected to the crystal oscillator clock processing module and an external crystal oscillator of the communication chip, so as to supply power for the crystal oscillator clock processing module and the external crystal oscillator.

[0011] The crystal oscillator clock processing module is configured to receive and shape the clock of the external crystal oscillator, determine the state information of the external crystal oscillator, determine the target working voltage of the external crystal oscillator according to the state information, and generate a control instruction to the power management module according to the target working voltage.

[0012] The power management module is configured to adjust the voltage output by the fourth primary LDO module to the target working voltage according to the control instruction.

[0013] In an optional embodiment, a filter capacitor is arranged at the output end of the first primary LDO module.

[0014] In an optional embodiment, at least one of the input end and the output end of the second primary LDO module is provided with a filter capacitor.

[0015] In an optional embodiment, a bandgap reference module is further included, an input end of the bandgap reference module is connected with the main power supply interface, and an output end of the bandgap reference module is connected with the DC-DC module, each first-level LDO module and each second-level LDO module, and the bandgap reference module is configured to provide a reference voltage for the DC-DC module, each first-level LDO module and each second-level LDO module.

[0016] In an optional embodiment, the bandgap reference module is specifically configured to:

[0017] acquire a measured voltage of a second-level LDO module connected with the radio frequency receiving module under a preset load;

[0018] calculate a voltage deviation degree according to the measured voltage and a standard voltage under the preset load;

[0019] determine a common reference voltage of the DC-DC module, each first-level LDO module and each second-level LDO module based on the voltage deviation degree.

[0020] In an optional embodiment, the power management module is specifically configured to:

[0021] acquire a voltage drop of each second-level LDO module and determine a maximum voltage drop;

[0022] calculate a sum of the maximum voltage drop and a preset voltage as a target output voltage of the DC-DC module;

[0023] adjust an output voltage of the DC-DC module to the target output voltage.

[0024] In a second aspect, the present application provides a communication chip, which comprises the communication chip power supply system of any one of the embodiments of the first aspect.

[0025] The communication chip power supply system of the embodiment of the application comprises a main power supply interface, a transmitting power supply interface, a DC-DC module, a first primary LDO module, a second primary LDO module, a power management module and a secondary LDO module, the main power supply interface and the transmitting power supply interface are arranged in the whole communication chip, the problem that various modules in the existing communication chip occupy too many communication chip ports by connecting external power supply through multiple DC-DC modules is solved, the occupation of the communication chip interface by power supply is reduced, the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module are connected with the DC-DC module through respective secondary LDO modules, the power supply of the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module is independent of each other, the sensitive circuit between the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module can be prevented from being affected by the power supply of the noise source circuit, the influence of the level inversion noise of the DC-DC module on the baseband transceiver module, the radio frequency receiving module and the radio frequency transmitting low-voltage module can be prevented through the secondary LDO module, the influence of the logic inversion noise of the baseband transceiver module on the radio frequency receiving module and the radio frequency transmitting low-voltage module can be prevented, in addition, the radio frequency transmitting high-voltage module is powered by the primary LDO module alone, the influence of the external power supply ripple on the radio frequency transmitting high-voltage module is isolated, the anti-interference performance of the communication chip is improved, and the noise is effectively isolated, furthermore, the on-chip DC-DC module is adopted, the power consumption utilization rate is improved, and the power consumption of the whole communication chip is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0026] The application will be further described in detail below with reference to the drawings and embodiments.

[0027] Figure 1 FIG. 1 is a structural schematic diagram of a communication chip power supply system according to an embodiment of the application.

[0028] Figure 2 FIG. 2 is a structural schematic diagram of a communication chip power supply system according to another embodiment of the application.

[0029] Figure 3 FIG. 3 is a schematic diagram of a filter circuit at an output end of a DC-DC module in the embodiment of the application.

[0030] Figure 4 FIG. 4 is a schematic diagram of a baseband transceiver module in the embodiment.

[0031] Figure 5 FIG. 5 is a schematic diagram of a filter capacitor arranged at an input end and an output end of a second primary LDO module in the embodiment of the application.

[0032] In the drawings:

[0033] 1. Main power interface; 2. Transmit power interface; 3. DC-DC module; 4. First-level LDO module; 5. Second-level LDO module; 6. Power management module; 7. Second-level LDO module; 71. First and second-level LDO modules; 72. Second and second-level LDO modules; 73. Third and second-level LDO modules; 8. IO PAD group; 9. Third-level LDO module; 10. Fourth-level LDO module; 100. Communication chip; 101. Baseband transceiver module; 102. RF receiver module; 103. RF transmit low-voltage module; 104. RF transmit high-voltage module; 105. Flash PAD group; 106. External Flash; 107. Crystal clock processing module; 108. External crystal oscillator. Detailed Implementation

[0034] To make the technical problems solved by the present invention, the technical solutions adopted, and the technical effects achieved clearer, the technical solutions of the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] In the description of this invention, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0036] Figure 1 This is a schematic diagram of the structure of a communication chip power supply system according to an embodiment of the present invention, such as... Figure 1 As shown, the communication chip power system of this embodiment is applied to the communication chip 100, which may be a Beidou communication chip, etc. The communication chip 100 includes at least a baseband transceiver module 101, an RF receiving module 102, an RF transmitting low-voltage module 103, and an RF transmitting high-voltage module 104. The communication chip power system includes a main power interface 1, a transmitting power interface 2, a DC-DC module 3, a first-stage LDO module 4 (Low Dropout Regulator), a second-stage LDO module 5, a power management module 6, and a second-stage LDO module 7.

[0037] The main power supply interface 1 is used for externally connecting a main power supply of the communication chip 100, and the main power supply interface 1 can be externally connected to a direct current power supply of 1.62V-5.0V for example. The transmitting power supply interface 2 is used for externally connecting a power supply for radio frequency high-voltage transmission of the communication chip 100, and the transmitting power supply interface 2 can be externally connected to a direct current power supply of 3.0V-5.0V for example. The first-level LDO module can be a low-dropout linear regulator whose input end is directly connected to the main power supply interface 1 or the transmitting power supply interface 2. The second-level LDO module can be a low-dropout linear regulator whose input end is not directly connected to the main power supply interface 1 or the transmitting power supply interface 2. The power management module 6 can be a module for controlling switching of various power supply modules in the communication chip 100, output voltage configuration, power supply sequence and the like. In the embodiment, the DC-DC module and the LDO modules of different levels can refer to the prior art, and the specific circuit structure and type of the DC-DC module and the LDO modules of different levels are not limited in the embodiment, as long as direct current voltage conversion and voltage stabilization can be achieved.

[0038] As shown in Figure 1 , the power management module 6 is connected to the main power supply interface 1 through the first first-level LDO module 4. The baseband transceiver module 101, the radio frequency receiving module 102 and the radio frequency transmitting low-voltage module 103 are connected to the output end of the DC-DC module 3 through the second-level LDO modules 7. The input end of the DC-DC module 3 is connected to the main power supply interface 1. The radio frequency transmitting high-voltage module 104 is connected to the transmitting power supply interface 2 through the second first-level LDO module 5. The power management module 6 is connected to the DC-DC module 3, the first first-level LDO module 4, the second first-level LDO module 5 and each second-level LDO module 7. Specifically, as shown in Figure 1 , the baseband transceiver module 101 is connected to the output end of the DC-DC module 3 through the first second-level LDO module 71. The radio frequency receiving module 102 is connected to the output end of the DC-DC module 3 through the second second-level LDO module 72. The radio frequency transmitting low-voltage module 103 is connected to the output end of the DC-DC module 3 through the third second-level LDO module 73. The power management module 6 is used for controlling the power supply switching and output voltage of the DC-DC module 3, the first first-level LDO module 4, the second first-level LDO module 5 and each second-level LDO module (71, 72, 73).

[0039] The embodiment sets the power management module 6 in the communication chip 100. The power management module 6 controls the DC-DC module 3, the first first-level LDO module 4, the second first-level LDO module 5 and each second-level LDO module (71, 72, 73), so that internal power supply and management of the communication chip 100 can be achieved. The DC-DC module 3 is arranged in the communication chip 100, that is, the DC-DC module is on-chip, so that power consumption utilization rate is improved.

[0040] Furthermore, by supplying power to the baseband transceiver module 101, the RF receiver module 102, and the RF transmitter low-voltage module 103 through the first-level LDO module 71, the second-level LDO module 72, and the third-level LDO module 73 respectively, noise generated by level switching during the operation of the DC-DC module 3 is suppressed. In the communication chip 100, the RF receiver module 102 is a noise-sensitive circuit that needs to operate continuously, the RF transmitter low-voltage module 103 is a noise-sensitive circuit that needs to operate intermittently, and the baseband transceiver module 101 is a noise source circuit that needs to operate continuously. By supplying power to the first-level LDO module 71, the second-level LDO module 72, and the third-level LDO module 73 separately, power isolation between the noise-sensitive circuit and the noise source is achieved, improving the anti-interference performance of the communication chip 100 and effectively isolating noise.

[0041] Furthermore, the high-voltage RF transmission module 104 is powered by the external transmit power interface 2 of the second-level LDO module 5, which realizes separate and independent power supply for high-voltage transmission and low-voltage transmission. The entire communication chip only needs to set the main power interface 1 and the transmit power interface 2, and the power supply occupies few interfaces of the communication chip 100.

[0042] like Figure 2 As shown, in one embodiment, the communication chip 100 further includes an IO PAD group 8. The output terminal of the first-level LDO module 4 is also connected to the low-voltage power supply input terminal of the IO PAD group 8, and the main power interface 1 is connected to the high-voltage power supply input terminal of the IO PAD group 8. Specifically, the IO PAD group 8 can be an interface in the communication chip 100 that provides signal input and output. The first-level LDO module 4 can provide a low-voltage operating voltage to the power management module 6 and the IO PAD group 8, and the main power interface 1 provides a high-voltage operating voltage to the IO PAD group 8. Since the power management module 6 controls the DC-DC module 3, the first-level LDO module, and the second-level LDO module of the entire communication chip 100, the power supply priority of the first-level LDO module 4 is high. That is, when the DC-DC module 3, the second-level LDO module 5, and the second-level LDO module 7 are all turned off, the first-level LDO module 4 also supplies power to the power management module 6 and the IO PAD group 8 to ensure that the communication chip 100 can communicate with external devices through the IO PAD group 8.

[0043] like Figure 2As shown, in one embodiment, the communication chip 100 further comprises a Flash PAD group 105, and the communication chip power supply system further comprises a third primary LDO module 9, wherein the Flash PAD group 105 can be an interface in the communication chip 100 for communication with a Flash chip. An input end of the third primary LDO module 9 is connected with the main power supply interface 1, and output ends of the third primary LDO module 9 are respectively connected with a high-voltage power supply end of the Flash PAD group 105 and an external Flash 106 of the communication chip 100, so as to provide a high-voltage working voltage for the Flash PAD group 105 and to supply power for the external Flash 106. An output end of the first secondary LDO module 71 connected with the baseband transceiver module 101 is connected with a low-voltage power supply end of the Flash PAD group 105, so as to provide a low-voltage working voltage for the Flash PAD group 105.

[0044] By supplying power for the Flash PAD group 105 and the external Flash 106 through the third primary LDO module 9, the supply voltage is stable. In addition, the working voltage of the Flash on the market is usually in a range of 1.8V±10% or 3.3V±10%. When the external Flash 106 with a supply voltage range of 1.8V±10% is selected, the third primary LDO module 9 can be controlled to work in a 1.8V stable voltage output mode when the voltage of the main power supply interface 1 is in a range of 1.98-5.0V, and the third primary LDO module 9 can be controlled to work in a Bypass output mode (a working mode without voltage conversion) when the voltage of the main power supply interface 1 is in a range of 1.8V±10%, so as to ensure that the external Flash 106 can normally work in a relatively wide voltage range of the main power supply interface 1.

[0045] As shown, Figure 2As shown, in another embodiment, the communication chip 100 further comprises a crystal clock processing module 107, and the power supply system of the communication chip further comprises a fourth primary LDO module 10, an input end of the fourth primary LDO module 10 is connected with the main power interface 1, and output ends of the fourth primary LDO module 10 are respectively connected with the crystal clock processing module 107 and an external crystal oscillator 108 of the communication chip 100, so as to supply power to the crystal clock processing module 107 and the external crystal oscillator 108, wherein the external crystal oscillator 108 can be a temperature compensated crystal oscillator (TCXO), the crystal clock processing module 107 is used for receiving and shaping a clock of the external crystal oscillator 108, determining state information of the external crystal oscillator 108, determining a target working voltage of the external crystal oscillator 108 according to the state information, and generating a control instruction to the power management module 6 according to the target working voltage, so that the power management module 6 adjusts the voltage output by the fourth primary LDO module 10 to the target working voltage of the external crystal oscillator 108, thereby realizing that the voltage output by the fourth primary LDO module 10 to the external crystal oscillator 108 is adjustable, compatible with different types of external crystal oscillators 108 with different working voltages, and through the independent fourth primary LDO module 10 for supplying power to the external crystal oscillator 108, the influence of ripple in the external power supply connected with the main power interface 1 on the external crystal oscillator 108 can be isolated, and the stability of the external crystal oscillator 108 is improved.

[0046] In the embodiment, as shown in Figure 3 An output end of the DC-DC module 3 is further provided with a filter circuit, the filter circuit comprises an inductor L and a capacitor C1, one end of the inductor L is connected with the output end of the DC-DC module 3, the other end is connected with the first secondary LDO module 71, the second secondary LDO module 72 and the third secondary LDO module 73 and grounded through the capacitor C1, and the stability of the voltage output by the DC-DC module 3 can be improved through the inductor L and the capacitor C1. In an optional embodiment, the power management module 6 can obtain the voltage drops of the secondary LDO modules (71, 72, 73) and determine the maximum voltage drop, calculate the sum of the maximum voltage drop and the preset voltage as the target output voltage of the DC-DC module 3, and adjust the output voltage of the DC-DC module 3 to the target output voltage.

[0047] As shown in Figure 2As shown, assuming the voltage VDDH_MAIN of the main power interface 1 is 3.3V, the preset voltage is the operating voltage VDD_CORE of the subsequent circuits of the first secondary LDO module 71, the second secondary LDO module 72, and the third secondary LDO module 73, and Vdrop_max is the maximum value of the voltage drop among the first secondary LDO module 71, the second secondary LDO module 72, and the third secondary LDO module 73, and assuming the conversion efficiency η of the DC-DC module 3 is 90%, the target output voltage is:

[0048] VDDH_CORE=VDD_CORE+Vdrop_max=1.3V

[0049] The power consumption gains of DC-DC module 3 are:

[0050] 1-VDDH_CORE / (VDDH_MAIN*η)=1-1.3 / (3.3*90%)=56%, meaning that DC-DC module 3 saves 56% of power consumption, greatly reducing the power consumption of the entire communication chip 100.

[0051] In one embodiment, the output terminals of the first-stage LDO module 4, the third-stage LDO module 9, and the fourth-stage LDO module 10 may also be equipped with grounded filter capacitors to improve the stability of the output voltage of the first-stage LDO module 4, the third-stage LDO module 9, and the fourth-stage LDO module 10.

[0052] Similarly, grounded filter capacitors can be set at the output terminals of the first and second level LDO modules 71, the second and third level LDO modules 72, and the third level LDO module 73. The filter capacitors can prevent noise generated when the load at the output terminals of the first and second level LDO modules 71, the second and third level LDO modules 72, and the third level LDO module 73 changes drastically from coupling to the DC-DC module 3, which would cause noise in the voltage output by the DC-DC module 3 to affect other modules, thus improving the noise isolation performance of the communication chip 100.

[0053] like Figure 4 As shown, in the communication chip 100 of this embodiment, the baseband transceiver module 101 may include a processor, a baseband receiving signal processing unit, a clock and reset management unit, a memory unit, a baseband transmitting signal processing unit, and an external communication interface unit. The processor, the baseband receiving signal processing unit, the clock and reset management unit, the memory unit, the baseband transmitting signal processing unit, and the external communication interface unit are connected together via a bus.

[0054] like Figure 5As shown, at least one of the input end and the output end of the second primary LDO module 5 is provided with a filter capacitor, that is, a ground filter capacitor (C2, C3) can be arranged at the input end and the output end of the second primary LDO module 5. By arranging the second primary LDO module 5, the working voltage of the radio frequency transmission high voltage module 104 can not change with the voltage change of the transmission power supply interface 2, and during the radio frequency transmission process, when the load changes from the idle minimum state to the maximum state or from the maximum state to the idle minimum state, the power supply ripple caused by the load change will not be coupled to the external power supply connected to the transmission power supply interface 2, thereby improving the stability of the entire communication device power supply.

[0055] As shown in the figure, Figure 2 In another embodiment, a bandgap reference module 11 is further included, the input end of the bandgap reference module 11 is connected with the main power supply interface 1, the output end of the bandgap reference module 11 is connected with the DC-DC module 3, the first primary LDO module 4, the second primary LDO module 5, the third primary LDO module 9, the fourth primary LDO module 10 and each secondary LDO module (71, 72, 73), and the bandgap reference module 11 is used to provide a reference voltage for the DC-DC module 3, the first primary LDO module 4, the second primary LDO module 5, the third primary LDO module 9, the fourth primary LDO module 10 and each secondary LDO module (71, 72, 73).

[0056] Specifically, taking the second secondary LDO module 72 connected with the radio frequency receiving module 102 as an example, the bandgap reference module 11 can obtain a measured voltage of the second secondary LDO module 72 under a preset load, calculate a voltage deviation degree according to the measured voltage and a standard voltage under the preset load, and determine a reference voltage of the second secondary LDO module 72 based on the voltage deviation degree, until the second secondary LDO module 72 can output the standard voltage under the preset load according to the adjusted reference voltage. Through the bandgap reference module 11, the inconsistency of each communication chip 100 caused by the difference in manufacturing and materials can be avoided, so that each communication chip 100 has a consistent reference voltage after passing through the bandgap reference module 11, which can not only ensure the accuracy of power supply of each power module in the communication chip 100, but also calibrate the reference voltage of each communication chip 100 by the bandgap reference module 11, realize the consistency of mass-produced communication chips 100, and improve the yield of mass production of communication chips 100.

[0057] The embodiment of the present application further provides a communication chip, which comprises the communication chip power supply system of the embodiment of the present application. Exemplarily, the communication chip power supply system of the embodiment of the present application can be packaged in a communication chip.

[0058] The technical principles of the present application are described above in combination with specific embodiments. These descriptions are only for explaining the principles of the present application, and cannot be interpreted as limiting the protection scope of the present application in any way. Based on the explanations herein, other specific embodiments of the present application can be conceived by those skilled in the art without any creative effort, and these embodiments will all fall within the protection scope of the present application.

Claims

1. A communication chip power system, characterized by, The application is applied to a communication chip including a baseband transceiver module, a radio frequency receiving module, a radio frequency transmitting low-voltage module, and a radio frequency transmitting high-voltage module, and a power supply system of the communication chip includes a main power supply interface, a transmitting power supply interface, a DC-DC module, a first primary LDO module, a second primary LDO module, a power management module, and a secondary LDO module, the power management module is connected with the main power supply interface through the first primary LDO module, the baseband transceiver module, the radio frequency receiving module, and the radio frequency transmitting low-voltage module are connected with an output end of the DC-DC module through a secondary LDO module respectively, an input end of the DC-DC module is connected with the main power supply interface, the radio frequency transmitting high-voltage module is connected with the transmitting power supply interface through the second primary LDO module, and the power management module is connected with the DC-DC module, the first primary LDO module, the second primary LDO module, and each secondary LDO module respectively; the power management module is used for controlling power switches and output voltages of the DC-DC module, the first primary LDO module, the second primary LDO module, and each secondary LDO module.

2. The communication chip power system of claim 1, wherein, The communication chip further includes an IO PAD group, an output end of the first primary LDO module is further connected with a low-voltage power supply input end of the IO PAD group, and the main power supply interface is connected with a high-voltage power supply input end of the IO PAD group.

3. The communication chip power system of claim 1, wherein, The communication chip further includes a Flash PAD group, and the power supply system of the communication chip further includes a third primary LDO module, an input end of the third primary LDO module is connected with the main power supply interface, and output ends of the third primary LDO module are connected with a high-voltage power supply end of the Flash PAD group and an external Flash of the communication chip respectively to provide high-voltage working voltage for the Flash PAD group and to supply power for the external Flash, and an output end of a secondary LDO module connected with the baseband transceiver module is connected with a low-voltage power supply end of the Flash PAD group to provide low-voltage working voltage for the Flash PAD group.

4. The communication chip power system of claim 1, wherein, The communication chip further includes a crystal oscillator clock processing module, and the power supply system of the communication chip further includes a fourth primary LDO module, an input end of the fourth primary LDO module is connected with the main power supply interface, and output ends of the fourth primary LDO module are connected with the crystal oscillator clock processing module and an external crystal oscillator of the communication chip respectively to supply power for the crystal oscillator clock processing module and the external crystal oscillator; the crystal oscillator clock processing module is used for receiving and shaping a clock of the external crystal oscillator, determining state information of the external crystal oscillator, determining a target working voltage of the external crystal oscillator according to the state information, and generating a control instruction to the power management module according to the target working voltage; the power management module is used for adjusting a voltage output from the fourth primary LDO module to the external crystal oscillator to the target working voltage according to the control instruction.

5. The communication chip power system of claim 1, wherein, An output end of the first primary LDO module is provided with a filter capacitor.

6. The communication chip power system of claim 1, wherein, At least one of the input and the output of the second primary LDO module is provided with a filter capacitor.

7. The communication chip power system of any one of claims 1-6, wherein, The application further comprises a bandgap reference module, an input of which is connected with the main power supply interface, and an output of which is connected with the DC-DC module, each primary LDO module and each secondary LDO module, the bandgap reference module being used to provide reference voltages for the DC-DC module, each primary LDO module and each secondary LDO module.

8. The communication chip power system of claim 7, wherein, The bandgap reference module is specifically used for: acquiring a measured voltage of a secondary LDO module connected with the radio frequency receiving module under a preset load; calculating a voltage deviation degree according to the measured voltage and a standard voltage under the preset load; determining a common reference voltage of the DC-DC module, each primary LDO module and each secondary LDO module based on the voltage deviation degree.

9. The communication chip power system of any one of claims 1-6, wherein, The power management module is specifically used for: acquiring a voltage drop of each secondary LDO module and determining a maximum voltage drop; calculating a sum of the maximum voltage drop and a preset voltage as a target output voltage of the DC-DC module; adjusting an output voltage of the DC-DC module to the target output voltage.

10. A communication chip, comprising: The communication chip comprises the communication chip power supply system according to any one of claims 1-9.

Citation Information

Patent Citations

  • Power source management architecture and boost converter applied to power source management architecture

    CN110729887A

  • Low-noise power supply circuit special for frequency source

    CN212677078U