Vertical plate capacitor type sensitive chip structure

Abstract

The vertical electrode plate capacitive pressure sensitive chip structure belongs to the technical field of micro electro mechanical system (MEMS), and particularly relates to a capacitive pressure sensitive chip structure. The vertical electrode plate capacitive pressure sensitive chip structure is provided for the above problems. The vertical electrode plate capacitive pressure sensitive chip structure comprises a vertical first electrode plate (1) and a vertical second electrode plate (2) opposite to the first electrode plate (1), and is characterized in that a first cavity (3) is arranged between the first electrode plate (1) and the second electrode plate (2).

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of micro-electro-mechanical system (MEMS), and particularly relates to a structure of a capacitive pressure-sensitive chip. BACKGROUND

[0002] MEMS, i.e. micro-electro-mechanical system, belongs to a multi-disciplinary frontier field and is listed as one of five disruptive technologies that will affect future manufacturing industry. With the development of micro-electro-mechanical system technology, MEMS pressure sensors have become indispensable key devices in various industries and are widely used in consumer electronics, automotive electronics, aerospace, petroleum and chemical industry, biomedicine and national defense and military industry, etc. The key core of the MEMS pressure sensor is a pressure-sensitive chip. At present, the mainstream technologies are mostly piezoresistive and capacitive. Compared with the piezoresistive type, the capacitive pressure-sensitive chip has the advantages of high sensitivity, low power consumption and good temperature characteristics, and is more suitable for developing high-precision pressure sensors and is long-term in the research hotspot position in the field of MEMS.

[0003] At present, the existing capacitive MEMS pressure-sensitive chip generally adopts a parallel-plate capacitor structure, mainly composed of a movable electrode plate and a fixed electrode plate, and the two electrode plates are distributed in an up-down manner. When pressure acts on the movable electrode plate, the pressure-sensing electrode plate senses pressure from the up-down direction, the distance between the two electrode plates changes, and thus the capacitance value changes, so that the pressure is measured by detecting the capacitance value. The parallel-plate capacitor calculation formula is: , wherein ε0 is the vacuum permittivity, which is a fixed value; ε r is the relative permittivity of the dielectric between the electrode plates; A is the facing area between the electrode plates; d is the distance between the electrode plates. It can be known from the capacitance calculation formula that the output capacitance value C is in direct proportion to the facing area between the electrode plates. In order to obtain a certain capacitance value of the initial capacitance of the sensitive chip, the area of the two electrode plates cannot be too small, and the electrode plates are distributed in an up-down manner, which also limits the degree of reduction of the area size of the chip. SUMMARY

[0004] The present application is aimed at the above problems and provides a vertical electrode plate capacitive pressure-sensitive chip structure.

[0005] To achieve the above object, the present application adopts the following technical scheme. The present application comprises a vertical first electrode plate (1) and a vertical second electrode plate (2) opposite to the first electrode plate (1), characterized in that a first cavity (3) is arranged between the first electrode plate (1) and the second electrode plate (2). (as shown in Figure 1 )

[0006] As a preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer.

[0007] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer. Figure 2

[0008] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer.

[0009] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer. Figure 3

[0010] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer. Figure 4

[0011] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer. Figure 5

[0012] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer. Figure 6

[0013] As another preferred solution, the first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity. If the first cavity (3) is not sealed, it can be used to make a silicon microphone and an accelerometer.

[0014] ​​​​​The capacitor C formed between the first electrode plate (1) and the second electrode plate (2) works in the non-contact area between the second electrode plate (2) and the first electrode plate (1); or the second electrode plate (2) is deformed to contact the first electrode plate (1) after sensing pressure, and the contact area between the second electrode plate (2) and the first electrode plate (1) increases with the increase of pressure, and meanwhile the first electrode plate (1) is deformed towards the inside of the second cavity (9). Figure 7

[0015] As another preferred solution, the second cavity (9) is provided with a third electrode plate (10) away from the first electrode plate (1).

[0016] The second electrode plate (2) is not deformed to contact the first electrode plate (1) after sensing pressure; or the second electrode plate (2) is deformed to contact the first electrode plate (1) after sensing pressure, and the contact area between the second electrode plate (2) and the first electrode plate (1) increases with the increase of pressure, and meanwhile the first electrode plate (1) is deformed towards the third electrode plate (10); or the second cavity (9) is in communication with the outside (a through hole (11) can be provided on the cover plate (4)), the first electrode plate (1) and the second electrode plate (2) form a variable capacitor, and the first electrode plate (1) and the third electrode plate (10) form a constant capacitor or a variable capacitor (when the first electrode plate (1) is deformed under pressure). Figure 8 Figure 9

[0017] As another preferred solution, the first electrode plate (1) is provided with a first polarity electrical signal, and the second electrode plate (2) and the third electrode plate (10) are provided with an electrical signal opposite to the first polarity signal.

[0018] As another preferred solution, the second cavity (9) is surrounded by a substrate (5), the top of the second cavity (9) is provided with a cover plate (4), and the second cavity (9) is a sealed cavity.

[0019] As another preferred solution, the third electrode plate (10) is provided with a third cavity (13) away from the first electrode plate (1), and the third cavity (13) is provided with a fourth electrode plate (12) away from the third electrode plate (10).

[0020] ​​​The second electrode plate (2) and the first electrode plate (1) are deformed at the same time after sensing pressure, work in a non-contact interval, and form a variable capacitor; or the second electrode plate (2) and the first electrode plate (1) are deformed at the same time after sensing pressure and contact, the contact area of the second electrode plate (2) and the first electrode plate (1) increases with the increase of pressure, the third electrode plate (10) directly senses pressure and is movable; or the third electrode plate (10) does not sense pressure and is immovable (the thick film third electrode plate (10) is arranged to achieve the sensing pressure and immovable), the third electrode plate (10) and the fourth electrode plate (12) form an invariable capacitor, the second electrode plate (2) directly senses pressure and is movable, the first electrode plate (1) directly senses pressure and is movable, and the first electrode plate (1) and the second electrode plate (2) form a variable capacitor; or the third cavity (13) and the second cavity (9) are communicated with the outside (the through hole (14) and the through hole (11) are arranged on the cover plate (4)), the second electrode plate (2) directly senses pressure and is movable, the first electrode plate (1) directly senses pressure and is movable, the first electrode plate (1) and the second electrode plate (2) form a variable capacitor, the third electrode plate (10) and the fourth electrode plate (12) are immovable, and the third electrode plate (10) and the fourth electrode plate (12) form an invariable capacitor (as shown in Figure 10 、 11

[0021] As another preferred scheme, the third cavity (13) is surrounded by the substrate (5), the top of the third cavity (13) is the cover plate (4), and the third cavity (13) is a sealed cavity.

[0022] As another preferred scheme, the third electrode plate (10) and / or the fourth electrode plate (12) are provided with a dielectric layer (6).

[0023] In addition, the first electrode plate (1), the second electrode plate (2), the third electrode plate (10), and the fourth electrode plate (12) are respectively connected with an external circuit through a pressure welding point and a metal lead or a pressure welding point, and the places where the electrode plates are connected with the substrate and the cover plate are provided with an insulating dielectric layer (this is a conventional structure, which prevents short circuit between parts). Each structure of the present application can be used as a basic unit to form a capacitor array by repeated production on the same substrate.

[0024] The present application has the following beneficial effects.

[0025] The electrode plate is vertically arranged, when pressure acts on the movable electrode plate, the pressure sensing electrode plate senses pressure from the left and right directions of the cavity, the area of the chip can be optimized to the extreme, and the area size of the chip is greatly reduced. BRIEF DESCRIPTION OF DRAWINGS

[0026] The present application will be further described below in combination with the drawings and specific embodiments. The protection scope of the present application is not limited to the following descriptions.

[0027] Figure 1 is a structural schematic diagram of the present application.​Figure 1 The surface surrounded by the points A, B, C, D, E, F, G, and H is the first electrode plate 1, the surface surrounded by the points A, B, C, and D is the cover plate 4, and the surface surrounded by the points B, F, G, and C is the second electrode plate 2.

[0028] Figure 2 is a schematic diagram of the structural section of the present application.

[0029] Figure 3 is a schematic diagram of the structural section of the embodiment 1 of the present application.

[0030] Figure 4 is a schematic diagram of the structural section of the embodiment 2 of the present application.

[0031] Figure 5 is a schematic diagram of the structural section of the embodiment 3 of the present application.

[0032] Figure 6 is a schematic diagram of the structural section of the embodiment 4 of the present application.

[0033] Figure 7 is a schematic diagram of the structural section of the embodiment 5 of the present application.

[0034] Figure 8 is a schematic diagram of the structural section of the embodiment 6 of the present application.

[0035] Figure 9 is a schematic diagram of the structural section of the embodiment 7 of the present application.

[0036] Figure 10 is a schematic diagram of the structural section of the embodiment 8 of the present application.

[0037] Figure 11 is a schematic diagram of the structural section of the embodiment 9 of the present application.

[0038] Figure 12 is a schematic diagram of the structural section of the capacitor array of the embodiment 3 of the present application.

[0039] Figure 13 is a simulation output characteristic diagram of the embodiment 3 of the present application.

[0040] Explanation of reference signs:

[0041] 1. first electrode plate, 2. second electrode plate, 3. first cavity, 4. cover plate, 5. substrate, 6. dielectric layer, 7. gas, 8. support, 9. second cavity, 10. third electrode plate, 11. via, 12. fourth electrode plate, 13. third cavity, 14. via. DETAILED DESCRIPTION

[0042] As shown in the figure, the present application comprises a vertical first electrode plate (1) and a vertical second electrode plate (2) opposite to the first electrode plate (1), and a first cavity (3) between the first electrode plate (1) and the second electrode plate (2).

[0043] As Figure 1 shown, a first cavity (3) is arranged on the substrate (5), a cover plate (4) is arranged on the top of the first cavity (3), a first electrode plate (1) and a second electrode plate (2) are arranged on two opposite side walls of the first cavity (3) respectively, the movable electrode plate is deformed under pressure, the capacitance value between the first electrode plate (1) and the second electrode plate (2) is changed, and then the pressure value is measured.

[0044] As Figure 2 shown, the structural section view of the present application, a first cavity (3) is arranged on the substrate (5), a cover plate (4) is arranged on the top of the first cavity (3), a first electrode plate (1) and a second electrode plate (2) are arranged on two opposite side walls of the first cavity (3) respectively, the movable electrode plate is deformed under pressure, the capacitance value between the first electrode plate (1) and the second electrode plate (2) is changed, and then the pressure value is measured.

[0045] As Figure 3 shown, the first electrode plate (1) is arranged as the immovable electrode plate, the first electrode plate (1) is connected with the substrate (5), the second electrode plate (2) is arranged on the side wall of the first cavity (3) opposite to the first electrode plate (1), the second electrode plate (2) is directly movable under pressure, the cover plate (4) is arranged on the top of the first cavity (3), the first cavity (3) is sealed, the first electrode plate (1) and the second electrode plate (2) form a capacitor C, the capacitor C works in the non-contact interval between the second electrode plate (2) and the first electrode plate (1), when the second electrode plate (2) is pressed, the second electrode plate (2) is deformed under pressure, the interval between the first electrode plate (1) and the second electrode plate (2) is changed, the capacitor C is changed accordingly, the capacitor C changes with the pressure change of the second electrode plate (2), and then the pressure value is measured. The capacitor output characteristic curve of the present application is good, the precision is high, the sensitivity is high, the temperature drift is small, it is more suitable for high-precision small-range pressure measurement, the area of the chip can be optimized, under the condition of the same capacitor change amount, more than 90% of the chip area can be saved at most.

[0046] As Figure 4As shown in the figure, the first electrode plate (1) is arranged as a non-movable electrode plate, the first electrode plate (1) is connected with the substrate (5), and a dielectric layer (6) is arranged on the first electrode plate (1) on one side wall of the first cavity (3), a second electrode plate (2) is arranged on the side wall opposite to the first electrode plate (1) of the first cavity (3), the second electrode plate (2) is movable directly under pressure, a cover plate (4) is arranged on the top of the first cavity (3), and the first cavity (3) is sealed. The second electrode plate (2) deforms after being pressed and contacts the dielectric layer (6) on the first electrode plate (1), and the contact area between the second electrode plate (2) and the dielectric layer (6) increases with the increase of pressure, at this time, the output capacitance value presents a linear relationship with the pressure change, so that the pressure value is measured. The capacitor output characteristic curve of the application is good, the precision is high, the sensitivity is high, the temperature drift is small, it is more suitable for high-precision small-range pressure measurement, and the area of the chip can be optimized, under the condition of the same capacitance change, the chip area can be saved by more than 90%.

[0047] As shown in the figure, Figure 5 The first electrode plate (1) is arranged on one side wall of the first cavity (3), the first electrode plate (1) is connected with the substrate (5), the first electrode plate (1) is movable directly under pressure, the second electrode plate (2) is arranged on the side wall opposite to the first electrode plate (1) of the first cavity (3), the cover plate (4) is arranged on the top of the first cavity (3), the first cavity (3) is sealed, the second electrode plate (2) is movable directly under pressure, the first electrode plate (1) and the second electrode plate (2) deform at the same time after being pressed, the capacitance C formed by the first electrode plate (1) and the second electrode plate (2) changes with the deformation of the first electrode plate (1) and the second electrode plate (2) under pressure, so that the pressure value is measured, and the change amount of the capacitance C is larger. The size of the first electrode plate (1) and the second electrode plate (2) can be set as high 116um, long 650um, and thickness 3um, and the capacitance pressure curve diagram is obtained through software simulation, as shown in the figure, Figure 13 The pressure range is 0-130kp, and the corresponding capacitance change amount is 2.1pf, which has high sensitivity. The capacitor output characteristic of the application is good, has high sensitivity, good linearity, large linear range, small temperature drift, is more suitable for high-precision small-range pressure measurement, has strong overload capacity, and the area of the chip can be optimized, under the condition of the same capacitance change, the chip area can be saved by more than 90%.

[0048] As shown in the figure, Figure 6As shown, the first electrode plate (1) is set as a non-movable electrode plate. The first electrode plate (1) is connected to the substrate (5). A dielectric layer (6) is provided on the first electrode plate (1) on one side wall of the first cavity (3). A second electrode plate (2) is provided on the side wall of the first cavity (3) opposite to the first electrode plate (1). The second electrode plate (2) is directly pressure-sensitive and movable. A cover plate (4) is provided on the top of the first cavity (3). The first cavity (3) is sealed. A support (8) is provided on the dielectric layer, and gas (7) is filled into the first cavity (3). After the second electrode (2) senses the pressure, it deforms and comes into contact with the dielectric layer (6) on the first electrode (1). As the pressure increases, the contact area between the second electrode (2) and the dielectric layer (6) increases. At this time, the outward tension of the gas (7) inside the sealed first cavity (3) on the second electrode (2) and the support (8) on the first electrode (1) work together to prevent the second electrode (2) from being tightly attached to the first electrode (1), thus reducing the adhesive force between the two electrodes. When the pressure on the second electrode (2) decreases, the pressure of the gas (7) inside the sealed first cavity (3) forces the second electrode (2) to quickly reduce its deformation, thereby reducing the hysteresis characteristic. At this time, the output capacitance value will show a near-linear relationship with the pressure change, thereby measuring the pressure value. The capacitor output characteristics of the present invention are good, and the accuracy, sensitivity, and temperature drift are high. Moreover, the chip area can be optimized to an extreme extent. Under the same capacitance change, the chip area can be saved by more than 90%.

[0049] like Figure 7 As shown, both electrodes of the present invention are pressure-sensitive and movable. The first electrode (1) is disposed on one side wall of the first cavity (3), and the second cavity (9) is disposed on the opposite side of the first electrode (1) and in the opposite direction to the first cavity (3). The first electrode (1) is connected to the substrate (5). The second electrode (2) is disposed on the side wall of the first cavity (3) in the opposite direction to the first electrode (1). The second cavity (9) and the top of the first cavity (3) are provided with a cover plate (4). The first cavity (3) is sealed, the second cavity (9) is sealed, and the second electrode (2) is directly pressure-sensitive and movable. A dielectric layer (6) is disposed on the first electrode (1). After the second electrode (2) senses pressure, it deforms and comes into contact with the first electrode (1). As the pressure increases, the contact area between the second electrode (2) and the first electrode (1) increases, and at the same time, the first electrode (1) deforms into the second cavity (9). The capacitor output characteristic curve of this invention is good, and it has high precision, high sensitivity, small temperature drift, stronger overload resistance, and the chip area can be extremely optimized and smaller.

[0050] like Figure 8As shown, the first electrode plate (1) is disposed on one side wall of the first cavity (3), and the second cavity (9) is disposed on the opposite side of the first electrode plate (1) and in the opposite direction to the first cavity (3). The first electrode plate (1) is connected to the substrate (5). The second electrode plate (2) is disposed on the side wall of the first cavity (3) in the opposite direction to the first electrode plate (1). The second cavity (9) and the top of the first cavity (3) are provided with a cover plate (4). The second cavity (9) is disposed on the side wall in the opposite direction to the first electrode plate (1). The first cavity (3) is sealed, the second cavity (9) is sealed, the second electrode plate (2) is directly pressure-sensitive and movable, and the capacitor C1 formed between the first electrode plate (1) and the second electrode plate (2) works in the non-contact area between the second electrode plate (2) and the first electrode plate (1). The first plate (1) is connected to the first polarity electrical signal, and the second plate (2) and the third plate (10) are connected to the opposite polarity electrical signal. The first plate (1) and the second plate (2) form a variable capacitor C1, and the first plate (1) and the third plate (10) form a constant capacitor C2. The combination of capacitors C1 and C2 forms a differential capacitor, which shields common-mode signal interference, has stronger anti-interference ability, good capacitor output characteristic curve, high precision, high sensitivity, small temperature drift, strong overload, and the chip area can be extremely optimized and smaller.

[0051] like Figure 9 As shown, a first electrode plate (1) is disposed on one side wall of the first cavity (3), and a second cavity (9) is disposed on the opposite side of the first electrode plate (1) and in the opposite direction to the first cavity (3). The first electrode plate (1) is connected to the substrate (5). A second electrode plate (2) is disposed on the side wall of the first cavity (3) in the opposite direction to the first electrode plate (1). A cover plate (4) is disposed on the top of the second cavity (9) and the first cavity (3). A third electrode plate (10) is disposed on the side wall of the second cavity (9) in the opposite direction to the first electrode plate (1). A through hole (11) is disposed on the top of the second cavity (9) of the cover plate (4). The first cavity (3) is sealed. The first electrode plate (1) and the second electrode plate (2) are simultaneously movable and sensitive to pressure. The first electrode plate (1) transmits a first polarity electrical signal, and the second electrode plate (2) and the third electrode plate (10) transmit a first polarity electrical signal. The three plates (10) pass a second polarity electrical signal opposite to the first polarity signal. The first plate (1) and the second plate (2) undergo plate deformation simultaneously under pressure. The first plate (1) and the second plate (2) form a variable capacitor C1, and the first plate (1) and the third plate (10) form a variable capacitor C2. When the pressure increases, the capacitance C1 increases and the capacitance C2 decreases. The combination of capacitance C1 and C2 forms a differential capacitor C3. The change in capacitance C3 is equal to the sum of the changes in capacitance C1 and capacitance C2. The change in output capacitance C3 is larger, the accuracy is higher, and the sensitivity is higher. At the same time, it shields common-mode signal interference, has stronger anti-interference ability, good capacitor output characteristic curve, small temperature drift, strong overload, and the chip area can be extremely optimized and smaller.

[0052] As Figure 10As shown, the first electrode plate (1) is arranged on one side wall of the first cavity (3), the second cavity (9) is arranged on the other side of the first electrode plate (1) and opposite to the first cavity (3), the second electrode plate (2) is arranged on the side wall of the first cavity (3) opposite to the first electrode plate (1), the third electrode plate (10) is arranged on the side wall of the second cavity (9) opposite to the first electrode plate (1), the third cavity (13) is arranged on the other side of the third electrode plate (10) and opposite to the second cavity (9), the fourth electrode plate (12) is arranged on the side wall of the third cavity (13) opposite to the third electrode plate (10), the cover plate (4) is arranged on the top of the first cavity (3), the second cavity (9) and the third cavity (13), the through hole (11) is arranged on the top of the second cavity (9) of the cover plate (4), the dielectric layer (6) is arranged on the first electrode plate (1) and the fourth electrode plate (12), the first electrode plate (1), the second electrode plate (2), the third electrode plate (10) and the fourth electrode plate (12) are connected with the substrate (5), the first cavity (3) is sealed, the third cavity (13) is sealed, the first electrode plate (1), the second electrode plate (2) and the third electrode plate (10) are movable at the same time, the first electrode plate (1) and the fourth electrode plate (12) are connected with the first polarity electric signal, the second electrode plate (2) and the third electrode plate (10) are connected with the second polarity electric signal opposite to the first polarity signal, the first electrode plate (1), the second electrode plate (2) and the third electrode plate (10) are deformed at the same time, the first electrode plate (1) and the second electrode plate (2) form the variable capacitor C1, the first electrode plate (1) and the third electrode plate (10) form the variable capacitor C2, the third electrode plate (10) and the fourth electrode plate (12) form the variable capacitor C3, when the pressure increases, the first electrode plate (1) and the second electrode plate (2) increase the deformation in the direction of the inside of the first cavity (3), the distance between the first electrode plate (1) and the second electrode plate (2) decreases, the capacitor C1 increases, the third electrode plate (10) increases the deformation in the direction of the fourth electrode plate (12) of the third cavity (13) with the increase of the pressure, the distance between the first electrode plate (1) and the third electrode plate (10) increases, the capacitor C2 decreases, at this time, the distance between the third electrode plate (10) and the fourth electrode plate (12) decreases, the capacitor C3 increases.When the pressure decreases, the first and second plates (1) and (2) increase deformation in the direction of the outside of the first cavity (3), the distance between the first and second plates (1) and (2) increases, the capacitance C1 decreases, the third plate (10) increases deformation in the direction opposite to the fourth plate (12) in the outside of the third cavity (13) as the pressure decreases, the distance between the first and third plates (1) and (10) increases, the capacitance C2 increases, at this time, the distance between the third and fourth plates (10) and (12) increases, the capacitance C3 decreases, the capacitances C1 and C2 combine to form a differential capacitance C4, the capacitances C3 and C2 combine to form a differential capacitance C5, the output capacitance C6 changes by an amount equal to the sum of the capacitances C4 and C5, the output capacitance changes more, the precision is higher, the sensitivity is higher, at the same time, common-mode signal interference can be shielded, the anti-interference ability is stronger, the capacitance output characteristic curve is good, the temperature drift is small, the overload is strong, and the area of the chip can be extremely optimized, and the area is smaller.

[0053] As Figure 11As shown, the first electrode plate (1) is arranged on one side wall of the first cavity (3), the second cavity (9) is arranged on the opposite side of the first electrode plate (1) and opposite to the first cavity (3), the second electrode plate (2) is arranged on the side wall of the first cavity (3) opposite to the first electrode plate (1), the third electrode plate (10) is arranged on the side wall of the second cavity (9) opposite to the first electrode plate (1), the third cavity (13) is arranged on the opposite side of the third electrode plate (10) and opposite to the second cavity (9), the fourth electrode plate (12) is arranged on the side wall of the third cavity (13) opposite to the third electrode plate (10), the cover plate (4) is arranged on the top of the first cavity (3), the second cavity (9) and the third cavity (13), the through hole (11) is arranged on the top of the second cavity (9) of the cover plate (4), the through hole (14) is arranged on the top of the second cavity (9) of the cover plate (4), the first electrode plate (1), the second electrode plate (2), the third electrode plate (10) and the fourth electrode plate (12) are connected with the substrate (5), the first cavity (3) is sealed, the first electrode plate (1), the second electrode plate (2) and the pressure sensor are movable at the same time, the third electrode plate (10) is a fixed electrode plate, the first electrode plate (1) and the fourth electrode plate (12) are connected with the first polarity electric signal, the second electrode plate (2) and the third electrode plate (10) are connected with the second polarity electric signal opposite to the first polarity signal, the first electrode plate (1) and the second electrode plate (2) and the pressure sensor are deformed at the same time, the first electrode plate (1) and the second electrode plate (2) form a variable capacitor C1, the first electrode plate (1) and the third electrode plate (10) form a variable capacitor C2, the third electrode plate (10) and the fourth electrode plate (12) form an invariable capacitor C3, when the pressure increases, the first electrode plate (1) and the second electrode plate (2) increase the deformation in the direction of the inside of the first cavity (3), the distance between the first electrode plate (1) and the second electrode plate (2) decreases, the capacitor C1 increases, the distance between the first electrode plate (1) and the third electrode plate (10) increases, the capacitor C2 decreases, the pressure of the second cavity (9) and the third cavity (13) is the same, the third electrode plate (10) will not be deformed with the change of the pressure, the capacitor C3 is constant, the capacitor C1 and C3 form a differential capacitor C4, the capacitor C2 and C3 form a differential capacitor C5, the output capacitor C6 changes the amount equal to the sum of the capacitor C4 and the capacitor C5, the output capacitor changes the amount more, the precision is higher, the sensitivity is higher, at the same time, the common mode signal interference can be shielded, the anti-interference ability is stronger, the capacitor output characteristic curve is good, the temperature drift is small, the overload is strong, and the area of the chip can be optimized, and the area is smaller.

[0054] As Figure 12 shown, five basic capacitors of embodiment 3 are repeatedly manufactured on the substrate (5).

[0055] Based on SOI silicon and bonding process manufacturing method:

[0056] a. SOI silicon wafer cleaning;

[0057] b. Thinning the SOI silicon wafer to the desired thickness of the top plate;

[0058] c. Etching the first plate (1) and the second plate (2);

[0059] d. Oxidizing to form silicon dioxide, connecting the plates and the substrate through the silicon dioxide;

[0060] e. Bonding another silicon wafer (i.e. the cover plate (4)) on top of the plates and the substrate;

[0061] f. Thinning the silicon wafer bonded on the top to the desired thickness of the cover plate (4);

[0062] g. Depositing silicon dioxide;

[0063] h. Etching the lead hole;

[0064] i. Depositing aluminum leads;

[0065] j. Depositing a passivation layer (the passivation layer can be silicon dioxide, silicon nitride, etc.).

[0066] The vertically arranged plate capacitor pressure sensitive chip of the present application can be used for measuring absolute pressure and differential pressure in many fields such as consumer electronics, automotive electronics, industrial measurement and control, medical electronics, aerospace and national defense industry. The pressure sensitive chip has the advantages of high sensitivity, good linearity, large linear range, small temperature drift, strong overload capacity, compatible manufacturing process with integrated circuit process, etc., and is particularly suitable for developing high-precision pressure sensors.

[0067] The present application can be applied to pressure sensors, silicon microphones, accelerometers, flow meters, etc.

[0068] It can be understood that the above specific description of the present application is only used to illustrate the present application and is not limited to the technical solutions described in the embodiments of the present application. Those skilled in the art should understand that the present application can still be modified or replaced equivalently to achieve the same technical effect; as long as the use needs are met, it is within the protection scope of the present application.

Claims

1. Vertical-plate capacitor-type sensitive chip structure, comprising a vertical first plate (1) and a vertical second plate (2) opposite the first plate (1), characterized in that The first cavity (3) is between the first electrode plate (1) and the second electrode plate (2); the outer periphery of the first cavity (3) without the electrode plate and the bottom of the first cavity (3) are the substrate (5); The application belongs to the technical field of MEMS; The electrode plate is vertically arranged, the pressure sensing electrode plate senses pressure from the left and right directions of the cavity when pressure is applied to the movable electrode plate, the area of the chip is greatly optimized, and the area size of the chip is greatly reduced.

2. The vertically oriented plate capacitive sensing die structure of claim 1, wherein The first cavity (3) is provided with a cover plate (4) at the top, and the first cavity (3) is a sealed cavity.

3. The vertically oriented plate capacitive sensing die structure of claim 1, wherein The first electrode plate (1) is connected to the substrate (5) away from the second electrode plate (2).

4. The vertically oriented plate capacitive sensing die structure of claim 1, wherein The first electrode plate (1) is provided with a support (8) or is filled with gas (7) in the first cavity (3).

5. The vertically oriented plate capacitive sensing chip structure of claim 1, wherein The first electrode plate (1) is provided with a second cavity (9) away from the second electrode plate (2).

6. The vertically oriented plate capacitive sensor chip structure of claim 5, wherein The second cavity (9) is provided with a third electrode plate (10) away from the first electrode plate (1).

7. The vertically oriented plate capacitive sensor chip structure of claim 6, wherein The third electrode plate (10) is provided with a third cavity (13) away from the first electrode plate (1), and the third cavity (13) is provided with a fourth electrode plate (12) away from the third electrode plate (10).

8. The vertically mounted plate capacitor sensor chip structure according to claim 5 or 7, characterized in that The outer periphery of the second cavity (9) is the substrate (5), and the top of the second cavity (9) is the cover plate (4); the outer periphery of the third cavity (13) is the substrate (5), and the top of the third cavity (13) is the cover plate (4).

9. The vertically mounted plate capacitive sensor chip structure according to claim 1 or 6 or 7, wherein The first electrode plate (1) and / or the second electrode plate (2) are provided with a dielectric layer (6); the third electrode plate (10) and / or the fourth electrode plate (12) are provided with a dielectric layer (6).

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