A BTM-enhanced antenna element

Abstract

This invention provides a BTM enhanced antenna unit, including a first filtering circuit, a power supply and triggering circuit, a logic control unit, and a signal acquisition and decision circuit. The first filtering circuit is disposed between the power transmission loop of the antenna and the BTM, and is used to reduce harmonic radiation of the power transmission loop. One end of the power supply and triggering circuit is connected to the power receiving loop, and the other end is connected to the logic control unit, used to regulate the electrical signal on the BTM cable and output a trigger signal to the logic control unit. The signal acquisition and decision circuit is used to acquire the A4 interface signal, make a decision on the A4 interface signal, and output the decision result to the logic control unit. The logic control unit is used to control the acquisition and transmission of the A4 interface signal according to the trigger signal and the decision result. The BTM antenna unit of this invention has an energy judgment function, which improves the reliability of the BTM antenna, reduces the harmonic radiation of the BTM signal, and improves the compatibility between the antenna unit and the BTM.

Description

Technical Field

[0001] This invention belongs to the field of rail transit communication technology, and specifically relates to a BTM enhanced antenna unit. Background Technology

[0002] When the BTM antenna unit is in the BTM enabled state, it can continuously radiate a 27MHz energy carrier (CW, Continuous Wave) to the ground, while simultaneously receiving FSK (Frequency-shift keying) from the transponder uplink. In idle state (without a transponder), the BTM decoding board triggers a self-test of the antenna's transmit energy intensity and the receive link.

[0003] The BTM (balise-transmission-module) is an important component of the transponder transmission system. The BTM antenna unit is an antenna unit capable of bidirectional transmission of energy carriers, typically including transmit and receive coils. It radiates the energy carriers transmitted from the BTM to the ground, receives uplink signals from the transponder, and transmits them back to the BTM.

[0004] After activation, the transponder sends a message signal to the BTM antenna. The amplitude of the 27MHz signal is crucial for safe train operation; excessively low or high amplitude will affect signal accuracy and train safety. Furthermore, the existing BTM main signal (cable signal) exhibits significant second, third, and subsequent harmonic radiation, making it difficult to meet the harmonic radiation emission requirements of relevant railway standards. Therefore, the requirements for the main signal emitted by the BTM are very high, resulting in significant challenges in matching and adjusting the BTM and antenna unit, as well as in processing the main signal and limiting its application range. Additionally, in existing technologies, the antenna unit's signal processing is susceptible to power supply signal interference, and its performance needs improvement. Summary of the Invention

[0005] To address one of the aforementioned problems, the present invention provides a BTM enhanced antenna unit, comprising a first filter circuit, a power supply and trigger circuit, a logic control unit, and a signal acquisition and decision circuit;

[0006] The first filter circuit is set between the antenna's power transmission loop and the BTM to reduce harmonic radiation from the power transmission loop;

[0007] One end of the power supply and trigger circuit is connected to the energy receiving loop, and the other end is connected to the logic control unit. It is used to regulate the electrical signal on the BTM cable and output the trigger signal to the logic control unit.

[0008] The signal acquisition and decision circuit is used to acquire A4 interface signals, make decisions on A4 interface signals, and output the decision results to the logic control unit.

[0009] The logic control unit is used to control the acquisition and transmission of signals from the A4 interface based on the trigger signal and the decision result.

[0010] Furthermore, the first filtering circuit is used to implement low-pass filtering of the BTM cable transmission signal, including a first port, a second port, a third port, and a filtering module;

[0011] The first end of the filter module is connected to the first port, and the second end is connected to the second port and the third port respectively;

[0012] The filtering module includes a first capacitor, a second capacitor, a third capacitor, a first inductor, and a second inductor; the first inductor and the second inductor are connected in series, the first end of the first inductor serves as the first end of the filtering module, the second end of the first inductor is connected to the second inductor, the first end of the second inductor is connected to the second end of the first inductor, and the second end of the second inductor serves as the second end of the filtering module.

[0013] The first terminal of the first capacitor is connected to the first terminal of the first inductor, and the second terminal of the first capacitor is grounded; the first terminal of the second capacitor is connected to the second terminal of the first inductor, and the second terminal of the second capacitor is grounded; the first terminal of the third capacitor is connected to the second terminal of the second inductor, and the second terminal of the third capacitor is grounded.

[0014] Furthermore, the second end of the filter module is connected to the third port via a fourth capacitor.

[0015] Furthermore, the first filtering circuit is set on a separate board that is different from the antenna motherboard and the antenna transmitting board;

[0016] The first port of the first filter circuit is connected to the BTM cable; the second port is connected to the signal port of the antenna main board; and the third port is connected to the signal port of the antenna transmitting board.

[0017] Furthermore, the antenna unit also includes a first resonator and a power isolation unit;

[0018] The receiving end of the signal interface of the antenna main board is connected to the first end of the energy receiving loop through the first resonator;

[0019] The ground terminal of the signal interface of the antenna main board is connected to the second terminal of the energy receiving loop through the power isolation unit;

[0020] The power isolation unit includes multiple capacitors connected in parallel to isolate DC power supplies;

[0021] The first resonator includes a fifth capacitor and a third inductor connected in parallel, used to adjust the characteristic impedance parameters of the antenna for impedance matching.

[0022] Furthermore, the antenna element includes an energy transmission loop coil.

[0023] The energy transmitting loop coil includes multiple resonant units connected in series and a first resistor. The first resistor is a nominal 50-ohm resistor with a ground terminal, has a power of not less than 20W, and is cooled by an external heat sink.

[0024] Furthermore, the power supply and trigger circuit includes a first voltage regulator circuit, a second voltage regulator circuit, a trigger pulse circuit, and a second filter circuit;

[0025] The second filter circuit is used to isolate the high-frequency signal from the coaxial cable and then supply power to the first voltage regulator circuit and the trigger pulse circuit.

[0026] The second voltage regulator circuit is connected to the first voltage regulator circuit.

[0027] Furthermore, the second filter circuit includes a fourth inductor, a fifth inductor, a sixth capacitor, and a seventh capacitor;

[0028] The first end of the fourth inductor is connected to the input end of the second filter circuit, and the second end of the fourth inductor is connected to the first end of the fifth resonant unit. The fifth resonant unit includes a fifth inductor, a sixth capacitor, and a seventh capacitor connected in parallel.

[0029] The second end of the fifth resonant unit is connected to the output of the second filter circuit;

[0030] The second end of the fifth resonant unit is grounded through the first diode to provide voltage clamping protection for the circuit.

[0031] Furthermore, the logic control unit receives trigger signals from the power supply and pulse trigger circuit;

[0032] The logic control unit receives decision result signals from the signal acquisition and decision circuit, including: high energy flag input signal, low energy flag input signal and energy alarm flag input signal;

[0033] The logic control unit obtains the AD data input signal from the signal acquisition and decision circuit;

[0034] The logic control unit outputs AD control signals to the signal acquisition and decision circuit to control the signal acquisition of the signal acquisition and decision circuit;

[0035] When the high energy indicator input signal, low energy indicator input signal, and energy alarm indicator input signal are all zero, the logic control unit outputs an AD control signal to the signal acquisition and decision circuit, which then acquires the A4 interface signal and obtains the A4 interface signal after AD conversion in the signal acquisition and decision circuit.

[0036] Furthermore, the signal acquisition and decision circuit includes an A4 interface energy decision circuit, an A4 interface energy acquisition circuit, and an AD sampling circuit;

[0037] The A4 interface energy acquisition circuit inputs the acquired A4 interface signal to the A4 interface energy decision circuit for decision-making;

[0038] The A4 interface energy decision circuit outputs a high energy flag input signal, a low energy flag input signal, and an energy alarm flag input signal to the logic control unit based on the decision result of the collected A4 interface signal.

[0039] The AD sampling circuit is implemented using an AD chip, which is used to control the acquisition operation of the A4 interface energy harvesting circuit and to process the acquired A4 interface signal.

[0040] Furthermore, the A4 interface energy harvesting circuit includes a third filter circuit, a fourth filter circuit, and a voltage divider protection circuit connected in series. The first end of the third filter circuit is connected to the A4 signal acquisition interface unit, the second end is connected to the first end of the fourth filter circuit, the second end of the fourth filter circuit is connected to the first end of the voltage divider protection circuit, and the second end of the voltage divider protection circuit outputs voltage signals through two output interfaces.

[0041] Furthermore, the third filter circuit includes an eighth capacitor, a second resistor, a ninth capacitor, and a tenth capacitor;

[0042] The first terminal of the eighth capacitor is connected to the first terminal of the acquisition interface unit and the second terminal of the second resistor, and the second terminal is grounded; the second terminal of the second resistor is connected to the first terminal of the ninth capacitor, and the second terminal of the ninth capacitor is grounded; the first terminal of the tenth capacitor is connected to the second terminal of the second resistor, and the second terminal is connected to the first terminal of the fourth filter circuit.

[0043] Furthermore, the fourth filter circuit includes a sixth inductor, an eleventh capacitor, a twelfth capacitor, and a thirteenth capacitor;

[0044] The eleventh and twelfth capacitors are connected in series and then in parallel with the sixth inductor;

[0045] The first terminal of the sixth inductor is connected to the second terminal of the tenth capacitor, the second terminal of the sixth inductor is connected to the first terminal of the thirteenth capacitor, the second terminal of the thirteenth capacitor is grounded, and connected to the first terminal of the voltage divider protection circuit.

[0046] Furthermore, the voltage divider protection circuit includes a first voltage divider circuit and a second voltage divider circuit. The first voltage divider circuit and the second voltage divider circuit are connected through two reverse diodes and output different levels of voltage, including a first level voltage and a second level voltage.

[0047] The first voltage divider protection circuit and the second voltage divider protection circuit are connected through the first Schottky diode, and are also connected to the fourth filter circuit through the first Schottky diode.

[0048] Furthermore, the A4 interface energy decision circuit includes a first energy decision circuit and a second energy decision circuit. The first energy decision circuit is used to determine whether the first-stage voltage is within a specified range; the second energy decision circuit is used to determine whether the second-stage voltage has crossed zero.

[0049] Furthermore, the first energy decision circuit includes a low threshold adjustment circuit, a first comparator, a high threshold adjustment circuit, and a second comparator;

[0050] The first-stage voltage output from the A4 interface energy harvesting circuit is input to the first input terminal of the first comparator and the second input terminal of the second comparator. The first comparator is used to determine whether the first-stage voltage is less than the first threshold, and the second comparator is used to determine whether the first-stage voltage is greater than the second threshold.

[0051] The low threshold adjustment circuit is connected to the second input terminal of the first comparator and is used to determine the first threshold.

[0052] The high threshold adjustment circuit is connected to the first input of the second comparator and is used to determine the second threshold.

[0053] The antenna element of this invention has an energy determination function, improving the reliability and fault diagnosis efficiency of the BTM antenna. Furthermore, the antenna element reduces harmonic radiation of the BTM signal through a low-pass filter circuit, increasing the port reflection coefficient of the antenna within the operating frequency band, better meeting relevant railway standards, and improving the compatibility of the antenna element with the BTM. In addition, by modifying the circuit structure and resonant unit, signal processing capabilities are improved, enhancing reception performance in complex electromagnetic environments. This enhanced BTM antenna is of significant importance in improving railway operation safety.

[0054] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures pointed out in the description, claims and drawings. Attached Figure Description

[0055] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0056] Figure 1 A schematic diagram of the module structure of a BTM-enhanced antenna element according to an embodiment of the present invention is shown;

[0057] Figure 2A schematic diagram of the circuit structure of a low-pass filter board according to an embodiment of the present invention is shown;

[0058] Figure 3 A simulation result diagram of the forward transmission coefficient of the first port of the low-pass filter board according to an embodiment of the present invention is shown;

[0059] Figure 4 A simulation result diagram of the reflection coefficient of the first port of the low-pass filter board according to an embodiment of the present invention is shown;

[0060] Figure 5 A network analyzer test result diagram of the circuit of the low-pass filter board according to an embodiment of the present invention is shown;

[0061] Figure 6 A schematic diagram showing the positional relationship between the low-pass filter board, the antenna main board, and the antenna transmitting board according to an embodiment of the present invention is shown.

[0062] Figure 7 A schematic diagram of the structure of the first resonator and power isolation unit according to an embodiment of the present invention is shown;

[0063] Figure 8 A schematic diagram of the circuit structure of an energy transmitting coil antenna according to an embodiment of the present invention is shown;

[0064] Figure 9(a) shows a Smith chart under 50-ohm matching according to an embodiment of the present invention;

[0065] Figure 9(b) shows the Smith chart of port mismatch according to an embodiment of the present invention with a port reflection coefficient of 9.5 dB and an impedance of 25.81 ohms.

[0066] Figure 9(c) shows the Smith chart of the impedance at 0.8 ohms with the port open state according to an embodiment of the present invention;

[0067] Figure 10 A schematic diagram of simulation results for the reflection coefficient of a port of an antenna transmitting board circuit according to an embodiment of the present invention is shown.

[0068] Figure 11 A schematic diagram of the structure of a second filter circuit according to an embodiment of the present invention is shown;

[0069] Figure 12 A schematic diagram of the simulation results of the forward transmission coefficient of the second filter circuit according to an embodiment of the present invention is shown;

[0070] Figure 13 A schematic diagram of the A4 interface signal filtering circuit according to an embodiment of the present invention is shown;

[0071] Figure 14(a) shows a schematic diagram of the structure of the first energy decision circuit of the A4 interface signal decision circuit according to an embodiment of the present invention;

[0072] Figure 14(b) shows a schematic diagram of the structure of the second energy decision circuit of the A4 interface signal decision circuit according to an embodiment of the present invention. Detailed Implementation

[0073] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0074] This invention provides a BTM-enhanced antenna element (hereinafter referred to as antenna element), such as... Figure 1 As shown, the antenna unit includes a first filter circuit, a power supply and trigger circuit, a logic control unit, and a signal acquisition and decision circuit.

[0075] The first filter circuit is set between the antenna's power transmission loop and the BTM to reduce harmonic radiation from the power transmission loop;

[0076] One end of the power supply and trigger circuit is connected to the energy receiving loop, and the other end is connected to the logic control unit. It is used to regulate the electrical signal on the BTM cable and output the trigger signal to the logic control unit.

[0077] The signal acquisition and decision circuit is used to acquire A4 interface signals, make decisions on A4 interface signals, and output the decision results to the logic control unit.

[0078] The logic control unit is used to control the acquisition and transmission of signals from the A4 interface based on the trigger signal and the decision result.

[0079] The antenna unit in this embodiment of the invention can suppress harmonics and reduce harmonic radiation through the first filtering circuit, thereby transmitting signal energy more effectively and enhancing signal transmission capability. Simultaneously, through the signal control relationship between the logic control unit and the signal acquisition and decision circuit, alarm and accurate control signal acquisition are achieved, improving the stability of the antenna unit and the reliability of signal analysis.

[0080] The antenna unit also includes a signal transmission circuit, one end of which is connected to the logic control unit, and the other end is connected to the D3 interface signal transmission loop. The logic control unit transmits signals to the D3 interface signal transmission loop through the signal transmission circuit. The signal transmission circuit includes an FSK output filtering circuit for filtering the FSK signal to be transmitted.

[0081] The following provides a detailed description of each module and unit of the BTM enhanced antenna.

[0082] The first filtering circuit is a low-pass filter circuit, used to implement low-pass filtering of signals transmitted via BTM cables. For example... Figure 2 As shown, the first filter circuit includes a first port D1, a second port D2, a third port D3, and a filter module. D1, D2, and D3 are all implemented using RF sockets. Each port is packaged with 5 pins. The middle pin (pin 1) serves as the connection port between the first filter circuit and other circuits, while the other four pins (pins 2, 3, 4, and 5) are grounded. The first end of the filter module is connected to D1, and the second end is connected to D2 and D3 respectively.

[0083] The filtering module includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first inductor L1, and a second inductor L2. L1 and L2 are connected in series. The first end of L1 serves as the first end of the filtering module, and the second end of L1 is connected to L2. The first end of L2 is connected to the second end of L1, and the second end of L2 serves as the second end of the filtering module.

[0084] L1 and L2 have the same inductance value, which, without loss of generality, is 270nH. C1, C2, and C3 ground the two ends of the two inductors L1 and L2, respectively. Specifically, the first end of C1 is connected to the first end of L1, and the second end of C1 is grounded. The first end of C2 is connected to the second end of L1, and the second end of C2 is grounded. The first end of C3 is connected to the second end of L2, and the second end of C3 is grounded. C1 and C3 have the same capacitance value. Preferably, the capacitance value of C2 is n times the capacitance value of C1 and C3, where n>1, and exemplarily, n is 4. Exemplarily, the capacitance value of C1 and C3 is 30pF, and the capacitance value of C2 is 120pF. The first filter circuit structure design of this embodiment of the invention enables the adjustment of the inductance and capacitance values ​​to change the insertion loss at 27MHz in the in-band and the attenuation value at the out-of-band harmonic points, as well as the reflection coefficient and harmonic frequency suppression values ​​at ports D1 and D2.

[0085] Furthermore, the second terminal is connected to D3 via a fourth capacitor C4. Without loss of generality, the capacitance of C4 is 10nF. C4 is used to filter out DC voltage. Specifically, one terminal connected to D2 is connected to the antenna mainboard 1. If there is DC voltage in the line signal, capacitor C4 can isolate the DC voltage.

[0086] Simulation construction based on the values ​​in the example above. Figure 2 The performance of the first filter circuit in the antenna element is simulated, and the simulation results are as follows: Figure 3As shown (S(2,1), representing the forward transmission coefficient): second harmonic suppression 5.6dB, third harmonic suppression 19.8dB, fourth harmonic suppression 31.1dB, fifth harmonic suppression 40.1dB, and sixth harmonic suppression 47.6dB. Adding a low-pass filter to the antenna element reduces harmonic radiation and improves antenna performance. The low-pass filter has a port reflection coefficient of -45dB, which is well-matched with the BTM cable, antenna mainboard, and antenna transmitter board. The antenna can transmit signal energy more effectively, enhancing signal transmission capability.

[0087] like Figure 4 As shown in the simulation diagram, S(1,1) (representing the reflection coefficient at port D1) / S22 (representing the reflection coefficient at port D2) indicates that the low-pass filter has a port reflection coefficient of -45dB, which is well matched with the BTM cable, antenna motherboard, and antenna transmitter board. This allows the antenna to transmit signal energy more effectively, thus enhancing signal transmission capability.

[0088] like Figure 5 As shown in the network analyzer test results, the actual performance indicators of the low-pass filter board are very close to the simulation values, achieving the expected design goals.

[0089] Preferably, the first filtering circuit in this embodiment of the invention is mounted on a separate board, referred to as the low-pass filter board 3 in this embodiment. That is, the first filtering circuit is mounted on a board different from the antenna mainboard 1 and the antenna transmitting board 2, such as... Figure 6 As shown. In the first filter circuit, D1 is connected to the BTM cable (i.e., the coaxial cable used to connect the BTM), D2 is connected to the signal port of the antenna mainboard 1, and D3 is connected to the signal port on the antenna transmitting board 2. The BTM antenna is a PCB antenna. In this embodiment, the energy receiving loop is used to receive energy signals and is located on the antenna mainboard 1. Simultaneously, the power supply and trigger circuit, logic control unit, and signal acquisition and decision circuit are also located on the antenna mainboard 1. The energy transmitting loop is located on the antenna transmitting board 2. The energy receiving loop and the energy transmitting loop are connected to the low-pass filter board via coaxial cables. Specifically, the signal port of the energy receiving loop is connected to D2 of the first filter circuit, and the signal port of the energy transmitting loop is connected to D3 of the first filter circuit. Both the energy transmitting loop and the energy receiving loop are connected to the low-pass filter board through one port. The three ports of the low-pass filter board are connected to the BTM, the energy transmitting loop, and the energy receiving loop, respectively.

[0090] like Figure 7As shown, the antenna unit also includes a first resonator and a power isolation unit. The receiving end of the signal interface (also known as the P4 port) of the antenna main board is connected to the first end of the energy receiving loop through the first resonator; the ground end of the signal interface of the antenna main board is connected to the second end of the energy receiving loop through the power isolation unit. Specifically, the P4 port uses an RF socket, including 5 pins, of which the first pin (pin 1) is connected to the first resonator, and the remaining pins (pins 2, 3, 4, and 5) are grounded.

[0091] The power isolation unit includes multiple capacitors connected in parallel; exemplarily, it includes four capacitors in parallel, including two 10nF capacitors and one 2.2nF capacitor. The power isolation unit is connected to the ground terminal of the coaxial cable. The 27MHz energy signal enters the first-stage transmitting coil (transmit loop) through the power isolation unit, and the first-stage transmitting coil is also the receiving coil (energy receiving loop). The 4MHz message signal is transmitted from the receiving coil to the BTM through port P4. The power isolation unit isolates the DC power supply. The first resonator includes a fifth capacitor C5 and a third inductor L3 connected in parallel for adjusting the characteristic impedance parameters of the antenna for impedance matching. The antenna is designed as a broadband antenna to receive signals within the frequency band occupied by the FSK message signal.

[0092] like Figure 8 As shown, the antenna on the antenna transmitting board is designed as two loops of copper foil near the edge of the board. The dimensions of the power transmitting loop coil are a rectangle of (325mm±15mm)×(245mm±15mm).

[0093] For example, the power transmitting loop coil includes multiple resonant units connected in series and a first resistor. For instance, it includes a first resonant unit, a second resonant unit, a third resonant unit, and a fourth resonant unit connected in series, wherein the second and fourth resonant units have identical structures, each including four capacitors connected in parallel and an inductor connected in series with the capacitors. The first and third resonant units also have identical structures, each including multiple (e.g., four) capacitors connected in parallel, at least one of which is an adjustable capacitor. One end of the power transmitting loop's signal interface (i.e., the signal interface of the antenna transmitting board) D1 is connected to the first resonant unit, and the other end is connected to the fourth resonant unit.

[0094] The power transmitting loop coil is connected in series with the first resistor R1. Specifically, D1 is an RF socket with a 5-pin package. The middle pin (pin 1) is connected to resistor R1 via a PCB trace. The nominal resistance is 50 ohms, but in actual use it is between 47 and 51 ohms. The power of R1 is not less than 20W. The other four pins of D1 (pins 2, 3, 4, and 5) are connected to the fourth resonant unit via the PCB.

[0095] The antenna transmitter board is matched with a 50-ohm resistor. The selection of the 50-ohm resistor is as follows: 1) This antenna is a standard 50-ohm transmission system. 50 ohms is the optimal impedance for transmission. On the Smith chart, this represents the center point. Points further from the center indicate antenna mismatch, and the outermost point on the Smith chart indicates an open circuit, representing the most severe mismatch. Since the antenna itself has a very low impedance, an external resistor is needed to form a 50-ohm transmission system. 2) The BTM signal amplitude is very large, reaching 20W, therefore a high-power resistor is required to prevent burnout. 3) Considering heat dissipation, a 50-ohm resistor with a ground terminal is selected, and heat is dissipated through an external heatsink.

[0096] The Smith chart for 50-ohm matching is shown in Figure 9(a).

[0097] The Smith chart for port mismatch at 9.5dB port reflection coefficient and impedance at 25.81 ohms is shown in Figure 9(b).

[0098] The Smith chart for the open-circuit state with an impedance of 0.8 ohms is shown in Figure 9(c).

[0099] The antenna transmitter board is directly connected to the BTM cable. The D1 port of the power transmission loop is connected to the D3 port of the low-pass filter board via an RF cable. The advantage of this is that the signal from the BTM is directly filtered before being transmitted through the antenna transmitter board, avoiding radiation from the main antenna board, thus improving signal transmission efficiency and enhancing the signal strength.

[0100] This invention utilizes the excellent port reflection coefficient of a low-pass filter board to connect the BTM cable and the antenna transmitter board, resulting in more efficient and smoother signal transmission. Simultaneously, it features harmonic suppression, enhancing out-of-band antenna signal radiation. Furthermore, minimal in-band attenuation ensures that more of the BTM's output power is transmitted, improving efficiency. Under the same conditions, the BTM can achieve the same transmission effect and operating range with lower power.

[0101] Figure 10 A schematic diagram of the simulation results of the reflection coefficient of the port of the antenna transmitting board circuit according to an embodiment of the present invention is shown. The reflection coefficient is -58.77dB, indicating that the antenna transmitting board and its preceding low-pass filter board are well matched. Figure 1As shown, the power supply and trigger circuit includes a first voltage regulator circuit, a second voltage regulator circuit, a trigger pulse circuit, and a second filter circuit. The first voltage regulator circuit is a 3.3V regulator circuit, and the second voltage regulator circuit is a 1.8V regulator circuit. The input terminals of the power supply and trigger circuit are connected to a coaxial cable, and the output terminals provide a 3.3V regulated power supply, a 1.8V regulated power supply, and a trigger pulse. The 1.8V power supply is obtained through a 3V power converter, and the 3V power supply is obtained through a 24V power converter.

[0102] The 24V power supply and trigger pulse input are both provided to the power supply and trigger circuit via a coaxial cable. The coaxial cable also transmits energy signals, message signals, detection signals, and power signals. To isolate the high-frequency signals (energy signals and message signals) from the coaxial cable, a second filter circuit is used to supply power to the self-test circuit (not shown in the figure). The self-test circuit is used to verify whether the antenna is functioning correctly. This embodiment of the invention does not limit the implementation of the self-test circuit.

[0103] like Figure 11 As shown, the second filter circuit includes a fourth inductor L4, a fifth inductor L5, a sixth capacitor C6, and a seventh capacitor C7. The first terminal of the fourth inductor L4 is connected to the input terminal of the second filter circuit, and the second terminal of the fourth inductor L4 is connected to the first terminal of the fifth resonant unit. The fifth resonant unit includes the fifth inductor L5, the sixth capacitor C6, and the seventh capacitor C7 connected in parallel. The second terminal of the fifth resonant unit is connected to the output terminal of the second filter circuit. After the signal from the coaxial cable is filtered by the fourth inductor L4 and the fifth inductor L5, the detection signal and the power signal enter the self-test circuit and are then input to the first voltage regulator circuit and the trigger pulse circuit. The function of L4 and L5 is to attenuate the 27MHz signal from the BTM and the 4MHz signal from the transponder. Since the 4MHz signal has relatively weak energy, the attenuation of the 27MHz signal is the primary focus. The inductance value of L4 is 47uH, and the inductance value of L5 is 560nH, resulting in a 38dB attenuation of the 27MHz signal. L4 and L5 do not attenuate DC signals. The second terminal of the fifth resonant unit is grounded through the first diode for voltage clamping protection of the circuit. The first diode is a transient diode TVS1. The anode of the first diode is grounded, and the cathode is connected to the second end of the fifth resonant unit.

[0104] like Figure 12 As shown, the 4MHz signal and the 27MHz signal are attenuated by 22dB and 38dB respectively after passing through L4 and L5.

[0105] The logic control unit is used to control the acquisition and transmission of A4 interface signals based on trigger signals and decision results. In this embodiment of the invention, the logic control unit is implemented using a CPLD (Complex Programmable Logic Device). In other embodiments, other types of logic devices may also be used.

[0106] The logic control unit receives trigger signals, specifically trigger pulses, from the power supply and pulse trigger circuit. It also receives decision result signals from the signal acquisition and decision circuit, including high energy flag input signals (too high), low energy flag input signals (too low), and energy alarm flag input signals (zero). The logic control unit acquires AD data input signals from the signal acquisition and decision circuit. It outputs AD control signals to the signal acquisition and decision circuit to control signal acquisition. Finally, it outputs a self-test DDS control output signal (peripheral circuitry of the CPLD, not shown in the diagram). When the high energy flag input signal, low energy flag input signal, and energy alarm flag input signal are all zero, the logic control unit outputs an AD control signal to the signal acquisition and decision circuit, controlling the circuit to acquire the A4 interface signal and obtain the A4 interface signal after AD conversion, i.e., the AD data input signal.

[0107] The CPLD is clocked by an external crystal oscillator. In order to facilitate the modulation of the FSK signal, a crystal oscillator with a frequency of 27.095MHz is used in this embodiment of the invention.

[0108] The board uses a JTAG interface to debug and program the CPLD.

[0109] The signal acquisition and decision circuit is used to acquire A4 interface signals, make decisions on A4 interface signals, and output the decision results to the logic control unit. It includes an A4 interface energy decision circuit, an A4 interface energy acquisition circuit, and an AD sampling circuit.

[0110] The first end of the A4 interface energy decision circuit is connected to the logic control unit, and the second end is connected to the first end of the A4 interface energy acquisition circuit. The second end of the A4 interface energy acquisition circuit is connected to the energy pickup ring. The first end of the AD sampling circuit is connected to the logic control unit, and the second end is connected to the first end of the A4 interface energy acquisition circuit.

[0111] The A4 interface energy harvesting circuit is used to acquire A4 interface signals via an energy pickup loop. The A4 interface energy harvesting circuit inputs the acquired A4 interface signals to the A4 interface energy decision circuit for judgment. Based on the judgment result of the acquired A4 interface signals, the A4 interface energy decision circuit outputs high energy flag input signals, low energy flag input signals, and energy alarm flag input signals to the logic control unit. The AD sampling circuit is implemented using an AD chip, used to control the acquisition operation of the A4 interface energy harvesting circuit and perform data processing (AD conversion) on the acquired A4 interface signals. The CPLD drives the AD sampling chip through AD control signals and acquires AD data signals.

[0112] like Figure 13As shown, the A4 interface signal is received by the energy pickup loop on the PCB antenna and input to the A4 interface signal energy acquisition circuit through the acquisition interface unit (P2). The A4 interface energy acquisition circuit includes a third filter circuit, a fourth filter circuit, and a voltage divider protection circuit connected in series. The first terminal of the third filter circuit is connected to the A4 signal acquisition interface unit, the second terminal is connected to the first terminal of the fourth filter circuit, the second terminal of the fourth filter circuit is connected to the first terminal of the voltage divider protection circuit, and the second terminal of the voltage divider protection circuit outputs voltage signals through two output interfaces.

[0113] The third filter circuit includes an eighth capacitor C8, a second resistor R2, a ninth capacitor C9, and a tenth capacitor C10. The first terminal of C8 is connected to the acquisition interface unit and the first terminal of R2, and the second terminal is grounded. The second terminal of R2 is connected to the first terminal of C9, and the second terminal of C9 is grounded. The first terminal of C10 is connected to the second terminal of R2, and the second terminal is connected to the first terminal of the fourth filter circuit. For example, C8 has a value of 10pF, R2 has a value of 5.10 ohms, C9 has a value of 220pF, and C10 has a value of 82pF.

[0114] The fourth filter circuit includes a sixth inductor L6, an eleventh capacitor C11, a twelfth capacitor C12, and a thirteenth capacitor C13. C11 and C12 are connected in series and then in parallel with L6. The first terminal of L6 is connected to the second terminal of C10, and the second terminal of L6 is connected to the first terminal of C13. The second terminal of C13 is grounded and connected to the first terminal of the voltage divider protection circuit. For example, C11 and C12 are 12pF, L6 is 1uH, and C13 is 10pF.

[0115] The voltage divider protection circuit includes a first voltage divider circuit and a second voltage divider circuit. The first and second voltage divider circuits are connected via two reverse-connected diodes and output different voltage levels, namely, a first-level voltage and a second-level voltage. The first voltage divider circuit includes a third resistor R3 and a fourteenth capacitor C14. The second voltage divider circuit includes a fourth resistor R4 and a fifteenth capacitor C15. The first and second voltage divider protection circuits are connected via a first Schottky diode D1 (specifically a BAT54A), and also connected to a fourth filter circuit. Specifically, the anode of the first Schottky diode is connected to the second terminal of the fourth filter circuit, i.e., one terminal of C13. The first cathode of the first Schottky diode is connected to the first voltage divider protection circuit, specifically by connecting the first terminal of R3 and the first terminal of C14, with the second terminal of both R3 and C14 grounded. The second cathode of the first Schottky diode is connected to the second voltage divider protection circuit, specifically by connecting the first terminal of R4 and the first terminal of C15, with both the second terminal of R4 and C15 grounded. The first terminal of C14 serves as the output terminal of the first voltage divider circuit, outputting the first-stage voltage. The first terminal of C15 serves as the output terminal of the second voltage divider circuit, outputting the second-stage voltage. R3 and R4 have different resistance values, and C14 and C15 have different capacitance values. For example, R3 is not soldered, R4 is 8K ohms, C14 is 100pF, and C15 is 33pF. When it is necessary to change the output amplitude of level 1, the amplitude of level 1 can be adjusted by soldering R3 and adjusting its value according to the actual circuit conditions.

[0116] The signal received by the PCB antenna is filtered out by a resonator to remove signals of a specific frequency. After rectification, a DC voltage signal is obtained and input to the A4 interface energy harvesting circuit.

[0117] The voltage signal output from the A4 interface energy harvesting circuit is fed into three flux decision circuits composed of LM139, providing status information for A4 interface energy being too high, too low, or zero, respectively. When the outputs of these three decision circuits are all 0, the energy is within the allowable range. The outputs of the three comparison decisions are sent to the logic control unit, which changes the status code based on these three input status lines and transmits the channel's energy information to the BTM via the D3 interface.

[0118] The high and low energy determination circuits are obtained by comparing with a set reference voltage. The reference voltages for both determinations are obtained by a 3V voltage divider. The reference voltages are adjusted so that the comparison threshold for low energy is higher than the first threshold Φ1, and the comparison threshold for high energy is lower than the second threshold Φ4.

[0119] The A4 interface energy decision circuit includes a first energy decision circuit and a second energy decision circuit. The first energy decision circuit is used to determine whether the first-stage voltage is within a specified range; the second energy decision circuit is used to determine whether the second-stage voltage has crossed zero.

[0120] As shown in Figure 14(a), the first energy decision circuit includes a low threshold adjustment circuit, a first comparator, a high threshold adjustment circuit, and a second comparator.

[0121] The first-stage voltage is input to the first input terminal of the first comparator and the second input terminal of the second comparator. The first comparator determines whether the first-stage voltage is less than a first threshold, and the second comparator determines whether the first-stage voltage is greater than a second threshold, wherein the first threshold is less than the second threshold. The first input terminal of the first comparator and the second input terminal of the second comparator are clamped by a first clamping device to prevent the comparators from burning out. For example, the first clamping device is a second Schottky diode D2, specifically a BAT54S, which internally consists of two forward-connected diodes. The third pin of the second Schottky diode (i.e., the junction of the two diodes) is connected to the first input terminal of the first comparator and the second input terminal of the second comparator. The first pin (anode) of the second Schottky diode is grounded, and the second pin (cathode) is connected to a power supply. Specifically, the power supply is a 3V power supply.

[0122] For example, both the first and second comparators use the LM139DR. The first input of the first comparator is negative, and the second input is positive. The first input of the second comparator is negative, and the second input is positive.

[0123] The low threshold adjustment circuit is connected to the second input of the first comparator and is used to determine the first threshold.

[0124] The low-threshold adjustment circuit includes two sets of resistors. The first set of resistors is connected in parallel between the first voltage divider node and the power supply, and the second set of resistors is connected in parallel between the first voltage divider node and ground. Specifically, the first set of resistors includes the fifth resistor R5, the seventh resistor R7, and the ninth resistor R9; the second set of resistors includes the sixth resistor R6, the eighth resistor R8, and the tenth resistor R10. The first voltage divider node is connected to the second input terminal of the first comparator via an adjusting resistor, namely the twelfth resistor R12. The adjusting resistor is used to adjust the resistance values ​​of the first and second sets of resistors, so that the specified comparison voltage (first threshold) is achieved within a reasonable resistance range. The low-threshold adjustment circuit also includes a sixteenth capacitor C16. The first terminal of C16 is connected to the first voltage divider node, and the second terminal is grounded, used to filter out stray inductance in the power supply.

[0125] The second input terminal of the first comparator is connected to the output terminal of the first comparator through a resistor (the thirteenth resistor R13). The first comparator is used to output a low energy flag input signal (LOW). When the input voltage (first stage voltage) of the first energy decision circuit is less than the first threshold, the low energy flag input signal is output as a high level (1), and otherwise it is output as a low level (0). The output terminal of the first comparator is connected to the power supply (3V) through the fourteenth resistor R14.

[0126] The first energy decision circuit also includes a fifth filter circuit, which is connected between the power supply and the first voltage divider node to filter ripple signals from the power supply side. The fifth filter circuit includes a resistor (eleventh resistor R11) and a capacitor (seventeenth capacitor C17) connected in parallel.

[0127] The high threshold adjustment circuit is connected to the first input of the second comparator and is used to determine the second threshold.

[0128] The high-threshold adjustment circuit includes two sets of resistors. A third set of resistors is connected in parallel between the second voltage divider node and the power supply, and a fourth set of resistors is connected in parallel between the second voltage divider node and the ground point. Specifically, the third set of resistors includes the fifteenth resistor R15, the seventeenth resistor R17, and the nineteenth resistor R19; the fourth set of resistors includes the sixteenth resistor R16, the eighteenth resistor R18, and the twentieth resistor R20. The second voltage divider node 8 is connected to the first input terminal of the second comparator. The high-threshold adjustment circuit also includes an eighteenth capacitor C18, with its first terminal connected to the second voltage divider node and its second terminal grounded.

[0129] The second input terminal of the second comparator is connected to the output terminal of the second comparator through a resistor (the twenty-second resistor R22). The second comparator is used to output a high energy flag input signal (HIGH). When the input voltage of the first energy decision circuit (the first stage voltage) is greater than the second threshold, the high energy flag input signal is output as a high level (1), otherwise it is output as a low level (0). The output terminal of the second comparator is connected to the power supply (3V) through a thirty-third resistor R33.

[0130] The high threshold adjustment circuit is connected to the first input of the second comparator and is used to determine the second threshold.

[0131] Furthermore, a 23rd resistor R23 is connected between the input terminal of the first-level voltage (LEVEL1) and the first input terminal of the first comparator, and a 23rd resistor R23 and a 21st resistor R21 are connected in series between the input terminal of the first-level voltage and the second input terminal of the second comparator. R23 and R21 are grounded through a 19th capacitor C19, a 24th resistor R24, a 20th capacitor C20, and a 25th resistor R25, respectively. The combination of R23, R21, R24, and R25 ensures that the subsequent output DC signal level of level 1 is within a reasonable range. If the level is too high or too low, it will affect the resistor values ​​of the first energy decision circuit and also affect the threshold accuracy. Therefore, through the above resistor adjustments, it is possible to achieve a relatively ideal output level for level 1 that falls within the middle of its minimum and maximum values.

[0132] As shown in Figure 14(b), the second energy decision circuit includes a third comparator. The second-stage voltage (LEVEL2) is input to the first input terminal of the third comparator. The third comparator is used to determine whether the second-stage voltage has crossed zero. If it has crossed zero, it outputs an alarm signal (WARNING PULSE). In this embodiment of the invention, crossing zero refers to the degree to which the energy cannot meet the measurement requirements.

[0133] The second input of the third comparator is connected to a fourth clamping device for voltage clamping to prevent damage to the comparator. For example, the fourth clamping device is a fourth Schottky diode D4, specifically a BAT54S, which internally consists of two forward-connected diodes. The third pin of D4 (the junction of the two diodes) is connected to the second input of the third comparator. The first pin (anode) of D4 is grounded, and the second pin (cathode) is connected to the power supply. Specifically, the power supply is 3V. The energy alarm is determined using the voltage drop across the diode D4 as a reference voltage. One end of D4 is connected to +3V, the other end is grounded, and the level 2 input signal is connected in the middle. When the voltage of level 2 is higher than 3.8V, the left diode conducts, clamping level 2 at 3V, thus protecting the subsequent circuitry. For example, the third comparator is an LM139DR. The first input of the third comparator is negative, and the second input is positive.

[0134] The first input terminal of the third comparator is connected to the power supply (3V) through the twenty-sixth resistor R26. The first end of R26 is connected to the power supply, and the second end is connected to the first input terminal of the third comparator. A twenty-first capacitor C21 is grounded between R26 and the first input terminal of the third comparator. The first end of C21 is connected to the second end of R26, and the second end of C21 is grounded. The first input terminal of the third comparator is connected to a third clamping device for voltage clamping, stabilizing the power supply voltage at a specified low voltage (e.g., 0.21V), which serves as a reference signal. This reference signal is compared with the "+" pin of the LM139DR (the signal from level 2) for judgment. For example, the third clamping device can be a diode, with the cathode grounded and the anode connected to the second end of R26. Alternatively, the third clamping device can be a third Schottky diode D3, specifically a BAT54S, which internally consists of two forward-connected diodes. The first pin (anode) of D3 is connected to the first input terminal of the third comparator, the third pin of D3 (i.e., the junction of the two diodes) is grounded, and the second pin (cathode) is left floating.

[0135] The output of the third comparator is connected to the power supply (3V) through the twenty-seventh resistor R27, and is connected to the second input of the third comparator through the thirtieth resistor R30.

[0136] The second-stage voltage is connected to the second input terminal of the third comparator via a series resistor, the twenty-eighth resistor R28, and the twenty-ninth resistor R29. Specifically, the first terminal of R28 is connected to the input terminal of the second-stage voltage, and the second terminal of R28 is connected to the first terminal of R29. The first terminal of R29 is connected to the first terminal of R28, and the second terminal of R29 is connected to the second input terminal of the third comparator. The connection point between R28 and R29 is grounded through the twenty-second capacitor C22 and the thirty-first resistor R31, respectively. Specifically, the second terminal of R28 is connected to the first terminal of C22, and the second terminal of C22 is grounded. The second terminal of R28 is connected to the first terminal of R31, and the second terminal of R31 is grounded.

[0137] The combination of resistors R28, R29, R30, and R31 ensures that the subsequent output DC signal level of level 2 is within a reasonable range. If the level is too high or too low, it will affect the values ​​of other resistors in the second energy decision circuit and also affect the threshold accuracy. Therefore, by adjusting the above resistors, it is possible to achieve a level where the subsequent output level of level 2 falls ideally between the minimum and maximum values.

[0138] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A BTM-enhanced antenna element, characterized in that, It includes a first filter circuit, a power supply and trigger circuit, a logic control unit, a signal acquisition and decision circuit, an energy receiving loop, and an energy transmitting loop. The power supply and trigger circuit, the logic control unit, and the signal acquisition and decision circuit are mounted on the antenna main board. The first filter circuit is set between the energy transmitting ring and the BTM to reduce the harmonic radiation of the energy transmitting ring. The energy receiving ring is used to receive energy signals and is also set on the antenna main board. The energy transmitting ring is set on the antenna transmitting board. One end of the power supply and trigger circuit is connected to the energy receiving loop, and the other end is connected to the logic control unit. It is used to regulate the electrical signal on the BTM cable and output the trigger signal to the logic control unit. The signal acquisition and decision circuit is used to acquire A4 interface signals, make decisions on A4 interface signals, and output the decision results to the logic control unit. The logic control unit is used to control the signal acquisition and transmission of the A4 interface based on the trigger signal and the decision result. The logic control unit receives the decision results from the signal acquisition and decision circuit, including: high energy flag input signal, low energy flag input signal and energy alarm flag input signal; The logic control unit obtains the AD data input signal from the signal acquisition and decision circuit; The logic control unit outputs AD control signals to the signal acquisition and decision circuit to control the signal acquisition of the signal acquisition and decision circuit; When the high energy indicator input signal, low energy indicator input signal, and energy alarm indicator input signal are all zero, the logic control unit outputs an AD control signal to the signal acquisition and decision circuit, which then acquires the A4 interface signal and obtains the A4 interface signal after AD conversion in the signal acquisition and decision circuit.

2. The BTM enhanced antenna element according to claim 1, characterized in that, The first filtering circuit is used to implement low-pass filtering of the signal transmitted by the BTM cable, and includes a first port, a second port, a third port and a filtering module; The first end of the filter module is connected to the first port, and the second end is connected to the second port and the third port respectively; The filtering module includes a first capacitor, a second capacitor, a third capacitor, a first inductor, and a second inductor; the first inductor and the second inductor are connected in series, the first end of the first inductor serves as the first end of the filtering module, the first end of the second inductor is connected to the second end of the first inductor, and the second end of the second inductor serves as the second end of the filtering module. The first terminal of the first capacitor is connected to the first terminal of the first inductor, and the second terminal of the first capacitor is grounded. The first terminal of the second capacitor is connected to the second terminal of the first inductor, and the second terminal of the second capacitor is grounded; the first terminal of the third capacitor is connected to the second terminal of the second inductor, and the second terminal of the third capacitor is grounded.

3. The BTM enhanced antenna element according to claim 2, characterized in that, The second end of the filter module is connected to the third port through the fourth capacitor.

4. The BTM enhanced antenna element according to claim 1, characterized in that, The first filtering circuit is set on a separate board that is different from the antenna mainboard and the antenna transmitting board; The first port of the first filter circuit is connected to the BTM cable; the second port is connected to the signal port of the antenna main board; and the third port is connected to the signal port of the antenna transmitting board.

5. The BTM enhanced antenna element according to claim 1, characterized in that, The antenna unit also includes a first resonator and a power isolation unit; The receiving end of the signal interface of the antenna main board is connected to the first end of the energy receiving loop through the first resonator; The ground terminal of the signal interface of the antenna main board is connected to the second terminal of the energy receiving loop through the power isolation unit; The power isolation unit includes multiple capacitors connected in parallel to isolate DC power supplies; The first resonator includes a fifth capacitor and a third inductor connected in parallel, used to adjust the characteristic impedance parameters of the antenna for impedance matching.

6. The BTM enhanced antenna element according to claim 1, characterized in that, Including the energy transmission loop coil, The energy transmitting loop coil includes multiple resonant units connected in series and a first resistor. The first resistor is a nominal 50-ohm resistor with a ground terminal, has a power of not less than 20W, and is cooled by an external heat sink.

7. The BTM enhanced antenna element according to claim 1, characterized in that, The power supply and trigger circuit includes a first voltage regulator circuit, a second voltage regulator circuit, a trigger pulse circuit, and a second filter circuit; The second filter circuit is used to isolate the high-frequency signal from the coaxial cable and then supply power to the first voltage regulator circuit and the trigger pulse circuit. The second voltage regulator circuit is connected to the first voltage regulator circuit.

8. The BTM enhanced antenna element according to claim 7, characterized in that, The second filter circuit includes a fourth inductor, a fifth inductor, a sixth capacitor, and a seventh capacitor; The first end of the fourth inductor is connected to the input end of the second filter circuit, and the second end of the fourth inductor is connected to the first end of the fifth resonant unit. The fifth resonant unit includes a fifth inductor, a sixth capacitor, and a seventh capacitor connected in parallel. The second end of the fifth resonant unit is connected to the output of the second filter circuit; The second end of the fifth resonant unit is grounded through the first diode to provide voltage clamping protection for the circuit.

9. The BTM enhanced antenna element according to any one of claims 1-8, characterized in that, The signal acquisition and decision circuit includes an A4 interface energy decision circuit, an A4 interface energy acquisition circuit, and an AD sampling circuit; The A4 interface energy acquisition circuit inputs the acquired A4 interface signal to the A4 interface energy decision circuit for decision-making; The A4 interface energy decision circuit outputs a high energy flag input signal, a low energy flag input signal, and an energy alarm flag input signal to the logic control unit based on the decision result of the collected A4 interface signal. The AD sampling circuit is implemented using an AD chip, which is used to control the acquisition operation of the A4 interface energy harvesting circuit and to process the acquired A4 interface signal.

10. The BTM enhanced antenna element according to claim 9, characterized in that, The A4 interface energy harvesting circuit includes a third filter circuit, a fourth filter circuit, and a voltage divider protection circuit connected in series. The first end of the third filter circuit is connected to the A4 signal acquisition interface unit, the second end of the third filter circuit is connected to the first end of the fourth filter circuit, the second end of the fourth filter circuit is connected to the first end of the voltage divider protection circuit, and the second end of the voltage divider protection circuit outputs voltage signals through two output interfaces.

11. The BTM enhanced antenna element according to claim 10, characterized in that, The third filter circuit includes an eighth capacitor, a second resistor, a ninth capacitor, and a tenth capacitor; The first terminal of the eighth capacitor is connected to the first terminal of the acquisition interface unit and the second terminal of the second resistor, and the second terminal of the eighth capacitor is grounded; the second terminal of the second resistor is connected to the first terminal of the ninth capacitor, and the second terminal of the ninth capacitor is grounded; the first terminal of the tenth capacitor is connected to the second terminal of the second resistor and the first terminal of the fourth filter circuit.

12. The BTM enhanced antenna element according to claim 11, characterized in that, The fourth filter circuit includes a sixth inductor, an eleventh capacitor, a twelfth capacitor, and a thirteenth capacitor; The eleventh and twelfth capacitors are connected in series and then in parallel with the sixth inductor; The first terminal of the sixth inductor is connected to the first terminal of the tenth capacitor, the second terminal of the sixth inductor is connected to the first terminal of the thirteenth capacitor, the second terminal of the thirteenth capacitor is grounded, and the first terminal of the thirteenth capacitor is connected to the voltage divider protection circuit.

13. The BTM enhanced antenna element according to claim 12, characterized in that, The voltage divider protection circuit includes a first voltage divider circuit and a second voltage divider circuit. The first voltage divider circuit and the second voltage divider circuit are connected through two reverse diodes and output different levels of voltage, including the first level voltage and the second level voltage. The first voltage divider circuit and the second voltage divider circuit are connected through two reverse diodes, and are also connected to the fourth filter circuit through two reverse diodes. The anodes of the two reverse diodes are connected to the second terminal of the fourth filter circuit, i.e., the first terminal of the thirteenth capacitor. The first cathodes of the two reverse diodes are connected to the first voltage divider circuit, and the second cathodes of the two reverse diodes are connected to the second voltage divider circuit.

14. The BTM enhanced antenna element according to claim 13, characterized in that, The A4 interface energy decision circuit includes a first energy decision circuit and a second energy decision circuit. The first energy decision circuit is used to determine whether the first-stage voltage is within a specified range; the second energy decision circuit is used to determine whether the second-stage voltage has crossed zero.

15. The BTM enhanced antenna element according to claim 14, characterized in that, The first energy decision circuit includes a low threshold adjustment circuit, a first comparator, a high threshold adjustment circuit, and a second comparator. The first-stage voltage output from the A4 interface energy harvesting circuit is input to the first input terminal of the first comparator and the second input terminal of the second comparator. The first comparator is used to determine whether the first-stage voltage is less than the first threshold, and the second comparator is used to determine whether the first-stage voltage is greater than the second threshold. The low threshold adjustment circuit is connected to the second input terminal of the first comparator and is used to determine the first threshold. The high threshold adjustment circuit is connected to the first input of the second comparator and is used to determine the second threshold.

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