400g optoelectronic co-packaged module structure

By using flip-chip packaging and through-silicon via (TSV) technology, the packaging process of semiconductor devices has been simplified, enabling reliable transmission of electrical and optical signals. This solves the problem of complex packaging in existing technologies and improves the integration and accuracy of the packaging structure.

CN117092764BActive Publication Date: 2026-02-27SHUNYUN TECH (ZHONG SHAN) LTD
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Patent Information

Application Number
CN202311059415.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-22
Publication Date
2026-02-27
Estimated Expiration
2043-08-22

AI Technical Summary

Technical Problem

In the prior art, the second bonding structure of semiconductor devices needs to avoid the height control of EIC chips, which leads to complex packaging processes and makes it difficult to achieve efficient and accurate co-packaging.

Method used

Employing flip-chip packaging and through-silicon via (TSV) technology, the PCB board, silicon substrate, PIC chip, EIC chip, and digital signal processor are flip-chip connected. The TSV enables electrical signal conduction between the EIC chip and the silicon substrate, and the optical signal is accurately positioned and conducted by cooperating with the positioning notch of the PIC chip through the fiber optic array.

Benefits of technology

It simplifies the packaging process, shortens the electrical signal interconnection distance, improves space utilization and integration, ensures reliable transmission of electrical and optical signals, and achieves efficient and accurate co-packaging.

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Abstract

The application provides a 400G optoelectronic co-packaging module structure and relates to the field of packaging modules. The 400G optoelectronic co-packaging module structure comprises a PCB board, a silicon substrate, a PIC chip, an EIC chip, a digital signal processor and an optical fiber array, the silicon substrate is flip-chip connected to the surface of the PCB board, the PIC chip and the digital signal processor are respectively flip-chip connected to the surface of the silicon substrate; the EIC chip is flip-chip connected to the surface of the PIC chip, the PIC chip is internally provided with a through silicon via to form electrical signal conduction between the EIC chip and the silicon substrate; the PIC chip is integrated with a laser, a photodiode, a transmitting optical waveguide and a receiving optical waveguide, the transmitting optical waveguide and the receiving optical waveguide are arranged in parallel to the surface of the PIC chip and extend, the transmitting optical waveguide is connected to the laser, and the receiving optical waveguide is connected to the photodiode; the PIC chip is further provided with a positioning notch matched with the optical fiber array, the transmitting optical waveguide corresponds to a transmitting optical fiber, and the receiving optical waveguide corresponds to a receiving optical fiber; and the through silicon via is distributed staggeredly with the transmitting optical waveguide and the receiving optical waveguide.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of packaging modules, in particular to a 400G photoelectric co-packaging module structure. BACKGROUND

[0002] Photoelectric co-packaging, abbreviated as CPO technology, refers to assembling a switching chip and an optical engine on the same Socketed (socket) to form co-packaging of chips and modules. It has the characteristics of high integration, support for high data rate and low cost.

[0003] A semiconductor device and a manufacturing method thereof are disclosed in Chinese patent application No. CN113192937A, published on July 30, 2021, which specifically includes a substrate, an electronic integrated circuit (EIC) chip and a photonic integrated circuit (PIC) chip. The PIC chip is mounted on the substrate, and the PIC chip has a first surface facing the substrate. A plurality of EIC chips are arranged on the first surface of a single PIC chip. The original electronic integrated circuit of the semiconductor device is divided into a plurality of sub-integrated circuits and formed on a plurality of small EIC chips. Then, the plurality of EIC chips are inverted and mounted on the PIC chip through a first bonding structure, and further packaged on the substrate through a second bonding structure near the EIC chip, so that the electrical signal can be led out of the substrate via the first bonding structure of the EIC chip, the wiring line on the PIC chip and the second bonding structure near the EIC chip, avoiding long line transmission.

[0004] The semiconductor device in the prior art arranges the EIC chip on the first surface of the PIC chip facing the substrate, and then packages it on the substrate through the second bonding structure. However, the second bonding structure needs to avoid the EIC chip and control the height of the bonding formation. The packaging process of the second bonding structure is complex, and it is difficult to achieve the purpose of efficient and accurate co-packaging. SUMMARY

[0005] To solve the above problems, the purpose of the present application is to provide a 400G photoelectric co-packaging module structure to solve the problem that the second bonding structure of the existing device needs to avoid the EIC chip and control the height of the bonding formation, and the packaging process of the second bonding structure is complex, making it difficult to achieve efficient and accurate co-packaging.

[0006] The technical scheme of the 400G photoelectric co-packaging module structure of the present application is as follows:

[0007] The 400G photoelectric co-packaging module structure includes a PCB board, a silicon substrate, a PIC chip, an EIC chip, a digital signal processor and an optical fiber array. The silicon substrate is invertedly connected to the surface of the PCB board, and the PIC chip and the digital signal processor are respectively invertedly connected to the surface of the silicon substrate.

[0008] The EIC chip is inversely connected to the surface of the PIC chip, the PIC chip is internally provided with a through silicon via, the through silicon via is provided through in a direction perpendicular to the surface of the PIC chip, so as to form electrical signal conduction between the EIC chip and the silicon substrate;

[0009] The PIC chip is integrated with a laser, a photodiode, a transmitting optical waveguide and a receiving optical waveguide, the transmitting optical waveguide and the receiving optical waveguide are arranged in parallel to the surface of the PIC chip, the transmitting optical waveguide is connected with the laser, and the receiving optical waveguide is connected with the photodiode;

[0010] The PIC chip is further provided with a positioning notch at one side edge, the fiber array is provided with a first joint matched with the positioning notch, the transmitting optical waveguide is arranged in correspondence with a transmitting optical fiber of the fiber array, and the receiving optical waveguide is arranged in correspondence with a receiving optical fiber of the fiber array; and the through silicon via is distributed staggered with the transmitting optical waveguide and the receiving optical waveguide respectively.

[0011] Further, the positioning notch is a stepped notch, and the end of the transmitting optical waveguide and the end of the receiving optical waveguide are arranged on the side surface of the stepped notch respectively;

[0012] The bottom surface of the stepped notch is provided with a guide groove extending along the width direction of the stepped notch, and the lower side surface of the first joint is provided with a convex rib matched with the guide groove in concave-convex mode.

[0013] Further, the convex rib is provided in parallel and spaced apart with two, which are a first convex rib and a second convex rib, the first convex rib is arranged in direct opposition to the outermost transmitting optical fiber of the fiber array, and the second convex rib is arranged in direct opposition to the outermost receiving optical fiber of the fiber array;

[0014] Correspondingly, the guide groove is provided in parallel and spaced apart with two, which are a first guide groove and a second guide groove, the first guide groove is arranged in correspondence with the outermost optical waveguide of the transmitting optical waveguide, and the second guide groove is arranged in correspondence with the outermost optical waveguide of the receiving optical waveguide.

[0015] Further, the first joint comprises a carrier plate and an upper pressing plate arranged in superposition, the upper side of the carrier plate is provided in parallel and spaced apart with a plurality of through grooves, the receiving optical fiber and the transmitting optical fiber of the fiber array are respectively mounted in the corresponding through grooves, the upper pressing plate is adhesively fixed on the upper side of the carrier plate, and the convex rib is arranged on the lower side surface of the carrier plate.

[0016] Further, the side surface of the stepped gap is provided with a centering protrusion located at the center position between the transmitting optical waveguide and the receiving optical waveguide; the end of the first connector is also provided with a centering groove located at the center position between the receiving optical fiber and the transmitting optical fiber of the optical fiber array, and the centering protrusion and the centering groove are in concave-convex cooperation.

[0017] Further, the centering protrusion is a conical protrusion, and the central axis of the conical protrusion is arranged in parallel to the extension direction of the transmitting optical waveguide or the receiving optical waveguide; the centering groove is a conical groove, and the central axis of the conical groove is arranged in parallel to the extension direction of the optical fiber of the optical fiber array.

[0018] Further, a plurality of the through silicon vias are arranged at intervals on the transmitting optical waveguide and / or the receiving optical waveguide.

[0019] Further, the EIC chip is also integrated with a driver and a cross-group amplifier, and the driver and the cross-group amplifier are electrically connected with the through silicon vias, respectively.

[0020] Further, the EIC chip and the PIC chip, the PIC chip and the silicon substrate, the digital signal processor and the silicon substrate, and the silicon substrate and the PCB board are connected by copper solder balls.

[0021] Further, the surface of the PCB board is attached with a capacitor element, a resistor element and an inductor element, and the end of the PCB board away from the optical fiber array is also provided with a gold finger electrical port.

[0022] Beneficial effects: the 400G optoelectronic co-packaging module structure adopts the design form of PCB board, silicon substrate, PIC chip, EIC chip, digital signal processor and optical fiber array, the silicon substrate is flip-chip mounted on the surface of the PCB board, the PIC chip and the digital signal processor are flip-chip mounted on the surface of the silicon substrate, and the EIC chip is flip-chip mounted on the surface of the PIC chip. Since the PCB board, the silicon substrate, the PIC chip, the EIC chip and the digital signal processor adopt flip-chip packaging process, the flip-chip packaging connection is simple and reliable, and the electrical connection path is shorter compared with wire bonding.

[0023] Moreover, the PIC chip is internally provided with a through silicon via, and electrical signal conduction between the EIC chip and the silicon substrate is realized through the through silicon via, thereby avoiding electrical isolation formed between the PIC chip, the EIC chip and the silicon substrate, and eliminating the need to additionally arrange a bonding structure between the EIC chip and the silicon substrate, greatly shortening the interconnection distance of electrical signals between the two, and improving the space utilization and integration of the packaging structure. The 400G optoelectronic co-packaging module structure combines flip-chip packaging and a through silicon via process, and is simpler than the prior art in terms of bonding and forming height control, and can achieve the purpose of efficient and accurate co-packaging.

[0024] The PIC chip is internally integrated with a laser, a photodiode, a transmitting optical waveguide and a receiving optical waveguide, the edge of the PIC chip is provided with a positioning notch, and the first joint of the fiber array is matched with the positioning notch; the fiber array is accurately installed in the positioning notch of the PIC chip through the first joint, the transmitting optical waveguide is connected between the transmitting optical fiber of the fiber array and the laser, the receiving optical waveguide is connected between the receiving optical fiber of the fiber array and the photodiode, and the fiber array is attached to the PIC chip in a passive coupling manner. In addition, the through silicon vias are distributed staggeredly with the transmitting optical waveguide and the receiving optical waveguide, respectively, to avoid cross interference between the through silicon vias and the transmitting optical waveguide or the receiving optical waveguide, thereby ensuring the reliability of electrical signal and optical signal transmission. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 FIG. 1 is a perspective view of a 400G optoelectronic co-packaging module structure according to an embodiment of the present application;

[0026] Figure 2 FIG. 2 is a front view of the 400G optoelectronic co-packaging module structure according to the embodiment of the present application;

[0027] Figure 3 FIG. 3 is a partial view of the 400G optoelectronic co-packaging module structure according to the embodiment of the present application; Figure 2

[0028] Figure 4 FIG. 4 is a partial enlarged view of a PIC chip, an EIC chip and a fiber array in the 400G optoelectronic co-packaging module structure according to the embodiment of the present application;

[0029] Figure 5 FIG. 5 is a sectional view of the PIC chip and the EIC chip in the 400G optoelectronic co-packaging module structure according to the embodiment of the present application;

[0030] Figure 6 FIG. 6 is an internal optical path diagram of the PIC chip in the 400G optoelectronic co-packaging module structure according to the embodiment of the present application. ​

[0031] In the figure: 1-PCB board, 11-electronic components, 12-gold finger electrical port, 2-silicon substrate, 20-copper solder ball, 3-PIC chip, 30-silicon through hole, 31-laser, 32-photo diode, 33-emitting optical waveguide, 34-receiving optical waveguide, 35-positioning notch, 36-guiding groove, 37-centering protrusion, 38-backlight detector, 4-EIC chip, 5-digital signal processor, 6-optical fiber array, 60-first joint, 61-ridge. DETAILED DESCRIPTION

[0032] The specific embodiments of the 400G optoelectronic co-packaging module structure of the present application are described in further detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present application but are not intended to limit the scope of the present application.

[0033] A specific embodiment 1 of the 400G optoelectronic co-packaging module structure of the present application is shown in Figures 1 to 6 The 400G optoelectronic co-packaging module structure includes a PCB board 1, a silicon substrate 2, a PIC chip 3, an EIC chip 4, a digital signal processor 5, and an optical fiber array 6. The silicon substrate 2 is flip-chip connected to the surface of the PCB board 1, and the PIC chip 3 and the digital signal processor 5 are respectively flip-chip connected to the surface of the silicon substrate 2. The EIC chip 4 is flip-chip connected to the surface of the PIC chip 3. The PIC chip 3 has a silicon through hole 30 inside, which is arranged in a direction perpendicular to the surface of the PIC chip 3 to form an electrical signal conduction between the EIC chip 4 and the silicon substrate 2.

[0034] The PIC chip 3 is integrated with a laser 31, a photo diode 32, an emitting optical waveguide 33, and a receiving optical waveguide 34. The emitting optical waveguide 33 and the receiving optical waveguide 34 are arranged in parallel to the surface of the PIC chip 3. The emitting optical waveguide 33 is connected to the laser 31, and the receiving optical waveguide 34 is connected to the photo diode 32. One side edge of the PIC chip 3 is also provided with a positioning notch 35. The optical fiber array 6 has a first joint 60 that cooperates with the positioning notch 35. The emitting optical waveguide 33 is arranged corresponding to the emitting optical fiber of the optical fiber array 6, and the receiving optical waveguide 34 is arranged corresponding to the receiving optical fiber of the optical fiber array 6. The silicon through hole 30 is distributed staggered with the emitting optical waveguide 33 and the receiving optical waveguide 34.

[0035] The 400G optoelectronic co-packaging module structure adopts the design form of a PCB board 1, a silicon substrate 2, a PIC chip 3, an EIC chip 4, a digital signal processor 5 and a fiber array 6, the silicon substrate 2 is flip-chip mounted on the surface of the PCB board 1, the PIC chip 3 and the digital signal processor 5 are respectively flip-chip mounted on the surface of the silicon substrate 2, and the EIC chip 4 is flip-chip mounted on the surface of the PIC chip 3. Since the PCB board 1, the silicon substrate 2, the PIC chip 3, the EIC chip 4 and the digital signal processor 5 adopt the flip-chip packaging process, the flip-chip packaging connection is simple and reliable, and the electrical connection path is shorter than that of wire bonding.

[0036] Moreover, the PIC chip 3 is internally provided with a through silicon via 30, and electrical signal conduction between the EIC chip 4 and the silicon substrate 2 is realized through the through silicon via 30, thereby avoiding electrical isolation formed between the EIC chip 4 and the silicon substrate 2 through the PIC chip 3, and eliminating the need to additionally provide a bonding structure between the EIC chip 4 and the silicon substrate 2, greatly shortening the interconnection distance of electrical signals between the two, and improving the space utilization and integration of the packaging structure. The 400G optoelectronic co-packaging module structure combines flip-chip packaging and through silicon via technology, and compared with the existing device bonding, the bonding forming height needs to be controlled while avoiding the EIC chip, the packaging process is simpler, and the purpose of efficient and accurate co-packaging can be achieved.

[0037] The PIC chip 3 is internally integrated with a laser 31, a photodiode 32, a transmitting optical waveguide 33 and a receiving optical waveguide 34, the edge of the PIC chip 3 is provided with a positioning notch 35, and the first joint 60 of the fiber array 6 cooperates with the positioning notch 35; the fiber array 6 is accurately mounted in the positioning notch 35 of the PIC chip 3 through the first joint 60, the transmitting optical waveguide 33 is connected between the transmitting optical fiber of the fiber array 6 and the laser 31, the receiving optical waveguide 34 is connected between the receiving optical fiber of the fiber array 6 and the photodiode 32, and the fiber array 6 is attached to the PIC chip 3 in a passive coupling manner. In addition, the through silicon via 30 is distributed staggered with the transmitting optical waveguide 33 and the receiving optical waveguide 34, respectively, to avoid the intersection interference between the through silicon via 30 and the transmitting optical waveguide 33 or the receiving optical waveguide 3, thereby ensuring the reliability of electrical signal and optical signal transmission.

[0038] In the embodiment, the positioning notch 35 is a stepped notch, and the end of the transmitting optical waveguide 33 and the end of the receiving optical waveguide 34 are arranged on the side surfaces of the stepped notch respectively; the bottom surface of the stepped notch is provided with a guide groove 36 extending along the width direction of the stepped notch, and the lower side surface of the first connector 60 is provided with a convex rib 61 in recess-and-convex cooperation with the guide groove 36. The recess-and-convex cooperation between the convex rib 61 of the first connector 60 and the guide groove 36 of the positioning notch 35 accurately positions the installation position of the optical fiber array 6, and ensures the accurate alignment between the transmitting optical fiber of the optical fiber array 6 and the transmitting optical waveguide 33 and the accurate alignment between the receiving optical fiber of the optical fiber array 6 and the receiving optical waveguide 34.

[0039] Specifically, the convex rib 61 is arranged in parallel and at intervals, and is a first convex rib and a second convex rib respectively, the first convex rib is arranged opposite to the outermost transmitting optical fiber of the optical fiber array 6, and the second convex rib is arranged opposite to the outermost receiving optical fiber of the optical fiber array 6; correspondingly, the guide groove 36 is arranged in parallel and at intervals, and is a first guide groove and a second guide groove respectively, the first guide groove is arranged corresponding to the outermost optical waveguide of the transmitting optical waveguide 33, and the second guide groove is arranged corresponding to the outermost optical waveguide of the receiving optical waveguide 34.

[0040] As a further preferred scheme, the first connector 60 comprises a carrier plate and an upper pressing plate arranged in superposition, the upper side of the carrier plate is provided with a plurality of through grooves arranged in parallel and at intervals, the receiving optical fiber and the transmitting optical fiber of the optical fiber array 6 are respectively installed in the corresponding through grooves, the upper pressing plate is adhesively fixed to the upper side of the carrier plate, and the convex rib 61 is arranged on the lower side surface of the carrier plate. The adhesion of the upper pressing plate fixes the receiving optical fiber and the transmitting optical fiber of the optical fiber array 6 in the through grooves of the carrier plate, and ensures the relative position of the optical fiber array 6 and the first connector 60 to be reliable, so that the guide groove 36 and the convex rib 61 can accurately position the transmitting optical fiber and the receiving optical fiber.

[0041] In the embodiment, the side surface of the stepped notch is provided with a centering protrusion 37 located at the center position between the transmitting optical waveguide 33 and the receiving optical waveguide 34; the end of the first connector 60 is further provided with a centering groove located at the center position between the receiving optical fiber and the transmitting optical fiber of the optical fiber array 6, and the centering protrusion 37 is in recess-and-convex cooperation with the centering groove. Specifically, the centering protrusion 37 is a conical protrusion, and the central axis of the conical protrusion is arranged in parallel to the extension direction of the transmitting optical waveguide 33 or the receiving optical waveguide 34; the centering groove is a conical groove, and the central axis of the conical groove is arranged in parallel to the extension direction of the optical fiber of the optical fiber array 6.

[0042] The side surface of the stepped gap is provided with a centering protrusion 37, the end of the first connector 60 is provided with a centering groove, and the centering protrusion 37 and the centering groove are conical in shape. During the insertion of the first connector 60 into the stepped gap, the displacement in the insertion direction is converted into a centering effect through the cooperation of the conical protrusion and the conical groove, thereby improving the centering accuracy between the receiving optical fiber and the transmitting optical waveguide 33 and between the receiving optical fiber and the receiving optical waveguide 34.

[0043] The plurality of through silicon vias 30 are arranged at intervals of the transmitting optical waveguide 33 and / or the receiving optical waveguide 34, avoiding the intersection of the through silicon vias 30 with the transmitting optical waveguide 33 or the receiving optical waveguide 3, and ensuring the reliability of the transmission of electrical signals and optical signals. It should be noted that the through silicon vias 30 are processed on the PIC chip 3 by etching or laser technology, and are filled with conductive materials such as copper, tungsten, and polysilicon, thereby realizing the electrical signal communication between the EIC chip 4 and the silicon substrate 1, and effectively improving the integration of the packaging module. In addition, the EIC chip 4 also integrates a driver and a cross-group amplifier (not shown in the figure), and the driver and the cross-group amplifier are electrically connected to the through silicon vias 30.

[0044] In addition, the EIC chip 4 and the PIC chip 3, the PIC chip 3 and the silicon substrate 2, the digital signal processor 5 and the silicon substrate 2, and the silicon substrate 2 and the PCB board 1 are connected by copper solder balls 20. The PIC chip 3 also integrates a back light detector 38, which is optically connected to the transmitting optical waveguide 33. The surface of the PCB board 1 is mounted with electronic elements 11, such as capacitive elements, resistive elements, and inductive elements. The end of the PCB board 1 away from the optical fiber array 6 is also provided with a gold finger electrical port 12.

[0045] The above description is only the preferred embodiments of the present application, and it should be noted that those skilled in the art can make several improvements and replacements without departing from the technical principles of the present application, and these improvements and replacements should also be considered as the protection scope of the present application.

Claims

1. A 400G optoelectronic co-packaged module structure, characterized in that, The application relates to a PCB board, a silicon substrate, a PIC chip, an EIC chip, a digital signal processor and an optical fiber array, wherein the silicon substrate is inversely connected to the surface of the PCB board, the PIC chip and the digital signal processor are inversely connected to the surface of the silicon substrate respectively, the EIC chip is inversely connected to the surface of the PIC chip, the PIC chip is internally provided with a through silicon via, the through silicon via is vertically arranged through the surface of the PIC chip, and the through silicon via is filled with copper, tungsten or polycrystalline silicon conductive material to form an electric signal conduction between the EIC chip and the silicon substrate. The PIC chip is integrated with a laser, a photodiode, a transmitting optical waveguide and a receiving optical waveguide, the transmitting optical waveguide and the receiving optical waveguide are arranged in parallel to the surface of the PIC chip, the transmitting optical waveguide is connected with the laser, and the receiving optical waveguide is connected with the photodiode. One side edge of the PIC chip is further provided with a positioning notch, the optical fiber array is provided with a first joint matched with the positioning notch, the transmitting optical waveguide is arranged in correspondence with transmitting optical fibers of the optical fiber array, the receiving optical waveguide is arranged in correspondence with receiving optical fibers of the optical fiber array, and the through silicon vias are distributed in staggered mode with the transmitting optical waveguide and the receiving optical waveguide respectively. The positioning notch is a stepped notch, and the end of the transmitting optical waveguide and the end of the receiving optical waveguide are arranged on the side surface of the stepped notch respectively.

2. The 400G optoelectronic co-packaged module structure of claim 1, wherein, The bottom surface of the stepped notch is provided with a guide groove extending along the width direction of the stepped notch, the lower side surface of the first joint is provided with a convex rib, and the convex rib is matched with the guide groove in concave-convex mode. The convex rib is arranged in parallel and spaced apart, and the convex rib is a first convex rib and a second convex rib, the first convex rib is arranged opposite to the outermost transmitting optical fiber of the optical fiber array, and the second convex rib is arranged opposite to the outermost receiving optical fiber of the optical fiber array.

3. The 400G optoelectronic co-packaged module structure of claim 2, wherein, Correspondingly, the guide groove is arranged in parallel and spaced apart, and the guide groove is a first guide groove and a second guide groove, the first guide groove is arranged in correspondence with the outermost optical waveguide of the transmitting optical waveguide, and the second guide groove is arranged in correspondence with the outermost optical waveguide of the receiving optical waveguide. The first joint comprises a carrier plate and an upper pressing plate arranged in superposition, a plurality of through grooves are arranged in parallel and spaced apart on the upper side of the carrier plate, the receiving optical fibers and the transmitting optical fibers of the optical fiber array are respectively arranged in the corresponding through grooves, the upper pressing plate is adhesively fixed to the upper side of the carrier plate, and the convex rib is arranged on the lower side surface of the carrier plate.

4. The 400G optoelectronic co-packaged module structure of claim 2, wherein, The side surface of the stepped notch is provided with a centering protrusion located at the center position between the transmitting optical waveguide and the receiving optical waveguide, the end of the first joint is further provided with a centering groove located at the center position between the receiving optical fibers and the transmitting optical fibers of the optical fiber array, and the centering protrusion is matched with the centering groove in concave-convex mode.

5. The 400G optoelectronic co-packaged module structure of claim 2, wherein, ​ 6. The 400G optoelectronic co-packaged module structure of claim 5, wherein, The centering protrusion is a conical protrusion, and a central axis of the conical protrusion is arranged in parallel to an extension direction of the transmitting light waveguide or the receiving light waveguide; the centering groove is a conical groove, and a central axis of the conical groove is arranged in parallel to an extension direction of the optical fiber of the optical fiber array.

7. The 400G optoelectronic co-packaged module structure of claim 1, wherein, The through silicon vias are provided in plurality, and the plurality of through silicon vias are arranged separately at intervals of the transmitting light waveguide and / or the receiving light waveguide.

8. The 400G optoelectronic co-packaged module structure of claim 1, wherein, The EIC chip is further integrated with a driver and a cross-group amplifier, and the driver and the cross-group amplifier are electrically connected with the through silicon vias, respectively.

9. The 400G optoelectronic co-packaged module structure of claim 1, wherein, Copper solder balls are adopted for connection between the EIC chip and the PIC chip, between the PIC chip and the silicon substrate, between the digital signal processor and the silicon substrate, and between the silicon substrate and the PCB board.

10. The 400G optoelectronic co-packaged module structure of claim 1, wherein, Surface mount capacitive elements, resistive elements and inductive elements are attached to the PCB board, and a gold finger electrical port is further arranged at an end of the PCB board away from the optical fiber array.

Citation Information

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