Active clamping drive circuit

Abstract

The present invention discloses an active clamping drive circuit, which includes: a first active clamping absorption subcircuit and a second active clamping absorption subcircuit; wherein the full-bridge power conversion circuit includes: a primary full-bridge circuit, a secondary full-bridge circuit and an isolation driver; the control end of the first active clamping absorption subcircuit is connected to the output end of the isolation driver, and the absorption end of the first active clamping absorption subcircuit is connected to the secondary full-bridge circuit; the control end of the second active clamping absorption subcircuit is connected to the output end of the isolation driver, and the absorption end of the second active clamping absorption subcircuit is connected to the secondary full-bridge circuit; the secondary full-bridge circuit is connected to the output end of the isolation driver. By adopting the embodiment of the present invention, the isolation driver of the full-bridge converter can be used to realize the absorption of clamping and voltage spikes, without the need to add an additional isolation driver, and can be applied to high power density power modules.

Description

Technical Field

[0001] The invention relates to the technical field of switching power supplies, and in particular to an active clamping drive circuit. Background Art

[0002] In a full-bridge switching power supply, the secondary side usually adopts an active clamp absorption method, which can significantly reduce the voltage stress of the secondary side rectifier tube and improve reliability; compared with passive absorption, active clamp absorption can reduce absorption loss and improve power supply efficiency. Since this method requires the switch tube used to absorb power in the active clamp circuit to be turned on when the switch tube of the primary side is turned on, and turned off when or before the switch tube of the primary side is turned off, it is mainly achieved by inverting the primary side and then passing it through an isolation driver, but it is difficult to achieve in high power density power modules because of the need to add an isolation driver. Summary of the invention

[0003] The invention provides an active clamping driving circuit to solve the technical problem that it is difficult to realize active clamping in a high power density power supply module.

[0004] In order to solve the above technical problems, an embodiment of the present invention provides an active clamping drive circuit, which is applied to a full-bridge power conversion circuit, comprising: a first active clamping absorption sub-circuit and a second active clamping absorption sub-circuit; wherein the full-bridge power conversion circuit comprises: a primary full-bridge circuit, a secondary full-bridge circuit and an isolation driver;

[0005] The control end of the first active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the first active clamping absorption sub-circuit is connected to the secondary full-bridge circuit;

[0006] The control end of the second active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the second active clamping absorption sub-circuit is connected to the secondary full-bridge circuit;

[0007] The secondary full-bridge circuit is connected to the output end of the isolation driver;

[0008] The isolation driver is used to control the opening of the secondary full-bridge circuit and the closing of the secondary full-bridge circuit;

[0009] The first active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the first half-bridge of the primary full-bridge circuit;

[0010] The second active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the second half-bridge of the primary full-bridge circuit.

[0011] The first active clamping absorption sub-circuit and the second active clamping absorption sub-circuit of the present invention are only connected to the isolation driver of the secondary side in the full-bridge power conversion circuit, and respond to the on-off of the two half-bridges of the primary side based on the isolation driver, thereby achieving clamping and voltage spike absorption without the need for additional isolation drivers, and can be applied to high power density power supply modules.

[0012] Furthermore, the first active clamping absorption sub-circuit includes: a first capacitor, a first switch tube and a first driving circuit;

[0013] Wherein, the first end of the first capacitor is connected to the first output end of the secondary full-bridge circuit, and the second end of the first capacitor is connected to the first end of the first switch tube;

[0014] The second end of the first switch tube is connected to the second output end of the secondary full-bridge circuit, and the second end of the first switch tube is grounded;

[0015] The control end of the first switch tube is connected to the output end of the first drive circuit;

[0016] The input end of the first driving circuit is the control end of the first active clamping absorption sub-circuit;

[0017] The first driving circuit is used to control the first switch tube to be turned on during the conduction period of the first half bridge according to the driving signal of the isolation driver.

[0018] The present invention controls the on-off of the first switch tube based on the driving signal of the isolation driver on the secondary side, thereby eliminating the need for additional isolation drivers to achieve clamping and voltage spike absorption, and can be applied to high power density power modules.

[0019] Furthermore, the first driving circuit includes: a first delay circuit, a first level conversion and discharge circuit and a first driver;

[0020] Wherein, the input end of the first delay circuit is the input end of the first driving circuit, and the output end of the first delay circuit is connected to the input end of the first driver;

[0021] The output end of the first driver is connected to the input end of the first level conversion and discharge circuit;

[0022] The output end of the first level conversion and discharge circuit is the output end of the first driving circuit;

[0023] The first delay circuit is used to transmit the driving signal of the isolation driver to the first driver after delay;

[0024] The first driver is used to output a first level signal when the voltage at the input terminal of the first driver is lower than a first threshold; and is used to output a second level signal when the voltage at the input terminal of the first driver is higher than the first threshold;

[0025] The first level conversion and discharge circuit is used for transmitting the first level signal or the second level signal to the first switch tube after level conversion.

[0026] The present invention utilizes a first delay circuit and a first level conversion and discharge circuit to respectively delay the drive signal of the isolation driver and the level signal of the first driver, thereby enabling the first switch tube to be turned on during the conduction period of the first half-bridge to perform clamping and voltage spike absorption; no additional isolation driver is required, which is convenient for application in high power density power supply modules.

[0027] Furthermore, the first delay circuit includes: a first diode, a first resistor and a second capacitor;

[0028] Wherein, the anode of the first diode is connected to the first end of the first resistor, and together constitutes the input end of the first delay circuit;

[0029] The cathode of the first diode is connected to the second end of the first resistor and the first end of the second capacitor respectively, and together constitutes the output end of the first delay circuit;

[0030] The second terminal of the second capacitor is grounded.

[0031] Further, the first level conversion and discharge circuit includes: a second diode, a second resistor and a third capacitor;

[0032] Wherein, the first end of the third capacitor is the input end of the first level conversion and discharge circuit;

[0033] The second end of the third capacitor is connected to the anode of the second diode and the first end of the second resistor respectively, and together constitutes the output end of the first level conversion and discharge circuit;

[0034] A cathode of the second diode is connected to the second end of the second resistor, and a cathode of the second diode is grounded.

[0035] Furthermore, the second active clamping absorption sub-circuit includes: a fourth capacitor, a second switch tube and a second driving circuit;

[0036] Wherein, a first end of the fourth capacitor is connected to a first output end of the secondary full-bridge circuit, and a second end of the fourth capacitor is connected to a first end of the second switch tube;

[0037] The second end of the second switch tube is connected to the second output end of the secondary full-bridge circuit, and the second end of the second switch tube is grounded;

[0038] The control end of the second switch tube is connected to the output end of the second drive circuit;

[0039] The input end of the second driving circuit is the control end of the second active clamping absorption sub-circuit;

[0040] The second driving circuit is used to control the second switch tube to be turned on during the conduction period of the second half bridge according to the driving signal of the isolation driver.

[0041] The present invention controls the on-off of the second switch tube based on the driving signal of the isolation driver on the secondary side, thereby eliminating the need for additional isolation drivers to achieve clamping and voltage spike absorption, and can be applied to high power density power modules.

[0042] Furthermore, the second driving circuit includes: a second delay circuit, a second level conversion and discharge circuit and a second driver;

[0043] Wherein, the input end of the second delay circuit is the input end of the second drive circuit, and the output end of the first delay circuit is connected to the input end of the second driver;

[0044] The output terminal of the second driver is connected to the input terminal of the second level conversion and discharge circuit;

[0045] The output end of the second level conversion and discharge circuit is the output end of the second driving circuit;

[0046] The second delay circuit is used to transmit the driving signal of the isolation driver to the second driver after delay;

[0047] The second driver is used to output a first level signal when the voltage at the input terminal of the second driver is lower than a first threshold; and is used to output a second level signal when the voltage at the input terminal of the second driver is higher than the first threshold;

[0048] The second level conversion and discharge circuit is used for transmitting the first level signal or the second level signal to the second switch tube after level conversion.

[0049] The present invention utilizes a first delay circuit and a second level conversion and discharge circuit to respectively delay the drive signal of the isolation driver and the level signal of the second driver, thereby enabling the second switch tube to be turned on during the conduction period of the second half-bridge to perform clamping and voltage spike absorption; no additional isolation driver is required, which facilitates application in high power density power supply modules.

[0050] Furthermore, the second delay circuit comprises: a third diode, a third resistor and a fifth capacitor;

[0051] Wherein, the anode of the third diode is connected to the first end of the third resistor, and together constitutes the input end of the second delay circuit;

[0052] The cathode of the third diode is respectively connected to the second end of the third resistor and the first end of the fifth capacitor, and together constitutes the output end of the second delay circuit;

[0053] A second terminal of the fifth capacitor is grounded.

[0054] Further, the second level conversion and discharge circuit includes: a fourth diode, a fourth resistor and a sixth capacitor;

[0055] Wherein, the first end of the sixth capacitor is the input end of the second level conversion and discharge circuit;

[0056] The second end of the sixth capacitor is connected to the anode of the fourth diode and the first end of the fourth resistor respectively, so as to form the output end of the second level conversion and discharge circuit together with the cathode of the fourth diode and the second end of the fourth resistor;

[0057] A cathode of the fourth diode is connected to the second end of the fourth resistor.

[0058] Furthermore, the full-bridge power conversion circuit further includes: a driver and a PWM controller;

[0059] Wherein, the input end of the driver is connected to the PWM controller, and the output end of the driver is connected to the primary full-bridge circuit;

[0060] An input terminal of the isolation driver is connected to the PWM controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 A schematic structural diagram of an embodiment of an active clamping drive circuit provided by the present invention;

[0062] Figure 2 A schematic diagram of the connection relationship of an embodiment of the active clamping driving circuit provided by the present invention;

[0063] Figure 3 The signal timing diagram provided by the present invention. DETAILED DESCRIPTION

[0064] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0065] Please refer to Figure 1 , a schematic structural diagram of an embodiment of an active clamping driving circuit provided by the present invention, the circuit comprises:

[0066] A first active clamping absorption sub-circuit and a second active clamping absorption sub-circuit; wherein the full-bridge power conversion circuit comprises: a primary full-bridge circuit, a secondary full-bridge circuit and an isolation driver;

[0067] The control end of the first active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the first active clamping absorption sub-circuit is connected to the secondary full-bridge circuit;

[0068] The control end of the second active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the second active clamping absorption sub-circuit is connected to the secondary full-bridge circuit;

[0069] The secondary full-bridge circuit is connected to the output end of the isolation driver;

[0070] The isolation driver is used to control the opening of the secondary full-bridge circuit and the closing of the secondary full-bridge circuit;

[0071] The first active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the first half-bridge of the primary full-bridge circuit;

[0072] The second active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the second half-bridge of the primary full-bridge circuit.

[0073] The first active clamping absorption sub-circuit and the second active clamping absorption sub-circuit of the present invention are only connected to the isolation driver of the secondary side in the full-bridge power conversion circuit, and respond to the on-off of the two half-bridges of the primary side based on the isolation driver, thereby achieving clamping and voltage spike absorption without the need for additional isolation drivers, and can be applied to high power density power supply modules.

[0074] Please refer to Figure 2 , is a schematic diagram of the connection relationship of an embodiment of the active clamping driving circuit provided by the present invention, wherein the first active clamping absorption sub-circuit includes: a first capacitor C2, a first switch tube Q9 and a first driving circuit;

[0075] Wherein, the first end of the first capacitor C2 is connected to the first output end of the secondary full-bridge circuit, and the second end of the first capacitor C2 is connected to the first end of the first switch tube Q9;

[0076] The second end of the first switch tube Q9 is connected to the second output end of the secondary full-bridge circuit, and the second end of the first switch tube Q9 is grounded;

[0077] The control end of the first switch tube Q9 is connected to the output end of the first drive circuit;

[0078] The input end of the first driving circuit is the control end of the first active clamping absorption sub-circuit;

[0079] The first driving circuit is used to control the first switch tube Q9 to be turned on during the conduction period of the first half bridge according to the driving signal of the isolation driver.

[0080] The present invention controls the on-off of the first switch tube Q9 based on the driving signal of the isolation driver on the secondary side, thereby eliminating the need for additional isolation drivers to achieve clamping and voltage spike absorption, and can be applied to high power density power modules.

[0081] Furthermore, the first driving circuit includes: a first delay circuit, a first level conversion and discharge circuit and a first driver IC1;

[0082] The input end of the first delay circuit is the input end of the first driving circuit, and the output end of the first delay circuit is connected to the input end of the first driver IC1;

[0083] The output end of the first driver IC1 is connected to the input end of the first level conversion and discharge circuit;

[0084] The output end of the first level conversion and discharge circuit is the output end of the first driving circuit;

[0085] The first delay circuit is used to transmit the driving signal of the isolation driver to the first driver IC1 after delay;

[0086] The first driver IC1 is used to output a first level signal when the voltage at the input terminal of the first driver IC1 is lower than a first threshold; and is used to output a second level signal when the voltage at the input terminal of the first driver IC1 is higher than the first threshold;

[0087] The first level conversion and discharge circuit is used for transmitting the first level signal or the second level signal to the first switch tube Q9 after level conversion.

[0088] The present invention utilizes a first delay circuit and a first level conversion and discharge circuit to respectively delay the drive signal of the isolation driver and the level signal of the first driver IC1, thereby enabling the first switch tube Q9 to be turned on during the first half-bridge conduction period to perform clamping and voltage spike absorption; no additional isolation driver is required, which is convenient for application in high power density power supply modules.

[0089] Furthermore, the first delay circuit includes: a first diode D3, a first resistor R3 and a second capacitor C5;

[0090] Wherein, the anode of the first diode D3 is connected to the first end of the first resistor R3, and together constitutes the input end of the first delay circuit;

[0091] The cathode of the first diode D3 is connected to the second end of the first resistor R3 and the first end of the second capacitor C5 respectively, and together constitute the output end of the first delay circuit;

[0092] A second terminal of the second capacitor C5 is grounded.

[0093] Further, the first level conversion and discharge circuit includes: a second diode D1, a second resistor R1 and a third capacitor C1;

[0094] Wherein, the first end of the third capacitor C1 is the input end of the first level conversion and discharge circuit;

[0095] The second end of the third capacitor C1 is respectively connected to the anode of the second diode D1 and the first end of the second resistor R1, and together constitutes the output end of the first level conversion and discharge circuit;

[0096] A cathode of the second diode D1 is connected to the second end of the second resistor R1 , and a cathode of the second diode is grounded.

[0097] In this embodiment, the primary full-bridge circuit includes a first rectifier tube Q1, a second rectifier tube Q2, a third rectifier tube Q3 and a fourth rectifier tube Q4; wherein the first end of the first rectifier tube Q1 is connected to the first end of the second rectifier tube Q2, together forming a first input end of the primary full-bridge circuit; the second end of the first rectifier tube Q1 is connected to the first end of the third rectifier tube Q3, together forming a first output end of the primary full-bridge circuit; the second end of the second rectifier tube Q2 is connected to the first end of the fourth rectifier tube Q4, together forming a second output end of the primary full-bridge circuit; the second end of the third rectifier tube Q3 is connected to the second end of the fourth rectifier tube Q4, together forming a The second input end of the primary full-bridge circuit is formed; the control end of the first rectifier tube Q1 is connected to the first output end of the driver, the control end of the second rectifier tube Q2 is connected to the second output end of the driver, the control end of the third rectifier tube Q3 is connected to the third output end of the driver, and the control end of the fourth rectifier tube Q4 is connected to the fourth output end of the driver; the first input end of the driver is connected to the first output end of the PWM controller, and the second input end of the driver is connected to the second output end of the PWM; the third output end of the PWM controller is connected to the first input end of the isolation controller, and the fourth output end of the PWM is connected to the second input end of the isolation driver.

[0098] In this embodiment, the first rectifier tube Q1 and the fourth rectifier tube Q4 form a first half bridge, and the second rectifier tube Q2 and the third rectifier tube Q3 form a second half bridge.

[0099] In this embodiment, the secondary full-bridge circuit includes a fifth rectifier tube Q5, a sixth rectifier tube Q6, a seventh rectifier tube Q7 and an eighth rectifier tube Q8; wherein the first end of the fifth rectifier tube Q5 is connected to the first end of the sixth rectifier tube Q6, together forming a first output end of the secondary full-bridge circuit; the second end of the fifth rectifier tube Q5 is connected to the first end of the seventh rectifier tube Q7, together forming a first input end of the secondary full-bridge circuit; the second end of the sixth rectifier tube Q6 is connected to the first end of the eighth rectifier tube Q8, together forming a second input end of the secondary full-bridge circuit; the first end of the seventh rectifier tube Q7 is connected to the first end of the eighth rectifier tube Q8, together forming a second ... first end of the seventh rectifier tube Q7 is connected to the first end of the eighth rectifier tube Q8, together forming a second input end of the secondary full-bridge circuit; the first end of the seventh rectifier tube Q7 is connected to the first end of the eighth rectifier tube Q8, together forming a first output end of the secondary full-bridge circuit; the first end of the fifth rectifier tube Q5 is connected to the first end of the seventh rectifier tube Q7, together forming a first input end of the secondary full-bridge circuit; the The two ends are connected to the second end of the eighth rectifier tube Q8, and together constitute the second output end of the secondary full-bridge circuit; the control end of the fifth rectifier tube Q5 is connected to the first output end of the isolation driver, the control end of the sixth rectifier tube Q6 is connected to the second output end of the isolation driver, the control end of the seventh rectifier tube Q7 is connected to the third output end of the isolation driver, and the control end of the eighth rectifier tube Q8 is connected to the fourth output end of the isolation driver; the second input end of the secondary full-bridge circuit is connected to the first end of the secondary side of the transformer, and the first input end of the secondary full-bridge circuit is connected to the second end of the secondary side of the transformer.

[0100] In this embodiment, the driving signal received by the seventh rectifier Q7 is connected to the input of the first driver IC1 through the first resistor R3 and the first diode D3, the second capacitor C5 is connected between the input of the first driver IC1 and the ground, and the output of the first driver IC1 is connected to the third capacitor C1. Due to the dead zone, when the first rectifier Q1 and the fourth rectifier Q4 are turned on, the seventh rectifier Q7 is turned off in advance. After the seventh rectifier Q7 is turned off, the first resistor R3 and the second capacitor C5 are discharged, and the voltage at point B drops. When it drops to the input turn-off threshold of the first driver IC1, the first driver IC1 outputs a low level. After conversion by the third capacitor C1 and the second diode D1, the control end of the first switch Q9, that is, point C, is a negative level, and the first switch Q9 is turned on. By adjusting the resistance value of the first resistor R3 and the capacitance value of the second capacitor C5, the turn-on edge of the first switch Q9 can be set after the turn-on edge of the first rectifier Q1 and the fourth rectifier Q4. After the first switch tube Q9 is driven to a negative level, the gate capacitance of the first switch tube Q9 and the third capacitor C1 are discharged through the second resistor R1, and the voltage at point C rises from a negative voltage to a zero voltage. By adjusting the resistance value of the second resistor R1, the voltage at point C rises to the threshold voltage of the first switch tube Q9 before the first rectifier tube Q1 and the fourth rectifier tube Q4 are turned off, and the first switch tube Q9 is turned off. After the first rectifier tube Q1 and the fourth rectifier tube Q4 are turned off, the seventh rectifier tube Q7 is turned on after the dead time, the voltage at point B becomes high instantly, the input of the first driver IC1 becomes high, and the voltage on the third capacitor C1 is refreshed to the VCC of the first driver IC1 through the second diode D1. The waveforms of each device in this process can be referred to Figure 3 , is a signal timing diagram provided by the present invention, wherein the first switch tube Q9 is turned on after the first half bridge is turned on, and is turned off before the first half bridge is turned off.

[0101] Please refer to Figure 2 , the second active clamping absorption sub-circuit includes: a fourth capacitor C4, a second switch tube Q10 and a second driving circuit;

[0102] Wherein, a first end of the fourth capacitor C4 is connected to the first output end of the secondary full-bridge circuit, and a second end of the fourth capacitor C4 is connected to the first end of the second switch tube Q10;

[0103] The second end of the second switch tube Q10 is connected to the second output end of the secondary full-bridge circuit, and the second end of the second switch tube Q10 is grounded;

[0104] The control end of the second switch tube Q10 is connected to the output end of the second drive circuit;

[0105] The input end of the second driving circuit is the control end of the second active clamping absorption sub-circuit;

[0106] The second driving circuit is used for controlling the second switch tube Q10 to be turned on during the conduction period of the second half bridge according to the driving signal of the isolation driver.

[0107] The present invention controls the on-off of the second switch tube Q10 based on the driving signal of the isolation driver on the secondary side, thereby eliminating the need for additional isolation drivers to achieve clamping and voltage spike absorption, and can be applied to high power density power modules.

[0108] Furthermore, the second driving circuit includes: a second delay circuit, a second level conversion and discharge circuit and a second driver IC2;

[0109] The input end of the second delay circuit is the input end of the second driving circuit, and the output end of the first delay circuit is connected to the input end of the second driver IC2;

[0110] The output terminal of the second driver IC2 is connected to the input terminal of the second level conversion and discharge circuit;

[0111] The output end of the second level conversion and discharge circuit is the output end of the second driving circuit;

[0112] The second delay circuit is used to transmit the driving signal of the isolation driver to the second driver IC2 after delay;

[0113] The second driver IC2 is used to output a first level signal when the voltage at the input terminal of the second driver IC2 is lower than the first threshold; and is used to output a second level signal when the voltage at the input terminal of the second driver IC2 is higher than the first threshold;

[0114] The second level conversion and discharge circuit is used for transmitting the first level signal or the second level signal to the second switch tube Q10 after level conversion.

[0115] The present invention utilizes a first delay circuit and a second level conversion and discharge circuit to respectively delay the drive signal of the isolation driver and the level signal of the second driver IC2, thereby enabling the second switch tube Q10 to be turned on during the conduction period of the second half-bridge to perform clamping and voltage spike absorption; no additional isolation driver is required, which is convenient for application in high power density power supply modules.

[0116] Furthermore, the second delay circuit includes: a third diode D4, a third resistor R4 and a fifth capacitor C6;

[0117] Wherein, the anode of the third diode D4 is connected to the first end of the third resistor R4, and together constitutes the input end of the second delay circuit;

[0118] The cathode of the third diode D4 is respectively connected to the second end of the third resistor R4 and the first end of the fifth capacitor C6, and together constitutes the output end of the second delay circuit;

[0119] A second terminal of the fifth capacitor C6 is grounded.

[0120] Further, the second level conversion and discharge circuit includes: a fourth diode D2, a fourth resistor R2 and a sixth capacitor C3;

[0121] Wherein, the first end of the sixth capacitor C3 is the input end of the second level conversion and discharge circuit;

[0122] The second end of the sixth capacitor C3 is connected to the anode of the fourth diode D2 and the first end of the fourth resistor R2 respectively, so that the cathode of the fourth diode and the second end of the fourth resistor together form the output end of the second level conversion and discharge circuit;

[0123] A cathode of the fourth diode D2 is connected to the second end of the fourth resistor R2.

[0124] In this embodiment, the driving signal received by the eighth rectifier Q8 is connected to the input of the second driver IC2 through the third resistor R4 and the third diode D4, the fifth capacitor C6 is connected between the input of the second driver IC2 and the ground, and the output of the second driver IC2 is connected to the sixth capacitor C3. Due to the dead zone, when the second rectifier Q2 and the third rectifier Q3 are turned on, the eighth rectifier Q8 is turned off in advance. After the eighth rectifier Q8 is turned off, the third resistor R4 and the fifth capacitor C6 are discharged, and the voltage at point D drops. When it drops to the input turn-off threshold of the second driver IC2, the second driver IC2 outputs a low level. After conversion by the sixth capacitor C3 and the fourth diode D2, the control end of the second switch tube Q10, that is, point E, is a negative level, and the second switch tube Q10 is turned on. By adjusting the resistance value of the third resistor R4 and the capacitance value of the fifth capacitor C6, the turn-on edge of the second switch tube Q10 can be set after the turn-on edge of the second rectifier Q2 and the third rectifier Q3. After the second switch tube Q10 is driven to a negative level, the gate capacitance of the second switch tube Q10 and the sixth capacitor C3 are discharged through the second resistor R1, and the voltage at point E rises from a negative voltage to a zero voltage. By adjusting the resistance value of the second resistor R1, the voltage at point E rises to the threshold voltage of the second switch tube Q10 before the second rectifier tube Q2 and the third rectifier tube Q3 are turned off, and the second switch tube Q10 is turned off. After the second rectifier tube Q2 and the third rectifier tube Q3 are turned off, the eighth rectifier tube Q8 is turned on after the dead time, the voltage at point D becomes high instantly, the input of the second driver IC2 becomes high, and the voltage on the sixth capacitor C3 is refreshed to the VCC of the second driver IC2 through the fourth diode D2.

[0125] Furthermore, the full-bridge power conversion circuit further includes: a driver and a PWM controller;

[0126] Wherein, the input end of the driver is connected to the PWM controller, and the output end of the driver is connected to the primary full-bridge circuit;

[0127] An input terminal of the isolation driver is connected to the PWM controller.

[0128] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It is particularly pointed out that for those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. An active clamping drive circuit, applied to a full-bridge power conversion circuit, characterized in that: include: A first active clamping absorption sub-circuit and a second active clamping absorption sub-circuit; wherein the full-bridge power conversion circuit comprises: a primary full-bridge circuit, a secondary full-bridge circuit and an isolation driver; The control end of the first active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the first active clamping absorption sub-circuit is connected to the secondary full-bridge circuit; wherein the first active clamping absorption sub-circuit includes a first drive circuit; the input end of the first drive circuit is the control end of the first active clamping absorption sub-circuit; the first drive circuit is used to control the first switch tube to be turned on during the conduction period of the first half bridge of the primary full-bridge circuit according to the drive signal of the isolation driver; The control end of the second active clamping absorption sub-circuit is connected to the output end of the isolation driver, and the absorption end of the second active clamping absorption sub-circuit is connected to the secondary full-bridge circuit; wherein the second active clamping absorption sub-circuit includes a second driving circuit; the input end of the second driving circuit is the control end of the second active clamping absorption sub-circuit; the second driving circuit is used to control the second switch tube to be turned on during the conduction period of the second half bridge of the primary full-bridge circuit according to the driving signal of the isolation driver; The secondary side full bridge circuit is connected to the output end of the isolation driver; The isolation driver is used to control the opening of the secondary full-bridge circuit and the closing of the secondary full-bridge circuit; The first active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the first half-bridge of the primary full-bridge circuit; the first active clamping absorption sub-circuit includes a first switch tube; the first output end of the secondary full-bridge circuit is connected to the first end of the first switch tube; the second end of the first switch tube is connected to the second output end of the secondary full-bridge circuit; the control end of the first switch tube is connected to the output end of the first drive circuit; wherein the first drive circuit includes a first delay circuit, a first level conversion and discharge circuit and a first driver; the input end of the first delay circuit is the input end of the first drive circuit, and the output end of the first delay circuit is the output end of the first drive circuit. connected to the input end of the first driver; the output end of the first driver is connected to the input end of the first level conversion and discharge circuit; the output end of the first level conversion and discharge circuit is the output end of the first driving circuit; the first delay circuit is used to transmit the driving signal of the isolation driver to the first driver after delay; the first driver is used to output a first level signal when the voltage at the input end of the first driver is lower than a first threshold; and is used to output a second level signal when the voltage at the input end of the first driver is higher than the first threshold; the first level conversion and discharge circuit is used to transmit the first level signal or the second level signal to the first switch tube after level conversion; The second active clamping absorption sub-circuit is used to clamp the voltage spike of the secondary full-bridge circuit and absorb electric energy during the conduction period of the second half-bridge of the primary full-bridge circuit; the second active clamping absorption sub-circuit includes a second switch tube; the first output end of the secondary full-bridge circuit is connected to the first end of the second switch tube; the second end of the second switch tube is connected to the second output end of the secondary full-bridge circuit; the control end of the second switch tube is connected to the output end of the second drive circuit; wherein the second drive circuit includes a second delay circuit, a second level conversion and discharge circuit and a second driver; the input end of the second delay circuit is the input end of the second drive circuit, and the output end of the second delay circuit is the output end of the second drive circuit. connected to the input end of the second driver; the output end of the second driver is connected to the input end of the second level conversion and discharge circuit; the output end of the second level conversion and discharge circuit is the output end of the second driving circuit; the second delay circuit is used to transmit the driving signal of the isolation driver to the second driver after delay; the second driver is used to output a first level signal when the voltage at the input end of the second driver is lower than the first threshold; and is used to output a second level signal when the voltage at the input end of the second driver is higher than the first threshold; the second level conversion and discharge circuit is used to transmit the first level signal or the second level signal to the second switch tube after level conversion.

2. The active clamp driving circuit according to claim 1, characterized in that: The first active clamp absorption sub-circuit also includes a first capacitor; wherein the first end of the first capacitor is connected to the first output end of the secondary full-bridge circuit, the second end of the first capacitor is connected to the first end of the first switch tube; the second end of the first switch tube is grounded.

3. The active clamp driving circuit according to claim 1, characterized in that: The first delay circuit includes: a first diode, a first resistor and a second capacitor; Wherein, the anode of the first diode is connected to the first end of the first resistor, and together constitutes the input end of the first delay circuit; The cathode of the first diode is connected to the second end of the first resistor and the first end of the second capacitor respectively, and together constitutes the output end of the first delay circuit; The second terminal of the second capacitor is grounded.

4. The active clamp driving circuit according to claim 1, characterized in that: The first level conversion and discharge circuit includes: a second diode, a second resistor and a third capacitor; Wherein, the first end of the third capacitor is the input end of the first level conversion and discharge circuit; The second end of the third capacitor is connected to the anode of the second diode and the first end of the second resistor respectively, and together constitutes the output end of the first level conversion and discharge circuit; A cathode of the second diode is connected to the second end of the second resistor, and a cathode of the second diode is grounded.

5. The active clamp driving circuit according to claim 1, characterized in that: The second active clamp absorption sub-circuit also includes a fourth capacitor; wherein the first end of the fourth capacitor is connected to the first output end of the secondary full-bridge circuit, the second end of the fourth capacitor is connected to the first end of the second switch tube; the second end of the second switch tube is grounded.

6. The active clamp driving circuit according to claim 5, characterized in that: The second delay circuit comprises: a third diode, a third resistor and a fifth capacitor; Wherein, the anode of the third diode is connected to the first end of the third resistor, and together constitutes the input end of the second delay circuit; The cathode of the third diode is respectively connected to the second end of the third resistor and the first end of the fifth capacitor, and together constitutes the output end of the second delay circuit; A second terminal of the fifth capacitor is grounded.

7. The active clamp driving circuit according to claim 5, characterized in that: The second level conversion and discharge circuit comprises: a fourth diode, a fourth resistor and a sixth capacitor; Wherein, the first end of the sixth capacitor is the input end of the second level conversion and discharge circuit; The second end of the sixth capacitor is connected to the anode of the fourth diode and the first end of the fourth resistor respectively, so as to form the output end of the second level conversion and discharge circuit together with the cathode of the fourth diode and the second end of the fourth resistor; A cathode of the fourth diode is connected to the second end of the fourth resistor.

8. The active clamping driving circuit according to any one of claims 1 to 7, characterized in that: The full-bridge power conversion circuit also includes: a driver and a PWM controller; Wherein, the input end of the driver is connected to the PWM controller, and the output end of the driver is connected to the primary full-bridge circuit; An input terminal of the isolation driver is connected to the PWM controller.

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