Chip packaging structure and chip packaging method
By designing a continuous channel chip packaging structure in a micro-trap dPCR chip, the problems of incomplete sample filling and air bubbles were solved, ensuring complete sample entry and no air bubbles, thus improving the efficiency and accuracy of dPCR.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2022-03-25
- Publication Date
- 2026-05-19
AI Technical Summary
Existing micro-trap dPCR chips have problems such as incomplete filling of microwells by samples and the presence of air bubbles inside the microwells.
A chip packaging structure is designed, including a sample substrate, a first cover plate and a second cover plate, with through holes, a sample inlet and a sample outlet. The through holes are connected by a first flow channel structure and a second flow channel structure to form a continuous channel, ensuring that the sample can fill all through holes and avoiding the generation of air bubbles.
It achieves complete sample filling and bubble elimination, improving the efficiency and accuracy of microtrap dPCR.
Smart Images

Figure CN117136093B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of digital polymerase chain reaction (PCR) chip technology, and more specifically, to a chip packaging structure and a chip packaging method. Background Technology
[0002] Digital polymerase chain reaction (dPCR) is an absolute quantification technique for nucleic acid molecules. Compared to the previous generation qPCR, dPCR can directly calculate the number of DNA molecules, providing an absolute quantification of the starting sample, with higher sensitivity and accuracy. dPCR technology can be divided into two categories: droplet-based dPCR and micro-trap dPCR. Because current droplet generation devices struggle to maintain stable, uniform droplet generation over long periods, micro-trap dPCR is gaining increasing attention. The main principle of micro-trap dPCR is to disperse the nucleic acid solution into thousands or tens of thousands of microwells on a chip. After PCR cycles, the fluorescence signal in the microwells is statistically analyzed, and the nucleic acid concentration of the original solution is calculated based on the Poisson distribution.
[0003] However, most micro-trap dPCR wells currently use blind wells, which can lead to problems such as incomplete filling of the wells by the sample and the presence of air bubbles inside the wells.
[0004] Public content
[0005] This disclosure aims to solve at least one of the technical problems existing in the prior art, and proposes a chip packaging structure and chip packaging method, which can solve problems such as incomplete filling of micropores by samples and air bubbles in micropores.
[0006] To achieve the above objectives, embodiments of this disclosure provide a chip packaging structure, including:
[0007] A sample substrate having a plurality of through holes extending along its thickness direction;
[0008] The first cover plate and the second cover plate are respectively located on opposite sides of the sample substrate along the thickness direction of the substrate, and are attached to the sample substrate.
[0009] At least one pair of inlet and outlet ports, each pair of inlet and outlet ports being located on one of the first cover plate and the second cover plate or respectively on the first cover plate and the second cover plate; a flow path is provided between each pair of inlet and outlet ports;
[0010] The first cover plate has a first flow channel structure on its surface opposite to the sample substrate, and the second cover plate has a second flow channel structure on its surface opposite to the sample substrate. The first and second flow channel structures connect the multiple through holes to form a continuous channel corresponding to the flow path between each pair of sample inlets and sample outlets.
[0011] Optionally, the first flow channel structure includes a plurality of first flow channels spaced apart; the second flow channel structure includes a plurality of second flow channels spaced apart.
[0012] In the plurality of through holes on the same flow path, two through holes are located at the beginning and end of the flow path, respectively. One end of the through hole at the beginning is connected to the sample inlet, and the other end is connected to the adjacent through hole downstream through a first flow channel or a second flow channel. One end of the through hole at the end is connected to the sample outlet, and the other end is connected to the adjacent through hole upstream through a first flow channel or a second flow channel.
[0013] Each of the remaining through holes is connected at both ends to two adjacent through holes upstream and downstream via a first flow channel and a second flow channel, respectively.
[0014] Optionally, the flow path between at least one pair of the inlet and the outlet includes a main path and multiple branch paths, wherein, among the multiple through holes on the same branch path, two through holes are located at the beginning and end of the branch path, respectively, and the two through holes are shared with any two through holes on the main path; the remaining through holes are not shared with any of the through holes on the main path.
[0015] For each of the common through holes, the first or second flow channel connected to the common through hole is connected to the through hole adjacent to it upstream or downstream on the main path, and is also connected to the through holes adjacent to it upstream or downstream on each of the branch paths where the common through hole is located.
[0016] Optionally, the plurality of through holes are arranged in a square array, and the through holes at both ends of the first diagonal of the square array are respectively connected to a pair of sample inlets and a sample outlet; all the through holes on the first diagonal are on the main path;
[0017] The branch paths are in multiple pairs, each pair of branch paths is symmetrically distributed on both sides of the first diagonal, and the two through holes at the start and end of each pair of branch paths are shared with any two through holes on the main path, and the through holes at the start and end of the same branch path are symmetrically distributed on both sides of the second diagonal of the square array.
[0018] Optionally, the plurality of through holes are arranged in a rectangular or square array, and the first and last through holes in the first row or first column of the rectangular or square array serve as the starting or ending point of the flow path and are respectively connected to a pair of sample inlets and sample outlets.
[0019] The flow path includes multiple sub-paths connected end to end. The number of sub-paths is the same as the number of rows or columns of the rectangular or square array, and all through holes in each row or column of the rectangular or square array are located on each of the sub-paths.
[0020] Optionally, the plurality of through holes are arranged in a rectangular or square array, the number of pairs of the inlet and the outlet is the same as the number of rows or columns of the rectangular or square array, and all through holes in each row or column of the rectangular or square array are located on the flow path between each pair of the inlet and the outlet.
[0021] Optionally, the first flow channel is a first groove formed on the surface of the first cover plate opposite to the sample substrate, and the second flow channel is a second groove formed on the surface of the second cover plate opposite to the sample substrate. The orthographic projection shape of the inner surfaces of the first groove and the second groove on a plane parallel to the thickness direction of the sample substrate is arc-shaped.
[0022] Optionally, the arc shape is a segment of an arc cut from a circle or an ellipse.
[0023] Optionally, the inner surfaces of the through hole wall, the first groove, and the second groove are all hydrophilic surfaces; the remaining surfaces of the sample substrate, except for the through hole, are hydrophobic surfaces; the remaining surfaces of the first cover plate, except for the inner surface of the first groove, are hydrophobic surfaces; and the remaining surfaces of the second cover plate, except for the inner surface of the second groove, are hydrophobic surfaces.
[0024] Optionally, both the first cover plate and the second cover plate may be made of polymethyl methacrylate or glass.
[0025] Optionally, the second flow channel structure is provided on the surface of the first cover plate opposite to the sample substrate, and the first flow channel structure is provided on the surface of the second cover plate opposite to the sample substrate, so that the first cover plate and the second cover plate constitute two reusable cover plates with completely identical structures.
[0026] The two reused cover plates are staggered in the thickness direction of the sample substrate so that the inlet and outlet of one of the reused cover plates do not overlap with the other reused cover plate.
[0027] Optionally, there are at least three reuse covers, and at least one sample substrate is disposed between each pair of adjacent reuse covers. At least one sample substrate is sequentially attached along the direction from the first cover to the second cover, and the at least three reuse covers are staggered in the thickness direction of the sample substrate so that the inlet and outlet on each reuse cover do not overlap with other reuse covers.
[0028] Optionally, there are multiple sample substrates, which are sequentially attached to each other along the direction from the first cover plate to the second cover plate. Each sample substrate includes a through-hole area and a non-through-hole area, and the through-hole is located in the through-hole area.
[0029] Each pair of adjacent sample substrates can slide relative to each other such that, in each pair of adjacent sample substrates, the vias on one sample substrate are located in the via region of the other sample substrate and coincide with the vias on the other sample substrate; or, the vias on one sample substrate are located in the non-via region of the other sample substrate and are isolated from the vias on the other sample substrate.
[0030] Optionally, the plurality of vias on each of the sample substrates are arranged in a rectangular or square array. The interval between two adjacent rows of vias and the interval between two adjacent columns of vias in the array are the non-via regions. The width of the interval regions is greater than twice the diameter of the vias.
[0031] Optionally, the plurality of vias on each of the sample substrates are arranged in a rectangular or square array, and the area on the sample substrate outside the array is the non-via region, which can accommodate the entire array.
[0032] Optionally, when each of the vias on one of two adjacent sample substrates is located in the non-via region of the other sample substrate, the arrays on all the sample substrates are arranged in an array.
[0033] Optionally, the sample substrate includes a through-hole region and a non-through-hole region, wherein the through-hole is located in the through-hole region;
[0034] Each of the first cover plate and the second cover plate is capable of sliding relative to the sample substrate, such that the first flow channel structure and the second flow channel structure can be located in the through-hole region and communicate with the through-hole, or located in the non-through-hole region and isolated from the through-hole.
[0035] Optionally, the plurality of through holes are arranged in a square array, and the interval region between each two adjacent rows of through holes and the interval region between each two adjacent columns of through holes in the array are the non-through hole regions. The width of the interval region is greater than the width of each of the first flow channel structure and the second flow channel structure.
[0036] As another technical solution, this disclosure also provides a chip packaging method, which is applied to the chip packaging structure provided in this disclosure, including:
[0037] The sample is injected from each of the inlets until the sample fills the continuous channel along the flow path and flows out from each of the outlets;
[0038] Peel one of the first cover plate and the second cover plate off the sample substrate;
[0039] A sealing cover is attached to the surface of the sample substrate on which one of the first cover and the second cover was originally attached. The sealing cover has a sealing groove, and the orthographic projection of the sealing groove on a plane parallel to the sample substrate completely covers the orthographic projection of all the through holes on a plane parallel to the sample substrate. The sealing cover also has an inlet and an outlet that communicate with the sealing groove.
[0040] A sealing medium is injected into the sealing groove from the inlet until the sealing medium fills the sealing groove and flows out from the outlet;
[0041] After sealing the inlet and outlet, the chip packaging structure is flipped 180°.
[0042] Peel the other of the first cover plate and the second cover plate off the sample substrate;
[0043] The other sealing cover is attached to the surface of the sample substrate on which the other of the first cover and the second cover was originally attached;
[0044] A sealing medium is injected into the sealing groove from the inlet of the other sealing cover until the sealing medium fills the sealing groove and flows out from the outlet;
[0045] Seal the inlet and outlet of the other sealing cover.
[0046] Optionally, there are multiple sample substrates, which are sequentially attached to each other along the direction from the first cover plate to the second cover plate. Each sample substrate includes a through-hole area and a non-through-hole area, and the through-holes are located in the through-hole area. Each pair of adjacent sample substrates can slide relative to each other, such that in each pair of adjacent sample substrates, the through-holes on one sample substrate are located in the through-hole area of the other sample substrate and coincide with the through-holes on the other sample substrate; or, the through-holes on one sample substrate are located in the non-through-hole area of the other sample substrate and are isolated from the through-holes on the other sample substrate.
[0047] Following the step of sealing the inlet and outlet of the other sealing cover, the method further includes:
[0048] Keeping the first sample substrate adjacent to the first cover plate or the second cover plate stationary, the other sample substrates are slid sequentially until, in each of two adjacent sample substrates, the through holes on one sample substrate are located in the non-through hole area of the other sample substrate and are isolated from the through holes on the other sample substrate.
[0049] As another technical solution, this disclosure also provides a chip packaging method, which is applied to the chip packaging structure provided in this disclosure, including:
[0050] The first flow channel structure and the second flow channel structure are located in the through hole region and communicate with the through hole;
[0051] The sample is injected from each of the inlets until the sample fills the continuous channel along the flow path and flows out from each of the outlets;
[0052] Each of the first cover plate and the second cover plate is slid relative to the sample substrate so that the first flow channel structure and the second flow channel structure are located in the non-through-hole region. Attached Figure Description
[0053] Figure 1 This is a side cross-sectional view of the chip packaging structure provided in the first embodiment of this disclosure;
[0054] Figure 2 This is a top view and a cross-sectional view along the A1 and A2 directions of the sample substrate used in the first embodiment of this disclosure;
[0055] Figure 3 This is a top view and a cross-sectional view along the A1 and A2 directions of the first cover plate used in the first embodiment of this disclosure;
[0056] Figure 4This is a top view and a cross-sectional view along the A1 and A2 directions of the second cover plate used in the first embodiment of this disclosure;
[0057] Figure 5A This is a schematic diagram of the flow path of multiple through holes on the sample substrate used in the first embodiment of this disclosure;
[0058] Figure 5B The chip packaging structure provided in the first embodiment of this disclosure is along Figure 5A Cross-sectional views along directions A1 and A2;
[0059] Figure 6A This is a schematic diagram of the flow path of multiple through holes on the sample substrate used in the second embodiment of this disclosure;
[0060] Figure 6B for Figure 6A A schematic diagram showing the positional relationship between one of the branch paths and the main path;
[0061] Figure 7 This is a top view and a cross-sectional view along the A1 and A2 directions of the first cover plate used in the second embodiment of this disclosure;
[0062] Figure 8 This is a top view and a cross-sectional view along the A1 and A2 directions of the second cover plate used in the second embodiment of this disclosure;
[0063] Figure 9 The chip packaging structure provided in the second embodiment of this disclosure is along Figure 5A Cross-sectional views along directions A1 and A2;
[0064] Figure 10 This is a schematic diagram of the flow path of multiple through holes on the sample substrate used in the third embodiment of this disclosure;
[0065] Figure 11 This is a diagram illustrating the sliding process of the chip packaging structure provided in the fourth embodiment of this disclosure.
[0066] Figure 12A This is a diagram illustrating the sliding process of the chip packaging structure provided in the fifth embodiment of this disclosure.
[0067] Figure 12B This is a diagram showing the arrangement of all through holes after sliding in the fifth embodiment of this disclosure;
[0068] Figure 12C Diagrams illustrating the sliding process of a single through-hole on four sample substrates in the fifth embodiment of this disclosure;
[0069] Figure 13 This is a diagram showing the arrangement of all through holes after sliding in the sixth embodiment of this disclosure;
[0070] Figure 14This is a cross-sectional view of the chip packaging structure provided in the seventh embodiment of this disclosure;
[0071] Figure 15 This is a process diagram of the chip packaging method provided in the eighth embodiment of this disclosure. Detailed Implementation
[0072] To make the objectives, technical solutions, and advantages of this disclosure clearer, the disclosure will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0073] The shapes and sizes of the components in the accompanying drawings do not reflect actual proportions and are intended only to facilitate understanding of the contents of the embodiments disclosed herein.
[0074] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0075] This disclosure is not limited to the embodiments shown in the accompanying drawings, but includes modifications to the configuration based on the manufacturing process. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown illustrate specific shapes of the areas of an element, but are not intended to be limiting.
[0076] First Embodiment
[0077] like Figure 1As shown, the chip packaging structure provided in this embodiment includes a sample substrate 1, a first cover plate 2 and a second cover plate 3, and at least one pair of inlet ports 4 and outlet ports (not shown in the figure). The sample substrate 1 has multiple through holes 11 extending along its thickness direction. The first cover plate 2 and the second cover plate 3 are located on opposite sides of the sample substrate 1 along its thickness direction and are attached to the sample substrate 1. Each pair of inlet ports 4 and outlet ports is located on one of the first cover plates 2 and the second cover plate 3, or on both the first cover plate 2 and the second cover plate 3. A flow path exists between each pair of inlet ports 4 and outlet ports. A first flow channel structure is provided on the surface of the first cover plate 2 opposite to the sample substrate 1, and a second flow channel structure is provided on the surface of the second cover plate 3 opposite to the sample substrate 1. The first and second flow channel structures connect the multiple through holes 11 to form continuous channels corresponding to the aforementioned flow paths between each pair of inlet ports 4 and outlet ports.
[0078] For each pair of inlet ports 4 and outlet ports, there is a continuous channel extending along the flow path between them, allowing the sample to enter the continuous channel through the inlet port 4, flow through the continuous channel along the flow path, and then flow out from the outlet port. This continuous channel is composed of a first flow channel structure on the first cover plate 2, a second flow channel structure on the second cover plate 3, and multiple through holes. This not only ensures that the sample fills all the through holes, but also prevents the generation of air bubbles because the through holes penetrate the sample substrate 1, thus solving problems such as incomplete filling of micropores and air bubbles within the micropores.
[0079] In some alternative embodiments, such as Figure 2 As shown, multiple through holes 11 are arranged in a square array, and the number of rows and columns of this square array is 100×100. Figure 2 (Only an 8×8 diagram is shown schematically); each through-hole 11 is a circular hole with a diameter of 50μm to 100μm, preferably 80μm; the depth of the circular hole is 100μm to 300μm, preferably 300μm; the spacing between any two adjacent circular holes is 100μm to 200μm, preferably 180μm. However, this embodiment is not limited to this. In practical applications, the multiple through-holes 11 can also be arranged in other arbitrary shapes according to specific needs, such as rectangular arrays, circular arrays, honeycomb arrays, etc., or the multiple through-holes 11 can also adopt other non-array arrangements. This disclosure does not impose any particular restrictions on this.
[0080] In some optional embodiments, in order to improve the hydrophobic properties of the cover plate and make it easier to peel off, the first cover plate 2 and the second cover plate 3 are both made of PMMA (polymethyl methacrylate) or glass. However, this embodiment is not limited to this. In practical applications, the first cover plate 2 and the second cover plate 3 can also be made of other easy-to-peel materials.
[0081] In some alternative embodiments, the first cover plate 2 and the second cover plate 3 can be bonded to the sample substrate 1 using adhesive, preferably a low-tack adhesive, such as a low-peel-force pressure-sensitive adhesive. Alternatively, the first cover plate 2 and the second cover plate 3 can also be bonded to the sample substrate 1 using other layer bonding methods such as pressure bonding.
[0082] It should be noted that the first cover plate 2 and the second cover plate 3 can serve as encapsulation covers for the sample substrate 1. That is, the first cover plate 2 and the second cover plate 3 together with the sample substrate 1 constitute a chip. In this case, after the sample is fed into the sample substrate 1 using the first cover plate 2 and the second cover plate 3, the first cover plate 2 and the second cover plate 3 can be encapsulated to isolate the sample in the sample substrate 1 from the outside world. Specific encapsulation methods include, for example, sliding the first cover plate 2 and the second cover plate 3 relative to the sample substrate 1 (described in detail later), or using any other encapsulation method. Alternatively, after the sample is fed into the sample substrate 1 using the first cover plate 2 and the second cover plate 3, the first cover plate 2 and the second cover plate 3 can be peeled off from the sample substrate 1, and then other encapsulation covers can be attached to the surfaces of the sample substrate 1 that were originally attached to the first cover plate 2 and the second cover plate 3 (described in detail later) to isolate the sample in the sample substrate 1 from the outside world. In this configuration, the sample substrate 1 and the subsequently bonded encapsulation cover plate constitute the chip, while the first cover plate 2 and the second cover plate 3 serve as the sample injection encapsulation structure and are peeled off after sample injection. The aforementioned chip is, for example, a digital polymerase chain reaction (dPCR) chip.
[0083] In some alternative embodiments, transparent materials such as glass can be used. In addition, silicon can also be used as the material for the sample substrate, considering its ease of processing.
[0084] The aforementioned first and second flow channel structures can have various structures, for example, such as... Figure 3 and Figure 4 As shown, the first flow channel structure includes a plurality of first flow channels 21 spaced apart; the second flow channel structure includes a plurality of second flow channels 31 spaced apart. Furthermore, as... Figure 1As shown, among the multiple through holes 11 on the same flow path, two through holes 11 are located at the beginning and end of the flow path, respectively. One end of the through hole 11 located at the beginning is connected to the sample inlet 4, and the other end is connected to the adjacent through hole 11 downstream through a first flow channel 21 or a second flow channel 31. One end of the through hole 11 located at the end is connected to the sample outlet, and the other end is connected to the adjacent through hole 11 upstream through a first flow channel 21 or a second flow channel 31. The two ends of each of the remaining through holes 11 are connected to the two adjacent through holes 11 upstream and downstream through a first flow channel 21 and a second flow channel 31, respectively.
[0085] Specifically, in this embodiment, as Figure 1 As shown, for any three consecutive through holes 11 on the same flow path, the direction from the start to the end of the flow path is sequentially the first through hole 111, the second through hole 112, and the third through hole 113. A first flow channel 21 is connected to the first through hole 111 and the second through hole 112, and a second flow channel 31 is connected to the second through hole 112 and the third through hole 113, so that the sample can flow through the first through hole 111, the first flow channel 21, the second through hole 112, the second flow channel 31, and the third through hole 113 in sequence. Of course, it is also possible that the second flow channel 31 is connected to the first through hole 111 and the second through hole 112, and the first flow channel 21 is connected to the second through hole 112 and the third through hole 113, so that the sample can flow through the first through hole 111, the second flow channel 31, the second through hole 112, the first flow channel 21, and the third through hole 113 in sequence. Thus, by means of a first flow channel 21 and a second flow channel 31, any three consecutive through holes 11 can be connected to form a continuous channel extending along the flow path.
[0086] In some optional embodiments, the first flow channel 21 is a first groove formed on the surface of the first cover plate 2 opposite to the sample substrate 1, and the second flow channel 31 is a second groove formed on the surface of the second cover plate 3 opposite to the sample substrate 1. The orthographic projection shape of the inner surface of each of the first and second grooves on a plane parallel to the thickness direction of the sample substrate 1 is arc-shaped. This avoids the presence of corners less than or equal to 90° on the inner surface of the first or second groove, thereby further preventing the generation of bubbles. Specifically, the aforementioned arc shape is, for example, the shape of an arc segment cut from a circle or ellipse.
[0087] In some optional embodiments, the width of the first and second grooves is approximately the same as the diameter of the through hole 11, and the depth of the first and second grooves is, for example, 10 μm. Alternatively, the orthographic projection of the first and second grooves on a plane parallel to the sample substrate 1 is, for example, an elongated circle, and the orthographic projections of the two arc segments at both ends of the elongated circle and the two through holes 11 connected thereto on the plane parallel to the sample substrate 1 coincide.
[0088] It should be noted that in this embodiment, both the first flow channel 21 and the second flow channel 31 are used to connect two adjacent through holes. However, this embodiment is not limited to this. In practical applications, depending on different through hole arrangements and different connection paths, the first flow channel 21 and the second flow channel 31 can also connect three, four, or more adjacent through holes. This disclosure does not impose any particular restrictions on this.
[0089] In some optional embodiments, to ensure that the sample can smoothly enter the through-hole 11 and to reduce sample adsorption on other surfaces of the cover plate besides the grooves, the inner surfaces of the first and second grooves are both hydrophilically treated surfaces, and the remaining surfaces of the first cover plate 2, except for the inner surface of the first groove, are hydrophobically treated surfaces; the remaining surfaces of the second cover plate 3, except for the inner surface of the second groove, are hydrophobically treated surfaces. Various hydrophilic treatment methods are available, such as immersing the first and second cover plates 2 and 3 in acid or alkaline solutions for cleaning, plasma treatment, coating with surfactants, or coating with hydrophilic silane-modified reagents. Various hydrophobic treatment methods are also available, such as forming a silicon nitride film layer or a polytetrafluoroethylene film layer on the remaining surfaces of the first and second cover plates 2 and 3, except for the grooves, or coating with hydrophobic silane-modified reagents. Additionally, the walls of each through-hole 11 on the sample substrate 1 can also be hydrophilically treated surfaces, and the remaining surfaces of the sample substrate 1, except for the through-hole 11, can be hydrophobically treated surfaces.
[0090] The connection path between each pair of inlet and outlet ports can be multiple, for example, such as Figure 5A As shown, multiple through holes 11 are arranged in a square array, with the row direction parallel to the A1 direction (horizontal direction) and the column direction parallel to the A2 direction (vertical direction), and the number of rows and columns is 8×8. The first column of this square array ( Figure 5A The first through hole 11a and the last through hole 11b on the leftmost column in the vertical direction serve as the starting or ending point of the flow path B, respectively connecting with a pair of sample inlets 4 and sample outlets 5 (e.g., Figure 3 (As shown) The flow path B includes multiple sub-paths connected end to end. The number of sub-paths is the same as the number of rows in the square array, and all the through holes 11 in each row of the square array are located on each sub-path. In this way, after the sample enters the first through hole 11a through the inlet 4, it flows along the sub-path of the first row of the square array, then flows from the end through hole of the first row into the end through hole of the second row, then flows along the sub-path of the second row, then flows from the first through hole of the second row into the first through hole of the third row, and so on, until it flows to the end through hole 11b and flows out from the outlet 5. At this time, the sample fills all the through holes, and the sample injection is completed.
[0091] Corresponding to the above-mentioned flow path B, the structure and arrangement of the first flow channel 21 on the first cover plate 2 and the second flow channel 31 on the second cover plate 3 are as follows: Figure 3 , Figure 4 and Figure 5B As shown. After the sample enters the first through hole 11a through the inlet 4, it flows into the first through hole 11 adjacent to the first through hole 11a downstream through the second flow channel 31, and then flows into another through hole 11 adjacent to the first through hole 11 downstream through the first flow channel 21, and so on, so that all the through holes on the flow path B are connected to form a continuous channel.
[0092] It should be noted that, in practical applications, the last column of the aforementioned square array can also be used ( Figure 5A The rightmost column in the vertical direction), the first row ( Figure 5A The bottom row horizontally) and the last row ( Figure 5A The first and last through holes on one of the top rows in the horizontal direction are used as the starting or ending points of the flow path, and the sub-paths are adjusted accordingly so that all through holes on the flow path are connected to form a continuous channel; or, any two through holes in the above square array can be selected as the starting or ending points of the flow path, and any flow path that can connect all through holes to form a continuous channel can be used. This disclosure does not have any particular limitations in this regard.
[0093] It should also be noted that in this embodiment, the inlet 4 and outlet 5 are a pair, and the flow path between them consists of a main path. However, this embodiment is not limited to this. In practical applications, there can be multiple pairs of inlet 4 and outlet 5, with each pair of inlet 4 and outlet 5 corresponding to a flow path. Of course, this flow path can be formed by at least one main path between the inlet 4 and outlet 5, or it can be formed by a combination of at least one main path and at least one branch path. This disclosure does not impose any particular restrictions on this. In addition, the inlet 4 and outlet 5 can also be set unpaired. That is, a group of inlet 4 can correspond to one outlet 5, or one inlet can correspond to a group of outlet 5, or a group of inlet 4 can correspond to a group of inlet 5. Each group of inlet 4 has multiple inlet 4s, and each group of outlet 5 has multiple outlet 5s. However, whether it is a group-to-individual or group-to-group correspondence, the flow path between the two is similar to the design of the flow path between the pair of inlet 4 and outlet 5.
[0094] It should also be noted that in this embodiment, both the inlet 4 and the outlet 5 are located on the first cover plate 2. However, this embodiment is not limited to this. In practical applications, the inlet 4 and the outlet 5 can also both be located on the second cover plate 3, or they can be located on the first cover plate 2 and the second cover plate 3 respectively. In other words, each of the inlet 4 and the outlet 5 can face upwards or downwards.
[0095] Second Embodiment
[0096] The chip packaging structure provided in this embodiment, compared with the first embodiment described above, also includes a sample substrate 1, a first cover plate 2, a second cover plate 3, and at least one pair of sample inlets 4 and sample outlets 5. The structure and function of these components are the same as those in the first embodiment described above, but the difference lies in the flow path.
[0097] Specifically, to improve the sample injection speed, the flow path between at least one pair of inlet ports 4 and outlet ports 5 includes a main path and multiple branch paths. Within each branch path, two through-holes are located at the beginning and end of the branch path, respectively, and these two through-holes share a common through-hole with any two through-holes on the main path. The remaining through-holes do not share a common through-hole with any of the through-holes on the main path. In other words, the beginning of each branch path shares a common through-hole with one of the through-holes on the main path (i.e., a common through-hole), and the end of each branch path shares a common through-hole with another through-hole on the main path (i.e., a common through-hole). The remaining through-holes on the branch path are not common through-holes, thus connecting both ends of the branch path to the main path. In this way, the sample can simultaneously flow from one of the common through-holes on the main path to the downstream adjacent through-hole on the main path, and then to the downstream adjacent through-hole on the branch path corresponding to that common through-hole. The sample flowing through the branch path then merges with the sample on the main path at the common through-hole corresponding to the end of that branch path.
[0098] Based on this, for each common through hole, the first flow channel 21 or the second flow channel 31 connected to the common through hole is connected to the through hole 11 adjacent to it upstream or downstream on the main path, and at the same time, it is connected to the through holes adjacent to it upstream or downstream on each branch path where the common through hole is located. That is, the first flow channel 21 or the second flow channel 31 connected to the common through hole can connect three adjacent through holes (one through hole on the main path and two through holes on the two adjacent branch paths) or four adjacent through holes (two adjacent through holes on the main path and two through holes on the two branch paths adjacent to the upstream one of these two through holes), thereby realizing the connection between the two ends of the branch path and the main path.
[0099] There are various ways to construct a circulation path by combining a main path and branch paths. In some optional embodiments, such as... Figure 6A and Figure 6B As shown, multiple through holes 11 are arranged in a square array, and the inlet 4 and outlet 5 are a pair. The through holes (11a, 11b) at both ends of the first diagonal C1 of the square array are connected to the inlet 4 and outlet 5, respectively. Figure 6BAs shown, the flow path has a main path D1, and all the through holes on the first diagonal C1 are on the main path D1. The through holes (11a, 11b) are located at the beginning and end of the main path D1, respectively.
[0100] Moreover, such as Figure 6A As shown, there are multiple pairs of branch paths. Each pair of branch paths is symmetrically distributed on both sides of the first diagonal C1. The two through holes at the start and end points of each pair of branch paths are shared with any two through holes on the main path D1. Furthermore, the through holes at the start and end points of the same branch path are symmetrically distributed on both sides of the second diagonal C2 of the square array. Specifically, as... Figure 6B As shown, taking one pair of branch paths (D2a, D2b) as an example, they are symmetrically distributed on both sides of the first diagonal C1. The two through-holes at the start and end points of this pair of branch paths (D2a, D2b) are the same through-holes as the two through-holes (11a, 11b) at the start and end points of the main path D1, respectively. That is, the two through-holes (11a, 11b) are shared through-holes, and the two through-holes (11a, 11b) are symmetrically distributed on both sides of the second diagonal C2. The remaining pairs of branch paths are arranged similarly to this pair of branch paths (D2a, D2b). This ensures that the branch paths on both sides of the first diagonal C1 are identical, thus contributing to uniform sample distribution.
[0101] Based on this, taking the second flow channel 31a, which is connected to the through hole 11a as a common through hole, as an example, combined with Figure 8 and Figure 6B As shown, the orthographic projection shape of the second flow channel 31a on a plane parallel to the sample substrate 1 is composed of three elongated ovals extending in three different directions from a common end, with an included angle of 45° between the major axes of two adjacent ovals. The second flow channel 31a communicates with the aforementioned through-hole 11a at the common end of the three ovals, and communicates with three adjacent through-holes (the downstream adjacent through-hole on the main path D1 and the downstream adjacent through-holes on a pair of branch paths (D2a, D2b)) at the other end of the three ovals away from the common end. Thus, the sample can flow simultaneously along the main path D1 and the pair of branch paths (D2a, D2b) through the through-hole 11a. Similarly, as Figure 7 As shown, the orthographic projection shape of the first flow channel 21a on a plane parallel to the sample substrate 1 can also be composed of three elongated ovals extending from the same common end in three different directions. The first flow channel 21a is also connected to one of the common through holes on the main path D1 and the through holes adjacent to the common through hole on each branch path upstream or downstream.
[0102] In addition, such as Figure 7 and Figure 8As shown, the orthographic projection shape of each of the first flow channel 21b and the second flow channel 31b on a plane parallel to the sample substrate 1 can also be formed by two elongated ovals extending in two different directions from a common end, with an angle of 90° between their major axes. Each of the first flow channel 21b and the second flow channel 31b is connected to one of the common through holes on the main path at the common end of the two elongated ovals, and is connected to two adjacent through holes (two adjacent through holes downstream on a pair of branch paths) at the other end of the two elongated ovals away from the common end.
[0103] It should be noted that this embodiment is not limited to using the above-mentioned main path and branch path. In practical applications, the number and arrangement of the above-mentioned main path and branch path can be arbitrarily designed according to the through hole arrangement.
[0104] It should also be noted that, in practical applications, depending on the different flow paths, the first flow channel structure on the first cover plate 2 may include one or more combinations of the first flow channel 21 (shaped as an oblong), the first flow channel 21a (shaped as three oblongs), and the first flow channel 21b (shaped as two oblongs); the second flow channel structure on the second cover plate 3 may include one or more combinations of the second flow channel 31 (shaped as an oblong), the second flow channel 31a (shaped as three oblongs), and the second flow channel 31b (shaped as two oblongs).
[0105] The other structures and functions of the chip packaging structure provided in this embodiment are the same as those in the first embodiment described above, and will not be repeated here.
[0106] Third Embodiment
[0107] The chip packaging structure provided in this embodiment, compared with the first embodiment described above, also includes a sample substrate 1, a first cover plate 2, a second cover plate 3, and at least one pair of sample inlets and outlets. The structure and function of these components are the same as those in the first embodiment, except that there are multiple pairs of sample inlets and outlets.
[0108] Specifically, to improve the injection speed, multiple through-holes are arranged in a square array. The number of pairs of inlet and outlet ports is the same as the number of rows or columns of the square array, and all through-holes in each row or column of the square array are located on the flow path between each pair of inlet and outlet ports. For example, as... Figure 10As shown, the number of inlet and outlet ports is the same as the number of rows in the square array. Each row of the square array has an inlet port 11a at the beginning and an outlet port 11b at the end. All the through-holes in each row of the square array are located on the flow path between each pair of inlets and outlets. This allows for simultaneous injection of samples into each inlet port; for example, a multi-pipette 6 can be used to achieve simultaneous injection from multiple inlets.
[0109] It should be noted that the method of simultaneous injection of multiple injection ports is not limited to the flow path provided in the third embodiment above. The flow path can be any path, and this disclosure does not impose any particular restrictions on it.
[0110] The other structures and functions of the chip packaging structure provided in this embodiment are the same as those in the first embodiment described above, and will not be repeated here.
[0111] Fourth embodiment
[0112] This embodiment is based on any one of the chip packaging structures provided in the first to third embodiments above, with the first cover plate 2 and the second cover plate 3 serving as the packaging cover plates for the sample substrate 1. That is, the first cover plate 2 and the second cover plate 3 together with the sample substrate 1 constitute the chip.
[0113] Specifically, the sample substrate 1, the first cover plate 2, and the second cover plate 3 can be any one of the chip packaging structures provided in the first to third embodiments described above. Taking the chip packaging structure provided in the first embodiment as an example, the sample substrate 1 includes a through-hole region and a non-through-hole region, with the through-hole 11 located in the through-hole region. Moreover, each of the first cover plate 2 and the second cover plate 3 can slide relative to the sample substrate 1, so that the first flow channel structure on the first cover plate 2 and the second flow channel structure on the second cover plate 3 can be located in the aforementioned through-hole region and communicate with the through-hole 11, or located in the aforementioned non-through-hole region and isolated from the through-hole 11.
[0114] like Figure 11 As shown in Figure (a), the chip packaging structure is in the sample introduction state. Specifically, the first flow channel structure on the first cover plate 2 and the second flow channel structure on the second cover plate 3 are both located in the aforementioned through-hole area and are connected to the through-hole 11. At this time, the sample can be introduced into the sample substrate 1 using the first cover plate 2 and the second cover plate 3. After sample introduction, by sliding each of the first cover plate 2 and the second cover plate 3 relative to the sample substrate 1, the chip packaging structure is switched from the sample introduction state to the sealed state shown in Figure (b). At this time, the first flow channel structure on the first cover plate 2 and the second flow channel structure on the second cover plate 3 are both located in the aforementioned non-through-hole area and are isolated from the through-hole 11, thereby isolating the sample in the sample substrate 1 from the outside world. The above-mentioned chip packaging structure constitutes a chip when it is in the sealed state.
[0115] In practical applications, the surfaces on which the sample substrate 1, the first cover plate 2, and the second cover plate 3 are bonded together are all smooth surfaces to ensure a tight fit between the three and to ensure that the sample in the sample substrate 1 is isolated from the outside world.
[0116] In some optional embodiments, a plurality of through holes 11 are arranged in a square array. The interval regions between adjacent rows of through holes and between adjacent columns of through holes in this array constitute the aforementioned non-through hole regions. The width of these interval regions is greater than the width of each of the first and second flow channel structures, to ensure that each of the first and second flow channel structures is isolated from the through holes 11 when located in the interval region. Based on this, each of the first cover plate 2 and the second cover plate 3 can be positioned relative to the sample substrate 1 along the diagonal direction of the square array (e.g., Figure 11 The first cover plate 2 and the second cover plate 3 can slide once relative to the sample substrate 1 along the row direction of the square array and then slide once along the column direction to reach the non-through-hole area. However, this embodiment is not limited to this. In practical applications, each of the first cover plate 2 and the second cover plate 3 can also slide once relative to the sample substrate 1 along the row direction of the square array and then slide once along the column direction to reach the non-through-hole area.
[0117] Fifth embodiment
[0118] This embodiment is an improvement on the sample substrate based on any one of the chip packaging structures provided in the first to fourth embodiments described above. Specifically, there are multiple sample substrates, which are sequentially attached and arranged along the direction from the first cover plate 2 to the second cover plate 3. Each sample substrate includes a through-hole area and a non-through-hole area, and each through-hole is located in the through-hole area.
[0119] Furthermore, each of the two adjacent sample substrates can slide relative to each other, such that in each of the two adjacent sample substrates, the vias on one sample substrate are located in the via area of the other sample substrate and coincide with the vias on the other sample substrate, at which time each sample substrate is in the sample injection state; or, the vias on one sample substrate are located in the non-via area of the other sample substrate and are isolated from the vias on the other sample substrate, at which time each sample substrate is in the sealed state.
[0120] In some optional embodiments, the multiple vias on each sample substrate are arranged in a square array. The interval between two adjacent rows of vias and the interval between two adjacent columns of vias in the array are the non-via regions. The width of the interval regions is greater than twice the diameter of the vias. In this way, it can be ensured that each via on one sample substrate is located in the non-via region of another sample substrate and can be isolated from the vias on the other sample substrate.
[0121] like Figure 12AAs shown, taking four sample substrates as an example, the four sample substrates are, from the first cover plate 2 to the second cover plate 3, the first substrate 1A, the second substrate 1B, the third substrate 1C, and the fourth substrate 1D, respectively. Each of these four sample substrates, for example, adopts... Figure 2 The sample substrate 1 shown is used, and the first cover plate 2 is adopted. Figure 3 The first cover plate 2 and the second cover plate 3 shown are adopted Figure 4 The second cover plate 3 is shown. Figure 12A In the figure, Figure (a) and Figure (b) show the four sample substrates in the sample injection state along the... Figure 3 and Figure 4 The cross-sectional view along the same direction as A1 and A2 in the figure. Figures (c) and (d) show the four sample substrates in a sealed state along the same direction. Figure 3 and Figure 4 A cross-sectional view along the same direction as A1 and A2. Furthermore, the arrangement of all through-holes in the four sample substrates when in a sealed state is as follows... Figure 12B As shown below, the process of switching the four substrates from the sample injection state to the sealed state is described in detail.
[0122] Specifically, such as Figure 12C As shown, vias 11A to 11D are one of the vias on the first substrate 1A, the second substrate 1B, the third substrate 1C, and the fourth substrate 1D, respectively. All four vias completely overlap when the four sample substrates are in the sample-in state. Figure 12C As shown in Figure (a), the four components are arranged in an array when the four sample substrates are in a sealed state, as shown in Figure (a). Figure 12C As shown in Figure (d), this arrangement is... Figure 12B The arrangement of the four through holes in region I is the same as the arrangement of all other through holes.
[0123] When the four sample substrates are in the sample loading state, firstly, the first substrate 1A remains stationary, and the second substrate 1B is slid along a first direction F1 parallel to the plane of the sample substrates until the through-hole 11B on the second substrate 1B is located in the interval region between two adjacent through-holes 11A on the first substrate 1A, and the through-holes 11B on the second substrate 1B and the through-holes 11A on the first substrate 1A are in the same row. Figure 12C As shown in Figure (b); then, the third substrate 1C is slid along the second direction F2 parallel to the plane of the sample substrate until the through hole 11C on the third substrate 1C is located in the interval region between two adjacent through holes 11A on the first substrate 1A, and the through hole 11C on the third substrate 1C and the through hole 11A on the first substrate 1A are in the same column, as shown in Figure (b); Figure 12CAs shown in Figure (c); finally, the fourth substrate 1 is slid along a direction parallel to the first direction F1 and the second direction F2 (in any order) until the through hole 11D on the fourth substrate 1D is located in the gap area between two adjacent through holes 11A on the first substrate 1A, and the through hole 11D on the fourth substrate 1D is not in the same column or row as the through hole 11A on the first substrate 1A, but is in the same row and column as the through holes 11B and through holes 11C on the second substrate 1B and the third substrate 1C, respectively. Figure 12C As shown in Figure (d), the entire sliding process of the four sample substrates is completed. The four sample substrates are in a sealed state, and the samples in the four sample substrates are independent. There is no obstruction between the through holes in different sample substrates, which facilitates observation.
[0124] It should be noted that, in the case of multiple sample substrates, the first cover plate 2 and the second cover plate 3 can also serve as encapsulation covers for the sample substrate 1. That is, the first cover plate 2 and the second cover plate 3 together with multiple sample substrates 1 constitute a chip. In this case, after the sample substrate 1 is fed using the first cover plate 2 and the second cover plate 3, the first cover plate 2 and the second cover plate 3 can be encapsulated to isolate the samples in the two adjacent sample substrates 1 from the outside. Specific encapsulation methods include, for example, sliding the first cover plate 2 and the second cover plate 3 relative to the sample substrate 1. The specific method has been described in detail in the fourth embodiment above and will not be repeated here. Alternatively, after the sample substrates 1 are fed using the first cover plate 2 and the second cover plate 3, the first cover plate 2 and the second cover plate 3 can be peeled off from the sample substrate 1, and then other encapsulation covers can be attached to the surfaces of the sample substrate 1 that were originally attached to the first cover plate 2 and the second cover plate 3 (described in detail later) to isolate the samples in the two adjacent sample substrates 1 from the outside. The remaining sample substrates 1 can be isolated by sliding between multiple sample substrates as described in the fifth embodiment above. In this configuration, multiple sample substrates and a subsequent package cover plate constitute a chip, while the first cover plate 2 and the second cover plate 3 are used only for sample introduction and are peeled off after sample introduction is completed.
[0125] Sixth Embodiment
[0126] The chip packaging structure provided in this embodiment is a modified embodiment of the fifth embodiment described above. In this embodiment, there are multiple sample substrates, which are sequentially attached along the direction from the first cover plate 2 to the second cover plate 3, and each pair of adjacent sample substrates can slide relative to each other. Each sample substrate includes a through-hole area and a non-through-hole area. The multiple through-holes on each sample substrate are arranged in a square array and are located in the aforementioned through-hole area. Moreover, the area on the sample substrate outside the array is the non-through-hole area, which can accommodate the entire square array. However, this embodiment is not limited to this. In practical applications, the multiple through-holes 11 can also be arranged in other arbitrary shapes according to specific needs, such as a rectangular array, a circular array, a honeycomb array, etc., or the multiple through-holes 11 can also adopt other non-array arrangements. This disclosure does not have any particular limitations on this. The aforementioned non-through-hole area only needs to be able to accommodate all the through-holes on each sample substrate 1.
[0127] Specifically, taking four sample substrates as an example, their sample introduction status and... Figure 12A The four sample substrates shown in Figures (a) and (c) are in the same state, and their sealing state is as follows: Figure 13 As shown, in each pair of adjacent sample substrates, the vias on one sample substrate are located in the non-via area of the other sample substrate, and the square arrays on all sample substrates are arranged in an array. The specific sliding process is as follows: the square array formed by vias 11A on the first sample substrate remains stationary; the second sample substrate slides until the square array formed by vias 11B is located in the non-via area to the right of the square array formed by vias 11A; the third sample substrate slides until the square array formed by vias 11C is located in the non-via area below the square array formed by vias 11A; the fourth sample substrate slides until the square array formed by vias 11D is located in the non-via area diagonally below the square array formed by vias 11A. This also ensures that the samples on the four sample substrates are independent, and that there is no obstruction between the vias on different sample substrates, facilitating observation.
[0128] Sixth Embodiment
[0129] This embodiment is an improvement on the sample substrate based on any one of the chip packaging structures provided in the first to fifth embodiments described above. In this embodiment, a second flow channel structure is provided on the surface of the first cover plate opposite to the sample substrate, and a first flow channel structure is provided on the surface of the second cover plate opposite to the sample substrate, so that the first cover plate and the second cover plate constitute two reused cover plates with identical structures; the two reused cover plates are staggered in the thickness direction of the sample substrate so that the sample inlet on one reused cover plate does not overlap with the other reused cover plate.
[0130] Specifically, in this embodiment, such as Figure 14As shown, the sample substrate, for example, uses Figure 2 The sample substrate 1 shown has a first flow channel structure on the surface of the first cover plate opposite to the sample substrate 1. The first flow channel structure includes a plurality of first flow channels 21, the structure and arrangement of which are, for example, similar to... Figure 3 The second cover plate, which is identical to the first flow channel 21 shown, has a second flow channel structure on its surface opposite to the sample substrate 1. This second flow channel structure includes a plurality of second flow channels 31, the structure and arrangement of which are, for example, similar to... Figure 4 The second flow channel 31 shown is the same. Based on this, a second flow channel structure is provided on the surface of the first cover plate opposite to the sample substrate 1, and this second flow channel structure is similar to... Figure 4 The second flow channel 31 shown is the same; a first flow channel structure is provided on the surface of the second cover plate opposite to the sample substrate 1, and this first flow channel structure is the same as... Figure 3 The first flow channel 21 shown is the same. Thus, as Figure 14 As shown, the first cover plate and the second cover plate constitute two reused cover plates 8 with identical structures; the two reused cover plates 8 are staggered in the thickness direction of the sample substrate 1, that is, they are staggered and superimposed, so that the sample inlet 4 and the sample outlet on one of the reused cover plates 8 do not overlap with the other reused cover plate 8.
[0131] In some alternative embodiments, such as Figure 14 As shown, there are at least three reuse cover plates 8, and at least one sample substrate 1 is provided between each pair of adjacent reuse cover plates 8. At least one sample substrate 1 is sequentially attached along the direction from the first cover plate to the second cover plate (i.e., from one of the adjacent reuse cover plates 8 to another reuse cover plate 8). The at least three reuse cover plates 8 are staggered in the thickness direction of the sample substrate 1 so that the sample inlet 4 and sample outlet on each reuse cover plate do not overlap with other reuse cover plates 8.
[0132] In other words, the aforementioned reusable cover plate 8 has a first flow channel structure and a second flow channel structure, thus it can be used as both a first cover plate and a second cover plate. Furthermore, in the case of multiple sample substrates, it can be used simultaneously as both a first cover plate and a second cover plate. This allows for standardized cover plate specifications, which is beneficial for product processing. Simultaneously, by ensuring that the inlet and outlet ports on each reusable cover plate 8 do not overlap with other reusable cover plates 8, the inlet and outlet ports can be directly connected to the outside environment, making it easier to simultaneously add samples to the inlet ports 4 on each reusable cover plate 8.
[0133] In some alternative embodiments, such as Figure 14 As shown, the sample outlet 8a on each reused cover plate 8 is one end opening of one of the second flow channels 31. This opening does not overlap with other reused cover plates 8 and can be directly connected to the outside. However, this embodiment is not limited to this.
[0134] It should be noted that each multiplex cover plate 8 can serve as a packaging cover plate for the sample substrate 1. That is, the multiplex cover plate 8 and the sample substrate 1 together constitute a chip. In this case, after the sample is fed into the sample substrate 1 using the multiplex cover plate 8, the multiplex cover plate 8 can be packaged to isolate the sample in the sample substrate 1 from the outside world. Specific packaging methods include sliding the multiplex cover plate 8 relative to the sample substrate 1, such as the chip packaging structure provided in the fourth embodiment above, or using any other packaging method to package the multiplex cover plate 8. Alternatively, after the sample is fed into the sample substrate 1 using each multiplex cover plate 8, the multiplex cover plate 8 can be peeled off from the sample substrate 1, and then another packaging cover plate can be attached to the surface of the sample substrate 1 that was originally attached to the multiplex cover plate 8, thus isolating the sample in the sample substrate 1 from the outside world. In this case, the sample substrate 1 and the subsequently attached packaging cover plate constitute a chip, while the multiplex cover plate 8 is only used for sample feeding and is peeled off after sample feeding is completed.
[0135] When there are multiple sample substrates between two adjacent multiplex cover plates 8, the multiplex cover plate 8 can also serve as a packaging cover for the sample substrate 1. That is, the first cover plate 2 and the second cover plate 3 together with the multiple sample substrates 1 constitute a chip. Alternatively, after the multiple sample substrates 1 are sampled using the multiplex cover plate 8, the multiplex cover plate 8 can be peeled off from the sample substrate 1, and then other packaging covers can be attached to the surface of the sample substrate 1 that was originally attached to the multiplex cover plate 8. This isolates the samples in the two adjacent sample substrates 1 from the outside world, while the remaining sample substrates 1 can be isolated by sliding between the multiple sample substrates in the fifth embodiment described above.
[0136] Seventh Embodiment
[0137] As another technical solution, this embodiment also provides a chip packaging method, which is applied to the chip packaging structure provided in any one of the embodiments other than the fourth embodiment described above. The chip packaging method includes:
[0138] Step 1, as follows Figure 15 As shown in Figure (a), the sample is injected from each inlet 4 until the sample fills the continuous channel along the flow path and flows out from each outlet.
[0139] Step 2, as follows Figure 15 As shown in Figure (b), one of the first cover plate 2 and the second cover plate 3 is peeled off from the sample substrate 1.
[0140] Step 3, as follows Figure 15As shown in Figure (b), a sealing cover 7 is attached to the surface of the sample substrate 1 on which one of the first cover 2 and the second cover 3 is originally attached. The sealing cover 7 is provided with a sealing groove 71. The orthographic projection of the sealing groove 71 on a plane parallel to the sample substrate 1 completely covers the orthographic projection of all the through holes on a plane parallel to the sample substrate 1, so as to isolate the sample in the sample substrate 1 from the outside world. In addition, the sealing cover 7 is also provided with an inlet 71a and an outlet 71b communicating with the sealing groove 71 for injecting and flowing out a sealing medium (e.g., mineral oil).
[0141] Step 4: Inject sealing medium into sealing groove 71 from inlet 71a until sealing medium fills sealing groove 71 and flows out from outlet 71b;
[0142] Step 5: After sealing the inlet 71a and outlet 71b, flip the entire chip packaging structure 180°.
[0143] Step 6, as follows Figure 15 As shown in Figure (c), the other of the first cover plate 2 and the second cover plate 3 is peeled off from the sample substrate 1;
[0144] Step 7, as follows Figure 15 As shown in Figure (c), another sealing cover 7 is attached to the surface of the sample substrate 1 on which the other of the first cover 2 and the second cover 3 was originally attached.
[0145] Step 8: Inject sealing medium into sealing groove 71 from inlet 71a of another sealing cover plate 7 until sealing medium fills sealing groove 71 and flows out from outlet 71b;
[0146] Step 9: Seal the inlet 71a and outlet 71b of the other sealing cover 7.
[0147] Therefore, after the sample substrate 1 is injected using the first cover plate 2 and the second cover plate 3, the first cover plate 2 and the second cover plate 3 can be peeled off from the sample substrate 1. Then, an encapsulation cover plate 7 is attached to the surface of the sample substrate 1 that was originally attached to the first cover plate 2 and the second cover plate 3, thereby isolating the sample in the sample substrate 1 from the outside world. In this case, the sample substrate 1 and the subsequently attached encapsulation cover plate 7 constitute a chip, while the first cover plate 2 and the second cover plate 3 are only used for sample injection and are peeled off after the sample injection is completed.
[0148] In practical applications, the encapsulation cover 7 can be attached to the sample substrate 1 using an adhesive (such as UV adhesive). Furthermore, after the sealing medium injection is completed, the inlet 71a and outlet 71b of the sealing cover 7 can be sealed using an adhesive (such as UV adhesive). Additionally, both the adhesive and the sealing cover 7 are made of transparent material (the material of the sealing cover 7 is, for example, glass) to facilitate observation.
[0149] In some optional embodiments, for the chip packaging structure (having multiple sample substrates) provided in the fifth embodiment above, after completing step 9 above, the following is further included:
[0150] Step 10: Position the first sample substrate adjacent to the first cover plate 2 or the second cover plate 3 (e.g., ...) Figure 12A The first substrate 1A remains stationary, while other sample substrates (e.g., ...) are slid in sequence. Figure 12A The second substrate 1B to the fourth substrate 1D are arranged in such a way that, in each of two adjacent sample substrates, the vias on one sample substrate are located in the non-via area of the other sample substrate and are isolated from the vias on the other sample substrate.
[0151] This allows for independent observation of samples on each sample substrate, and ensures that there is no obstruction between the vias on different sample substrates, facilitating observation.
[0152] like Figure 12A As shown, taking four sample substrates as an example, the four sample substrates are designated as first substrate 1A, second substrate 1B, third substrate 1C, and fourth substrate 1D respectively from the first cover plate 2 to the second cover plate 3. When the four sample substrates are in the sample introduction state, as... Figure 12C As shown, firstly, the first substrate 1A remains stationary, and the second substrate 1B is slid along a first direction F1 parallel to the plane of the sample substrate until the through-hole 11B on the second substrate 1B is located in the gap region between two adjacent through-holes 11A on the first substrate 1A, and the through-hole 11B on the second substrate 1B and the through-hole 11A on the first substrate 1A are in the same row, as shown. Figure 12C As shown in Figure (b); then, the third substrate 1C is slid along the second direction F2 parallel to the plane of the sample substrate until the through hole 11C on the third substrate 1C is located in the interval region between two adjacent through holes 11A on the first substrate 1A, and the through hole 11C on the third substrate 1C and the through hole 11A on the first substrate 1A are in the same column, as shown in Figure (b); Figure 12C As shown in Figure (c); finally, the fourth substrate 1 is slid along a direction parallel to the first direction F1 and the second direction F2 (in any order) until the through hole 11D on the fourth substrate 1D is located in the gap area between two adjacent through holes 11A on the first substrate 1A, and the through hole 11D on the fourth substrate 1D is not in the same column or row as the through hole 11A on the first substrate 1A, but is in the same row and column as the through holes 11B and through holes 11C on the second substrate 1B and the third substrate 1C, respectively. Figure 12C As shown in Figure (d), the entire sliding process of the four sample substrates is completed. The four sample substrates are in a sealed state, and the samples in the four sample substrates are independent. There is no obstruction between the through holes in different sample substrates, which facilitates observation.
[0153] Eighth embodiment
[0154] As another technical solution, this embodiment also provides a chip packaging method, which is applied to the chip packaging structure provided in the fourth embodiment above. The chip packaging method includes:
[0155] Step 1, as follows Figure 11 As shown in Figure (a), the first flow channel structure (e.g., including a plurality of first flow channels 21) and the second flow channel structure (e.g., including a plurality of second flow channels 31) are located in the through-hole region and communicate with the through-hole 11.
[0156] Step 2: Inject the sample into each inlet 4 until the sample fills the continuous channel along the flow path and flows out from each outlet 5. At this point, the sample injection is complete.
[0157] Step 3: Slide each of the first cover plate 2 and the second cover plate 3 relative to the sample substrate 1 so that the first flow channel structure and the second flow channel structure are located in the above-mentioned non-through hole area, thereby isolating the sample in the sample substrate 1 from the outside world.
[0158] In this embodiment, the first cover plate 2 and the second cover plate 3 are used as the packaging cover plates of the sample substrate 1. That is, the first cover plate 2 and the second cover plate 3 together with the sample substrate 1 constitute the chip.
[0159] In some optional embodiments, a plurality of through holes 11 are arranged in a square array. The interval regions between adjacent rows of through holes and between adjacent columns of through holes in this array constitute the aforementioned non-through hole regions. The width of these interval regions is greater than the width of each of the first and second flow channel structures. Based on this, each of the first cover plate 2 and the second cover plate 3 can be positioned relative to the sample substrate 1 along the diagonal direction of the square array (e.g., Figure 11 The first cover plate 2 and the second cover plate 3 can slide once relative to the sample substrate 1 along the row direction of the square array and then slide once along the column direction to reach the non-through-hole area. However, this embodiment is not limited to this. In practical applications, each of the first cover plate 2 and the second cover plate 3 can also slide once relative to the sample substrate 1 along the row direction of the square array and then slide once along the column direction to reach the non-through-hole area.
[0160] In summary, the chip packaging structure and chip packaging method provided in the above embodiments of this disclosure can not only fill all the vias with the sample, but also prevent the generation of air bubbles because the vias penetrate the sample substrate, thereby solving the problems of incomplete filling of micropores and air bubbles in the micropores.
[0161] It should be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.
Claims
1. A chip packaging method applied to a chip packaging structure, the chip packaging structure comprising: A sample substrate having a plurality of through holes extending along its thickness direction; A first cover plate and a second cover plate are respectively located on opposite sides of the sample substrate along the thickness direction of the substrate and are attached to the sample substrate; at least one pair of inlet and outlet ports are provided, each pair of inlet and outlet ports being located on one of the first cover plate and the second cover plate or respectively on the first cover plate and the second cover plate; a flow path is provided between each pair of inlet and outlet ports; wherein, a first flow channel structure is provided on the surface of the first cover plate opposite to the sample substrate, and a second flow channel structure is provided on the surface of the second cover plate opposite to the sample substrate, the first flow channel structure and the second flow channel structure connecting the plurality of through holes to form a continuous channel corresponding to the flow path between each pair of inlet and outlet ports. The chip packaging method includes: The sample is injected from each of the inlets until the sample fills the continuous channel along the flow path and flows out from each of the outlets; Peel one of the first cover plate and the second cover plate off the sample substrate; A sealing cover is attached to the surface of the sample substrate on which one of the first cover and the second cover was originally attached. The sealing cover has a sealing groove, and the orthographic projection of the sealing groove on a plane parallel to the sample substrate completely covers the orthographic projection of all the through holes on a plane parallel to the sample substrate. The sealing cover also has an inlet and an outlet that communicate with the sealing groove. A sealing medium is injected into the sealing groove from the inlet until the sealing medium fills the sealing groove and flows out from the outlet; After sealing the inlet and outlet, the chip packaging structure is flipped 180°. Peel the other of the first cover plate and the second cover plate off the sample substrate; The other sealing cover is attached to the surface of the sample substrate on which the other of the first cover and the second cover was originally attached; A sealing medium is injected into the sealing groove from the inlet of the other sealing cover until the sealing medium fills the sealing groove and flows out from the outlet; Seal the inlet and outlet of the other sealing cover.
2. The chip packaging method according to claim 1, wherein, The sample substrates are multiple and are sequentially attached to each other along the direction from the first cover plate to the second cover plate. Each sample substrate includes a through-hole area and a non-through-hole area, and the through-holes are located in the through-hole area. Each pair of adjacent sample substrates can slide relative to each other, such that in each pair of adjacent sample substrates, the through-holes on one sample substrate are located in the through-hole area of the other sample substrate and coincide with the through-holes on the other sample substrate; or, the through-holes on one sample substrate are located in the non-through-hole area of the other sample substrate and are isolated from the through-holes on the other sample substrate. Following the step of sealing the inlet and outlet of the other sealing cover, the method further includes: Keeping the first sample substrate adjacent to the first cover plate or the second cover plate stationary, the other sample substrates are slid sequentially until, in each of two adjacent sample substrates, the through holes on one sample substrate are located in the non-through hole area of the other sample substrate and are isolated from the through holes on the other sample substrate.
3. The chip packaging method according to claim 1, wherein, The first flow channel structure includes a plurality of first flow channels arranged at intervals; the second flow channel structure includes a plurality of second flow channels arranged at intervals. In the plurality of through holes on the same flow path, two through holes are located at the beginning and end of the flow path, respectively. One end of the through hole at the beginning is connected to the sample inlet, and the other end is connected to the adjacent through hole downstream through a first flow channel or a second flow channel. One end of the through hole at the end is connected to the sample outlet, and the other end is connected to the adjacent through hole upstream through a first flow channel or a second flow channel. Each of the remaining through holes is connected at both ends to two adjacent through holes upstream and downstream via a first flow channel and a second flow channel, respectively.
4. The chip packaging method according to claim 3, wherein, The flow path between at least one pair of the inlet and the outlet includes a main path and multiple branch paths, wherein, among the multiple through holes on the same branch path, two through holes are located at the beginning and end of the branch path, respectively, and the two through holes are shared with any two through holes on the main path; the remaining through holes are not shared with any of the through holes on the main path. For each of the common through holes, the first or second flow channel connected to the common through hole is connected to the through hole adjacent to it upstream or downstream on the main path, and is also connected to the through holes adjacent to it upstream or downstream on each of the branch paths where the common through hole is located.
5. The chip packaging method according to claim 4, wherein, The multiple through holes are arranged in a square array, and the through holes at both ends of the first diagonal of the square array are respectively connected to a pair of sample inlets and a sample outlet; all the through holes on the first diagonal are on the main path; The branch paths are in multiple pairs, each pair of branch paths is symmetrically distributed on both sides of the first diagonal, and the two through holes at the start and end of each pair of branch paths are shared with any two through holes on the main path, and the through holes at the start and end of the same branch path are symmetrically distributed on both sides of the second diagonal of the square array.
6. The chip packaging method according to claim 3, wherein, The multiple through holes are arranged in a rectangular or square array, and the first and last through holes in the first row or first column of the rectangular or square array serve as the starting or ending point of the flow path and are respectively connected to a pair of the sample inlets and the sample outlets. The flow path includes multiple sub-paths connected end to end. The number of sub-paths is the same as the number of rows or columns of the rectangular or square array, and all through holes in each row or column of the rectangular or square array are located on each of the sub-paths.
7. The chip packaging method according to claim 3, wherein, The plurality of through holes are arranged in a rectangular or square array, the number of pairs of the inlet and the outlet is the same as the number of rows or columns of the rectangular or square array, and all through holes in each row or column of the rectangular or square array are located on the flow path between each pair of the inlet and the outlet.
8. The chip packaging method according to claim 3, wherein, The first flow channel is a first groove formed on the surface of the first cover plate opposite to the sample substrate, and the second flow channel is a second groove formed on the surface of the second cover plate opposite to the sample substrate. The orthographic projection shape of the inner surface of the first groove and the second groove on a plane parallel to the thickness direction of the sample substrate is arc-shaped.
9. The chip packaging method according to claim 8, wherein, The arc shape is the shape of an arc segment cut from a circle or ellipse.
10. The chip packaging method according to claim 8, wherein, The walls of the through holes, the inner surfaces of the first groove and the second groove are all hydrophilic surfaces; the other surfaces of the sample substrate, except for the through holes, are hydrophobic surfaces; the other surfaces of the first cover plate, except for the inner surface of the first groove, are hydrophobic surfaces. The remaining surfaces of the second cover plate, except for the inner surface of the second groove, are hydrophobically treated.
11. The chip packaging method according to claim 8, wherein, The first cover plate and the second cover plate are both made of polymethyl methacrylate or glass.
12. The chip packaging method according to claim 1, wherein, The first cover plate has a second flow channel structure on its surface opposite to the sample substrate, and the second cover plate has a first flow channel structure on its surface opposite to the sample substrate, so that the first cover plate and the second cover plate constitute two reusable cover plates with completely identical structures. The two reused cover plates are staggered in the thickness direction of the sample substrate so that the inlet and outlet of one of the reused cover plates do not overlap with the other reused cover plate.
13. The chip packaging method according to claim 12, wherein, The number of reused cover plates is at least three, and at least one sample substrate is disposed between each pair of adjacent reused cover plates. At least one sample substrate is sequentially attached to the sample substrate along the direction from the first cover plate to the second cover plate, and the at least three reused cover plates are staggered in the thickness direction of the sample substrate so that the inlet and outlet of each reused cover plate do not overlap with other reused cover plates.
14. The chip packaging method according to claim 2, wherein, The plurality of vias on each of the sample substrates are arranged in a rectangular or square array. The interval between two adjacent rows of vias and the interval between two adjacent columns of vias in the array are the non-via regions. The width of the interval regions is greater than twice the diameter of the vias.
15. The chip packaging method according to claim 2, wherein, The plurality of vias on each of the sample substrates are arranged in a rectangular or square array. The area on the sample substrate outside the array is the non-via area, which can accommodate the entire array.
16. The chip packaging method according to claim 15, wherein, When each of the vias on one of two adjacent sample substrates is located in the non-via region of the other sample substrate, the arrays on all the sample substrates are arranged in an array.