Pixel circuit of a detector, detector and device

Abstract

The pixel circuit of the detector, the detector and the device are disclosed in the embodiments of the present disclosure, wherein the pixel circuit comprises: a charge generation module; a plurality of charge collection modules connected with the charge generation module; a pulse generation module connected with the plurality of charge collection modules; a reset module connected with the pulse generation module and the plurality of charge collection modules respectively; the plurality of charge collection modules are used for alternately storing photo-generated charges and outputting a first voltage under the control of the reset module, and the first voltage changes with exposure time; the pulse generation module is used for outputting a pulse signal in response to the first voltage meeting a preset condition; and the reset module is used for controlling the plurality of charge collection modules to alternately store photo-generated charges under the action of the pulse signal. The embodiments of the present disclosure can eliminate dead time and improve time sensitivity.

Description

Technical Field

[0001] This disclosure relates to sensor technology, and in particular to a pixel circuit for a detector, a detector, and an apparatus. Background Technology

[0002] Currently, infrared detectors, visible light detectors, and other detectors are widely used in various fields, such as medicine, military, and security. Detectors typically operate in two phases: an exposure phase and a reset phase. During the exposure phase, photogenerated charges are collected. When the accumulated photogenerated charges reach a certain threshold, a pulse signal is generated, followed by the reset phase. This reset phase clears the accumulated photogenerated charges and then proceeds to the next exposure phase. In related technologies, the photogenerated charges are usually reset by adjusting the voltage of the photodiode to a fixed reset voltage. However, during the reset phase, the external light signal continues to generate photogenerated charges. Because the voltage is fixed at the reset voltage, the photogenerated charges cannot be collected during the reset phase, resulting in a dead time and poor time sensitivity of the detector. Summary of the Invention

[0003] This disclosure provides a pixel circuit for a detector, a detector, and a device to effectively remove or reduce dead time and greatly improve the time sensitivity of the detector.

[0004] One aspect of this disclosure provides a pixel circuit for a detector, comprising:

[0005] The charge generation module is used to convert optical signals into photogenerated charges;

[0006] Multiple charge collection modules are connected to the charge generation module;

[0007] A pulse generation module is connected to the plurality of charge collection modules;

[0008] The reset module is connected to the pulse generation module and the plurality of charge collection modules, respectively.

[0009] The plurality of charge collection modules are used to alternately store the photogenerated charge generated by the charge generation module under the control of the reset module, and output a first voltage to the pulse generation module according to the stored photogenerated charge, wherein the first voltage varies with the exposure time;

[0010] The pulse generation module is used to output a pulse signal in response to the first voltage meeting a preset condition;

[0011] The reset module is used to control the multiple charge collection modules to alternately store photogenerated charges under the action of the pulse signal.

[0012] Another aspect of this disclosure provides a detector, comprising:

[0013] The preset number of pixels correspond to the pixel circuits of the detector described in any of the above embodiments;

[0014] The readout circuit is used to control the pixel circuit of the detector corresponding to each pixel to output the pulse signal.

[0015] In another aspect of this disclosure, an apparatus is provided, comprising: a pixel circuit of a detector provided in any of the foregoing embodiments, and / or a detector provided in any of the foregoing embodiments.

[0016] The pixel circuit, detector, and device of the detector provided in this disclosure can alternately collect photogenerated charges generated by the charge generation module through multiple charge collection modules. This ensures that at any time under any exposure state, at least one charge collection module is in the exposure stage, thereby continuously collecting photogenerated charges. When the photogenerated charges collected by the charge collection module in the exposure stage accumulate to a certain amount, it triggers the pulse generation module to generate a pulse signal. The pulse signal triggers the reset module to control the charge collection module in the exposure stage to enter the reset stage, and controls at least one charge collection module in the next group to continue collecting photogenerated charges. When the charge collected by the next group of charge collection modules accumulates to a certain amount, it triggers the pulse generation module to generate a pulse signal, which in turn triggers the reset module to control the next group of charge collection modules to enter the reset stage, and controls at least one charge collection module in the next group to continue collecting photogenerated charges. This alternating cycle effectively avoids dead time and greatly improves the time sensitivity of the detector.

[0017] The technical solutions of this disclosure will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0018] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0019] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:

[0020] Figure 1 This is a schematic diagram of the pixel circuit of a detector provided in an exemplary embodiment of the present disclosure;

[0021] Figure 2 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure;

[0022] Figure 3 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0023] Figure 4 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure;

[0024] Figure 5 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0025] Figure 6 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure;

[0026] Figure 7 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0027] Figure 8 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure;

[0028] Figure 9 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0029] Figure 10 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure;

[0030] Figure 11 This is a schematic diagram of the structure of the control signal triggering unit 251 provided in an exemplary embodiment of the present disclosure;

[0031] Figure 12 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0032] Figure 13 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure;

[0033] Figure 14 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of the present disclosure;

[0034] Figure 15 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure;

[0035] Figure 16 This is a schematic diagram of an exemplary embodiment of the pixel circuit of the detector provided in an exemplary embodiment of the present disclosure;

[0036] Figure 17 This is a schematic diagram of the simulation results of the pixel circuit 20 provided in an exemplary embodiment of this disclosure;

[0037] Figure 18This is a schematic diagram of the detector structure provided in an exemplary embodiment of this disclosure;

[0038] Figure 19 This is a schematic diagram of the structure of a pulse camera provided in an exemplary embodiment of the present disclosure. Detailed Implementation

[0039] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.

[0040] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this disclosure are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0041] It should also be understood that in the embodiments disclosed herein, "a plurality of" may refer to two or more, and "at least one" may refer to one, two or more.

[0042] It should also be understood that any component, data or structure mentioned in the embodiments of this disclosure can generally be understood as one or more unless expressly defined or given to the contrary in the context.

[0043] Furthermore, the term "and / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this disclosure generally indicates that the preceding and following related objects have an "or" relationship.

[0044] It should also be understood that the description of the various embodiments in this disclosure emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0045] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0046] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use.

[0047] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0048] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0049] This disclosure outlines

[0050] In the process of developing this disclosure, the inventors discovered that infrared detectors, visible light detectors, and other detectors are currently widely used in various fields, such as medicine, military, and security. These detectors typically operate in two phases: an exposure phase and a reset phase. During the exposure phase, photogenerated charges are collected. When the accumulated photogenerated charges reach a certain threshold, a pulse signal is generated, followed by the reset phase, where the accumulated photogenerated charges are cleared before entering the next exposure phase. In related technologies, the photogenerated charges are usually reset by resetting the voltage of the photodiode to a fixed reset voltage. However, during the reset phase, the external light signal is uninterrupted, continuously generating photogenerated charges. Because the voltage is fixed at the reset voltage, the photogenerated charges cannot be collected during the reset phase, resulting in a dead time and poor time sensitivity of the detector.

[0051] Exemplary Overview

[0052] In various application scenarios of the detector, using the pixel circuit of the detector disclosed herein, multiple charge collection modules can alternately collect and store photogenerated charges generated by the charge generation module under the control of a reset module. Based on the stored photogenerated charges, a first voltage is output to the pulse generation module. When the accumulated photogenerated charges in any charge collection module reach a certain amount, causing the first voltage to meet a preset condition, the pulse generation module is triggered to output a pulse signal. Under the action of the pulse signal, the reset module controls the alternation of multiple charge collection modules, thereby enabling the charge collection module currently collecting photogenerated charges (e.g., the first charge collection module among multiple charge collection modules) to enter the reset phase, and another charge collection module (e.g., the second charge collection module among multiple charge collection modules) to enter the exposure phase and continue collecting photogenerated charges generated by the charge generation module. When the accumulated photogenerated charges collected by this other charge collection module reach a certain amount, the pulse generation module is triggered to generate a pulse signal. The pulse signal triggers the reset module to control this other charge collection module to enter the reset phase, and then controls another charge collection module (e.g., the third charge collection module among multiple charge collection modules) to continue collecting photogenerated charges. This alternating cycle achieves seamless connection of multiple charge collection modules collecting photogenerated charges, effectively avoiding dead time and greatly improving the time sensitivity of the detector. The detector can be an infrared detector, a visible light detector, etc., and there is no specific limitation.

[0053] Figure 1This is a schematic diagram of the pixel circuit of a detector provided in an exemplary embodiment of this disclosure. The pixel circuit (hereinafter referred to as pixel circuit or circuit) 20 of this detector can be applied to the detector. For example... Figure 1 As shown, the pixel circuit 20 includes: a charge generation module 21, multiple charge collection modules 2a, a pulse generation module 24, and a reset module 25.

[0054] A charge generation module 21 is used to convert light signals into photogenerated charges. Multiple charge collection modules 2a are connected to the charge generation module 21. A pulse generation module 24 is connected to the multiple charge collection modules 2a. A reset module 25 is connected to both the pulse generation module 24 and the multiple charge collection modules 2a. The multiple charge collection modules 2a, under the control of the reset module 25, alternately store the photogenerated charges generated by the charge generation module 21, and output a first voltage to the pulse generation module 24 based on the stored photogenerated charges. The first voltage varies with exposure time. The pulse generation module 24 outputs a pulse signal in response to the first voltage meeting a preset condition. The reset module 25, under the action of the pulse signal, controls the multiple charge collection modules 2a to alternately store photogenerated charges.

[0055] In some alternative embodiments of this disclosure, the charge generation module 21 may employ any device that can convert an optical signal into photoelectric charge, such as a photodiode.

[0056] In some alternative embodiments of this disclosure, the multiple charge collection modules may be implemented using any charge-storing circuitry or device, such as capacitors or other devices.

[0057] In some optional embodiments of this disclosure, the pulse generation module 24 can be configured according to actual needs, as long as it can match the first voltage with preset conditions and output a pulse signal in response to the first voltage meeting the preset conditions. For example, the pulse generation module 24 can be a comparator or other devices with comparison or judgment functions.

[0058] In some alternative embodiments of this disclosure, the reset module 25 may be implemented based on a switching circuit. The switching circuit may be implemented in any feasible manner.

[0059] In some optional embodiments of this disclosure, the preset conditions can be set according to actual needs. For example, the preset conditions can be less than or equal to a reference threshold voltage, or they can be set to other conditions according to actual needs. The pulse signal can be set to a high-level signal or a low-level signal according to actual needs, and there is no specific limitation.

[0060] In some optional embodiments, the number of charge collection modules included in the plurality of charge collection modules 2a is not limited. For example, the number of charge collection modules included can be 2, 3, 5, 8, etc. For example, the plurality of charge collection modules 2a may include a first charge collection module, a second charge collection module, a third charge collection module, a fourth charge collection module, etc.

[0061] In some optional embodiments of this disclosure, the control of the reset module 25 over the alternating collection of photogenerated charges by the multiple charge collection modules 2a can be achieved by controlling the conduction of each charge collection module with the charge generation module 21 through a switching circuit. For example, by controlling at least one charge collection module (e.g., denoted as a first charge collection module) of the multiple charge collection modules 2a to conduct with the charge generation module 21, and controlling the other charge collection modules to disconnect from the charge generation module 21, the at least one first charge collection module that is conducting collects the photogenerated charges generated by the charge generation module 21. That is, the at least one first charge collection module is in the exposure stage, while the other charge collection modules are in the reset stage. When the accumulated charge of the first charge collection module reaches a charge threshold, the trigger pulse generation module 24 generates a pulse signal. The pulse signal then triggers the reset module 25 to control the first charge collection module to enter the reset phase and control at least one charge collection module in the next group (e.g., the second charge collection module) to enter the exposure phase. While the first charge collection module is reset, other charge collection modules besides the first and second charge collection modules remain in the reset phase, while the second charge collection module continues to collect the generated photogenerated charge. When the accumulated charge of the second charge collection module reaches the charge threshold, it triggers the generation of a pulse signal. The pulse signal triggers the reset module 25 to control at least one charge collection module in the next group (e.g., the third charge collection module) to enter the exposure phase and control the second charge collection module to enter the reset phase. After multiple charge collection modules have entered the exposure phase once, the first charge collection module is then controlled to enter the exposure phase. The multiple charge collection modules alternate in this way to achieve continuous collection of photogenerated charge, which helps to eliminate dead time. The alternation order of the multiple charge collection modules and the number of charge collection modules in the exposure phase each time are not limited.

[0062] The pixel circuit of the detector provided in this embodiment can alternately collect photogenerated charges generated by the charge generation module through multiple charge collection modules, so that at any time under any exposure state, at least one charge collection module is in the exposure stage, thereby continuously collecting photogenerated charges. When the photogenerated charges collected by the charge collection module in the exposure stage accumulate to a certain amount, it triggers the pulse generation module to generate a pulse signal. The pulse signal triggers the reset module to control the charge collection module in the exposure stage to enter the reset stage, and controls at least one charge collection module in the next group to continue collecting photogenerated charges. When the amount of charge collected by the charge collection module in the next group accumulates to a certain amount, it triggers the pulse generation module to generate a pulse signal, which in turn triggers the reset module to control the charge collection module in the next group to enter the reset stage, and controls at least one charge collection module in the next group to continue collecting photogenerated charges. This alternating cycle effectively avoids dead time, thereby greatly improving the time sensitivity of the detector.

[0063] In some alternative embodiments, Figure 2 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure, as shown below. Figure 2 As shown, each of the multiple charge collection modules 2a may include a capacitor 2a1 and a switching component 2a2. Figure 2 The diagram only shows one charge collection module as an example; the structures of other charge collection modules are not shown.

[0064] Capacitor 2a1 is connected to charge generation module 21. Switch assembly 2a2 is connected to reset module 25, charge generation module 21, pulse generation module 24, and capacitor 2a1 respectively. Switch assembly 2a2 is used to control capacitor 2a1 and capacitors of multiple other charge collection modules to alternately store photogenerated charges under the control of reset module 25, so that capacitor 2a1 outputs a first voltage to pulse generation module 24 according to the stored photogenerated charges.

[0065] In some optional embodiments of this disclosure, the number of capacitors 2a1 can be one or more. When there are multiple capacitors 2a1, they are connected in parallel to jointly store photogenerated charge. The specific number can be set according to actual needs.

[0066] In some optional embodiments of this disclosure, the switching component 2a2 can be implemented in any feasible manner. For example, the switching component 2a2 can be any transistor such as MOSFET or IGBT, as long as it can achieve the corresponding switching function.

[0067] In some optional embodiments of this disclosure, the switching component 2a2 may include one or more switches. By controlling the switching on and off, the capacitor 2a1 and the charge generation module 21 are switched on and off. When the capacitor 2a1 and the charge generation module 21 are switched on, the photogenerated charge generated by the charge generation module 21 can be collected, that is, the exposure stage is entered. When the capacitor 2a1 and the charge generation module 21 are switched off, the reset stage is entered. Based on this, the switching component 2a2 of each charge collection module controls the capacitor 2a1 to realize that multiple charge collection modules alternately collect photogenerated charge.

[0068] This embodiment can effectively control the exposure and reset phases of multiple charge collection modules through capacitors and switching components, which facilitates the alternating collection of photogenerated charges by multiple charge collection modules to eliminate dead time.

[0069] In some alternative embodiments, Figure 3 This is a schematic diagram of the pixel circuit of the detector provided in another exemplary embodiment of the present disclosure, as shown below. Figure 3 As shown, the multiple charge collection modules 2a include a first charge collection module 22 and a second charge collection module 23.

[0070] The first charge collection module 22 and the second charge collection module 23 are used to alternately store the photogenerated charge generated by the charge generation module 21 under the control of the reset module 25, and output a first voltage to the pulse generation module according to the stored photogenerated charge.

[0071] In some alternative embodiments, such as Figure 3 As shown, the pixel circuit 20 includes: a charge generation module 21, a first charge collection module 22, a second charge collection module 23, a pulse generation module 24, and a reset module 25.

[0072] The charge generation module 21 is used to convert optical signals into photogenerated charges.

[0073] The first charge collection module 22 is connected to the charge generation module 21.

[0074] The second charge collection module 23 is connected to the charge generation module 21.

[0075] The pulse generation module 24 is connected to the first charge collection module 22 and the second charge collection module 23 respectively.

[0076] The reset module 25 is connected to the pulse generation module 24, the first charge collection module 22, and the second charge collection module 23, respectively.

[0077] The first charge collection module 22 and the second charge collection module 23 are used to alternately store the photogenerated charge generated by the charge generation module 21 under the control of the reset module 25, and output a first voltage to the pulse generation module 24 according to the stored photogenerated charge. The first voltage changes with the exposure time.

[0078] The pulse generation module 24 is used to output a pulse signal in response to the first voltage meeting a preset condition.

[0079] The reset module 25 is used to control the first charge collection module 22 and the second charge collection module 23 to alternately store photogenerated charges under the action of a pulse signal.

[0080] In some alternative embodiments of this disclosure, the charge generation module 21 may employ any device that can convert an optical signal into photoelectric charge, such as a photodiode.

[0081] In some optional embodiments of this disclosure, the first charge collection module 22 and the second charge collection module 23 may be implemented using any charge-storing circuit or device, such as a capacitor or other device.

[0082] In some optional embodiments of this disclosure, the pulse generation module 24 can be configured according to actual needs, as long as it can match the first voltage with preset conditions and output a pulse signal in response to the first voltage meeting the preset conditions. For example, the pulse generation module 24 can be a comparator or other devices with comparison or judgment functions.

[0083] In some optional embodiments of this disclosure, the reset module 25 can be implemented based on a switching circuit. The switching circuit can be implemented in any feasible manner, for example, the switching circuit can be implemented using transistors, specifically such as MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), IGBT (Insulated Gate Bipolar Transistor), etc., which can be set according to actual needs.

[0084] In some optional embodiments of this disclosure, the preset conditions can be set according to actual needs. For example, the preset conditions can be less than or equal to a reference threshold voltage, or they can be set to other conditions according to actual needs. The pulse signal can be set to a high-level signal or a low-level signal according to actual needs, and there is no specific limitation.

[0085] In some optional embodiments of this disclosure, the control of the reset module 25 over the alternating collection of photogenerated charges by the first charge collection module 22 and the second charge collection module 23 can be achieved by controlling the conduction of the first charge collection module 22 and the second charge collection module 23 with the charge generation module 21 through a switching circuit. For example, by controlling the first charge collection module 22 to conduct with the charge generation module 21 and controlling the second charge collection module 23 to disconnect from the charge generation module 21, the first charge collection module 22 collects the photogenerated charges generated by the charge generation module 21, that is, the first charge collection module 22 is in the exposure stage, while the second charge collection module 23 is in the reset stage. Similarly, when the amount of charge accumulated by the first charge collection module 22 reaches the charge threshold, the pulse generation module 24 is triggered to generate a pulse signal. The pulse signal then triggers the reset module 25 to control the first charge collection module 22 to enter the reset stage and control the second charge collection module 23 to enter the exposure stage. While the first charge collection module 22 is reset, the second charge collection module 23 continues to collect the generated photogenerated charge. When the amount of charge accumulated by the second charge collection module 23 reaches the charge threshold, a pulse signal is triggered to generate a pulse signal. The pulse signal then triggers the reset module 25 to control the first charge collection module 22 to enter the exposure stage and control the second charge collection module 23 to enter the reset stage. This alternation is repeated to achieve continuous collection of photogenerated charge and eliminate dead time.

[0086] The pixel circuit of the detector provided in this embodiment uses two charge collection modules to alternately collect photogenerated charges generated by the charge generation module. When the first charge collection module is in the reset phase, the second charge collection module can collect photogenerated charges. When the photogenerated charges collected by the second charge collection module accumulate to a certain amount, it triggers the pulse generation module to generate a pulse signal. The pulse signal triggers the reset module to control the second charge collection module to enter the reset phase and control the first charge collection module to continue collecting photogenerated charges. When the charge collected by the first charge collection module accumulates to a certain amount, it triggers the pulse generation module to generate a pulse signal, which in turn triggers the reset module to control the first charge collection module to enter the reset phase and control the first charge collection module to continue collecting photogenerated charges. This alternating cycle effectively avoids dead time, thereby greatly improving the time sensitivity of the detector. Furthermore, this embodiment achieves continuous collection of photogenerated charges using only two charge collection modules, which helps reduce the structural complexity of the pixel circuit, thereby reducing the space occupied by the pixel circuit.

[0087] Figure 4 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure.

[0088] In some optional embodiments of this disclosure, the first charge collection module 22 includes: a first capacitor 221, a first switching component 222, and a second switching component 223.

[0089] The first terminal c11 of the first capacitor 221 is connected to the first terminal d1 of the charge generation module 21; the first terminal of the charge generation module 21 is connected to the reference voltage Vref; the first terminal D11 of the first switching component 222 is connected to the reset module 25, the second terminal D12 of the first switching component 222 is connected to the second terminal d2 of the charge generation module 21, and the third terminal D13 of the first switching component 222 is connected to the second terminal c12 of the first capacitor 221; the first terminal D21 of the second switching component 223 is connected to the reset module 25, the second terminal D22 of the second switching component 223 is connected to the pulse generation module 24, and the third terminal D23 of the second switching component 223 is connected to the second terminal c12 of the first capacitor 221.

[0090] The first switch assembly 222 is turned on under the action of the first control signal output by the reset module 25, so that the second terminal c12 of the first capacitor 221 is connected to the second terminal d2 of the charge generation module 21.

[0091] The second switch assembly 223 is used to turn on under the action of the first control signal so that the second terminal c12 of the first capacitor 221 is connected to the pulse generation module 24.

[0092] The first capacitor 221 is used to store the photogenerated charge generated by the charge generation module 21 when the first switch assembly 222 and the second switch assembly 223 are turned on, and to output a first voltage to the pulse generation module 24 through the second terminal c12 of the first capacitor 221 according to the stored photogenerated charge.

[0093] In some optional embodiments of this disclosure, the number of first capacitors 221 can be one or more. When there are multiple first capacitors 221, they are connected in parallel to jointly realize the storage of photogenerated charge. The specific configuration can be set according to actual needs.

[0094] In some optional embodiments of this disclosure, the reference voltage Vref can be set according to actual needs, for example, it can be the voltage of the ground point or other voltages.

[0095] In some optional embodiments of this disclosure, the first switching component 222 and the second switching component 223 can be set according to actual needs. For example, any transistor such as MOSFET or IGBT can be used, as long as it can achieve the corresponding switching function.

[0096] In some optional embodiments of this disclosure, the first control signal can be set according to actual needs, specifically according to the switching characteristics of the first switching component 222 and the second switching component 223. For example, if the first switching component 222 and the second switching component 223 are high-level conducting switching components, then the first control signal is a high-level signal, such as a voltage signal greater than a certain value. If the first switching component 222 and the second switching component 223 are low-level conducting switching components, then the first control signal is a low-level signal, such as 0V or a voltage signal less than a certain voltage value, and the specific details are not limited.

[0097] In some optional embodiments of this disclosure, when the first switching component 222 and the second switching component 223 are turned on, the second terminal c12 of the first capacitor 221 is connected to the second terminal d2 of the charge generation module 21 and the pulse generation module 24, thereby forming a circuit between the first capacitor 221 and the charge generation module 21. This allows the first capacitor 221 to collect the photogenerated charge generated by the charge generation module 21, causing the voltage Vpd of d2 to decrease with the exposure time. The voltage Vpd of d2 is then transmitted as the first voltage to the pulse generation module 24 through the second terminal c12 of the first capacitor 221. The pulse generation module 24 matches the first voltage with a preset condition, and in response to the first voltage satisfying the preset condition, outputs a pulse signal to the reset module 25.

[0098] This embodiment can effectively control the exposure and reset phases of the first charge collection module through the first capacitor, the first switch assembly, and the second switch assembly, which facilitates the alternating collection of photogenerated charges with the second charge collection module and eliminates dead time.

[0099] In some optional embodiments of this disclosure, the second terminal c12 of the first capacitor 221 is also connected to the reset module 25; the first switch assembly 222 is also used to turn off under the action of the second control signal output by the reset module 25, so that the second terminal c12 of the first capacitor 221 is disconnected from the second terminal d2 of the charge generation module 21.

[0100] The second switching assembly 223 is also used to turn off under the action of the second control signal, so that the second terminal c12 of the first capacitor 221 is disconnected from the pulse generation module 24.

[0101] The first capacitor 221 is also used so that, when the first switch assembly 222 and the second switch assembly 223 are turned off, the voltage at the second terminal c12 of the first capacitor 221 is reset to the reset voltage by the reset module 25.

[0102] In some optional embodiments of this disclosure, the second control signal is a signal opposite to the first control signal. For example, the first control signal and the second control signal can be any combination of the following: the first control signal is a high-level signal and the second control signal is a low-level signal; or the first control signal is a low-level signal and the second control signal is a high-level signal. The specific configuration can be determined according to actual needs.

[0103] In some optional embodiments of this disclosure, when the first switch assembly 222 and the second switch assembly 223 are turned off, the first capacitor 221 is disconnected from the charge generation module 21 and cannot continue to collect photogenerated charge. At this time, since the second terminal c12 of the first capacitor 221 is connected to the reset module 25, it can be reset to the reset voltage by the reset module 25, thereby resetting (i.e. clearing) the photogenerated charge stored in the first capacitor 221. At the same time, the reset module 25 controls the second charge collection module 23 to enter the exposure stage and continue to collect photogenerated charge.

[0104] In some optional embodiments of this disclosure, when the pixel circuit 20 just starts working, the voltage of the second terminal c12 of the first capacitor 221 can be initially reset to the reset voltage, so that when the first capacitor 221 first enters the exposure stage, the voltage of c12 starts to drop from the reset voltage, and when the first capacitor 221 enters the reset stage from the exposure stage, the voltage of c12 is reset to the reset voltage, thereby clearing the stored photogenerated charge.

[0105] In this embodiment, by controlling the first switch assembly and the second switch assembly to turn off, the photogenerated charge stored in the first capacitor can be effectively reset, so that the first capacitor can continue to collect photogenerated charge in the next exposure stage.

[0106] Figure 5 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of the present disclosure.

[0107] In some optional embodiments of this disclosure, the second charge collection module 23 includes: a second capacitor 231, a third switching component 232, and a fourth switching component 233.

[0108] The first terminal c21 of the second capacitor 231 is connected to the first terminal d1 of the charge generation module 21, and the first terminal d1 of the charge generation module 21 is connected to the reference voltage; the first terminal D31 of the third switch assembly 232 is connected to the reset module 25, the second terminal D32 of the third switch assembly 232 is connected to the second terminal d2 of the charge generation module 21, and the third terminal D33 of the third switch assembly 232 is connected to the second terminal c22 of the second capacitor 231; the first terminal D41 of the fourth switch assembly 233 is connected to the reset module 25, the second terminal D42 of the fourth switch assembly 233 is connected to the pulse generation module 24, and the third terminal D43 of the fourth switch assembly 233 is connected to the second terminal c22 of the second capacitor 231.

[0109] The third switch assembly 232 is turned on under the action of the third control signal output by the reset module 25, so that the second terminal c22 of the second capacitor 231 is connected to the second terminal d2 of the charge generation module 21.

[0110] The fourth switch assembly 233 is turned on under the action of the third control signal so that the second terminal c22 of the second capacitor 231 is connected to the pulse generation module 24.

[0111] The second capacitor 231 is used to store the photogenerated charge generated by the charge generation module 21 when the third switch assembly 232 and the fourth switch assembly 233 are turned on, and to output a first voltage to the pulse generation module 24 through the second terminal c22 of the second capacitor 231 according to the stored photogenerated charge.

[0112] In some optional embodiments of this disclosure, the third control signal can be the same as the first control signal or the opposite of the first control signal, specifically set according to the switching characteristics of the third switch component 232 and the fourth switch component 233. For example, if the third switch component 232 and the fourth switch component 233 are the same as the first switch component 222 and the second switch component 223, for example, both are high-level conducting or both are low-level conducting, then the third control signal is the same as the first control signal. If the switching characteristics of the third switch component 232 and the fourth switch component 233 are opposite to those of the first switch component 222 and the second switch component 223, for example, the first switch component 222 and the second switch component 223 are high-level conducting, and the third switch component 232 and the fourth switch component 233 are low-level conducting, or the first switch component 222 and the second switch component 223 are low-level conducting, and the third switch component 232 and the fourth switch component 233 are high-level conducting, then the third control signal is the opposite of the first control signal. As long as it can be ensured that the third switch component 232 and the fourth switch component 233 are turned off when the first switch component 222 and the second switch component 223 are turned on, and the third switch component 232 and the fourth switch component 233 are turned on when the first switch component 222 and the second switch component 223 are turned off, the specific settings of the switch components and control signals are not limited in this disclosure.

[0113] In some optional embodiments of this disclosure, the working principle of each component in the second charge collection module 23 is similar to that of the first charge collection module 22. Please refer to the aforementioned first charge collection module 22, which will not be repeated here.

[0114] The embodiments disclosed herein achieve effective control of the second charge collection module through the second capacitor, the third switch assembly, and the fourth switch assembly, which helps to alternate between the first charge collection module and the exposure stage and the reset stage.

[0115] In some optional embodiments of this disclosure, the second terminal c22 of the second capacitor 231 is also connected to the reset module 25.

[0116] The third switch assembly 232 is also used to turn off under the action of the fourth control signal output by the reset module 25, so that the second terminal c22 of the second capacitor 231 is disconnected from the second terminal d2 of the charge generation module 21.

[0117] The fourth switch assembly 233 is also used to turn off under the action of the fourth control signal, so that the second terminal c22 of the second capacitor 231 is disconnected from the pulse generation module 24.

[0118] The second capacitor 231 is also used so that, when the third switch assembly 232 and the fourth switch assembly 233 are turned off, the voltage at the second terminal c22 of the second capacitor 231 is reset to the reset voltage by the reset module 25.

[0119] In some optional embodiments of this disclosure, the fourth control signal is the opposite of the third control signal, and the specific details will not be elaborated further.

[0120] In this embodiment, by controlling the third and fourth switch components to turn off, the second capacitor can be effectively reset, preparing it for the next exposure stage.

[0121] In some optional embodiments of this disclosure, Figure 6 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure. In this embodiment, the first charge collection module 22 includes a first capacitor 221, a first switching component 222, and a second switching component 223; the second charge collection module 23 includes a second capacitor 231, a third switching component 232, and a fourth switching component 233. The specific structures of the first charge collection module 22 and the second charge collection module 23 can be found in the foregoing embodiments and will not be repeated here. When the amount of charge collected by the second charge collection module 21 reaches a certain amount triggering a pulse signal, the reset module 25 can output a first control signal to the first charge collection module 22 and a fourth control signal to the second charge collection module 23 under the action of the pulse signal, thereby controlling the first charge collection module 22 to enter the exposure stage and collect the photogenerated charge generated by the charge generation module 21. It also controls the second charge collection module 23 to enter the reset stage, resetting the voltage at the second terminal c22 of the second capacitor 231 to the reset voltage, preparing for the next exposure stage. When the charge stored in the first charge collection module 22 triggers a pulse signal, the reset module 25 can output a second control signal to the first charge collection module 22 and a third control signal to the second charge collection module 23 under the action of the pulse signal. This controls the first charge collection module 22 to enter the reset stage and the second charge collection module 23 to enter the exposure stage, continuing to collect the photogenerated charge generated by the charge generation module. The module alternates between the exposure stage and the reset stage, ensuring that at any given moment during the exposure state, one charge collection module collects the generated photogenerated charge while the other charge collection module resets. This achieves dead-time-free collection of photogenerated charge, effectively eliminating dead time and greatly improving the time sensitivity of the detector.

[0122] Figure 7 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of the present disclosure.

[0123] In some optional embodiments of this disclosure, the reset module 25 includes a control signal triggering unit 251 and an inverting unit 252.

[0124] The first input terminal ti1 of the control signal triggering unit 251 is connected to the output terminal mo of the pulse generation module, and the output terminal to of the control signal triggering unit 251 is connected to the first charge collection module 22.

[0125] The input terminal ri of the inverting unit 252 is connected to the output terminal to of the control signal triggering unit 251, and the output terminal ro of the inverting unit 252 is connected to the second input terminal ti2 of the control signal triggering unit 251 and the second charge collection module 23, respectively.

[0126] The control signal triggering unit 251 is used to take the input signal of the second input terminal ti2 as the control signal under the action of the pulse signal and output it through the output terminal to. The control signal includes either the first control signal or the second control signal. The first control signal is used to control the first charge collection module 22 to store photogenerated charge, and the second control signal is used to control the first charge collection module 22 to reset.

[0127] The inverting unit 252 is used to invert the control signal output by the control signal triggering unit 251 and output an inverted control signal. The inverted control signal corresponding to the first control signal is used as the fourth control signal, and the inverted control signal corresponding to the second control signal is used as the third control signal. The fourth control signal is used to control the second charge collection module 23 to reset, and the third control signal is used to control the second charge collection module 23 to store photogenerated charge.

[0128] In some optional embodiments of this disclosure, the specific structure of the control signal triggering unit 251 can be set according to actual needs, for example, it can be implemented based on a D flip-flop or other possible devices.

[0129] In some optional embodiments of this disclosure, the inverting unit 252 may be implemented using an inverter or other devices with inverting functionality.

[0130] In some optional embodiments of this disclosure, when the first charge collection module 22 is in the exposure stage, if the trigger pulse generation module 24 generates a pulse signal, the control signal triggering unit 251 outputs a second control signal under the action of the pulse signal, causing the first charge collection module 22 to enter the reset stage. The inverting unit 252 inverts the second control signal and outputs an inverted control signal as a third control signal, controlling the second charge collection module to enter the exposure stage and store photogenerated charges, thus realizing the alternation of the first charge collection module 22 and the second charge collection module 23. Similarly, when the second charge collection module 23 is in the exposure stage, if the trigger pulse generation module 24 generates a pulse signal, the control signal triggering unit 251 outputs the aforementioned third control signal as a first control signal. Since the third control signal is the inverted control signal of the second control signal, it can also be used as the first control signal to control the first charge collection module 22 to enter the exposure stage and continue collecting photogenerated charges. The inverting unit 252 inverts the first control signal and outputs an inverted control signal as a fourth control signal, controlling the second charge collection module 23 to reset. This alternation achieves continuous collection of photogenerated charges.

[0131] This embodiment achieves the effective generation of the first control signal, the second control signal, the third control signal, and the fourth control signal through the control signal triggering unit and the inverter, thereby effectively realizing the accurate control of the first charge collection module 22 and the second charge collection module 23 to alternately collect and reset photogenerated charges.

[0132] Figure 8 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure.

[0133] In some optional embodiments of this disclosure, the reset module 25 further includes a delay unit 253.

[0134] The input terminal li of the delay unit 253 is connected to the output terminal mo of the pulse generation module 24, and the output terminal lo of the delay unit 253 is connected to the first input terminal ti1 of the control signal triggering unit 251.

[0135] The delay unit 253 is used to delay the pulse signal for a preset time and output the delayed pulse signal to the control signal triggering unit 251.

[0136] The control signal triggering unit 251 is used to take the input signal of the second input terminal ti1 as a control signal under the action of the delayed pulse signal and output it through the output terminal to.

[0137] In some optional embodiments of this disclosure, the delay unit 253 can be implemented in any implementable manner, such as using an inverter delay chain.

[0138] In some optional embodiments of this disclosure, the preset duration can be set according to actual needs, and this disclosure does not limit it.

[0139] In some optional embodiments of this disclosure, in Figure 8 Based on the pixel circuit shown, the first charge collection module 22 and the second charge collection module 23 can adopt the structure provided in any of the foregoing embodiments.

[0140] In some optional embodiments of this disclosure, when the reset module 25 includes a delay unit 253, due to the delay effect of the delay unit 253, the charge collection module that triggers the pulse signal will continue to collect photogenerated charge within the preset delay time, causing Vpd to continue to decrease from Vth. However, since the preset delay time is very small compared to the dead time of the prior art, it can be ignored. Therefore, even if there is a delay, the dead time can be greatly reduced.

[0141] This embodiment delays the pulse signal by a preset time before outputting it to the control signal triggering unit, which makes the pulse signal more regular and facilitates its reading and analysis.

[0142] Figure 9 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of the present disclosure.

[0143] In some optional embodiments of this disclosure, the reset module 25 further includes a fifth switch assembly 254 and a sixth switch assembly 255.

[0144] In this configuration, the first terminal D51 of the fifth switching component 254 is connected to the output terminal ro of the inverting unit 252, the second terminal D52 of the fifth switching component 254 is connected to the reset voltage Vr, and the third terminal D53 of the fifth switching component 254 is connected to the first charge collection module 22.

[0145] The first terminal D61 of the sixth switch assembly 255 is connected to the output terminal to of the control signal triggering unit 251, the second terminal D62 of the sixth switch assembly 255 is connected to the reset voltage Vr, and the third terminal D63 of the sixth switch assembly 255 is connected to the second charge collection module 23.

[0146] The fifth switch assembly 254 is turned on under the action of the third control signal to transmit the reset voltage Vr to the first charge collection module 22 and reset the photogenerated charge stored in the first charge collection module 22.

[0147] The sixth switch assembly 255 is used to turn off under the action of the second control signal to disconnect the second charge collection module 23 from the reset voltage Vr, so that the second charge collection module 23 can store the generated photogenerated charge when the first charge collection module 22 is in the reset phase.

[0148] The sixth switch assembly 255 is also used to turn on under the action of the first control signal to transmit the reset voltage Vr to the second charge collection module 23 and reset the photogenerated charge stored in the second charge collection module 23.

[0149] The fifth switch assembly 254 is also used to turn off under the action of the fourth control signal to disconnect the first charge collection module 22 from the reset voltage Vr, so that the first charge collection module 22 can store the generated photogenerated charge when the second charge collection module 23 is in the reset phase.

[0150] In some optional embodiments of this disclosure, the fifth switching component 254 and the sixth switching component 255 can be configured according to actual needs. For example, they can be implemented using transistors such as MOSFETs and IGBTs.

[0151] In some optional embodiments of this disclosure, the third terminal D53 of the fifth switching component 254 can be connected to the second terminal c12 of the first capacitor 221 in the first charge collection module 22, so as to reset the voltage of the second terminal c12 of the first capacitor 221 to the reset voltage Vr when the fifth switching component 254 is turned on, thereby resetting the photogenerated charge stored in the first capacitor 221. Similarly, the third terminal D63 of the sixth switching component 255 can be connected to the second terminal c22 of the second capacitor 232 in the second charge collection module 23, so as to reset the photogenerated charge stored in the second capacitor 232.

[0152] In this embodiment, the alternating reset of the first charge collection module and the second charge collection module can be effectively achieved through the fifth and sixth switching components.

[0153] In some optional embodiments of this disclosure, the fifth switch component 254 can also be turned off under the action of the first control signal and turned on under the action of the second control signal. Specifically, this can be achieved by setting the fifth switch component 254 to a switch component with the opposite switching characteristics to the first switch component 222. For example, if the first switch component 222 is high-level turned on, then the fifth switch component 254 is a low-level turned-on switch component, so that the fifth switch component 254 can be turned off when the first switch component 222 and the second switch component 232 are turned on. In this case, the first terminal D51 of the fifth switch component 254 needs to be connected to the output terminal to of the control signal triggering unit 251.

[0154] In some optional embodiments of this disclosure, similar to the fifth switch assembly 254, the sixth switch assembly 255 can also be turned off under the action of the third control signal and turned on under the action of the fourth control signal. In this case, the first terminal D61 of the sixth switch assembly 255 needs to be connected to the output terminal ro of the inverting unit 252, which will not be described in detail here.

[0155] In some optional embodiments of this disclosure, in Figure 9 Based on the reset module 25 shown, the reset module 25 may also include the delay unit 253 of the aforementioned embodiment.

[0156] In some optional embodiments of this disclosure, Figure 10 This is a schematic diagram of the pixel circuitry of a detector provided in yet another exemplary embodiment of this disclosure. Figure 9 Based on the pixel circuit shown, the first charge collection module 22 and the second charge collection module 23 are Figure 6The structure is shown. The third terminal D53 of the fifth switching assembly 254 is connected to the second terminal c12 of the first capacitor 221, and the third terminal D63 of the sixth switching assembly 255 is connected to the second terminal c22 of the second capacitor 231. When the fifth switching assembly 254 is on, it transmits the reset voltage Vr to the second terminal c12 of the first capacitor 221, resetting the voltage at the second terminal c12 to the reset voltage Vr, thereby resetting the photogenerated charge stored in the first capacitor 221. When the sixth switching assembly 255 is on, it transmits the reset voltage Vr to the second terminal c22 of the second capacitor 231, resetting the voltage at c22 to the reset voltage Vr, thereby resetting the photogenerated charge stored in the second capacitor 231. The output terminal 'to' of the control signal triggering unit 251 is connected to the first terminal D11 of the first switching component 222 and the first terminal D21 of the second switching component 223, respectively. It outputs a first control signal under the action of a pulse signal to control the first switching component 222 and the second switching component 223 to conduct, thereby enabling the first charge collection module 22 to enter the exposure stage. Alternatively, the control signal triggering unit 251 outputs a second control signal under the action of a pulse signal to control the first switching component 222 and the second switching component 223 to turn off, thereby enabling the first charge collection module 22 to enter the reset stage. The output terminal 'ro' of the inverting unit 252 is connected to the first terminal D31 of the third switching component 232 and the first terminal D41 of the fourth switching component 233, respectively. It outputs a control signal opposite to the control signal output by the control signal triggering unit 251. This signal controls the second charge collection module 23 to enter the reset stage when the first charge collection module 22 enters the exposure stage, and controls the second charge collection module 23 to enter the exposure stage when the first charge collection module 22 enters the reset stage. For example, when the control signal triggering unit 251 outputs the first control signal, the first switch assembly 222, the second switch assembly 223, and the sixth switch assembly 255 are turned on. The inverting unit 252 inverts the first control signal and outputs the fourth control signal, which controls the third switch assembly 232, the fourth switch assembly 233, and the fifth switch assembly 254 to turn off. This causes the first charge collection module 22 to enter the exposure stage, and the second charge collection module 23 to enter the reset stage, resetting the voltage at the second terminal c22 of the second capacitor 231 to the reset voltage Vr. The first capacitor 221 collects the photogenerated charge generated by the charge generation module 21.

[0157] Figure 11 This is a schematic diagram of the structure of the control signal triggering unit 251 provided in an exemplary embodiment of this disclosure.

[0158] In some optional embodiments of this disclosure, the control signal triggering unit 251 includes a D flip-flop 2511.

[0159] The first input terminal bi1 of the D flip-flop 2511 is connected to the output terminal of the pulse generation module 24, the second input terminal bi2 of the D flip-flop 2511 is connected to the output terminal ro of the inverting unit 252, and the output terminal bo of the D flip-flop 2511 is connected to the first charge collection module 22.

[0160] D flip-flop 2511 is used to take the input signal at the second input terminal bi2 as a control signal under the action of a pulse signal and output it through the output terminal bo of D flip-flop 211.

[0161] In some optional embodiments of this disclosure, the first input terminal bi1 of the D flip-flop 2511 serves as the first input terminal ti1 of the control signal triggering unit 251, the second input terminal bi2 of the D flip-flop 2511 serves as the second input terminal ti2 of the control signal triggering unit 251, the output terminal bo of the D flip-flop 2511 serves as the output terminal to of the control signal triggering unit 251, and the pulse signal serves as the clock signal input to the clock input terminal (i.e., the first input terminal bi1) of the D flip-flop 2511. The D flip-flop 2511 has an input voltage following function on the rising edge of the clock signal, thereby converting the first input voltage to the second input voltage. The input signal bi2 is output through the output bo. Since the D flip-flop 2511 has an output holding function when the clock signal falls or when there is no clock signal input, the second input bi2 of the D flip-flop 2511 remains unchanged through the inverting unit. When a pulse signal is generated, the following function of the D flip-flop 2511 causes the output signal at the output bo to flip, for example, from high level to low level, or from low level to high level, thereby realizing the alternating output of the first control signal and the second control signal, and then causing the inverting unit to alternately output the fourth control signal and the third control signal.

[0162] This embodiment effectively achieves the accurate output of the first control signal, the second control signal, the third control signal, and the fourth control signal through a D flip-flop, thereby helping to achieve accurate alternating control of the first charge collection module and the second charge collection module.

[0163] Figure 12 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of the present disclosure.

[0164] In some optional embodiments of this disclosure, the charge generation module 21 includes a photodiode 211, the first terminal d1 of which is connected to a reference voltage Vref, and the photodiode 211 is used to convert optical signals into photogenerated charges.

[0165] In some optional embodiments of this disclosure, the first terminal d1 of the photodiode 211 is the first terminal of the charge generation module 21, and the reference voltage connected to d1 can be a ground point, i.e., d1 is grounded. The second terminal of the photodiode 211 is the second terminal of the charge generation module 21. The connection relationship between the second terminal of the photodiode 211 and other modules can be found in the foregoing content and will not be repeated here.

[0166] The pulse generation module 24 includes: a comparison unit 241, the first input terminal ei1 of the comparison unit 241 being connected to multiple charge collection modules 2a ( Figure 12 Multiple charge collection modules 2a (including a first charge collection module 22 and a second charge collection module 23) are connected together. The second input terminal ei2 of the comparison unit 241 is connected to the reference threshold voltage Vth, and the output terminal eo of the comparison unit 241 is connected to the reset module 25.

[0167] The comparison unit 241 is used to compare the first voltage with the reference threshold voltage Vth. In response to the first voltage being less than or equal to the reference threshold voltage Vth, a pulse signal is output through the output terminal eo of the comparison unit 241.

[0168] In some optional embodiments of this disclosure, the first input terminal ei1 of the comparison unit 241 serves as the input terminal of the pulse generation module 24, and the second input terminal ei2 of the comparison unit 241 is connected to a reference threshold voltage for comparison with a first voltage. The output terminal eo of the comparison unit 241 serves as the output terminal mo of the pulse generation module 24. The reference threshold voltage Vth can be set according to actual needs, for example, the reference threshold voltage can be 1V, 1.2V, etc. When the first voltage output by the first charge collection module 22 or the second charge collection module 23 is less than or equal to the reference threshold voltage Vth, the output terminal eo of the comparison unit 241 is triggered to output a pulse signal.

[0169] In this embodiment, a comparison unit is used to compare the first voltage with the reference threshold voltage. When the first voltage drops to the reference threshold voltage, an output pulse signal can be triggered to trigger the alternation of the first charge collection module and the second charge collection module.

[0170] Figure 13 This is a schematic diagram of the pixel circuit of a detector provided in yet another exemplary embodiment of this disclosure.

[0171] In some optional embodiments of this disclosure, an initial reset module 26 is also included.

[0172] The initial reset module 26 is connected to the reset module 25, the initial reset voltage terminal vd, and the initial reset control terminal Vrst, respectively. The initial reset voltage terminal vd provides the initial reset voltage VDD. The reset module 25 is also connected to the charge generation module 21.

[0173] The initial reset module 26 is used to transmit the initial reset voltage VDD to the reset module 25 under the action of the first initial reset control signal output from the initial reset control terminal Vrst, so that the reset module 25 performs initial reset on the charge generation module 21 and the multiple charge collection modules 2a. Figure 13 The multiple charge collection modules 2a are shown as an example, including the first charge collection module 22 and the second charge collection module 23.

[0174] In some optional embodiments of this disclosure, the initial reset control terminal Vrst can be controlled by an external circuit to output a first initial reset control signal or a second initial reset control signal. The first initial reset control signal and the second initial reset control signal are control signals with opposite levels, used to control the initial reset and the end of the initial reset. The initial reset module 26 can be implemented based on a switching component, and by controlling the conduction and cutoff of the switching component, the initial reset of the charge generation module 21, the first charge collection module 22, and the second charge collection module 23 can be achieved. The initial reset can reset the voltage of the second terminal d2 of the charge generation module 21, the voltage of the second terminal c12 of the first capacitor 221 of the first charge collection module 22, and the voltage of the second terminal c22 of the second capacitor 231 of the second charge collection module 23 to the reset voltage, thereby enabling the first charge collection module 22 and the second charge collection module 23 to enter the exposure stage, and enabling the voltage Vpd of the second terminal of the charge generation module 21 to decrease from the reset voltage when either charge collection module enters the exposure stage.

[0175] This embodiment can achieve the initial reset of the charge generation module, the first charge collection module and the second charge collection module through the initial reset module, thereby enabling the pixel circuit to enter the working state and realize the first charge collection module and the second charge collection module to collect photogenerated charges alternately.

[0176] Figure 14 This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of the present disclosure.

[0177] In some optional embodiments of this disclosure, the initial reset module 26 includes a seventh switch assembly 261 and an eighth switch assembly 262.

[0178] The first terminal D71 of the seventh switch assembly 261 is connected to the initial reset control terminal Vrst, the second terminal D72 of the seventh switch assembly 261 is connected to the initial reset voltage terminal vd, and the third terminal D73 of the seventh switch assembly 261 is connected to the first terminal of the reset module 25.

[0179] The first terminal D81 of the eighth switch assembly 262 is connected to the initial reset control terminal Vrst, the second terminal D82 of the eighth switch assembly 262 is connected to the initial reset voltage terminal vd, and the third terminal D83 of the eighth switch assembly 262 is connected to the second terminal of the reset module 25.

[0180] The seventh switch assembly 261 is used to turn on under the action of the first initial reset control signal to transmit the initial reset voltage VDD to the first terminal of the reset module 25.

[0181] The eighth switch assembly 262 is used to turn on under the action of the first initial reset control signal and transmit the initial reset voltage to the second terminal of the reset module 25.

[0182] The reset module 25 is used to reset the voltage at the second terminal of the charge generation module 21 and the voltage at the second terminal of each of the multiple charge collection modules 2a (e.g., the voltage at the second terminal c12 of the first capacitor 221 in the first charge collection module 22 and the voltage at the second terminal c22 of the second capacitor 231 in the second charge collection module 23) to the reset voltage Vr under the action of the initial reset voltage VDD at the first terminal and the initial reset voltage VDD at the second terminal of the reset module 25.

[0183] In some optional embodiments of this disclosure, the seventh switch component 261 and the eighth switch component 262 can be configured according to actual needs, and the corresponding first initial reset control signal can be configured according to the switching characteristics of the seventh switch component 261 and the eighth switch component 262, so that the seventh switch component 261 can be turned on under the action of the first initial reset control signal, transmitting the initial reset voltage VDD to the first terminal of the reset module 25, and the eighth switch component 262 can be turned on under the action of the first initial reset control signal, transmitting the initial reset voltage to the second terminal of the reset module 25.

[0184] In some optional embodiments of this disclosure, the first terminal of the reset module 25 can be the output terminal to of the control signal triggering unit 251 of the reset module 25, and the second terminal of the reset module 25 can be the output terminal ro of the inverting unit 252 of the reset module 25. Thus, when the seventh switch assembly 261 and the eighth switch assembly 262 are turned on, the initial reset voltage VDD can be transmitted to to and ro. This allows the second terminal c12 of the first capacitor 221 of the first charge collection module 22 and the second terminal c22 of the second capacitor 231 of the second charge collection module 23 to be turned on by both the charge generation module 21 and the reset voltage Vr. This resets the voltage of the second terminal of the charge generation module 21, the voltage of the second terminal c12 of the first capacitor 221, and the voltage of the second terminal c22 of the second capacitor 231 to the reset voltage Vr.

[0185] In some optional embodiments of this disclosure, the seventh switch assembly 261 and the eighth switch assembly 262 are further configured to be turned off under the action of the second initial reset control signal output from the initial reset control terminal Vrst, so as to disconnect the reset module 25 from the initial reset voltage terminal vd and control one of the multiple charge collection modules (e.g., the first charge collection module 22 or the second charge collection module 23) to enter the exposure stage.

[0186] This embodiment effectively achieves the initial reset of the pixel circuit through the seventh and eighth switch components, enabling the pixel circuit to effectively enter the working state.

[0187] In some optional embodiments of this disclosure, Figure 15This is a schematic diagram of the pixel circuit of a detector provided in another exemplary embodiment of this disclosure. For a detailed description of the structure of each module, please refer to the foregoing embodiments. When the detector starts working, an initial reset is first performed, setting Vrst to the first initial reset control signal (e.g., a high-level signal), controlling the seventh switch component 261 and the eighth switch component 262 to conduct, thereby transmitting the initial reset voltage VDD to the output terminal to of the control signal trigger unit 251 and the output terminal ro of the inverting unit 252, causing the first switch component 222, the second switch component 223, the third switch component 232, the fourth switch component 233, the fifth switch component 254, and the sixth switch component 255 to conduct, thereby resetting the voltage at the second terminal c12 of the first capacitor 221, the voltage at the second terminal c22 of the second capacitor 231, and the voltage at the second terminal d2 of the charge generation module 21 to the reset voltage Vr. After the initial reset is completed, Vrst is set to the second initial reset control signal (e.g., a low-level signal), causing the seventh switch component 261 and the eighth switch component 262 to turn off. Since the pulse generation module 24 does not generate a pulse signal, the output of the control signal triggering unit 251 maintains the first initial reset control signal as the first control signal. The inverting unit 252 inverts the first control signal at the output of the control signal triggering unit 251 and outputs the fourth control signal through the output terminal ro. The first control signal controls the first switch assembly 222, the second switch assembly 223 and the sixth switch assembly 255 to be turned on, and the fourth control signal controls the third switch assembly 232, the fourth switch assembly 233 and the fifth switch assembly 254 to be turned off. This makes the second terminal c12 of the first capacitor 221 connected to the second terminal d2 of the charge generation module 21 and the pulse generation module 24, and the second terminal c12 of the first capacitor 221 disconnected from the reset voltage Vr, so that the first capacitor 221 and the charge generation module 21 form a circuit and enter the first exposure stage to collect the generated photogenerated charge. At the same time, the second terminal c22 of the second capacitor 231 is disconnected from the second terminal d2 of the charge generation module 21 and the pulse generation module 24, and the second terminal c22 of the second capacitor 231 is connected to the reset voltage Vr, so that the voltage of the second terminal c22 of the second capacitor 231 is maintained at the reset voltage Vr, that is, the second capacitor 231 enters the first reset stage.As the exposure time increases, the photogenerated charge stored in the first capacitor 221 continuously accumulates, and the voltage Vpd at the second terminal C12 of the first capacitor 221 continuously decreases from the reset voltage Vr. When the photogenerated charge stored in the first capacitor 221 reaches the charge threshold, the Vpd voltage drops to the reference threshold voltage Vth. The trigger pulse generation module 24 outputs a pulse signal to the control signal trigger unit 251. Under the action of the pulse signal, the control signal trigger unit 251 outputs the fourth control signal output by the inverting unit 252 input at the second input terminal ti2 as the second control signal. The inverting unit 252 inverts the second control signal and outputs the third control signal. The second control signal controls the first capacitor 221 to enter the second reset stage (the first reset stage of the first capacitor), and the third control signal controls the second capacitor 231 to enter the second exposure stage (the first exposure stage of the second capacitor). This alternating exposure and reset achieves continuous collection of photogenerated charge, eliminates the dead time of the reset stage, and greatly improves the time sensitivity of the detector.

[0188] In some optional examples, Figure 16 This is a schematic diagram of an exemplary embodiment of the pixel circuit of a detector provided in an exemplary embodiment of this disclosure. In the diagram, T1 represents the first switching component 222, T2 represents the second switching component 223, T3 represents the third switching component 232, T4 represents the fourth switching component 233, T5 represents the fifth switching component 254, T6 represents the sixth switching component 255, T7 represents the seventh switching component 261, and T8 represents the eighth switching component 262. Each switching component is exemplified by a MOSFET, specifically an N-channel MOSFET, which is turned on when the gate is high and turned off when the gate is low. D1 represents photodiode 211. The reference voltage connected to the first terminal of D1 is ground. The delay unit 253 uses an inverter delay chain. The comparator unit 241 uses a comparator, and the inverter unit 252 uses an inverter. In the D flip-flop, D represents the second input terminal, Q represents the output terminal, and VQ represents the output signal of the D flip-flop. A high level of VQ is the first control signal, and a low level of VQ is the second control signal. VD represents the signal output by the inverter. A low level of VD is the fourth control signal, and a high level of VD is the third control signal. The rising edge of the delayed pulse signal output by the inverter delay chain causes the Q output signal VQ to follow the D input signal VD. VS represents the signal output by the comparator, which can be a pulse signal or a level signal opposite to the pulse signal. The meanings of other symbols can be found in the foregoing. The specific working process can be found in the foregoing embodiments and will not be repeated here.

[0189] Figure 17 This is a schematic diagram illustrating simulation results of a pixel circuit 20 provided in an exemplary embodiment of this disclosure. The simulation results are based on... Figure 16The simulation results for pixel circuit 20 are shown below. Vs represents the pulse signal, the arrow indicates the pulse width, Vpd represents the voltage at the second terminal of the photodiode, VQ represents the output signal of the D flip-flop, and VD represents the output signal of the inverter. In traditional detectors, the pulse width is the reset time. During this time, the voltage at the second terminal of the photodiode is fixed at the reset voltage, resulting in a dead time. See also... Figure 17 As can be seen, in this embodiment of the present disclosure, since the first charge collection module 22 and the second charge collection module 23 alternately enter the exposure stage and the reset stage, Vpd continues to decrease within the pulse width, indicating that the photogenerated charge can be collected normally in this stage, thereby proving that the pixel circuit of the present disclosure can eliminate dead time.

[0190] Another embodiment of this disclosure provides a detector. Figure 18 This is a schematic diagram of the detector provided in an exemplary embodiment of the present disclosure. The detector includes: a pixel circuit 20 corresponding to a preset number of pixels, each corresponding to a detector provided in any of the above embodiments; and a readout circuit 30, used to control the pixel circuit of the detector corresponding to each pixel to output pulse signals.

[0191] In some optional embodiments of this disclosure, the specific structure of the pixel circuit 20 of the detector is as described in the foregoing embodiments. The pixel circuit 20 of each detector forms a pixel array, and the readout circuit can control the row and column of the pixel array to control the output pulse signal of the required pixel circuit.

[0192] In practical applications, the detector may also include other possible components, which are not limited in this disclosure.

[0193] In another embodiment of this disclosure, an apparatus is also provided, the apparatus comprising: a pixel circuit of a detector provided in any of the above embodiments, and / or a detector provided in any of the above embodiments, and / or a chip having the pixel circuit of the detector.

[0194] Specifically, the device includes at least one of the following: a pulse camera, a high-speed camera, a vision camera, an audio player, a video player, a navigation device, a fixed-position terminal, an entertainment unit, a smartphone, a communication device, a mobile device, a device in a motor vehicle, a vehicle-mounted camera, a mobile phone camera, an action or wearable camera, a traffic camera, an industrial inspection camera, a camera mounted on a flying object, a medical camera, a security camera, or a camera in a home appliance.

[0195] In this disclosure, the camera includes, but is not limited to, pulse cameras, high-speed cameras, and industrial inspection cameras. The webcam includes, but is not limited to, vehicle-mounted cameras, mobile phone cameras, traffic cameras, cameras mounted on flying objects, medical cameras, security cameras, or home appliance cameras.

[0196] Taking a pulse camera as an example, the device provided in the embodiments of this disclosure will be described in detail. Figure 19 This is a schematic diagram of the structure of a pulse camera provided in an exemplary embodiment of this disclosure. Figure 19 As shown, the pulse camera includes: a lens 1201, a pulse signal circuit 1202, a data processing circuit 1203, a non-volatile memory 1204, a power supply circuit 1205, a volatile memory 1206, a control circuit 1207, and an I / O interface 1208.

[0197] Lens 1201 is used to receive incident light, i.e., light signals, from the subject.

[0198] The pulse signal circuit 1202 is used to convert the optical signal received through the lens 1201 into an electrical signal and generate a pulse signal based on the electrical signal. This pulse signal circuit 1202 may include, for example, the pixel circuit of the detector described above, and / or the detector described above, and / or a chip having the pixel circuit of the detector described above.

[0199] The data processing circuit 1203 is used to control the pulse signal readout process. The data processing circuit 1203 includes, for example, an arithmetic processing unit (e.g., CPU) and / or an image processing unit (GPU). For example, it controls the pulse signal readout process of the pulse signal readout circuit, controls the readout row selector therein to send a row readout signal, and resets the row selector to send a column reset signal, etc.

[0200] 1206 represents volatile memory, such as random access memory (RAM), while 1204 represents non-volatile memory devices, such as solid-state drives (SSDs), hybrid hard drives (HHDs), secure digital cards (SD cards), and mini SD cards.

[0201] In one embodiment of this disclosure, the pulse camera further includes a display unit for real-time / playback display of pulse signals / image information. The pulse camera of this embodiment may also further include at least one of the following: a wired / wireless transmission interface, such as a WiFi interface, Bluetooth interface, USB interface, RJ45 interface, Mobile Industry Processor Interface (MIPI) interface, Low Voltage Differential Signaling (LVDS) interface, and other interfaces with wired or wireless transmission capabilities.

[0202] The pulse camera provided in this disclosure can be used to detect visible light, infrared light, ultraviolet light, X-rays, etc., and can be applied to various scenarios, including but not limited to:

[0203] It can be used as an in-vehicle camera installed in various vehicles or facilities, such as for information acquisition and control in vehicle-to-infrastructure (V2I) communication, intelligent transportation, and autonomous driving. For example, it can be installed in high-speed rail and other rail transit vehicles or on rail transit lines as a high-speed rail driving recorder; it can also be installed in autonomous vehicles or vehicles equipped with advanced driver assistance systems (ADAS), such as for detecting and alarming information on vehicles, pedestrians, lanes, and drivers.

[0204] It can be used as a traffic camera installed on traffic signal poles to capture, warn, and coordinate the control of vehicles and pedestrians on urban roads and highways.

[0205] It can be used as an industrial inspection camera, such as being installed on high-speed rail lines for high-speed rail inspection and for high-speed rail safety inspection; it can also be used for specific industrial scenarios such as coal mine conveyor belt breakage detection, substation arc detection, real-time detection of wind turbine blades, and high-speed turbine non-stop inspection for detection and early warning.

[0206] Installed on flyable objects, such as airplanes and satellites, for high-definition imaging of objects in high-speed flight or even high-speed rotation scenarios.

[0207] Industrial applications (machine vision in intelligent manufacturing, etc.), civilian applications (judicial evidence collection, sports refereeing, etc.), and consumer electronics (cameras, film and television media, etc.).

[0208] It can be used as a medical camera to provide high-definition medical imaging in clinical diagnosis and treatment, such as medical care, beauty, and health care.

[0209] It can be used as an action camera or a wearable camera, such as a head-mounted camera or a camera embedded in a wristwatch, to capture various scenes such as sports competitions and daily leisure activities.

[0210] It can also be used as a security camera, mobile phone camera, or home appliance camera, etc.

[0211] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in the order specified in the different figures. For example, two blocks shown connectedly may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0212] In addition to the methods and apparatus described above, embodiments of this disclosure may also be computer program products comprising computer program instructions that, when executed by a processor, cause the processor to perform steps of the desired functionality described in the foregoing portions of this specification according to various embodiments of this disclosure.

[0213] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of this disclosure. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on a user's computing device, partially on a user's computing device, as a standalone software package, partially on a user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0214] Furthermore, embodiments of this disclosure may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps of the desired function described in the foregoing portion of this specification according to embodiments of this disclosure.

[0215] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0216] Those skilled in the art will understand that all or part of the steps to achieve the desired function described above can be accomplished by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps including the desired function described above. The aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disk, or optical disk.

[0217] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.

[0218] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0219] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0220] The methods and apparatus of this disclosure may be implemented in many ways. For example, the circuits and desired functions of this disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the desired functions is for illustrative purposes only, and the steps of the desired functions of this disclosure are not limited to the order specifically described above, unless otherwise specifically stated. Furthermore, in some embodiments, this disclosure may also be implemented as a program recorded on a recording medium, the program including machine-readable instructions for implementing the desired functions according to this disclosure. Thus, this disclosure also covers recording media storing programs for performing the methods according to this disclosure.

[0221] It should also be noted that in the apparatus, devices, and methods of this disclosure, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions to this disclosure.

[0222] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0223] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A pixel circuit for a detector, characterized in that, include: The charge generation module is used to convert optical signals into photogenerated charges; Multiple charge collection modules are connected to the charge generation module; A pulse generation module is connected to the plurality of charge collection modules; The reset module is connected to the pulse generation module and the plurality of charge collection modules, respectively. The plurality of charge collection modules are used to alternately store the photogenerated charge generated by the charge generation module under the control of the reset module, and output a first voltage to the pulse generation module according to the stored photogenerated charge, wherein the first voltage varies with the exposure time; The pulse generation module is used to output a pulse signal in response to the first voltage meeting a preset condition; The reset module is used to control the multiple charge collection modules to alternately store photogenerated charges under the action of the pulse signal; Each of the charge collection modules includes: A capacitor is connected to the charge generation module; The switching assembly is connected to the reset module, the charge generation module, the pulse generation module, and the capacitor, respectively. The switching assembly is used to control the capacitor and the capacitors of other charge collection modules to alternately store photogenerated charges under the control of the reset module, so that the capacitor outputs the first voltage to the pulse generation module according to the stored photogenerated charges; The plurality of charge collection modules include a first charge collection module and a second charge collection module; The first charge collection module and the second charge collection module are used to alternately store the photogenerated charge generated by the charge generation module under the control of the reset module, and output a first voltage to the pulse generation module according to the stored photogenerated charge.

2. The pixel circuit according to claim 1, characterized in that, The first charge collection module includes: A first capacitor, the first terminal of which is connected to the first terminal of the charge generation module; the first terminal of the charge generation module is connected to a reference voltage; A first switching assembly, wherein a first end of the first switching assembly is connected to the reset module, a second end of the first switching assembly is connected to the second end of the charge generation module, and a third end of the first switching assembly is connected to the second end of the first capacitor; The second switching assembly has a first terminal connected to the reset module, a second terminal connected to the pulse generation module, and a third terminal connected to the second terminal of the first capacitor. The first switching component is used to turn on under the action of the first control signal output by the reset module, so that the second terminal of the first capacitor is connected to the second terminal of the charge generation module; The second switching component is used to turn on under the action of the first control signal, so that the second terminal of the first capacitor is connected to the pulse generation module; The first capacitor is used to store the photogenerated charge generated by the charge generation module when the first switching component and the second switching component are turned on, and to output the first voltage to the pulse generation module through the second terminal of the first capacitor according to the stored photogenerated charge.

3. The pixel circuit according to claim 2, characterized in that, The second terminal of the first capacitor is also connected to the reset module; The first switching assembly is also used to turn off under the action of the second control signal output by the reset module, so that the second terminal of the first capacitor is disconnected from the second terminal of the charge generation module; The second switching assembly is also used to turn off under the action of the second control signal, so as to disconnect the second terminal of the first capacitor from the pulse generating module; The first capacitor is also used so that, when the first switching assembly and the second switching assembly are turned off, the voltage at the second terminal of the first capacitor is reset to the reset voltage by the reset module.

4. The pixel circuit according to claim 1, characterized in that, The second charge collection module includes: The second capacitor has its first terminal connected to the first terminal of the charge generation module, and the first terminal of the charge generation module is connected to a reference voltage. A third switching assembly, wherein a first end of the third switching assembly is connected to the reset module, a second end of the third switching assembly is connected to the second end of the charge generation module, and a third end of the third switching assembly is connected to the second end of the second capacitor; A fourth switching assembly, wherein a first terminal of the fourth switching assembly is connected to the reset module, a second terminal of the fourth switching assembly is connected to the pulse generating module, and a third terminal of the fourth switching assembly is connected to the second terminal of the second capacitor; The third switch assembly is used to be turned on under the action of the third control signal output by the reset module, so that the second terminal of the second capacitor is connected to the second terminal of the charge generation module. The fourth switch assembly is used to be turned on under the action of the third control signal, so that the second terminal of the second capacitor is connected to the pulse generation module. The second capacitor is used to store the photogenerated charge generated by the charge generation module when the third switch assembly and the fourth switch assembly are turned on, and to output the first voltage to the pulse generation module through the second terminal of the second capacitor according to the stored photogenerated charge; The second terminal of the second capacitor is also connected to the reset module, and the third switch assembly is also used to turn off under the action of the fourth control signal output by the reset module, so that the second terminal of the second capacitor is disconnected from the second terminal of the charge generation module; The fourth switching component is also used to turn off under the action of the fourth control signal, so as to disconnect the second terminal of the second capacitor from the pulse generation module; The second capacitor is also used so that, when the third and fourth switching components are turned off, the voltage at the second terminal of the second capacitor is reset to the reset voltage by the reset module.

5. The pixel circuit according to claim 1, characterized in that, The reset module includes: A control signal triggering unit, wherein the first input terminal of the control signal triggering unit is connected to the output terminal of the pulse generation module, and the output terminal of the control signal triggering unit is connected to the first charge collection module; An inverting unit, wherein the input terminal of the inverting unit is connected to the output terminal of the control signal triggering unit, and the output terminal of the inverting unit is connected to the second input terminal of the control signal triggering unit and the second charge collection module, respectively; The control signal triggering unit is used to take the input signal at the second input terminal as a control signal and output it through the output terminal under the action of the pulse signal. The control signal includes either a first control signal or a second control signal. The first control signal is used to control the first charge collection module to store photogenerated charge, and the second control signal is used to control the first charge collection module to reset. The inverting unit is used to invert the control signal output by the control signal triggering unit and output an inverted control signal. The inverted control signal corresponding to the first control signal is used as the fourth control signal, and the inverted control signal corresponding to the second control signal is used as the third control signal. The fourth control signal is used to control the second charge collection module to reset, and the third control signal is used to control the second charge collection module to store photogenerated charge.

6. The pixel circuit according to claim 5, characterized in that, The reset module further includes: A delay unit, wherein the input terminal of the delay unit is connected to the output terminal of the pulse generation module, and the output terminal of the delay unit is connected to the first input terminal of the control signal triggering unit; The delay unit is used to delay the pulse signal by a preset time and output the delayed pulse signal to the control signal triggering unit. The control signal triggering unit is used to take the input signal at the second input terminal as a control signal and output it through the output terminal under the action of the delayed pulse signal.

7. The pixel circuit according to claim 5, characterized in that, The reset module further includes: The fifth switching assembly has a first terminal connected to the output terminal of the inverting unit, a second terminal connected to a reset voltage, and a third terminal connected to the first charge collection module. The sixth switch assembly has a first terminal connected to the output terminal of the control signal triggering unit, a second terminal connected to the reset voltage, and a third terminal connected to the second charge collection module. The fifth switch assembly is used to be turned on under the action of the third control signal to transmit the reset voltage to the first charge collection module and reset the photogenerated charge stored in the first charge collection module; The sixth switch assembly is used to turn off under the action of the second control signal to disconnect the second charge collection module from the reset voltage, so that the second charge collection module can store the generated photogenerated charge when the first charge collection module is in the reset phase. The sixth switch assembly is also used to be turned on under the action of the first control signal to transmit the reset voltage to the second charge collection module and reset the photogenerated charge stored in the second charge collection module; The fifth switching component is also used to turn off under the action of the fourth control signal to disconnect the first charge collection module from the reset voltage, so that the first charge collection module can store the generated photogenerated charge when the second charge collection module is in the reset phase.

8. The pixel circuit according to claim 5, characterized in that, The control signal triggering unit includes: A D flip-flop, wherein the first input terminal of the D flip-flop is connected to the output terminal of the pulse generation module, the second input terminal of the D flip-flop is connected to the output terminal of the inverting unit, and the output terminal of the D flip-flop is connected to the first charge collection module; The D flip-flop is used to take the input signal at the second input terminal as a control signal and output it through the output terminal of the D flip-flop under the action of the pulse signal.

9. The pixel circuit according to claim 1, wherein, The charge generation module includes a photodiode, the first terminal of which is connected to a reference voltage, and the photodiode is used to convert optical signals into photogenerated charges. The pulse generation module includes: a comparison unit, the first input terminal of the comparison unit being connected to the plurality of charge collection modules respectively, the second input terminal of the comparison unit being connected to a reference threshold voltage, and the output terminal of the comparison unit being connected to the reset module; The comparison unit is used to compare the first voltage with the reference threshold voltage, and in response to the first voltage being less than or equal to the reference threshold voltage, outputs the pulse signal through the output terminal of the comparison unit.

10. The pixel circuit according to any one of claims 1-9, characterized in that, Also includes: An initial reset module is connected to the reset module, an initial reset voltage terminal, and an initial reset control terminal, respectively, with the initial reset voltage terminal providing the initial reset voltage; the reset module is also connected to the charge generation module. The initial reset module is used to transmit the initial reset voltage to the reset module under the action of the first initial reset control signal output by the initial reset control terminal, so that the reset module performs an initial reset on the charge generation module and the plurality of charge collection modules.

11. The pixel circuit according to claim 10, characterized in that, The initial reset module includes: A seventh switch assembly, wherein a first terminal of the seventh switch assembly is connected to the initial reset control terminal, a second terminal of the seventh switch assembly is connected to the initial reset voltage terminal, and a third terminal of the seventh switch assembly is connected to the first terminal of the reset module; The eighth switch assembly has a first terminal connected to the initial reset control terminal, a second terminal connected to the initial reset voltage terminal, and a third terminal connected to the second terminal of the reset module. The seventh switch assembly is used to be turned on under the action of the first initial reset control signal, and to transmit the initial reset voltage to the first terminal of the reset module; The eighth switch assembly is used to be turned on under the action of the first initial reset control signal, and to transmit the initial reset voltage to the second terminal of the reset module; The reset module is used to reset the voltage at the second terminal of the charge generation module and the voltage at the second terminal of the capacitor in each charge collection module to the reset voltage under the action of the initial reset voltage at the first terminal and the initial reset voltage at the second terminal of the reset module. The seventh and eighth switch components are also used to turn off under the action of the second initial reset control signal output from the initial reset control terminal, so as to disconnect the reset module from the initial reset voltage terminal and control one of the multiple charge collection modules to enter the exposure stage.

12. A detector, characterized in that, include: The preset number of pixels correspond to the pixel circuits of the detector as described in any one of claims 1-11; The readout circuit is used to control the pixel circuit of the detector corresponding to each pixel to output the pulse signal.

13. A device, characterized in that, The device includes: the pixel circuit of the detector according to any one of claims 1-11, and / or the detector according to claim 12.

Images