A welding method, device, electronic equipment and intelligent power module
By dividing the solder into multiple layers and gradually heating, pressing, and cooling to solidify, the problem of void formation in the solder is solved, thus improving the reliability and welding quality of the intelligent power module.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- EDGELESS SEMICON CO LTD OF ZHUHAI
- Filing Date
- 2023-09-05
- Publication Date
- 2026-07-24
AI Technical Summary
In the process of producing smart power modules using stacked packaging technology, it is difficult for air and moisture in the solder between the chip and the substrate to evaporate, leading to the formation of voids, which affects the reliability of the module, causes temperature rise, and increases the probability of failure.
The solder is divided into multiple solder layers, which are gradually heated, pressed, and cooled to solidify onto the chip mounting position. This increases the contact area between the solder and the inert gas, removes air and moisture, and improves the reliability of the soldering process.
Reduce void ratio in solder layer, improve reliability of soldered chip substrate, enhance signal and heat transfer performance, and reduce issues such as poor soldering and chip detachment.
Smart Images
Figure CN117253803B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of chip packaging technology, specifically relating to a welding method, apparatus, electronic device, and intelligent power module. Background Technology
[0002] As a core component in electronic products, the reliability of the intelligent power module (IPM) is a key factor determining the safe operation of the entire electronic device.
[0003] Currently, multilayer packaging technology is commonly used to produce smart power modules, thereby increasing the packaging density and operating speed of smart power modules.
[0004] However, during the production of smart power modules using stacked packaging technology, air and moisture in the solder between the chip and the substrate are difficult to evaporate, easily forming numerous voids within the solder. During operation, heat tends to accumulate between the chip and the substrate, causing the overall temperature of the smart power module to rise. Higher operating temperatures increase the probability of failure, resulting in lower reliability for smart power modules produced using stacked packaging technology.
[0005] Application content
[0006] The purpose of this application is to provide a welding method, apparatus, electronic device, and intelligent power module that can solve the problem of poor reliability of intelligent power modules produced by lamination technology in related technologies.
[0007] In a first aspect, embodiments of this application provide a welding method, the method comprising:
[0008] Determine the total amount of solder required for the chip to be soldered and the chip's mounting position on the substrate;
[0009] According to the preset rules and the total amount of solder, determine the number of solder layers and the amount of solder corresponding to each solder layer;
[0010] According to the solder amount, the solder corresponding to the i-th solder layer is heated and pressed onto the patch position. After the solder cools down and solidifies, the i-th solder layer is obtained. Then, the solder corresponding to the i+1 solder layers is heated and pressed onto the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1, where N is the number of solder layers.
[0011] According to the solder amount, the solder corresponding to the Nth solder layer is heated and pressed to the mounting position, and the chip to be soldered is mounted on the upper surface of the solder corresponding to the Nth solder layer;
[0012] According to the preset curing rules, the solder corresponding to the Nth solder layer is cooled and cured to obtain a substrate with the chip to be soldered.
[0013] Optionally, the step of heating and pressing the solder corresponding to the i-th solder layer onto the patch position according to the solder amount, and obtaining the i-th solder layer after the solder cools and solidifies, includes:
[0014] Based on the amount of solder corresponding to the i-th solder layer, the solder corresponding to the i-th solder layer is heated to a first temperature value according to a preset heating rate; the first temperature value is located in a first temperature range, which is 250°C to 260°C.
[0015] Solder heated to a first temperature value is applied to the patch position, and the solder is then pressed.
[0016] According to the preset curing rules, the pressed solder is cooled and cured to obtain the i-th solder layer.
[0017] Optionally, the pressing pressure of the pressing process is 0.4 MPa to 0.6 MPa, and the pressing time is 100 s to 120 s.
[0018] Optionally, attaching the chip to be soldered to the upper surface of the solder corresponding to the Nth solder layer includes:
[0019] The solder corresponding to the Nth solder layer is heated to a second temperature value, and the solder is kept at the second temperature value for a first duration; the second temperature value is located in a second temperature range, which is 260°C to 267°C; the first duration is 30s to 40s.
[0020] The chip to be soldered is placed on the upper surface of the solder corresponding to the Nth solder layer;
[0021] A target pressure value is applied to the chip to be soldered on the upper surface of the solder, resulting in a chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer.
[0022] Optionally, the target pressure value is 2.8g to 3.5g.
[0023] Optionally, the preset curing rules include:
[0024] According to the first cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced to a third temperature value, and the solder is kept at the third temperature value for a second duration; the third temperature value is located in a third temperature range, and the second duration is 5s to 8s.
[0025] According to the second cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced from the third temperature value to the fourth temperature value; the fourth temperature value is located in the fourth temperature range.
[0026] Wherein, the maximum temperature value in the fourth temperature range is less than the minimum temperature value in the third temperature range; and the first cooling rate is less than the second cooling rate.
[0027] Optionally, the first cooling rate is from 2.2℃ / s to 2.8℃ / s.
[0028] Optionally, the total duration of the cooling and curing process is 95s to 110s.
[0029] Optionally, the number of solder layers is greater than 2 and less than 6.
[0030] Secondly, embodiments of this application provide a welding apparatus, the apparatus comprising:
[0031] The first determining module is used to determine the total amount of solder used for the chip to be soldered and the chip placement position on the substrate.
[0032] The second determining module is used to determine the number of solder layers and the amount of solder corresponding to each solder layer according to preset rules and the total amount of solder used;
[0033] The soldering module is used to heat and press the solder corresponding to the i-th solder layer onto the patch position according to the solder amount. After the solder cools down and solidifies, the i-th solder layer is obtained. Then, the solder corresponding to the i+1 solder layers is heated and pressed onto the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1, where N is the number of solder layers.
[0034] The chip mounting module is used to heat and press the solder corresponding to the Nth solder layer to the mounting position according to the solder amount, and to mount the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer;
[0035] The curing module is used to cool and cure the solder corresponding to the Nth solder layer according to a preset curing rule, so as to obtain a substrate with the chip to be welded.
[0036] Thirdly, embodiments of this application provide an electronic device including the welding apparatus described above, for implementing the welding method as described in any of the preceding claims.
[0037] Fourthly, embodiments of this application provide an intelligent power module, including a substrate with a chip to be soldered obtained by the soldering method described above.
[0038] In this embodiment, a soldering method is provided, comprising: determining the total amount of solder corresponding to the chip to be soldered and the placement position of the chip to be soldered on the substrate; and determining the number of solder layers and the amount of solder corresponding to each solder layer according to a preset rule and the total amount of solder; heating and pressing the solder corresponding to the i-th solder layer to the placement position according to the amount of solder, and after the solder cools down and solidifies, obtaining the i-th solder layer; then heating and pressing the solder corresponding to the i+1 solder layers to the placement position until obtaining the N-1 solder layer; and heating and pressing the solder corresponding to the N-th solder layer to the placement position according to the amount of solder, and placing the chip to be soldered onto the upper surface of the solder corresponding to the N-th solder layer; and finally cooling and solidifying the solder corresponding to the N-th solder layer according to a preset solidification rule to obtain a substrate with the chip to be soldered. In this embodiment, the solder layer corresponding to the chip to be soldered is divided into multiple solder layers, which are then heated, pressed, and cooled to solidify at the chip mounting position on the substrate. This facilitates the removal of air and moisture from the solder, thereby reducing the probability of voids in the solder layer and improving the reliability of the substrate with the chip to be soldered. Attached Figure Description
[0039] Figure 1 This is a flowchart illustrating the steps of a welding method provided in an embodiment of this application;
[0040] Figure 2 This is a schematic diagram of the structure of a substrate for welding chips according to an embodiment of this application;
[0041] Figure 3 This is a flowchart comparing an existing welding method provided in an embodiment of this application with the welding method provided in an embodiment of this application;
[0042] Figure 4 These are X-ray scan images of the solder layers obtained by existing soldering methods and the soldering method provided in this application embodiment under the same chip and soldering method;
[0043] Figure 5 This is a logic block diagram of a welding apparatus provided in an embodiment of this application;
[0044] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0045] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.
[0046] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0047] Method Implementation Examples
[0048] The welding method provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.
[0049] Reference Figure 1 , Figure 1 A flowchart illustrating the steps of a welding method provided in an embodiment of this application is shown, as follows: Figure 1 As shown, the method specifically includes steps 110 and 150:
[0050] Step 110: Determine the total amount of solder required for the chip to be soldered and the chip's mounting position on the substrate.
[0051] Step 120: Determine the number of solder layers and the amount of solder corresponding to each solder layer according to the preset rules and the total amount of solder used.
[0052] Step 130: According to the solder amount, heat and press the solder corresponding to the i-th solder layer to the patch position. After the solder cools down and solidifies, the i-th solder layer is obtained. Then heat and press the solder corresponding to the i+1 solder layers to the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1. N is the number of solder layers.
[0053] Step 140: According to the solder amount, heat and press the solder corresponding to the Nth solder layer to the mounting position, and mount the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer.
[0054] Step 150: Cool and cure the solder corresponding to the Nth solder layer according to the preset curing rules to obtain a substrate with the chip to be welded.
[0055] The soldering method provided in this application embodiment can be applied to a pick-and-place machine, which is a device used to achieve high-speed, high-precision, fully automatic placement of components. During the execution of the soldering method provided in this application embodiment, the working environment of the pick-and-place machine is an inert gas environment.
[0056] Specifically, before executing the welding method provided in the embodiments of this application, the pick-and-place machine first performs a vacuuming operation. When the vacuum level of the working environment reaches 0.1 Pa to 0.001 Pa, the vacuum level of the working environment is maintained at a high vacuum level of 0.1 Pa to 0.001 Pa for a preset time to expel the air in the working environment. Then, high-purity (above 75%) inert gas is injected into the high vacuum working environment to further expel the low-concentration air in the working environment. Finally, the welding method provided in the embodiments of this application is executed when the pressure value of the working environment is maintained at 5 Pa to 10 Pa.
[0057] The total solder usage refers to the amount of solder required to solder the chip to the mounting position on the substrate. The amount of solder required will vary depending on the size of the chip. For example, if the chip size is 4500μm × 4500μm × 70μm, the mounting position on the substrate can be 4500μm × 4500μm, and the corresponding solder layer size can be 4500μm × 4500μm × 60μm. Therefore, the volume of solder corresponding to the solder layer can be determined to be 4500μm × 4500μm × 60μm.
[0058] In this embodiment, the pick-and-place machine can determine the total amount of solder required for the chip to be soldered by calculating the chip size entered by the operator. Alternatively, the operator can directly enter the total amount of solder required for the chip to be soldered into the pick-and-place machine, which will then determine the total amount of solder required for the chip. Furthermore, the operator can also enter the chip type into the pick-and-place machine, which can then determine the placement position of the chip on the substrate based on the chip type and size. Alternatively, the operator can enter a placement map of the substrate, which includes the chip type and size corresponding to each placement position on the substrate. The pick-and-place machine can then determine the placement position of the chip on the substrate based on the placement map. This embodiment does not impose specific limitations on these methods.
[0059] The preset rule can be a rule for dividing the number of solder layers corresponding to the chip to be soldered. The preset rule is used to indicate the number of solder layers. In the embodiments of this application, the preset rule corresponding to the application scenario can be determined according to the application scenario of the chip to be soldered. For example, when the application scenario of the chip to be soldered is small household appliances and general electrical equipment, since the requirements for the solder layer void rate are relatively low for small household appliances and general electrical equipment, it is generally required that the solder layer void rate be less than 5%. In this case, the preset rule can be to divide the solder layer corresponding to the chip to be soldered into 3 layers. When the application scenario of the chip to be soldered is rail transit equipment or aerospace equipment, since the requirements for the solder layer void rate are relatively high for rail transit equipment or aerospace equipment, it is generally required that the solder layer void rate be less than 0.1%. In this case, the preset rule can be to divide the solder layer corresponding to the chip to be soldered into 5 layers.
[0060] In this embodiment of the application, the pick-and-place machine can determine the number of solder layers according to the division rules of the number of solder layers indicated by the preset rules; and after determining the number of solder layers, the ratio between the total amount of solder used in step 110 and the number of solder layers is determined as the amount of solder used for each solder layer.
[0061] Understandably, after determining the number of solder layers, the pick-and-place machine needs to sequentially solder the total amount of solder corresponding to the total number of solder layers to the placement positions using the same number of soldering passes. During the process of heating and pressing the solder corresponding to each solder layer to the placement position and then cooling and curing it, the upper and side surfaces of the solder layers are directly exposed to the pick-and-place machine's working environment. When the number of solder layers is relatively large, the upper surface of the solder is exposed to the working environment during the heating, pressing, and cooling curing process for each layer. This increases the contact area between the solder corresponding to the chip being soldered and the inert gas in the working environment. This facilitates the expulsion of air and moisture from the solder through the compression effect of the inert gas, thereby reducing the probability of voids in the solder layers. Therefore, when the number of solder layers is relatively large, the void rate in the solder layers is relatively low; similarly, when the number of solder layers is relatively small, the void rate in the solder layers is relatively high.
[0062] For example, when the total solder usage is 4500×4500×60um 3 Furthermore, when there are four solder layers, during the process of sequentially heating and pressing the solder corresponding to the four solder layers onto the placement position and then cooling and curing the solder, the upper surfaces of a total of four solder layers are directly exposed to the working environment of the placement machine. The area of the upper surface of the solder layers directly exposed to the working environment is 4500×4500×4=81000000um. 3With 6 solder layers, during the process of sequentially heating and pressing the solder corresponding to the 6 solder layers onto the placement position and then cooling and curing the solder, the upper surfaces of a total of 6 solder layers are directly exposed to the working environment of the placement machine. The area of the upper surface of the solder layers directly exposed to the working environment is 4500 × 4500 × 6 = 121,500,000 μm. 3 With the same amount of solder and placement position, the number of solder layers (6 layers) increases the surface area of the solder layer directly exposed to the placement machine's working environment by (121500000-81000000) / 121500000 = 50% compared to the number of solder layers (4 layers). With the increased exposure area, the probability of air and moisture escaping from the solder increases, thereby reducing the probability of voids forming in the solder layer.
[0063] In this embodiment of the application, when the number of solder layers is N, the pick-and-place machine can sequentially solder the solder corresponding to the first N-1 solder layers to the placement position according to the method described in step 130.
[0064] Specifically, the pick-and-place machine can heat and press the solder corresponding to the first solder layer onto the placement position on the substrate according to the amount of solder used. After the solder corresponding to the first solder layer cools down and solidifies, the first solder layer is obtained; wherein, the first solder layer is located on the upper surface of the substrate.
[0065] Next, the solder corresponding to the second solder layer is heated and pressed onto the upper surface of the first solder layer. After the solder corresponding to the second solder layer cools down and solidifies, the second solder layer is obtained; wherein, the second solder layer is located on the upper surface of the first solder layer.
[0066] Next, the solder corresponding to the third solder layer is heated and pressed onto the upper surface of the second solder layer. After the solder corresponding to the third solder layer cools and solidifies, the third solder layer is obtained; the third solder layer is located on the upper surface of the second solder layer. In this way, the pick-and-place machine can sequentially stack and solder the first to the (N-1)th solder layers to the placement position according to the number of solder layers and the amount of solder used, thus obtaining the first to (N-1)th solder layers.
[0067] It should be noted that the number of solder layers N is an integer greater than 2. In the actual soldering process, the number of solder layers can be determined by defining preset rules according to the application scenario of the chip to be soldered. This application embodiment does not impose specific limitations on this.
[0068] In this embodiment of the application, after obtaining the N-1th solder layer through step 130, the pick-and-place machine can heat and press the solder of the Nth solder layer, which is the last solder layer corresponding to the chip to be soldered, to the placement position according to the amount of solder used, and place the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer; finally, the solder corresponding to the Nth solder layer is cooled and cured according to the preset curing rules to obtain a substrate with the chip to be soldered.
[0069] It should be noted that the operation of attaching the chip to be soldered to the upper surface of the solder corresponding to the Nth solder layer should be performed after the solder corresponding to the Nth solder layer is heated and pressed into the placement position, and before the solder corresponding to the Nth solder layer is cooled and cured according to the preset curing rules. This is to improve the bonding strength between the chip to be soldered and the Nth solder layer and prevent the occurrence of problems such as cold solder joints or chip falling off.
[0070] The preset curing rule is the execution rule for the cooling and curing operation of the solder. The preset curing rule can be in the form of a cooling curve or cooling parameters, and this application embodiment does not specifically limit it. Among them, the cooling parameters may include, but are not limited to, cooling rate, target cooling temperature, cooling duration, etc.
[0071] During step 150, the pick-and-place machine can perform cooling and curing operations according to the cooling rate, target cooling temperature, and cooling time indicated by the preset curing rules. For example, if the preset curing rules indicate a cooling rate of 3°C / s, a target cooling temperature of 25°C, and a cooling time of 100s, the pick-and-place machine can reduce the temperature of the solder layer to 25°C within 100s at a cooling rate of 3°C / s during step 150.
[0072] It should be noted that the pick-and-place machine can also cool and cure the solder corresponding to the 1st to N-1th solder layers according to the same preset curing rules as the Nth solder layer. Specifically, the method of heating and pressing the solder corresponding to the 1st or Nth solder layer to the placement position can be as follows: first, the solder is heated and softened and applied to the placement position, and then the solder applied to the placement position is pressed to obtain a solder of a preset shape. Alternatively, the method of heating and pressing the solder corresponding to the 1st or Nth solder layer to the placement position can also be as follows: after heating and softening the solder, it is directly pressed to the placement position according to a preset shape. This application does not specifically limit this method.
[0073] Furthermore, the substrate in this embodiment is a direct-bonding copper (DBC) structure substrate. (See also...) Figure 2 , Figure 2This illustration shows a schematic diagram of a substrate with a chip to be soldered, according to an embodiment of this application. In the working environment of a pick-and-place machine, the chip 10 to be soldered is soldered to the upper surface of the substrate 30 through the solder layer 20.
[0074] The substrate 30 includes an upper substrate 301, an insulating layer 302, and a heat sink 303. The upper surface of the upper substrate 301 is connected to the lower surface of the solder layer 20, and the insulating layer 302 is located between the upper substrate 301 and the heat sink 303. The solder layer 20 is composed of a first solder layer to an Nth solder layer. The lower surface of the first solder layer is connected to the upper surface of the upper substrate 301, and the upper surface of the Nth solder layer is connected to the lower surface of the chip 10 to be soldered.
[0075] As an example, refer to Figure 3 , Figure 3 A flowchart comparing a conventional soldering method provided in this application with the soldering method provided in this application is shown. In the conventional soldering method, the pick-and-place machine first heats and presses all the solder corresponding to the chip to be soldered onto the upper surface of the DBC structure substrate in one go; then, the chip to be soldered is placed onto the upper surface of the solder and cooled and cured to obtain a substrate with the chip to be soldered. In this method, all the solder corresponding to the chip to be soldered is heated and pressed onto the upper surface of the substrate in one go. During the process of heating and pressing the solder to the placement position and cooling and curing the solder, only the upper surface and sides of the solder are directly exposed to the working environment. The area for air and moisture in the solder to escape is limited, resulting in a large number of unexpelled air and moisture forming voids in the solder layer after the solder has cured. This leads to poor heat transfer and signal transmission performance of the solder layer, resulting in poor reliability of the smart power module obtained by this soldering method.
[0076] In the welding method provided in this application embodiment, the total amount of solder used for the chip to be welded is the same as the total amount of solder used for the chip to be welded in existing welding methods. However, the welding method provided in this application embodiment has four solder layers, and the amount of solder used for each solder layer is 1 / 4 of the total amount of solder. Compared with existing welding methods, the welding method provided in this application embodiment, during the process of heating and pressing the solder to the chip position and cooling and curing the solder, increases the number of upper surfaces of three solder layers directly exposed to the working environment. This allows more air and moisture in the solder to be discharged into the working environment. Therefore, the void ratio in the solder layers obtained by the welding method provided in this application embodiment is lower than that of existing welding methods, thereby improving the reliability of the intelligent functional power module.
[0077] Optionally, step 130, which involves heating and pressing the solder corresponding to the i-th solder layer onto the patch position according to the solder amount, and obtaining the i-th solder layer after the solder cools and solidifies, includes:
[0078] Step 1301: Based on the amount of solder corresponding to the i-th solder layer, heat the solder corresponding to the i-th solder layer to the first temperature value according to the preset heating rate.
[0079] The first temperature value is located in a first temperature range, which is 250°C to 260°C.
[0080] Step 1302: Apply solder heated to the first temperature value to the patch position and press the solder.
[0081] Step 1303: According to the preset curing rules, the pressed solder is cooled and cured to obtain the i-th solder layer.
[0082] In this embodiment, during the process of heating and pressing the solder corresponding to the i-th solder layer onto the placement position according to the solder amount, and obtaining the i-th solder layer after the solder cools down and solidifies, the pick-and-place machine can first heat the solder corresponding to the i-th solder layer to a first temperature value according to a preset heating rate; then apply the solder heated to the first temperature value to the placement position, and press the solder applied to the placement position to obtain a solder of a preset shape; finally, according to a preset curing rule, cool down and solidify the pressed solder to obtain the i-th solder layer.
[0083] It should be noted that the preset heating rate can be 2℃ / s. The first temperature value can be any temperature value within the first temperature range of 250℃ to 260℃. This ensures that the solder heated to the first temperature value has appropriate fluidity, facilitating the placement machine to apply the solder to the placement position in step 1302. Simultaneously, it ensures that the solder has a certain degree of plasticity, allowing the placement machine to press the solder into a preset shape in step 1302, thereby improving the adhesion between the solder and the substrate and the chip to be soldered.
[0084] In this embodiment of the application, during the execution of step 140, the pick-and-place machine may also heat and press the solder corresponding to the Nth solder layer onto the placement position in the same or similar manner as steps 1301 to 1302.
[0085] Optionally, the pressing pressure of the pressing process is 0.4 MPa to 0.6 MPa, and the pressing time is 100 s to 120 s.
[0086] In this embodiment of the application, the pressing pressure of the chip mounter in step 1302 for pressing the solder can be maintained at 0.4MPa to 0.6MPa, and the pressing time can be maintained at 100s to 120s, so that the pressed solder has good formability.
[0087] If the pressing pressure is too low, the upper surface of the solder will be smaller than the lower surface of the chip to be soldered. This means that when the chip is placed onto the upper surface of the solder, the edges of the chip will not receive solder, which can easily lead to poor soldering or chip removal. If the pressing pressure is too high, a large amount of solder may overflow, resulting in an excessively thin solder layer. Consequently, the thickness of the solder layer after cooling and curing will not meet the requirements, causing abnormal signal transmission performance of the chip to be soldered onto the substrate.
[0088] Optionally, step 140, which involves attaching the chip to be soldered to the upper surface of the solder corresponding to the Nth solder layer, includes:
[0089] Step 1401: Heat the solder corresponding to the Nth solder layer to a second temperature value, and keep the solder at the second temperature value for a first time.
[0090] The second temperature value is located in the second temperature range, which is 260°C to 267°C; the first duration is 30s to 40s.
[0091] Step 1402: Place the chip to be soldered on the upper surface of the solder corresponding to the Nth solder layer.
[0092] Step 1403: Apply a target pressure value to the chip to be soldered on the upper surface of the solder to obtain the chip to be soldered to be attached to the upper surface of the solder corresponding to the Nth solder layer.
[0093] In this embodiment of the application, during step 140 of placing the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer, the placement machine can first heat the solder pressed to the placement position to a second temperature value, and then keep the solder at the second temperature value for a first time. This results in the solder corresponding to the Nth solder layer having a better softening effect and higher wettability. After placing the chip to be soldered onto the upper surface of the solder, the chip to be soldered and the upper surface of the solder have a better bonding effect, improving the signal transmission performance and heat transfer performance between the chip and the substrate.
[0094] The second temperature value can be any temperature value within the second temperature range of 260°C to 267°C, and the first duration can be 30s to 40s. Keeping the solder at the second temperature value for the first duration can make the solder soften sufficiently at the second temperature value to achieve the expected chip bonding effect.
[0095] In this embodiment of the application, after the solder corresponding to the Nth solder layer is kept at the second temperature for a first time, the pick-and-place machine can pick up the chip to be soldered from the wafer through the chip gripping device in the soldering head system and place the chip to be soldered on the upper surface of the solder corresponding to the Nth solder layer; then, the pick-and-place machine applies a target pressure value to the chip to be soldered on the upper surface of the solder layer so that the chip to be soldered is fully attached to the upper surface of the solder.
[0096] Optionally, the target pressure value is 2.8g to 3.5g.
[0097] In this embodiment of the application, during the execution of step 1403, the target pressure value applied by the pick-and-place machine to the chip to be soldered on the upper surface of the solder can be 2.8g to 3.5g, so that the chip to be soldered can be fully attached to the upper surface of the solder, while the chip to be soldered will not be trapped in the solder due to excessive target pressure value, which would cause the chip to fail.
[0098] Optionally, the preset curing rules include:
[0099] Step A11: According to the first cooling rate, reduce the temperature of the solder corresponding to the Nth solder layer to the third temperature value, and keep the solder at the third temperature value for a second time.
[0100] The third temperature value is located in the third temperature range, and the second duration is 5s to 8s.
[0101] Step A12: According to the second cooling rate, reduce the temperature of the solder corresponding to the Nth solder layer from the third temperature value to the fourth temperature value.
[0102] The fourth temperature value is located within a fourth temperature range. The maximum temperature value in the fourth temperature range is less than the minimum temperature value in the third temperature range; and the first cooling rate is less than the second cooling rate.
[0103] The preset curing rule in this embodiment includes two cooling stages and one holding stage. Specifically, in the first cooling stage of the preset curing rule, the pick-and-place machine can reduce the temperature of the solder corresponding to the Nth solder layer from the temperature of the solder when the chip to be soldered is placed onto the upper surface of the solder corresponding to the Nth solder layer in step 140 to a third temperature value according to a first cooling rate. The third temperature value is any temperature value within a third temperature range, which can be from 150°C to 200°C. The first cooling rate does not exceed 3°C / s to prevent the thermal stress in the solder from not being released in time due to an excessively fast cooling rate, causing distortion and deformation of the solder layer. Of course, the first cooling rate should not be too small either, as an excessively small first cooling rate will result in an excessively long solder curing time, leading to problems such as deformation of the solder after pressing.
[0104] Optionally, the first cooling rate is from 2.2℃ / s to 2.8℃ / s. During the cooling and curing process, the thermal stress in the solder is fully released without causing deformation or other problems in the solder after pressing.
[0105] In this embodiment, after the temperature of the solder corresponding to the Nth solder layer is reduced to a third temperature value according to the first cooling rate, the heat preservation stage in the preset curing rule can be entered. During the heat preservation stage, the pick-and-place machine can keep the solder at the third temperature value for a second time, which allows the thermal stress in the solder to be fully released within the second time, preventing the solder layer from twisting and deforming due to the release of thermal stress during subsequent work processes after cooling and curing.
[0106] After holding the solder at the third temperature for a second time, the second cooling stage can begin. In the second cooling stage, the pick-and-place machine can reduce the temperature of the solder corresponding to the Nth solder layer from the third temperature to the fourth temperature according to the second cooling rate.
[0107] The fourth temperature value is the target cooling temperature in the preset curing rules. Specifically, the fourth temperature value can be room temperature or other temperatures set according to curing requirements. This application does not specifically limit this value in its embodiments.
[0108] It should be noted that when the temperature of the solder drops to the fourth temperature value, the solder is in a solidified state.
[0109] Furthermore, the second cooling rate can be a rate greater than the first cooling rate. For example, the second cooling rate can be 3.5℃ / s or 4℃ / s.
[0110] Optionally, the total duration of the cooling and curing process is 95s to 110s.
[0111] In this embodiment, considering that an excessively high cooling rate would prevent the thermal stress in the solder from being released in time, causing the solder layer to twist and deform later, and that the solder has a certain degree of fluidity before the cooling and curing process is complete, an excessively low cooling rate would cause the solder to deform significantly before curing, the total cooling and curing time of the solder can be limited to 95s to 110s. This allows the thermal stress in the solder to be fully released during the cooling and curing process while minimizing the deformation of the solder during this process.
[0112] Optionally, the number of solder layers is greater than 2 and less than 6.
[0113] In this embodiment, to reduce the void ratio in the solder layer, the number of solder layers can be increased. This increases the area of direct contact between the solder and the working environment during the process of heating, pressing, and cooling the solder corresponding to the solder layer to the patch position. This increases the probability of air and moisture escaping from the solder, reducing the amount of residual air and moisture in the solder layer, thereby achieving the goal of reducing the void ratio in the solder layer. Therefore, the number of solder layers can be determined to be greater than 2.
[0114] Meanwhile, considering that too many weld layers would lead to excessively long welding time and low welding efficiency, the number of weld layers can be determined to be greater than 2 and less than 6 by balancing the void ratio in the weld layer and the welding efficiency.
[0115] In this embodiment, after the pick-and-place machine obtains a substrate with a chip to be soldered using the above-described soldering method, it can perform temperature cycling test (TCT) characterization on the substrate obtained by the soldering method provided in this embodiment and the substrate obtained by existing soldering methods. The test includes: quantitative determination of solder layer void ratio, X-ray scanning, temperature cycling test, and peel force test.
[0116] Referring to Table 1, the statistical results of the void ratio in the solder layer obtained by the existing soldering method and the soldering method provided in the embodiments of this application under the same chip and soldering method are shown. As shown in Table 1, the void ratio of 10 samples of solder layers obtained by the existing soldering method and the soldering method provided in the embodiments of this application was statistically analyzed. The results show that the void ratio of the solder layer obtained by the soldering method provided in the embodiments of this application is about 4.86% lower than that of the solder layer obtained by the existing soldering method.
[0117] Table 1
[0118]
[0119] Reference Figure 4 The image shows X-ray scans of the solder layers obtained by the existing soldering method and the soldering method provided in this application embodiment, under the same chip and soldering method. Figure 4 As shown, the void ratio in the weld layer obtained by the welding method provided in this application embodiment is significantly lower than that in the weld layer obtained by existing welding methods.
[0120] Referring to Table 2, the TCT limit test statistical results of the solder layers obtained by the existing soldering method and the soldering method provided in this application embodiment are shown under the same chip and soldering method. As shown in Table 2, the solder layer obtained by the soldering method provided in this application embodiment passes the test results in both 1000 TCT cycle tests and 1500 TCT cycle tests, while the solder layer obtained by the existing soldering method fails the test result in 1500 TCT cycle tests.
[0121] Table 2
[0122]
[0123] Referring to Table 3, the statistical results of reverse leakage current (IR) of solder layers obtained by the existing soldering method and the soldering method provided in this application embodiment under the same chip and soldering method are shown in TCT test (1000 cycles). As shown in Table 3, the IR change rate of the solder layer obtained by the soldering method provided in this application embodiment before and after TCT test is significantly lower than that of the solder layer obtained by the existing soldering method. The IR change rate of the solder layer obtained by the existing soldering method before and after TCT test reaches about 50%, while the IR change rate of the solder layer obtained by the soldering method provided in this application embodiment before and after TCT test is only 10% to 20%.
[0124] Table 3
[0125]
[0126] Referring to Table 4, statistical results of the peel force test between the solder layer and the chip obtained by the existing soldering method and the soldering method provided in this application embodiment under the same chip and soldering method are shown. As shown in Table 4, the peel force between the solder layer and the chip obtained by the soldering method provided in this application embodiment is generally higher than that obtained by the existing soldering method, and the peel force between the solder layer and the chip obtained by the soldering method provided in this application embodiment is about 20% higher than that obtained by the existing soldering method. The improvement in peel force indicates that the bonding force between the chip and the solder layer is improved by using the soldering method provided in this application embodiment, which also indirectly reflects the reduction of voids or soldering defects between the chip and the solder layer, increases the contact area between the chip and the solder layer, improves the bonding force between the chip and the solder layer, and thus improves the stability of the performance between the chip and the substrate.
[0127] Table 4
[0128]
[0129] In summary, the welding method provided in this application, by dividing the solder layer corresponding to the chip to be welded into multiple solder layers, heating and pressing them sequentially and then cooling and solidifying them to the chip mounting position on the substrate, facilitates the discharge of air and moisture inside the solder, thereby reducing the probability of voids in the solder layer, improving the reliability of the substrate with the chip to be welded, and thus improving the reliability of the smart power module including the substrate.
[0130] Device Examples
[0131] like Figure 5 As shown, Figure 5 A logic block diagram of a welding apparatus provided in an embodiment of this application is shown. The apparatus includes:
[0132] The first determining module 501 is used to determine the total amount of solder used for the chip to be soldered and the chip placement position on the substrate.
[0133] The second determining module 502 is used to determine the number of solder layers and the amount of solder corresponding to each solder layer according to preset rules and the total amount of solder used;
[0134] The welding module 503 is used to heat and press the solder corresponding to the i-th solder layer onto the patch position according to the solder amount. After the solder cools down and solidifies, the i-th solder layer is obtained. Then, the solder corresponding to the i+1 solder layers is heated and pressed onto the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1, where N is the number of solder layers.
[0135] The chip mounting module 504 is used to heat and press the solder corresponding to the Nth solder layer to the mounting position according to the solder amount, and to mount the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer;
[0136] The curing module 505 is used to cool and cure the solder corresponding to the Nth solder layer according to a preset curing rule to obtain a substrate with the chip to be welded.
[0137] Optionally, the welding module includes:
[0138] The first heating submodule is used to heat the solder corresponding to the i-th solder layer to a first temperature value according to the amount of solder used for the i-th solder layer and at a preset heating rate; the first temperature value is located in a first temperature range, which is 250°C to 260°C.
[0139] The pressing submodule is used to apply solder heated to a first temperature value to the patch position and to press the solder.
[0140] The curing submodule is used to cool and cure the pressed solder according to the preset curing rules to obtain the i-th solder layer.
[0141] Optionally, the pressing pressure of the pressing process is 0.4 MPa to 0.6 MPa, and the pressing time is 100 s to 120 s.
[0142] Optionally, the patch module includes:
[0143] The second heating submodule is used to heat the solder corresponding to the Nth solder layer to a second temperature value, and to keep the solder at the second temperature value for a first duration; the second temperature value is located in a second temperature range, which is 260°C to 267°C; the first duration is 30s to 40s.
[0144] A chip placement submodule is used to place the chip to be soldered on the upper surface of the solder corresponding to the Nth solder layer;
[0145] The pressure application submodule is used to apply a target pressure value to the chip to be soldered on the upper surface of the solder, thereby attaching the chip to be soldered to the upper surface of the solder corresponding to the Nth solder layer.
[0146] Optionally, the target pressure value is 2.8g to 3.5g.
[0147] Optionally, the preset curing rules include:
[0148] According to the first cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced to a third temperature value, and the solder is kept at the third temperature value for a second duration; the third temperature value is located in a third temperature range, and the second duration is 5s to 8s.
[0149] According to the second cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced from the third temperature value to the fourth temperature value; the fourth temperature value is located in the fourth temperature range.
[0150] Wherein, the maximum temperature value in the fourth temperature range is less than the minimum temperature value in the third temperature range; and the first cooling rate is less than the second cooling rate.
[0151] Optionally, the first cooling rate is from 2.2℃ / s to 2.8℃ / s.
[0152] Optionally, the total duration of the cooling and curing process is 95s to 110s.
[0153] Optionally, the number of solder layers is greater than 2 and less than 6.
[0154] In summary, the welding apparatus provided in this application divides the solder layer corresponding to the chip to be welded into multiple solder layers, heats and presses them sequentially, and then cools and solidifies them to the chip mounting position on the substrate. This facilitates the removal of air and moisture from the solder, thereby reducing the probability of voids in the solder layer and improving the reliability of the substrate with the chip to be welded.
[0155] The welding device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a GPU BOX, mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine, etc. This application embodiment does not specifically limit the scope of the device.
[0156] The welding apparatus in this application embodiment can be a device with an operating system. This operating system can be Android, Linux, Windows, or other possible operating systems; this application embodiment does not specifically limit it.
[0157] The welding apparatus provided in this application embodiment can achieve... Figure 1 The various processes implemented in the method implementation examples will not be described again here to avoid repetition.
[0158] Optionally, such as Figure 6 As shown, this application embodiment also provides an electronic device 600, including a processor 601 and a memory 602. The memory 602 stores a program or instructions that can run on the processor 601. When the program or instructions are executed by the processor 601, they implement the various steps of the above welding method embodiment and can achieve the same technical effect. To avoid repetition, they will not be described again here.
[0159] In embodiments of this application, memory 602 can be used to store software programs and various data. Memory 602 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, applications or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, memory 602 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 602 in this embodiment includes, but is not limited to, these and any other suitable types of memory.
[0160] Processor 601 may include one or more processing units; optionally, processor 601 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 601.
[0161] This application also provides an electronic device, including the welding apparatus described above, for implementing the various processes of the above welding method embodiments and achieving the same technical effect. To avoid repetition, it will not be described again here.
[0162] This application also provides an intelligent power module, which includes a substrate with a chip to be soldered obtained by the soldering method described above, and can achieve the same technical effect. To avoid repetition, it will not be described again here.
[0163] This application provides a computer program product, which is stored in a storage medium and executed by at least one processor to implement the various processes of the welding method embodiments described above, and can achieve the same technical effect. To avoid repetition, it will not be described again here.
[0164] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.
[0165] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.
[0166] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.
Claims
1. A welding method, characterized in that, The method includes: Determine the total amount of solder required for the chip to be soldered and the chip's mounting position on the substrate; According to the preset rules and the total amount of solder, determine the number of solder layers and the amount of solder corresponding to each solder layer; According to the solder amount, the solder corresponding to the i-th solder layer is heated and pressed onto the patch position. After the solder cools down and solidifies, the i-th solder layer is obtained. Then, the solder corresponding to the i+1 solder layers is heated and pressed onto the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1, where N is the number of solder layers. According to the solder amount, the solder corresponding to the Nth solder layer is heated and pressed to the mounting position, and the chip to be soldered is mounted on the upper surface of the solder corresponding to the Nth solder layer; According to the preset curing rules, the solder corresponding to the Nth solder layer is cooled and cured to obtain a substrate with the chip to be soldered.
2. The method according to claim 1, characterized in that, The step of heating and pressing the solder corresponding to the i-th solder layer onto the patch position according to the solder amount, and obtaining the i-th solder layer after the solder cools and solidifies, includes: Based on the amount of solder corresponding to the i-th solder layer, the solder corresponding to the i-th solder layer is heated to a first temperature value according to a preset heating rate; the first temperature value is located in a first temperature range, which is 250°C to 260°C. Solder heated to a first temperature value is applied to the patch position, and the solder is then pressed. According to the preset curing rules, the pressed solder is cooled and cured to obtain the i-th solder layer.
3. The method according to claim 2, characterized in that, The pressing pressure of the pressing process is 0.4 MPa to 0.6 MPa, and the pressing time is 100 s to 120 s.
4. The method according to claim 1, characterized in that, The step of attaching the chip to be soldered to the upper surface of the solder corresponding to the Nth solder layer includes: The solder corresponding to the Nth solder layer is heated to a second temperature value, and the solder is kept at the second temperature value for a first duration; the second temperature value is located in a second temperature range, which is 260°C to 267°C; the first duration is 30s to 40s. The chip to be soldered is placed on the upper surface of the solder corresponding to the Nth solder layer; A target pressure value is applied to the chip to be soldered on the upper surface of the solder, resulting in a chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer.
5. The method according to claim 4, characterized in that, The target pressure value is 2.8g to 3.5g.
6. The method according to any one of claims 1 to 5, characterized in that, The preset curing rules include: According to the first cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced to a third temperature value, and the solder is kept at the third temperature value for a second duration; the third temperature value is located in a third temperature range, and the second duration is 5s to 8s. According to the second cooling rate, the temperature of the solder corresponding to the Nth solder layer is reduced from the third temperature value to the fourth temperature value; the fourth temperature value is located in the fourth temperature range. Wherein, the maximum temperature value in the fourth temperature range is less than the minimum temperature value in the third temperature range; and the first cooling rate is less than the second cooling rate.
7. The method according to claim 6, characterized in that, The first cooling rate is 2.2℃ / s to 2.8℃ / s.
8. The method according to any one of claims 1 to 5, characterized in that, The total time for cooling and curing is 95s to 110s.
9. The method according to claim 1, characterized in that, The number of weld layers is greater than 2 and less than 6.
10. A welding apparatus, characterized in that, The device includes: The first determining module is used to determine the total amount of solder used for the chip to be soldered and the chip placement position on the substrate. The second determining module is used to determine the number of solder layers and the amount of solder corresponding to each solder layer according to preset rules and the total amount of solder used; The soldering module is used to heat and press the solder corresponding to the i-th solder layer onto the patch position according to the solder amount. After the solder cools down and solidifies, the i-th solder layer is obtained. Then, the solder corresponding to the i+1 solder layers is heated and pressed onto the patch position until the N-1-th solder layer is obtained. i is a positive integer and i is less than N-1, where N is the number of solder layers. The chip mounting module is used to heat and press the solder corresponding to the Nth solder layer to the mounting position according to the solder amount, and to mount the chip to be soldered onto the upper surface of the solder corresponding to the Nth solder layer; The curing module is used to cool and cure the solder corresponding to the Nth solder layer according to a preset curing rule, so as to obtain a substrate with the chip to be welded.
11. An electronic device, characterized in that, The welding apparatus of claim 10 is used to implement the welding method of any one of claims 1 to 9.
12. A smart power module, characterized in that, This includes a substrate with a chip to be welded obtained by the welding method according to any one of claims 1 to 9.