A battery pack balancing control device, system and method

Abstract

A battery pack balancing control device, system, and method include a switch module, a reversing module, and a first equivalent resistor Rx. The switch modules have N+1 components, and the reversing module has a first node, a second node, a third node, a fourth node, and a second controlled terminal. The first node is connected to the first connection terminals of all even-numbered switch modules, the second node is connected to the second connection terminals of all odd-numbered switch modules, and the fourth node is grounded. The switch module includes two MOS transistors and a second equivalent resistor R. The drain of one MOS transistor in the even-numbered switch modules is connected to the first node of the reversing module, and the drain of one MOS transistor in the odd-numbered switch modules is connected to the second node of the reversing module. One end of the second equivalent resistor R is connected between the sources of the two MOS transistors in the same switch module, and the other end is connected between the gates of the two MOS transistors. This application reduces the design cost of collecting and balancing a battery pack.

Description

Technical Field

[0001] The present application relates to the technical field of battery balancing, and more particularly to a battery pack balancing control device, system, and method. Background Art

[0002] In the application environment of new battery systems such as lithium-ion batteries, multiple battery cells are often connected in series to provide sufficient voltage to the load. However, after a certain period of use, the battery pack composed of several battery cells in series may experience large differences in voltage between the battery cells due to the different battery cells, usage time, and operating temperature of each battery cell in the battery pack. For example, some battery cells may experience overvoltage during charging, or some battery cells may experience undervoltage during discharge. This shortens the service life of the battery pack and makes the application environment of the entire battery pack unstable, affecting the normal use of the load.

[0003] In order to reduce the impact caused by the differences between different battery cells, the relevant technology will collect and detect the voltage of each battery cell, and appropriately balance it according to the voltage of different battery cells. Among them, balancing refers to the function of making the voltage, capacity and charge and discharge characteristics of each battery cell in the battery pack tend to be consistent.

[0004] The above-mentioned balancing method often requires that the acquisition and isolation are not collinear. In the case of non-collinearity, a method of separate control of acquisition and balancing is required. The balancing control circuit is relatively complex and the control method is costly.

[0005] The Chinese patent application number CN104600799A discloses a series battery pack balancing circuit and balancing method, which includes an isolating switch module, a microcontroller, a charging circuit and a DC converter. The microcontroller is used to collect the voltage of the battery cells, and the charging circuit is used to balance the battery cells. The microcontroller is connected to the charging circuit, wherein the isolating switch module includes multiple isolating switches, and the first voltage input terminal and the second voltage input terminal of each isolating switch are connected to the positive and negative poles of each battery cell in the series battery pack. The control terminal of each isolating switch is connected to an output terminal of the microcontroller. The microcontroller controls the isolating switch to be turned on or off to collect the voltage value of each battery cell in the series cell, and determines whether the battery cell needs to be charged through the charging circuit based on the voltage. After charging is completed, all the isolating switches are driven to be turned on to collect the voltage value of each battery cell until the voltage values ​​of all battery cells reach the voltage average.

[0006] Furthermore, the isolation switch includes four field-effect transistors and two light-emitting diodes, which form a group of two field-effect transistors and one light-emitting diode. One group is connected to the positive electrode of the battery cell, and the other group is connected to the negative electrode of the battery cell. The light-emitting diodes are used to realize the conduction and cutoff of the anti-series MOS tube, thereby realizing isolation control.

[0007] When isolation is performed in this way, although the collection and balancing are done in a co-linear manner, each battery cell needs to be equipped with at least four different field-effect transistors as control switches. When the number of batteries is large, it still costs a lot to make the corresponding isolation switches, and the cost is still high. Summary of the Invention

[0008] In order to reduce the design cost when performing data balancing on a battery pack, the present application provides a battery pack balancing control device, system and method.

[0009] In a first aspect, the present application provides a battery pack balancing control device, which adopts the following technical solution:

[0010] A battery pack balancing control device includes a switch module, a reversing module and a first equivalent resistor Rx, wherein:

[0011] There are N+1 switch modules, where N represents the number of battery cells. All N+1 switch modules are connected to the battery pack, and only one switch module is connected to the positive and negative electrodes of any battery cell.

[0012] The commutation module has a first node, a second node, a third node, and a fourth node. The first node is connected to all even-numbered switch modules, the second node is connected to all odd-numbered switch modules, the third node and the fourth node are respectively connected to both ends of the first equivalent resistor Rx, and the fourth node is grounded. The commutation module also includes a second controlled end. The commutation module commutates the four nodes in pairs according to a signal received by the second controlled end.

[0013] The switch module includes two MOS transistors and a second equivalent resistor R, the sources of the two MOS transistors are connected, the gates of the two MOS transistors are connected and together constitute a first controlled end, the drain of one MOS transistor is connected to the first node or the second node of the reversing module, and the drain of the other MOS transistor is connected to the positive electrode and / or negative electrode of the battery cell.

[0014] One end of the second equivalent resistor R is connected between the sources of the two MOS transistors, and the other end is connected between the gates of the two MOS transistors.

[0015] Through the above technical solution, the four nodes are reversed through the second controlled end, and the switch modules on the corresponding battery cells are opened through the first controlled end, so that the positive electrode of any battery cell is always applied to the third node and the negative electrode is always applied to the fourth node, so that a voltage is obtained on the first equivalent resistor Rx, and a voltage is generated on the second equivalent resistor R, which is the power supply voltage minus the divided voltage of the first equivalent resistor Rx. This voltage causes the remaining MOS tubes in the switch module to turn on, so that the positive electrode of the battery can flow to the negative electrode of the battery to form a battery circuit together. In this way, the cost required for setting up the isolation switch is reduced.

[0016] Preferably, the switching module includes a first switching MOS transistor, a second switching MOS transistor, a third switching MOS transistor, and a fourth switching MOS transistor, wherein:

[0017] The gate of the first commutation MOS transistor forms the second controlled end, the source of the first commutation MOS transistor is connected to the first node, and the drain of the first commutation MOS transistor is connected to the third node;

[0018] The gate of the second commutation MOS transistor forms the second controlled terminal, the source of the second commutation MOS transistor is connected to the second node, and the drain of the second commutation MOS transistor is connected to the third node;

[0019] The gate of the third commutation MOS transistor forms the second controlled end, the drain of the third commutation MOS transistor is connected to the second node, and the source of the third commutation MOS transistor is connected to the fourth node;

[0020] The gate of the fourth commutation MOS transistor forms the second controlled end, the drain of the fourth commutation MOS transistor is connected to the first node, and the source of the fourth commutation MOS transistor is connected to the fourth node;

[0021] The first and second switching MOS transistors are located at one end of the first equivalent resistor Rx, and the third and fourth switching MOS transistors are located at the other end of the first equivalent resistor Rx.

[0022] In a second aspect, the present application provides a battery pack balancing control system, which adopts the following technical solutions:

[0023] A battery pack balancing control system includes a battery pack balancing control device, an acquisition module, a balancing module, a processing module and a power supply module, wherein:

[0024] The acquisition module is connected to the third node to acquire the voltage of the battery cell, and the balancing module is connected to the third node to balance the battery pack according to the acquisition result;

[0025] The processing module is connected to the first controlled end of the switch module and the second controlled end of the reversing module to control the on / off and switching of the switch module and the reversing module;

[0026] The power supply module is used to provide a power supply voltage for the switch module to conduct.

[0027] Preferably, the processing module includes a single-chip microcomputer, a first control circuit, and a second control circuit. The single-chip microcomputer includes N+3 pins, wherein pins 1 to N+1 are respectively connected to N+1 first control circuits, and the N+1 first control circuits are respectively connected to the switch-controlled end of the switch module. The first control circuit is used to control the on and off of the corresponding switch module according to the instructions of the single-chip microcomputer. Pins N+2 to N+3 on the single-chip microcomputer are connected to the second control circuit, and the second control circuit is used to control the on and off of the corresponding reversing module according to the instructions of the single-chip microcomputer, and the second control circuit is connected to the second controlled end of the reversing module. The first and third reversing MOS transistors have the same corresponding pins, and the second and fourth reversing MOS transistors have the same corresponding pins.

[0028] Preferably, the first control circuit includes two transistors, wherein the base of one transistor is connected to the corresponding pin of the single-chip microcomputer to receive a level control signal, the emitter of the transistor is grounded, the collector of the transistor is connected to the base of another transistor, the emitter of the other transistor is connected to the power supply module, and the collector of the other transistor is connected to the isolation module.

[0029] Preferably, the second control circuit connected to the first commutation MOS transistor and the second commutation MOS transistor includes two transistors, wherein the base of the transistor is connected to the pin of the single-chip microcomputer to receive the level control signal, the emitter of the transistor is grounded, the collector of the transistor is connected to the base of another transistor, the emitter of the other transistor is connected to the power supply module, the power supply module is also used to provide the power supply voltage for turning on the commutation module, and the collector of the other transistor is connected to the commutation module.

[0030] Preferably, an isolation diode is provided between the first control circuit and the switch module, the anode of the isolation diode is connected to the first control circuit and the power module, and the cathode of the isolation diode is connected to the switch module.

[0031] Preferably, a commutation diode is provided between the second control circuit and the commutation module, the anode of the commutation diode is connected to the second control circuit and the power module, and the cathode of the switching diode is connected to the commutation module.

[0032] In a third aspect, the present application provides a battery pack balancing control method, which adopts the following technical solution:

[0033] A battery pack balancing control method, comprising:

[0034] Selecting the Mth battery cell in the battery pack, where M corresponds to the middle battery cell in the battery pack in the initial state;

[0035] The reversing module connects the four nodes in pairs according to a preset method corresponding to the M-th battery cell, and the switch module corresponding to the M-th battery cell is turned on;

[0036] Collect the battery voltage of the Mth battery cell;

[0037] According to the preset rules, turn off a switch module that is currently turned on and make M=M+1;

[0038] Repeat the above steps until the voltage of each of the N battery cells has been sampled once;

[0039] The battery pack is balanced according to the collected voltage.

[0040] Preferably, the preset rules include:

[0041] Select a battery cell located in the negative electrode direction of the M-th battery cell and adjacent to the M-th battery cell, and define it as a new M-th battery cell, where M=M+1;

[0042] If there is no battery cell in the negative direction of the M-th battery cell, select a battery cell located in the positive direction of the M-th battery cell and adjacent to it, and define it as a new M-th battery cell, M=M+1, and determine whether the new M-th battery cell has been collected;

[0043] If yes, continue to select the adjacent battery cell in the positive direction and define it as the new M-th battery cell, M=M+1;

[0044] If not, the battery cell is collected.

[0045] In summary, this application includes at least one of the following beneficial technical effects:

[0046] 1. Through the coordination of the switch module and the reversing module, when collecting and balancing the battery pack, the use of MOS tubes avoids the use of high-cost isolation switches in related technologies, effectively reducing design costs;

[0047] 2. Compared with the isolating switches in related technologies, this application uses fewer switch modules, further saving costs;

[0048] 3. During the acquisition process, when switching battery cells, a common ground method is adopted to effectively reduce the surge peak voltage caused by the lack of common ground;

[0049] 4. By starting to collect data from the battery cell in the middle of the battery pack, the pressure on the MOS tube in the switch module is reduced, and a lower-cost and more cost-effective MOS tube can be selected. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 This is a circuit connection diagram of the balancing control device in an embodiment of the present application;

[0051] Figure 2 1 is a circuit connection diagram of a balancing control system in an embodiment of the present application;

[0052] Figure 3 1 is a circuit connection diagram of the single chip microcomputer in the embodiment of the present application;

[0053] Figure 4 It is a flow chart of the balancing control method in an embodiment of the present application.

[0054] Explanation of the accompanying drawings: 1. Switch module 2. Reversing module; 3. First node; 4. Second node; 5. Third node; 6. Fourth node; 8. First controlled end; 9. Second controlled end; 10. Acquisition module; 11. Equalization module; 12. Processing module; 121. Single chip microcomputer; 122. First control circuit; 123. Second control circuit; 13. Power supply module. DETAILED DESCRIPTION

[0055] The following is combined with Figure 1-4 This application is described in further detail.

[0056] An embodiment of the present application discloses a balancing control device for a battery pack.

[0057] like Figure 1 As shown, a balancing control device for a battery pack includes a switch module, a reversing module, and a first equivalent resistor Rx.

[0058] The switch module is used to isolate each battery cell so that each cell can be isolated for data collection without interfering with each other. The number of switch modules is equal to N+1, where N represents the number of battery cells. These N+1 switch modules are connected to several battery cells within the battery pack, and each battery cell has exactly one switch module on both its positive and negative terminals.

[0059] For example, if the number of battery cells N=5, the number of switch modules is 5+1=6. Since there is only one switch module on the positive and negative poles of a battery cell, there is a switch module connected to the positive pole of the first battery cell, and a switch module is connected between the second and third battery cells, and a switch module is connected between the third and fourth battery cells. And so on, there is a switch module connected to the negative pole of the fifth switch module, that is, 1+4+1=6 (one is connected to the positive pole at the beginning and the negative pole at the end, and there are four intervals between the five switch modules, with one set in each interval, for a total of six).

[0060] The commutation module has a first node, a second node, a third node, and a fourth node. The second node is connected to all odd-numbered switch modules, the first node is connected to all even-numbered switch modules, the third node and the fourth node are respectively connected to both ends of the first equivalent resistor Rx, and the fourth node is grounded. The commutation module also includes a second controlled terminal. The commutation module commutates the four nodes in pairs based on a signal received by the second controlled terminal.

[0061] Specifically, the switch module includes two MOS transistors and a second equivalent resistor R, the sources of the two MOS transistors are connected, the gates of the two MOS transistors are connected to the first controlled end, the drain of one MOS transistor is connected to the first node or the second node of the reversing module, and the drain of the other MOS transistor is connected to the positive electrode and / or negative electrode of the battery cell, and one end of the second equivalent resistor R is connected between the sources of the two MOS transistors, and the other end is connected between the gates of the two MOS transistors.

[0062] The resistance values ​​of the first equivalent resistor Rx and the second equivalent resistor R are selected as follows: the divided voltage on the second equivalent resistor R only needs to be greater than the turn-on voltage of the MOS tube corresponding to the second equivalent resistor R. If the voltage of the power module is relatively large, the resistance of the second equivalent resistor R can be less than, equal to, or greater than the voltage of Rx, as long as the divided voltage is greater than the turn-on voltage of the MOS tube. If the voltage of the power module is relatively small, a second equivalent resistor R with a voltage greater than the first equivalent resistor Rx needs to be used to maximize the divided voltage of the second equivalent resistor R.

[0063] For example, when VDD is 12V, if the first equivalent resistor Rx and the second equivalent resistor R have the same resistance value, they can both obtain a voltage division of 6V, and the turn-on voltage of the MOS transistor is 4V. In this way, the second equivalent resistor R can turn on the MOS transistor. If the resistance value of the first equivalent resistor Rx is greater than the resistance value of the second equivalent resistor R, the first equivalent resistor Rx divides 7V and the second equivalent resistor R divides 5V, which is still greater than the turn-on voltage of the MOS transistor and can still turn on the MOS transistor. If VDD is only 6V, if the resistance value of the first equivalent resistor Rx is equal to or greater than the resistance value of the second equivalent resistor R, the second equivalent resistor R can only divide a maximum voltage of 3V, which is less than the turn-on voltage of the MOS transistor and cannot turn on the MOS transistor. Therefore, the resistance value of the first equivalent resistor Rx needs to be smaller than the resistance value of the second equivalent resistor R so that the second equivalent resistor R can divide a voltage exceeding 4V.

[0064] In this embodiment of the present application, the second equivalent resistor R also serves as a bias resistor, and the junction capacitance between the two MOS transistors is absorbed by the bias resistor.

[0065] At the same time, it is also necessary to satisfy the requirement that the voltage of VDD minus the voltage of a single battery cell is greater than the conduction voltage of the MOS tube corresponding to the battery cell.

[0066] In the embodiment of the present application, a battery pack is taken as an example in which there are five battery cells connected in series, namely BT1, BT2, BT3, BT4 and BT5.

[0067] The switch module corresponding to the positive electrode of BT1 includes a first MOS transistor M1, a second MOS transistor M2, and a second equivalent resistor R1. The gates of the first MOS transistor M1 and the second MOS transistor M2 are connected together, the sources of the first MOS transistor M1 and the second MOS transistor M2 are connected, the drain of the first MOS transistor M1 is connected to the second node of the reversing module, and the drain of the second MOS transistor M2 is connected to the positive electrode of BT1. One end of the second equivalent resistor R1 is connected between the gates of the first MOS transistor M1 and the second MOS transistor M2 and are jointly connected to the first controlled end, and the other end is connected between the sources of the first MOS transistor M1 and the second MOS transistor M2. Parasitic diodes are provided on both the first MOS transistor M1 and the second MOS transistor M2, and the anodes of the parasitic diodes on the two MOS transistors are arranged opposite each other.

[0068] A switch module is provided between the negative electrode of BT1 and the positive electrode of BT2. The switch module includes a third MOS transistor M3, a fourth MOS transistor M4, and a second equivalent resistor R2. The gates of the third MOS transistor M3 and the fourth MOS transistor M4 are connected together, the sources of the third MOS transistor M3 and the fourth MOS transistor M4 are connected, the drain of the third MOS transistor M3 is connected to the node between the negative electrode of BT1 and the positive electrode of BT2, and the drain of the fourth MOS transistor M4 is connected to the first node of the switching module. One end of the second equivalent resistor R2 is connected between the gates of the third MOS transistor M3 and the fourth MOS transistor M4 and are jointly connected to the first controlled terminal, and the other end is connected between the sources of the third MOS transistor M3 and the fourth MOS transistor M4. Parasitic diodes are provided on both the first MOS transistor M1 and the second MOS transistor M2, and the anodes of the parasitic diodes on the two MOS transistors are arranged opposite each other.

[0069] Similarly, the connection method of subsequent switch modules follows the same method. The difference is that the drain of the MOS transistor corresponding to the even-numbered switch modules is connected to the first node of the reversing module, while the drain of the MOS transistor corresponding to the even-numbered switch modules is connected to the second node of the reversing module.

[0070] The switch module connected to the positive pole of BT1 is taken as the first module, and the commutation node connected to each subsequent switch module is different from the commutation node connected to the adjacent switch module. In this embodiment, the switch module on the positive pole of BT1 is connected to the second node, the switch module between BT1 and BT2 is connected to the first node, the switch module between BT2 and BT3 is connected to the second node, and so on.

[0071] Furthermore, in this embodiment, the first MOS transistor M1 to the twelfth MOS transistor M12 are all N-MOS transistors.

[0072] In other embodiments, the first MOS transistor M1 to the twelfth MOS transistor M12 may also be replaced with P-MOS transistors. When replaced with P-MOS transistors, the VDD of the power module needs to be correspondingly replaced with -12V. When using N-MOS and P-MOS transistors, the connection method of each pin remains unchanged. Only the direction of the body diode on the MOS transistor changes, and the loop current formed by the two MOS transistors has opposite directions.

[0073] The switching module includes a first switching MOS transistor M13, a second switching MOS transistor M14, a third switching MOS transistor M15 and a fourth switching MOS transistor M16.

[0074] The gate of the first commutation MOS transistor M13 forms the second controlled end, the source of the first commutation MOS transistor M13 is connected to the first node, and the drain of the first commutation MOS transistor M13 is connected to the third node.

[0075] The gate of the second commutation MOS transistor M14 forms the second controlled end, the source of the second commutation MOS transistor M14 is connected to the second node, and the drain of the second commutation MOS transistor M14 is connected to the third node.

[0076] The gate of the third commutation MOS transistor M15 forms the second controlled end, the drain of the third commutation MOS transistor M15 is connected to the second node, and the source of the third commutation MOS transistor M15 is connected to the fourth node.

[0077] The gate of the fourth commutation MOS transistor M16 forms the second controlled end, the drain of the fourth commutation MOS transistor M16 is connected to the first node, and the source of the fourth commutation MOS transistor M16 is connected to the fourth node.

[0078] The first switching MOS transistor M13 and the second switching MOS transistor M14 are located at one end of the first equivalent resistor Rx, and the third switching MOS transistor M15 and the fourth switching MOS transistor M16 are located at the other end of the first equivalent resistor Rx.

[0079] In the present application, the first commutation MOS transistor M13 to the fourth commutation MOS transistor M16 are all N-MOS transistors.

[0080] When BT1 is to be turned on, the second commutation MOS tube M14 and the fourth commutation MOS tube M16 are first turned on according to the control signal of the second controlled terminal, and then the switch module located on the negative electrode of BT1 and the switch module located on the positive electrode of BT1 are turned on. Among them, the Vgs of the first MOS tube M1 reaches the turn-on voltage, the first MOS tube M1 is turned on, so that the positive electrode of BT1 is connected to the second node. Correspondingly, the Vgs of the fourth MOS tube M4 reaches the turn-on voltage, the fourth MOS tube M4 is turned on, so that the negative electrode of BT1 is connected to the first node, and the second commutation MOS tube opened by the commutation module is turned on. The transistor M14 and the fourth commutation MOS transistor M16 connect the first node to the fourth node, that is, to ground, and the second node to the third node. Simultaneously, a voltage drop is formed on the first equivalent resistor Rx. This voltage drop divides the voltage of the second equivalent resistor R corresponding to the second MOS transistor Q2 and the third MOS transistor Q3. As a result, the second MOS transistor Q2 and the third MOS transistor Q3 reach the turn-on voltage and turn on, further turning on the battery and forming a loop on BT1. At this time, the voltage between the third and fourth nodes is equivalent to the voltage of BT1, thereby enabling the voltage of the battery cell to be collected.

[0081] Similarly, when BT2 is to be turned on, the first commutation MOS transistor M13 and the third commutation MOS transistor M15 are first turned on according to the control signal of the second controlled end, and then the switch module located at the negative electrode of BT2 and the switch module located at the positive electrode of BT2 are turned on. Among them, the Vgs of the fifth MOS transistor M5 reaches the turn-on voltage, and the fifth MOS transistor M5 is turned on, so that the negative electrode of BT2 is connected to the second node. Correspondingly, the fourth MOS transistor M4 is turned on, so that the positive electrode of BT2 is connected to the first node. At the same time, the first commutation MOS transistor M13 and the third commutation MOS transistor M15 turned on by the commutation module connect the first node to the third node, and the second node to the fourth node, that is, to ground. At the same time, a voltage drop is formed on the first equivalent resistor Rx. The voltage drop causes the third MOS transistor M3 and the sixth MOS transistor M6 to be turned on, and the battery is turned on, so that a loop is formed on BT2. At this time, the voltage between the third node and the fourth node is equivalent to the voltage of BT2, so that the voltage of the battery cell can be collected.

[0082] Compared with the related art, the number of switch modules for isolation is reduced in the present application. Through the cooperation of the reversing module, one switch module can be shared by two battery cells. The same switch module can control both the positive and negative poles of the battery. Each switch module has a common ground, so that the line where the same switch is located can be used in the collection of adjacent battery cells. Under the premise that the number of battery cells is N, the isolating switch in the related art is provided with a separate isolating switch for the positive and negative poles of a battery, that is, each isolating switch can only be used by one battery cell, so 2N isolating switches need to be set up. The method in the present application can reduce the number of 2N isolating switches in the related art to N+1, and the overall number of switches is reduced by N-1. The more battery cells there are, the lower the cost reduction is. It is widely applicable to technical fields such as electric bicycles that require cost control.

[0083] At the same time, because the two battery cells share a switch module, a reversing module is required to ensure that no matter whether the switch module corresponds to the positive or negative electrode of the battery, it can correspond to the third node, so as to facilitate the collection module to collect the third node.

[0084] like Figure 2 and Figure 3 As shown, the present application also discloses a battery pack balancing control system, which includes the above-mentioned battery pack balancing control device, and also includes an acquisition module, a balancing module, a processing module and a power supply module.

[0085] The acquisition module is connected to the third node to acquire the voltage of the battery cell, and the balancing module is connected to the third node to balance the battery pack according to the acquisition result. The processing module is connected to the first controlled terminal and the second controlled terminal of the switch module to control the switching of the switch module and the reversing module.

[0086] The processing module includes a single chip microcomputer, a first control circuit and a second control circuit.

[0087] The single-chip microcomputer is provided with several pins that can send level control signals. Among them, pins 1 to N+1 are respectively connected to a first control circuit, and several first control circuits are respectively connected to the first controlled end of the switch module. The first control circuit is used to control the on and off of the switch module. Pins N+2 to N+3 on the single-chip microcomputer are connected to a second control circuit, which is used to control the on and off of the reversing module, and the second control circuit is connected to the second controlled end of the reversing module. The first reversing MOS transistor M13 and the third reversing MOS transistor M15 correspond to the same pin, and the second reversing MOS transistor M14 and the fourth reversing MOS transistor M16 correspond to the same pin.

[0088] In this embodiment, the microcontroller is provided with pins A1, A2, A3, A4, A5, A6, A7, and A8. Pins A1 through A5 are each connected to a corresponding first control circuit. Pin A1 and the corresponding first control circuit are connected to the switch module on the positive electrode of BT1. Pin A2 and the corresponding first control circuit are connected to the switch module between the negative electrode of BT1 and the positive electrode of BT2. And so on. Pins A7 and A8 are each connected to a second control circuit. One of the second control circuits is connected to the first switching MOSFET M13, and the other is connected to the second switching MOSFET M14.

[0089] Furthermore, the A7 pin is connected to the third switching MOS transistor M15 , and the A8 pin is connected to the fourth switching MOS transistor M16 .

[0090] The first control circuit module includes two transistors. In the embodiment of the present application:

[0091] The base of the second transistor Q2 is connected to the A1 pin of the single chip microcomputer, the emitter of the second transistor Q2 is grounded, the collector of the second transistor Q2 is connected to the base of the first transistor Q1, the emitter of the first transistor Q1 is connected to the power module, and the collector of the first transistor Q1 is connected to the gates of the first MOS transistor M1 and the second MOS transistor M2.

[0092] The base of the fourth transistor Q4 is connected to the A2 pin of the single chip microcomputer, the emitter of the fourth transistor Q4 is grounded, the collector of the fourth transistor Q4 is connected to the base of the third transistor Q3, the emitter of the third transistor Q3 is connected to the power module, and the collector of the third transistor Q3 is connected to the gates of the third MOS transistor M3 and the fourth MOS transistor M4.

[0093] The base of the sixth transistor Q6 is connected to the A3 pin of the single chip microcomputer, the emitter of the sixth transistor Q6 is grounded, the collector of the sixth transistor Q6 is connected to the base of the fifth transistor Q5, the emitter of the fifth transistor Q5 is connected to the power module, and the collector of the fifth transistor Q5 is connected to the gates of the fifth MOS transistor M5 and the sixth MOS transistor M6.

[0094] The base of the eighth transistor Q8 is connected to the A4 pin of the single-chip microcomputer, the emitter of the eighth transistor Q8 is grounded, the collector of the eighth transistor Q8 is connected to the base of the seventh transistor Q7, the emitter of the seventh transistor Q7 is connected to the power module, and the collector of the seventh transistor Q7 is connected to the gates of the seventh MOS transistor M7 and the eighth MOS transistor M8.

[0095] The base of the thirteenth transistor Q10 is connected to the A5 pin of the single chip microcomputer, the emitter of the thirteenth transistor Q10 is grounded, the collector of the thirteenth transistor Q10 is connected to the base of the ninth transistor Q9, the emitter of the ninth transistor Q9 is connected to the power module, and the collector of the ninth transistor Q9 is connected to the gates of the ninth MOS transistor M9 and the tenth MOS transistor M10.

[0096] The base of the twelfth transistor Q12 is connected to the A6 pin of the single chip microcomputer, the emitter of the twelfth transistor Q12 is grounded, the collector of the twelfth transistor Q12 is connected to the base of the eleventh transistor Q11, the emitter of the eleventh transistor Q11 is connected to the power module, and the collector of the eleventh transistor Q11 is connected to the gates of the eleventh MOS transistor M11 and the twelfth MOS transistor M12.

[0097] In the embodiment of the present application, the first transistor Q1 to the twelfth transistor Q12 are all PNP transistors.

[0098] In other embodiments, they may be replaced with P-MOS transistors, N-MOS transistors, NPN transistors, etc., and the circuit only needs to be adaptively adjusted according to the corresponding components.

[0099] The power supply module in the embodiment of the present application is a 12V VDD.

[0100] The second control circuit connected to the first commutation MOS transistor M13 and the second commutation MOS transistor M14 includes two transistors. Specifically, in the embodiment of the present application:

[0101] The base of the fourteenth transistor Q14 is connected to the A7 pin of the single chip microcomputer, the emitter of the fourteenth transistor Q14 is grounded, the collector of the fourteenth transistor Q14 is connected to the base of the thirteenth transistor Q13, the emitter of the thirteenth transistor Q13 is connected to the power module, and the collector of the thirteenth transistor Q13 is connected to the gate of the first commutation MOS transistor M13.

[0102] The base of the sixteenth transistor Q16 is connected to the A8 pin of the single chip microcomputer, the emitter of the sixteenth transistor Q16 is grounded, the collector of the sixteenth transistor Q16 is connected to the base of the fifteenth transistor Q15, the emitter of the fifteenth transistor Q15 is connected to the power module, and the collector of the fifteenth transistor Q15 is connected to the gate of the second commutation MOS transistor M14.

[0103] The second control circuit connected to the first switching MOS transistor M13 and the second switching MOS transistor M14 is different from the second control circuit connected to the third switching MOS transistor M15 and the fourth switching MOS transistor M16.

[0104] The third commutation MOS transistor M15 and the fourth commutation MOS transistor M16 are located in a position where the A7 and A8 pins of the microcontroller are directly connected to the bases of the commutation MOS transistors. Since the third commutation MOS transistor M15 and the fourth commutation MOS transistor M16 are both directly connected to the fourth node, and the fourth node is grounded, the output voltage of the microcontroller is generally 5V. Since one end of the commutation MOS transistor is grounded, when receiving the 5V microcontroller voltage, the third commutation MOS transistor M15 and the fourth commutation MOS transistor M16 can be directly turned on.

[0105] The first commutation MOS transistor M13 and the second commutation MOS transistor M14 are different. One end of the first commutation MOS transistor M13 and the second commutation MOS transistor M14 is connected to a third node, which corresponds to the positive electrode of the battery. Because the current of the first commutation MOS transistor M13 and the second commutation MOS transistor M14 needs to pass through the first control resistor Rx before flowing to ground, a relatively large voltage is required on the first commutation MOS transistor M13 and the second commutation MOS transistor M14. Therefore, through the conduction coordination of the two transistors, the 12V point voltage of the power module can be applied to the first commutation MOS transistor M13 and the second commutation MOS transistor M14 to achieve conduction.

[0106] An isolation diode D is connected between the first control circuit and the switch module. Specifically, in the embodiment of the present application:

[0107] The anode of the first isolation diode D1 is connected to the collector of the first transistor Q1 , and the cathode is connected to the gates of the first MOS transistor M1 and the second MOS transistor M2 .

[0108] The anode of the second isolation diode D2 is connected to the collector of the third triode Q3 , and the cathode is connected to the gates of the third MOS transistor M3 and the fourth MOS transistor M4 .

[0109] The anode of the third isolation diode D3 is connected to the collector of the fifth transistor Q5 , and the cathode is connected to the gates of the fifth MOS transistor M5 and the sixth MOS transistor M6 .

[0110] The anode of the fourth isolation diode D4 is connected to the collector of the seventh transistor Q7 , and the cathode is connected to the gates of the seventh MOS transistor M7 and the eighth MOS transistor M8 .

[0111] The anode of the fifth isolation diode D5 is connected to the collector of the ninth transistor Q9 , and the cathode is connected to the gates of the ninth MOS transistor M9 and the tenth MOS transistor M10 .

[0112] The anode of the sixth isolation diode D6 is connected to the collector of the eleventh transistor Q11 , and the cathode is connected to the gates of the eleventh MOS transistor M11 and the twelfth MOS transistor M12 .

[0113] Furthermore, a commutation diode is also provided between the second control circuit and the commutation module. In the embodiment of the present application:

[0114] The anode of the first commutation diode D7 is connected to the collector of the thirteenth transistor Q13 , and the cathode is connected to the base of the first commutation MOS transistor M13 .

[0115] The anode of the second commutation diode D8 is connected to the collector of the fifteenth transistor Q15 , and the cathode is connected to the base of the second commutation MOS transistor M14 .

[0116] When the single chip microcomputer outputs a corresponding control signal at the second controlled terminal, the transistor corresponding to the second controlled terminal will be turned on accordingly. The conduction of the transistor will control whether the commutation MOS tube can obtain power from the power module, thereby indirectly controlling the conduction of the commutation MOS tube;

[0117] Correspondingly, the same is true for the MOS tube of the switch module. The microcontroller outputs the corresponding control signal at the first controlled end, and the transistor corresponding to the first controlled end will be turned on accordingly. The conduction of the transistor will control whether the MOS tube on the switch module can obtain power from the power supply, thereby indirectly controlling the conduction of the switch module.

[0118] Both the collection point and the balancing point work through the third node, and the circuit loop has a common ground, that is, they are all connected to the fourth node. After the switch module and the commutation module cooperate with each other, they can generate the battery voltage at the third node, thereby realizing the common line of collection and balancing. This can effectively reduce the circuit design cost, and at the same time can effectively reduce the surge spike voltage generated by the lack of common ground. After reducing the surge spike voltage, you can choose a MOS tube with a smaller voltage value to further reduce the cost.

[0119] like Figure 4 As shown, the present application also discloses a battery pack balancing control method, comprising the following steps:

[0120] S100, selecting the Mth battery cell in the battery pack.

[0121] The value of M corresponds to the battery cell located in the middle of the battery pack in the initial state. For example, if there are 7 battery cells in the battery pack, M=4. If there are 8 battery cells in the battery pack, the value of M can be defined as 4 or 5.

[0122] S200 , enabling the reversing module to connect the four nodes in pairs according to a preset method corresponding to the Mth battery cell, and enabling the switch module corresponding to the Mth battery cell to be turned on.

[0123] In the preset method, if an odd number of battery cells need to be collected, such as the third battery cell, the second commutation MOS transistor M14 and the fourth commutation MOS transistor M16 are turned on, so that the first node is connected to the third node, the second node is connected to the fourth node, and the switch module of the third battery cell is turned on;

[0124] If an even-numbered battery cell, such as the fourth battery cell, needs to be collected, the first switching MOS tube M13 and the third switching MOS tube M15 are turned on to connect the first node to the fourth node and the second node to the third node, and the switch module of the fourth battery cell is turned on.

[0125] S300: collecting the battery voltage of the Mth battery cell.

[0126] S400: Turn off a switch module that is currently turned on according to a preset rule, and make M=M+1.

[0127] Specifically, the preset rules include:

[0128] Select the battery cell located adjacent to the negative pole of the Mth battery cell and define it as the new Mth battery cell, M = M + 1. If no battery cell exists in the negative pole direction of the Mth battery cell, select the battery cell located adjacent to the positive pole of the Mth battery cell and define it as the new Mth battery cell, M = M + 1. If the battery cell in the negative pole direction has already been collected, select the battery cell located adjacent to the positive pole and define it as the new Mth battery cell, M = M + 1.

[0129] For example, if there are five battery cells in the battery pack and the initial M is 0, the third battery cell is collected first. The M corresponding to the third battery cell is 0. After the third battery cell is collected, the battery cell located in the negative direction of the third battery cell and adjacent to it is selected and defined as the new M-th battery cell. The M corresponding to the fourth battery cell becomes 1.

[0130] Similarly, the M of the third battery cell is 0, the fourth is 1, and the fifth is 2. When the collection of the fifth battery cell is completed, there are no more battery cells in the negative direction, so the adjacent battery in the positive direction is selected again, that is, the fourth battery. At this time, the M corresponding to the fourth battery cell becomes 3. Because this battery has been collected, only the value of M is changed, but it is no longer collected. The third battery cell is 4, until the first battery cell is collected, M becomes 6.

[0131] S500 , repeating the above steps until the voltages of N battery cells are all sampled once.

[0132] When the voltage of one side of all five battery cells has been collected, the collection work is completed and the voltage values ​​of all battery cells are obtained.

[0133] The criteria for determining that all N battery cells have been sampled once are as follows:

[0134] If N is an odd number, then M=N+(N-1) / 2.

[0135] For example, if there are five battery cells, data collection starts from the third battery cell, and M is initially 1. In essence, data collection is performed twice from the third to the fourth battery cells, but only once from the first and second batteries. The fifth battery, as the last battery, is also only collected once. That is, the total number of battery cells is 5, plus the number of repeated collections is (5-1) / 2=2, and the final M value is 5+2=7. When M reaches 7, data collection stops.

[0136] If N is an even number, the battery at the bottom is selected by default, and the judgment standard is M=(N / 2)+N-1.

[0137] If there are 6 battery cells, data is collected from the fourth battery cell. M is initially 1. At this time, the fourth and fifth batteries will be collected repeatedly, because the first to third battery cells are only collected once, and the last battery cell is also only collected once. After calculation, M is 8. When M reaches 8, the collection stops.

[0138] S600: Balancing the battery group according to the collected voltage.

[0139] The battery pack is balanced accordingly based on the collected results.

[0140] Furthermore, when balancing a single battery, MOS tubes are used as components of the switch module or the commutation module. Due to their inherent characteristics, MOS tubes can only be turned off or on at zero current. During balancing, the corresponding balancing circuit needs to charge the battery, so current will definitely be generated. In this case, the MOS tubes cannot be turned off or on during balancing. Therefore, it is necessary to turn on the MOS tubes on the corresponding switch module and the commutation module before turning on balancing each time. After balancing is completed, it is also necessary to turn off balancing first and then turn off the corresponding MOS tubes.

[0141] At the same time, each time the MOS tube is turned off and on, a certain delay is performed so that the current in the loop can be completely eliminated, avoiding the problem of the MOS tube being unable to conduct due to the existence of current. The delay is generally 1 millisecond.

[0142] During the acquisition process, since no current is generated during the acquisition process, the acquisition can be turned on at any time. However, since the acquisition process also takes a certain amount of time, it does not need to be acquired quickly in real time. Therefore, in this application, the acquisition and balancing use the same control method and delay.

[0143] When both the switch module and the reversing module are not turned on, the circuit between the positive and negative poles of the battery pack is a voltage value formed by several battery cells connected in series. For example, if the voltage value of the entire battery pack is 100V, then when BT1 is turned on, the instantaneous voltage on the MOS tube corresponding to the last battery cell can reach 100V. In this way, a larger MOS tube is required for switch control to prevent damage to the MOS tube. However, through the method in the present application, the switch control is performed by giving priority to the battery cell located in the middle of the battery pack. At this time, the instantaneous voltage value on the MOS tube of the battery cell at both ends of the battery pack is only half of the voltage of the entire battery pack, that is, 50V. In this way, a smaller and more cost-effective MOS tube can be selected for switch control in actual use, further reducing costs.

[0144] The above are all preferred embodiments of the present application, and are not intended to limit the scope of protection of the present application. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A battery pack balancing control device, characterized in that: It includes a switch module, a reversing module and a first equivalent resistor Rx, wherein: There are N+1 switch modules, where N represents the number of battery cells. All N+1 switch modules are connected to the battery pack, and only one switch module is connected to the positive and negative electrodes of any battery cell. The reversing module has a first node, a second node, a third node, a fourth node, and a second controlled end. The first node is connected to the first connection ends of all even-numbered switch modules, and the second node is connected to the second connection ends of all odd-numbered switch modules. The third node and the fourth node are respectively connected to both ends of the first equivalent resistor Rx, and the fourth node is grounded. The reversing module controls the connection and disconnection between the first node and the third node, the first node and the fourth node, the second node and the third node, and the second node and the fourth node according to the signal received by the second controlled end. The switch module includes two MOS transistors and a second equivalent resistor R. The sources of the two MOS transistors are connected, and the gates of the two MOS transistors are connected and together constitute a first controlled end. The drain of one MOS transistor in the even-numbered switch modules is connected to the first node of the reversing module, and the drain of the other MOS transistor is connected to the positive electrode of the battery cell. The drain of one MOS transistor in the odd-numbered switch modules is connected to the second node of the reversing module, and the drain of the other MOS transistor is connected to the negative electrode of the battery cell. One end of the second equivalent resistor R is connected between the sources of the two MOS transistors of the same switch module, and the other end is connected between the gates of the two MOS transistors; A control method for a balancing control device, comprising: S100, selecting the Mth battery cell in the battery pack, wherein M in the initial state corresponds to the middle battery cell in the battery pack; S200, causing the reversing module to connect the four nodes in pairs according to a preset method corresponding to the Mth battery cell, and causing the switch module corresponding to the Mth battery cell to be turned on; S300, collecting the battery voltage of the Mth battery cell; S400, turning off a switch module that is currently turned on according to a preset rule, and making M=M+1; S500, repeating steps S100-S400 until the voltages of N battery cells are all collected once; S600 balances the battery pack based on the collected voltage, specifically including: S610, turning on the switch module on the positive electrode of the M-th battery cell and performing a delay for a preset time; S620, after the delay ends, turning on the switch module on the negative electrode of the M-th battery cell and performing a delay for a preset time; S630, after the delay ends, turning on the reversing module corresponding to the M-th battery cell and performing a delay for a preset time; S640, after the delay ends, balancing the M-th battery cell; S650: After the balancing is completed, a preset time delay is performed, and the balancing is stopped after the delay.

2. The battery pack balancing control device according to claim 1, characterized in that: The switching module includes a first switching MOS transistor, a second switching MOS transistor, a third switching MOS transistor, and a fourth switching MOS transistor. There are four second controlled terminals, wherein: The gate of the first commutation MOS transistor forms a second controlled terminal, the source of the first commutation MOS transistor is connected to the first node, and the drain of the first commutation MOS transistor is connected to the third node; The gate of the second commutation MOS transistor forms a second controlled terminal, the source of the second commutation MOS transistor is connected to the second node, and the drain of the second commutation MOS transistor is connected to the third node; The gate of the third commutation MOS transistor forms a second controlled terminal, the drain of the third commutation MOS transistor is connected to the second node, and the source of the third commutation MOS transistor is connected to the fourth node; The gate of the fourth commutation MOS transistor forms a second controlled end, the drain of the fourth commutation MOS transistor is connected to the first node, and the source of the fourth commutation MOS transistor is connected to the fourth node.

3. A battery pack balancing control system, characterized by: The device comprises an acquisition module, a balancing module, a processing module, a power supply module, and a balancing control device for a battery pack as claimed in claim 1 or 2, wherein: The acquisition module is connected to the third node to acquire the voltage of the battery cell, and the balancing module is connected to the third node to balance the battery pack according to the acquisition result; The processing module is connected to the first controlled end of the switch module and the second controlled end of the reversing module to control the on / off and switching of the switch module and the reversing module respectively; The processing module is also used to control the connection and disconnection between the balancing module and the balancing control device, and between the acquisition module and the balancing control device; The power supply module is used to provide a power supply voltage for the switch module to conduct.

4. The battery pack balancing control system according to claim 3, characterized in that: The processing module includes a single-chip microcomputer, a first control circuit, and a second control circuit. The single-chip microcomputer includes N+3 pins, wherein pins 1 to N+1 are respectively connected to N+1 first control circuits, and the N+1 first control circuits are respectively connected to the switch-controlled end of the switch module. The first control circuit is used to control the on-off of the corresponding switch module according to the instruction of the single-chip microcomputer. Pins N+2 to N+3 on the single-chip microcomputer are connected to the second control circuit, and the second control circuit is used to control the on-off of the corresponding reversing module according to the instruction of the single-chip microcomputer, and the second control circuit is connected to the second controlled end of the reversing module. The second control circuit connected to the first and third reversing MOS transistors is connected to the N+2 pin, and the second control circuit connected to the second and fourth reversing MOS transistors is connected to the N+3 pin.

5. The battery pack balancing control system according to claim 4, characterized in that: The first control circuit includes two transistors, wherein the base of one transistor is connected to the corresponding pin of the single-chip microcomputer to receive a level control signal, the emitter of the transistor is grounded, the collector of the transistor is connected to the base of another transistor, the emitter of the other transistor is connected to a power module, and the collector of the other transistor is connected to an isolation diode.

6. The battery pack balancing control system according to claim 4, characterized in that: The second control circuit connected to the first commutation MOS transistor and the second commutation MOS transistor includes two transistors, wherein the base of the transistor is connected to the pin of the single-chip microcomputer to receive the level control signal, the emitter of the transistor is grounded, the collector of the transistor is connected to the base of another transistor, the emitter of the other transistor is connected to the power module, and the collector of the other transistor is connected to the commutation module.

7. The battery pack balancing control system according to claim 5, characterized in that: An isolation diode is provided between the first control circuit and the switch module. The anode of the isolation diode is connected to the first control circuit and the power module, and the cathode of the isolation diode is connected to the switch module.

8. The battery pack balancing control system according to claim 6, characterized in that: A commutation diode is provided between the second control circuit and the commutation module. The anode of the commutation diode is connected to the second control circuit and the power module, and the cathode of the commutation diode is connected to the commutation module.

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