Method for determining material parameters of a multi-layer test sample

Abstract

A multilayer test sample includes a stack having a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers. The multilayer test sample has terminals below the stack for performing measurements on the stack. The positions of the terminals or the distances between them are unknown. A model and measurement strategy are defined to allow determination of material parameters of the stack.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the disclosures of provisional patent application filed on December 9, 2021, and assigned U.S. application No. 63 / 242,054, the disclosures of which are incorporated by reference. Technical Field

[0003] The present disclosure relates to a method and computer system for determining material parameters of a multilayer test sample, such as a multilayer test sample including a stack defining a tunnel junction (a tunnel layer sandwiched between a conductive bottom layer and a conductive top layer, the tunnel layer having a thickness such that tunneling of electrons occurs between the top and bottom layers). Background Art

[0004] The multi-layer test sample can be arranged as described in WO 2020 / 205236, which is incorporated by reference into this disclosure. Figure 1 and 2 This multi-layer test sample is described in more detail.

[0005] from Figure 1 and 2 As will be apparent from the description, in this embodiment the stack is contacted from the bottom by terminals which have fixed but unknown positions relative to each other.

[0006] In addition to the terminals below the stack, the multilayer test sample has terminals for contacting the electrodes of the measurement circuit. The position of these electrodes can vary with each measurement.

[0007] An example of determining the position of a movable electrode dropped onto a test sample is described in EP3566062, which is incorporated herein by reference. However, EP3566062 does not disclose how to determine material parameters when the stack is contacted from below or from the top via fixed, non-movable terminals. Summary of the Invention

[0008] A first aspect of the present disclosure is a method for determining material parameters of a multilayer test sample. The multilayer test sample comprises a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers; a plurality of test sample terminals for connecting to a measurement circuit, such as a multipoint probe, the measurement circuit having a plurality of electrodes; and a plurality of stack terminals located below or above the stack, such that each stack terminal is electrically connected to the bottom layer or the top layer.

[0009] The method comprises:

[0010] - providing said multi-layer test sample,

[0011] - providing a resistance model representing the multi-layer test sample, the resistance model outputting a resistance value as a function of a set of stack termination parameters and a set of stack material parameters,

[0012] - providing a plurality of conductive paths, each conductive path electrically interconnecting a corresponding test sample terminal and a corresponding stack terminal,

[0013] - bringing the test sample terminal into contact with the electrode,

[0014] - Determine at least six different measured resistance values by six measurements, each measured resistance value being determined in the corresponding measurement by the following steps

[0015] - selecting four different test sample terminals of the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals,

[0016] - injecting a current into the test sample through the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals and determining each resistance value as a function of the voltage and the current,

[0017] For each measured resistance value a partial error function is defined, the partial error function defining the error between the resistance model and the corresponding measured resistance value,

[0018] Define the error function including each partial error and define the total error,

[0019] Each set of stack terminal parameters and the set of stack material parameters in each resistor model are varied in the error function so as to minimize the total error.

[0020] A second aspect of the present disclosure is a method for determining material parameters of a multilayer test sample. The multilayer test sample comprises a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers; a plurality of test sample terminals for connecting to a measurement circuit, such as a multipoint probe, the measurement circuit having a plurality of electrodes; and a plurality of stack terminals located below or above the stack, each stack terminal being electrically connected to the bottom layer or the top layer.

[0021] The method comprises:

[0022] - providing said multi-layer test sample,

[0023] - providing a resistance model representative of said multilayer test sample,

[0024] The resistance model outputs a resistance value as a function of a set of stack terminal parameters and a set of stack material parameters,

[0025] - providing a plurality of conductive paths, each conductive path electrically interconnecting a corresponding test sample terminal and a corresponding stack terminal,

[0026] - bringing the test sample terminal into contact with the electrode,

[0027] - Determine at least six different measured resistance values by six measurements, each measured resistance value being determined in the corresponding measurement by the following steps

[0028] - selecting four different test sample terminals of the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals,

[0029] - injecting a current into the test sample through the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals and determining each resistance value as a function of the voltage and the current,

[0030] For each measured resistance value, define the equation

[0031] a partial error function defining the error between the resistance model and the corresponding measured resistance value,

[0032] defining a set of equations, each equation defining an equality between a corresponding measured resistance and the resistance model,

[0033] The set of equations is solved for the set of stack material parameters.

[0034] A third aspect of the present disclosure is a computer-based system for determining material parameters of a multi-layer test sample. The multi-layer test sample comprises: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers; a plurality of test sample terminals for connecting to measurement circuitry, such as a multi-point probe; a plurality of stack terminals located below or above the stack, such that each stack terminal is electrically connected to the bottom layer or the top layer; and a plurality of conductive paths, each conductive path electrically interconnecting a corresponding test sample terminal and a corresponding stack terminal.

[0035] The computer-based system comprises:

[0036] A measuring system arranged for determining at least six different measured resistance values by six measurements, each measured resistance value being determined in a respective measurement by the following steps

[0037] selecting four different test sample terminals of the plurality of test sample terminals and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals,

[0038] injecting a current into the test sample through the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals, and determining each resistance value as a function of the voltage and the current,

[0039] - a processing unit and a memory, wherein the memory comprises:

[0040] A resistance model representing the multilayer test sample,

[0041] The resistance model outputs a resistance value as a function of a set of stack terminal parameters and a set of stack material parameters, and for each measured resistance value, the processing unit is arranged to

[0042] defining a partial error function that defines the error between the resistance model and the corresponding measured resistance value,

[0043] Define the error function including each partial error and define the total error,

[0044] Each set of stack terminal parameters and the material parameters in each resistor model are changed to minimize the total error.

[0045] From one measurement to the next, the respective electrodes may have varying positions on the respective test sample terminals, but the resistance model may assume that the measured resistance values are independent of the positions of the plurality of electrodes on the test sample terminals.

[0046] The test sample terminals may have a larger area than corresponding stack terminals.

[0047] The error function may include a term for each partial error function.

[0048] The error defined by each partial error function may be the difference between the resistance model and the corresponding measured resistance value.

[0049] The test sample includes at least five test stack terminals. In an example, the test sample includes at least five test sample terminals.

[0050] The set of stack terminal parameters may include the distance between the stack terminals. Alternatively, the set of stack terminal parameters may include the position of the stack terminals. In an example, the set of stack terminal parameters may include the position of each stack terminal.

[0051] The set of stack material parameters may include the sheet resistance of the bottom layer, in one example, the sheet resistance of the top layer, and a resistance representing the tunnel / barrier layer (eg, resistance-area product).

[0052] Hereinafter, specific examples according to aspects of the present disclosure will be described in more detail with reference to the accompanying drawings. However, the present disclosure may be embodied in forms different from those depicted below and should not be construed as limiting any of the examples set forth herein. Rather, any examples are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art. The same reference numerals refer to the same elements throughout the text. Therefore, the same elements will not be described in detail relative to the description of each figure. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 Shows an exploded view of the test sample.

[0054] Figure 2 Shows the test sample connected to the electrodes.

[0055] Figure 3 A schematic perspective view showing a computer-based system for measuring multi-layer test samples. DETAILED DESCRIPTION

[0056] Although the claimed subject matter will be described in terms of certain embodiments, other embodiments, including embodiments that do not provide all of the benefits and features described herein, are also within the scope of this disclosure. Various structural, logical, process step, and electrical changes may be made without departing from the scope of this disclosure. The scope of this disclosure is therefore to be defined solely by reference to the appended claims.

[0057] Figure 1 Shows an exploded view of the test sample.

[0058] The test sample 10 has five layers, of which the top three layers constitute a magnetic tunnel junction (MTJ), ie, an MTJ stack.

[0059] The test sample may constitute a semiconductor wafer including at least two conductive layers and a tunneling electrical insulating layer (eg, MTJ) sandwiched therebetween.

[0060] The top layer 12 of the MTJ stack may or may not contain ferromagnetic material, but it is electrically conductive.

[0061] The magnetization direction of the top layer can be changed.

[0062] An intermediate layer 14 is sandwiched between the top and bottom layers 16 of the MTJ stack.

[0063] The intermediate layer is a thin electrical insulator whose thickness is not so great that electrons cannot tunnel through the intermediate layer, ie, the intermediate layer is a tunneling barrier layer.

[0064] The bottom layer 16 may or may not also contain ferromagnetic material, but is electrically conductive.

[0065] Alternatively, the top layer may have a permanent magnetization and the bottom layer may have a variable magnetic moment direction.Both layers may also have variable magnetic moment directions.

[0066] When a voltage potential is applied across the stack, the resistance of the stack may depend on whether the magnetizations of the top and bottom layers are parallel or antiparallel, ie, if they are parallel, the tunneling barrier is lower than if the magnetizations are antiparallel.

[0067] The top layer is illustrated with a flat top surface, and the layers are generally illustrated as parallel to each other.

[0068] The stack may also have more than two conductive layers and a barrier with several electrical properties to be measured.

[0069] Alternatively, the layers of the test sample may have another function than the MRAM cell, for example, a stack having only two layers intended to function as a sensor.

[0070] The three layers of stacking Figure 1 There are eight islands shown in FIG. 1 , namely seven smaller islands adjacent to each other in a row and a single larger island (e.g., a test island constituting an MTJ stack 28 for MRAM or sensor purposes). This is a result of etching in the stack layer, which makes the islands electrically isolated from each other, i.e., the islands are not electrically connected to each other.

[0071] The removed portions of the layer may also consist of an oxide material or another material that constitutes an electrical insulator, ie, so that the spaces between the islands themselves and the spaces between the islands and the MTJ stack are filled with an electrical insulator material.

[0072] The seven smaller islands constitute seven test sample terminals, which may have the purpose of landing pads, such as a first landing pad 26, which has a first landing area (i.e., exposed surface 30) on top of the landing pad that is not covered by another layer on top (except for possibly a thin oxide layer).

[0073] The test sample terminals may have any in-plane shape. Figure 1 Rectangular shapes / areas are shown, but shapes can be circular, oval, elliptical, polygonal, or random.

[0074] Each landing area of each landing pad is used to land a probe tip / electrode, i.e., the probe tip is brought into contact with the landing area so that an electrical signal can be injected into the landing pad during a measurement routine, or alternatively, an electrical measurement signal can be picked up. In this way, a terminal is provided on the test sample for the probe and for performing probe measurements with the measurement circuit.

[0075] Instead of using probes, the test sample may be inserted into a measurement device, wherein the measurement terminals have fixed positions that align with the positions of the test sample terminals when the test sample is correctly placed in the measurement device.

[0076] Below the MTJ stack is a fourth layer constituting a first electrically insulating layer 18, ie a layer in which free flow of current is not desired without controlling the current path.

[0077] Below the fourth electrically insulating layer is a fifth layer which constitutes the second electrically insulating layer 20 .

[0078] The first electrically insulating layer and the second electrically insulating layer may be formed into one electrically insulating layer.

[0079] The first electrically insulating layer has through-holes, for example first through-holes 22 extending vertically throughout the thickness of said layer.

[0080] Seven vias are positioned below the larger island as shown, all of which contact the bottom surface of the bottom layer of the MTJ stack and constitute terminals for contacting the MTJ stack.

[0081] As an alternative, the stack terminals may contact the top layer from above. It is contemplated that several layers may be above the top layer of the stack, with the stack terminals passing through these layers.

[0082] The sample terminals may be located in a higher layer than the stack terminals, regardless of whether the stack terminals are connected to the bottom layer of the stack or the top layer of the stack.

[0083] In the second electrically insulating layer there are seven copper vias, ie copper deposited during one of the manufacturing steps (another conductive material than copper may be used).

[0084] The copper channels constitute conductive paths, such as the first conductive path 24 .

[0085] The conductive paths run parallel to the layers, and each conductive path interconnects the via for one landing pad with one of the vias contacting the MTJ stack.

[0086] For example, one of the electrically insulating layers may also be used for electrical connections to control electronics such as a switch.The switch itself may be placed in a sixth layer which may be below the electrically insulating layer.

[0087] The landing pads do not necessarily have to be composed of three MTJ layers. Alternatively, the landing pads can be semiconductor material deposited or otherwise created as islands on the first electrically insulating layer that can conduct electrical signals from the probe tip to vias that contact the corresponding landing pads from below.

[0088] The five test sample terminals have been designated with letters A to E.

[0089] exist Figure 2 In the example, the probe has been placed above the test sample.

[0090] The test sample is shown in a non-exploded view. Vias and conductive paths are illustrated as dashed lines below the top three layers.

[0091] The probe has seven cantilevers extending parallel to each other. Each cantilever terminates in a probe tip / electrode, such as the first probe tip 32.

[0092] Each respective probe tip has contacted the landing area of each respective landing pad, ie, the first probe tip 32 contacts the first landing pad 26 , while the first through hole 22 contacts the first landing pad from below.

[0093] The probe tip may penetrate a possible oxide layer on top of the landing pad so that electrical contact may be established between the landing pad and the probe tip.

[0094] The probe tip can penetrate the landing pad a short distance so that it does not just rest on the surface forming the landing area.

[0095] The vias and conductive paths can complete a circuit path from one probe tip to another probe tip, so that current can be injected into the circuit path and into the MTJ stack and further to the second probe tip.

[0096] Figure 3 A schematic perspective view showing a computer-based system for measuring multi-layer test samples.

[0097] The computer-based system includes measurement circuitry 42, which includes a multi-probe measurement setup connected to a stationary computer 44 and / or a laptop computer for controlling the measurements. The stationary computer 44 and / or laptop computer and the subsystems therein may include any suitable processor (or processing unit) known in the art, such as a parallel processor. In addition, the subsystem or system may include a platform with high-speed processing and software, as a stand-alone or networked tool. Program instructions implementing methods such as those described herein may be transmitted or stored on a carrier medium. The carrier medium may include storage media such as read-only memory, random access memory, magnetic or optical disks, non-volatile memory, solid-state memory, magnetic tape, and the like. The carrier medium may include transmission media such as wires, cables, or wireless transmission links. In addition, the various subsystems of the stationary computer 44 and / or laptop computer may include one or more computing or logic systems. Therefore, the above description should not be construed as limiting the present disclosure, but rather merely illustrative.

[0098] Multi-point probe includes Figure 1 There are five electrodes designated as A to E in FIG, and they are in contact with the multilayer test sample, such as Figure 2 In display.

[0099] The multilayer test sample measurement can then be started. As a first step, a model for the resistance of the stack can be defined as:

[0100]

[0101]

[0102] where the index i refers to a different resistance measurement (1 to 6), and x i 、y i 、z i and w i Is used for a specific R i Measure the distance between the five stack terminals connected to the test sample terminals A to E at the bottom of the stack in the i configuration.

[0103] The only electrode spacing assumed to be known may be the distance between the two outermost stack terminals (connected to test sample terminals A and E, respectively). Instead, all other distances between the stack terminals are to be determined.

[0104] x i The distance between the two stack terminals connected to the test sample terminals A and B, respectively, or other inter-electrode distances may be defined.

[0105] y i The distance between the two stack terminals connected to the test sample terminals B and C, respectively, or other inter-electrode distances may be defined.

[0106] z i The distance between the two stack terminals connected to the test sample terminals C and D, respectively, or other inter-electrode distances may be defined.

[0107] w i The distance between the two stack terminals connected to the test sample terminals D and E, respectively, or other inter-electrode distances may be defined.

[0108] The unknown material parameter is the top sheet resistance R T , bottom sheet resistance R B And the tunneling resistance area product RA.

[0109] K0 is a modified Bessel function of the second kind of order zero.

[0110] The method assumes that, unlike the prior art, the measured resistance is independent of the landing position of the movable electrode of the measurement circuit. Therefore, variables / parameters related to the geometric relationship between the electrode and the test sample terminals are not input into the resistance model. Instead, the parameters defining the distance between the fixed stack terminals are used to define the resistance R of the test sample. i and the test sample parameters (R T 、R B , RA), and the resistance model is input as (x i 、y i 、z i 、wi ).

[0111] However, depending on the size of the test sample terminals, if the test sample terminals become smaller, this assumption behind the model in the present disclosure may lead to errors, and for example, the distance between the test sample terminals (χ, γ, σ, ω) must also be entered into the equation (resistance model), where χ is known to be within the error tolerance and can define the distance between the two electrodes in contact with test sample terminals A and B, respectively. γ is known to be within the error tolerance and can define the distance between the two electrodes in contact with test sample terminals B and C, respectively. σ is known to be within the error tolerance and can define the distance between the two electrodes in contact with test sample terminals C and D, respectively. ω defines the distance between the electrodes connected to the two outermost test sample terminals (A and E, respectively) and is estimated (set as a constant).

[0112] The test sample terminals used in each of the six measurements can be defined as follows:

[0113] Measurement# Voltage pair Current 1 A,C B,E 2 A,C B,D 3 A,E B,C 4 A,E B,D 5 B,D C,E 6 B,C A,D

[0114] From one measurement to another, at least one of the pins will be changed.

[0115] Therefore, for the first measurement, in a first step, the electrodes are brought into contact with each other. Figure 1 The current is injected into the test sample by connecting the test sample terminals B and E on the test sample.

[0116] In the second step, the electrodes are brought into contact with each other. Figure 1 The voltage is measured across terminals A and C of the test sample.

[0117] The resistance can then be determined in a third step by Ohm's law from the injected current and the measured voltage.

[0118] Next, repeat the above three steps using the voltage and current pairs defined in the table above until six measured resistance values have been determined.

[0119] The resistance model has been chosen to approximate or model the measured resistance. The difference or error between the measured resistance and the model can be:

[0120]

[0121] Where vector p is the material parameter R T 、R B, RA, and vector d is the distance between the stack terminals used in the measurement. Since these parameters are fixed but unknown (except for one stack terminal distance, which is assumed to be known), there are a total of six unknown parameters in function f (i.e., three from the sample and three from the fixed stack terminal distance). However, with six measurements, six equations can be established and solved for the six unknown parameters.

[0122] Alternatively, for each measured resistance value, a (partial) error function may be defined, which defines the error or difference between (the output of) the resistance model and the corresponding measured resistance value.

[0123] All six partial error functions may be input into a (total) error function, and each set of stack terminal parameters and each set of stack material parameters in each resistor model in the total error function may be varied to minimize the total error.

[0124] The error function that defines the total error can be defined as:

[0125]

[0126] Variation of the parameter may continue until the error changes by less than a threshold, for example, when the parameter is varied by up to 5% or 10% and the error does not decrease by, for example, more than 1%. In this case, the material parameter is considered to be determined and has a value at which the error no longer changes substantially.

[0127] Although the present disclosure has been described with respect to one or more specific embodiments, it should be understood that other embodiments of the present disclosure may be made without departing from the scope of the present disclosure. Therefore, the present disclosure is considered to be limited only by the appended claims and a reasonable interpretation thereof.

Claims

1. A method for determining material parameters of a multi-layer test sample, the method comprising: A multi-layer test sample is provided, the multi-layer test sample comprising: a stack comprising a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer, a plurality of test sample terminals for connecting to a measurement circuit having a plurality of electrodes, and a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer, providing a resistance model representing the multi-layer test sample, the resistance model outputting a resistance value as a function of a set of stack terminal parameters and a set of stack material parameters, wherein the set of stack terminal parameters includes a distance between stack terminals, providing a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test sample terminals and one of the stack terminals, bringing the test sample terminal into contact with the electrode, At least six different measured resistance values are determined using six measurements, each of the measured resistance values being determined in one of the measurements by the following steps: selecting four different test sample terminals of the plurality of test sample terminals and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals, and injecting current into the multi-layer test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the resistance values as a function of the voltage and the current, for each of the measured resistance values defining a partial error function, the partial error function defining an error between the resistance model and one of the measured resistance values, Define the error function that includes each partial error and define the total error, and The set of stack terminal parameters and each of the set of stack material parameters in each of the resistance models are varied in the error function such that the total error is minimized. 2 . The method of claim 1 , further comprising solving a set of equations for the set of stack terminal parameters. The method of claim 1 , wherein each of the stacked terminals has a fixed position.

4. The method of claim 1, wherein one of the electrodes has a varying position on one of the test sample terminals from one measurement to the next. 5 . The method of claim 1 , wherein the resistance model assumes that the measured resistance value is independent of positions of the plurality of electrodes on the test sample terminal. The method of claim 1 , comprising landing the plurality of electrodes on the test sample terminals. 7 . The method according to claim 1 , wherein each of the test sample terminals has a larger area than one of the stack terminals. The method of claim 1 , wherein the error function includes a term for each of the partial error functions.

9. The method of claim 1, wherein the error is defined by each of the partial error functions as a difference between the resistance model and one of the measured resistance values.

10. The method of claim 1, wherein the test sample comprises at least five test stack terminals. 11 . The method of claim 1 , wherein the set of stack terminal parameters further comprises a position of a stack terminal or a position of each of the stack terminals.

12. The method of claim 1, wherein the set of stack material parameters comprises a resistance value of the bottom layer and optionally a resistance value of the top layer and / or a resistance value of the tunnel layer.

13. The method of claim 1, wherein the multi-layer test sample comprises an electrically insulating layer. The method of claim 13 , wherein the plurality of electrically conductive paths are embedded in the electrically insulating layer.

15. A method for determining material parameters of a multi-layer test sample, the method comprising: Providing the multi-layer test sample, the multi-layer test sample comprises: a stack comprising a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer, a plurality of test sample terminals for connecting to a measurement circuit having a plurality of electrodes, and a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer, providing a resistance model representing the multi-layer test sample, the resistance model outputting a resistance value as a function of a set of stack terminal parameters and a set of stack material parameters, wherein the set of stack terminal parameters includes a distance between stack terminals, providing a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test sample terminals and one of the stack terminals, bringing the test sample terminal into contact with the electrode, At least six different measured resistance values are determined using six measurements, each of the measured resistance values being determined in a respective measurement by the following steps: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals, and injecting current into the test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the measured resistance values as a function of the voltage and the current, for each measured resistance value defining a partial error function, the partial error function defining an error between the resistance model and one of the measured resistance values, defining a set of equations, each of which defines equality between one of the measured resistance values and the resistance model, and The set of equations is solved for the set of stack material parameters.

16. The method of claim 15, further comprising solving the set of equations for the set of stack terminal parameters. The method of claim 15 , wherein each of the stacked terminals has a fixed position.

18. The method of claim 15, wherein one of the electrodes has a changing position on one of the test sample terminals from one measurement to the next.

19. The method of claim 15, wherein the resistance model assumes that the measured resistance value is independent of positions of the plurality of electrodes on the test sample terminal.

20. The method of claim 15, comprising landing the plurality of electrodes on the test sample terminals.

21. The method of claim 15, wherein each of the test sample terminals has a larger area than one of the stack terminals.

22. The method of claim 15, wherein the error function includes a term for each of the partial error functions.

23. The method of claim 15, wherein the error is defined by each of the partial error functions as a difference between the resistance model and one of the measured resistance values.

24. The method of claim 15, wherein the test sample comprises at least five test stack terminals.

25. The method of claim 15, wherein the set of stack material parameters further comprises a position of a stack terminal or a position of each of the stack terminals.

26. The method of claim 15, wherein the set of stack material parameters comprises a resistance value of the bottom layer and optionally a resistance value of the top layer and / or a resistance value of the tunnel layer.

27. The method of claim 15, wherein the multi-layer test sample comprises an electrically insulating layer.

28. The method of claim 27, wherein the plurality of conductive paths are embedded in the electrically insulating layer.

29. A computer-based system for determining material parameters of a multi-layer test sample, the multi-layer test sample comprising: a stack comprising a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer; a plurality of test sample terminals for connecting to a measurement circuit; a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer; and a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test sample terminals and one of the stack terminals, the computer-based system comprising: A measuring system arranged for determining at least six different measured resistance values using six measurements, each of said measured resistance values being determined in a respective measurement by the following steps: selecting four different test sample terminals of the plurality of test sample terminals and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals, and injecting current into the multi-layer test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the resistance values as a function of the voltage and the current, and A processing unit and a memory, wherein the memory comprises: a resistance model representing the multi-layer test sample, the resistance model outputting a resistance value as a function of a set of stack terminal parameters and a set of stack material parameters, wherein the set of stack terminal parameters includes a distance between stack terminals, For each of the measured resistance values, the processing unit is configured to: defining a partial error function that defines an error between the resistance model and one of the measured resistance values, defining an error function including each of the partial errors and defining a total error, and Each of the set of stack terminal parameters and the material parameters in the resistance model is varied such that the total error is minimized.

30. The computer-based system of claim 29, wherein the set of stack terminal parameters further comprises a position of the or each of the stack terminals.

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