Copper-ceramic bonding material and insulating circuit board

Abstract

The copper-ceramic joint (10) has copper components (12, 13) made of copper or copper alloy and ceramic components (11) made of silicon nitride. The copper components (12, 13) and the ceramic components (11) are joined. At the interface between the ceramic components (11) and the copper components (12, 13), an active metal nitride layer (21) is formed on the side of the ceramic components (11). The area fraction of the active metal compound containing Si and active metal in the region of 10 μm from the active metal nitride layer (21) toward the copper components (12) is less than 10%, and the area fraction P of the active metal compound in the peripheral region (A) of the copper components (12) is less than 10%. A The area ratio P of active metal compounds in the central region (B) of the copper component (12) B The ratio of P A / P B It is in the range of 0.7 or higher and 1.4 or lower.

Description

Technical Field

[0001] The present invention relates to a copper-ceramic bonding body formed by joining a copper component made of copper or a copper alloy and a ceramic component, and an insulating circuit board formed by bonding a copper plate made of copper or a copper alloy to the surface of a ceramic substrate.

[0002] This application claims priority based on Japanese Patent Application No. 2021-117950, filed on July 16, 2021, the contents of which are incorporated herein by reference. Background Technology

[0003] Power modules, LED modules, and thermoelectric modules are structures formed by bonding power semiconductor elements, LED elements, and thermoelectric elements onto an insulating circuit board on one side of an insulating layer where a circuit layer made of conductive material is formed.

[0004] For example, power semiconductor devices used for controlling high-power applications such as wind power generation, electric vehicles, and hybrid electric vehicles generate a lot of heat during operation. Therefore, as the substrate on which these power semiconductor devices are mounted, the following insulating circuit board has been widely used. This insulating circuit board includes: a ceramic substrate; a circuit layer formed by bonding a metal plate with excellent conductivity to one side of the ceramic substrate; and a heat dissipation metal layer formed by bonding a metal plate to the other side of the ceramic substrate.

[0005] For example, Patent Document 1 discloses an insulating circuit board in which a circuit layer and a metal layer are formed by bonding copper plates to one and the other sides of a ceramic substrate. In Patent Document 1, copper plates are placed on one and the other sides of a ceramic substrate with an Ag-Cu-Ti solder between them, and the copper plates are bonded by heat treatment (so-called active metal brazing).

[0006] Furthermore, Patent Document 2 proposes a power module substrate that uses a bonding material containing Ag and Ti to bond a copper plate made of copper or a copper alloy and a ceramic substrate made of silicon nitride.

[0007] As described above, when a Ti-containing bonding material is used to bond a copper plate and a ceramic substrate, Ti, as an active metal, reacts with the ceramic substrate, thereby improving the wettability of the bonding material and increasing the bonding strength between the copper plate and the ceramic substrate.

[0008] However, there has been a recent trend of increasing heat generation temperature of semiconductor devices mounted on insulating circuit boards. As a result, insulating circuit boards are required to have higher thermal cycling reliability than ever before, capable of withstanding severe thermal cycling.

[0009] Here, as mentioned above, when Ti-containing bonding materials are used to bond copper plates and ceramic substrates, Ti, as an active metal, diffuses towards the copper plate side, precipitating intermetallic compounds containing Cu and Ti. As a result, the area near the bonding interface hardens, and the ceramic component may crack during thermal cycling, potentially reducing its reliability.

[0010] Patent Document 1: Japanese Patent No. 3211856

[0011] Patent Document 2: Japanese Patent Application Publication No. 2018-008869 Summary of the Invention

[0012] The present invention was made in view of the above circumstances, and its object is to provide a copper-ceramic bonding body that can suppress the generation of cracks in ceramic components even under severe thermal cycling and has excellent thermal cycling reliability, and an insulating circuit board made of the copper-ceramic bonding body.

[0013] To address the aforementioned issues, the inventors conducted in-depth research and discovered that when a bonding material containing active metal is used to bond ceramic and copper components, the liquid phase generated during bonding is repelled from the central portion of the copper component to the peripheral portion. The peripheral portion of the copper component contains a relatively higher amount of active metal, resulting in a tendency for the peripheral region of the copper component to be harder than the central region at the bonding interface between the ceramic and copper components. Therefore, it was concluded that during thermal cycling under load, stress concentrates at the bonding interface in the harder peripheral region of the copper component, making the ceramic component more prone to cracking.

[0014] This invention is based on the above-mentioned insights. One aspect of this invention involves a copper-ceramic joint formed by joining a copper component made of copper or a copper alloy and a ceramic component made of silicon nitride. The invention is characterized in that, at the interface between the ceramic component and the copper component, an active metal nitride layer is formed on the ceramic component side. The area fraction of the active metal compound containing Si and an active metal in a region of 10 μm from the active metal nitride layer towards the copper component side is 10% or less, and the area fraction P of the active metal compound in the peripheral region of the copper component is... A and the area ratio P of the active metal compound in the central region of the copper component B The ratio of P A / P B It is in the range of 0.7 or higher and 1.4 or lower.

[0015] A copper-ceramic joint has the copper component and the ceramic component, or it can be said that it is formed by joining the copper component and the ceramic component.

[0016] According to one aspect of the present invention, the copper-ceramic joint can suppress the joint interface between the ceramic component and the copper component from becoming too hard because the area fraction of the active metal compound containing Si and active metal in the region of 10 μm from the active metal nitride layer toward the copper component side at the joint interface with the copper component bonded to at least one side of the ceramic component is less than 10%.

[0017] Furthermore, due to the area ratio P of the active metal compound in the peripheral region of the copper component... A and the area ratio P of the active metal compound in the central region of the copper component B The ratio of P A / P B Within the range of 0.7 to 1.4, the hardness of the peripheral region and the central region of the copper component will not differ significantly, which can suppress the generation of cracks in the ceramic component under load thermal cycling and result in excellent thermal cycling reliability.

[0018] In this embodiment of the invention, in a copper-ceramic joint, the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper component is preferably specified. A The thickness t1 of the active metal nitride layer formed in the central region of the copper component B Within the range of 0.05 μm and 0.8 μm, the thickness ratio t1 A / t1 B It is in the range of 0.7 or higher and 1.4 or lower.

[0019] At this time, due to the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper component... A The thickness t1 of the active metal nitride layer formed in the central region of the copper component B Within the range of 0.05μm to 0.8μm, the ceramic component and the copper component are reliably and firmly bonded by the active metal, and the hardening of the bonding interface is further suppressed.

[0020] Furthermore, due to the thickness being greater than t1 A / t1 B Within the range of 0.7 to 1.4, the hardness of the joint interface in the peripheral and central regions of the copper component does not differ significantly, which can further suppress the generation of cracks in the ceramic component under load thermal cycling.

[0021] Furthermore, in the copper-ceramic joint according to one aspect of the present invention, preferably, an Ag-Cu alloy layer is formed on the copper component side at the interface between the ceramic component and the copper component, and the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper component is... A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper component. B Within the range of 1 μm to 30 μm, the thickness ratio t2 A / t2 B It is in the range of 0.7 or higher and 1.4 or lower.

[0022] At this time, due to the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper component... A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper component. B Within a range of 1 μm to 30 μm, the Ag in the bonding material reacts sufficiently with the copper component, thereby reliably and firmly bonding the ceramic component to the copper component and further suppressing hardening of the bonding interface.

[0023] Furthermore, due to the thickness being greater than t2 A / t2 B Within the range of 0.7 to 1.4, the hardness of the joint interface in the peripheral and central regions of the copper component does not differ significantly, which can further suppress the generation of cracks in the ceramic component under load thermal cycling.

[0024] One aspect of the present invention relates to an insulating circuit substrate formed by bonding a copper plate made of copper or a copper alloy to the surface of a ceramic substrate made of silicon nitride. The substrate is characterized in that, at the interface between the ceramic substrate and the copper plate, an active metal nitride layer is formed on the ceramic substrate side. The area fraction of the active metal compound containing Si and an active metal in a region of 10 μm from the active metal nitride layer toward the copper plate side is 10% or less, and the area fraction P of the active metal compound in the peripheral region of the copper plate is... A and the area ratio P of the active metal compound in the central region of the copper plate B The ratio of P A / P B It is in the range of 0.7 or higher and 1.4 or lower.

[0025] The insulating circuit board has the ceramic substrate and the copper plate, or the copper plate is bonded to the surface of the ceramic substrate.

[0026] According to one aspect of the present invention, the insulating circuit substrate can suppress the bonding interface between the ceramic substrate and the copper plate from becoming too hard because the area fraction of the active metal compound containing Si and active metal in the region of 10 μm from the active metal nitride layer toward the copper plate side at the bonding interface with the copper plate bonded to at least one side of the ceramic substrate is less than 10%.

[0027] Furthermore, due to the area ratio P of the active metal compound in the peripheral region of the copper plate... A and the area ratio P of the active metal compound in the central region of the copper plate B The ratio of P A / P B Within the range of 0.7 to 1.4, the hardness of the peripheral region and the central region of the copper plate will not differ significantly, which can suppress the generation of cracks in the ceramic substrate under load thermal cycling and result in excellent thermal cycling reliability.

[0028] In this invention, in the insulating circuit board, the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper plate is preferably specified. A The thickness t1 of the active metal nitride layer formed in the central region of the copper plate B Within the range of 0.05 μm and 0.8 μm, the thickness ratio t1 A / t1 B It is in the range of 0.7 or higher and 1.4 or lower.

[0029] At this time, due to the thickness t1 of the active metal nitride layer formed in the peripheral region of the copper plate... A The thickness t1 of the active metal nitride layer formed in the central region of the copper plate B Within the range of 0.05μm to 0.8μm, the ceramic substrate and the copper plate are reliably and firmly bonded by the active metal, and the hardening of the bonding interface is further suppressed.

[0030] Furthermore, due to the thickness being greater than t1 A / t1 B Within the range of 0.7 to 1.4, the hardness of the bonding interface in the peripheral and central regions of the copper plate does not differ significantly, which can further suppress the generation of cracks in the ceramic substrate under load thermal cycling.

[0031] Furthermore, in the insulating circuit board according to one aspect of the present invention, preferably, an Ag-Cu alloy layer is formed on the copper plate side at the interface between the ceramic substrate and the copper plate, and the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper plate is...A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper plate B Within the range of 1 μm to 30 μm, the thickness ratio t2 A / t2 B It is in the range of 0.7 or higher and 1.4 or lower.

[0032] At this time, due to the thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper plate... A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper plate B Within a range of 1 μm to 30 μm, the Ag in the bonding material reacts sufficiently with the copper plate, thereby reliably and firmly bonding the ceramic substrate and the copper plate, and further suppressing hardening of the bonding interface.

[0033] Furthermore, due to the thickness being greater than t2 A / t2 B Within the range of 0.7 to 1.4, the hardness of the bonding interface in the peripheral and central regions of the copper plate does not differ significantly, which can further suppress the generation of cracks in the ceramic substrate under load thermal cycling.

[0034] According to the present invention, a copper-ceramic bonding material that can suppress the generation of cracks in ceramic components even under severe thermal cycling and has excellent thermal cycling reliability, and an insulating circuit board made of the copper-ceramic bonding material, can be provided. Attached Figure Description

[0035] Figure 1 This is a schematic diagram illustrating a power module using an insulating circuit board according to an embodiment of the present invention.

[0036] Figure 2 This is an enlarged explanatory diagram of the interface between the circuit layer and the metal layer of the insulating circuit board and the ceramic substrate according to the embodiments of the present invention. (a) is an explanatory diagram of the peripheral region and the central region of the circuit layer and the metal layer, (b) is the peripheral region, and (c) is the central region.

[0037] Figure 3 This is a flowchart of a method for manufacturing an insulating circuit board according to an embodiment of the present invention.

[0038] Figure 4 This is a schematic diagram illustrating a method for manufacturing an insulating circuit board according to an embodiment of the present invention.

[0039] Figure 5 This is an explanatory diagram of the bonding material arrangement process in the manufacturing method of the insulating circuit board according to the embodiments of the present invention.

[0040] Figure 6 This is an explanatory diagram illustrating the method for calculating the area ratio of the active metal compound in the embodiments of the present invention. Detailed Implementation

[0041] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0042] The copper-ceramic bonding body involved in this embodiment is an insulating circuit board 10 formed by bonding a ceramic substrate 11, which is a ceramic component made of ceramic, and copper plates 42 (circuit layer 12) and 43 (metal layer 13), which are copper components made of copper or copper alloy. Figure 1 A power module 1 equipped with the insulating circuit board 10 of this embodiment is shown.

[0043] The power module 1 includes: an insulating circuit board 10 provided with a circuit layer 12 and a metal layer 13; on one side of the circuit layer 12 (on Figure 1 The semiconductor element 3 (top) is bonded via bonding layer 2; and the semiconductor element 3 is disposed on the other side of metal layer 13 (in... Figure 1 The radiator 5 is located on the lower side (in the middle).

[0044] Semiconductor element 3 is made of semiconductor material such as Si. Semiconductor element 3 is bonded to circuit layer 12 via bonding layer 2.

[0045] The bonding layer 2 is composed of, for example, Sn-Ag, Sn-In, or Sn-Ag-Cu solder materials.

[0046] The heat sink 5 is used to dissipate heat from the aforementioned insulating circuit board 10. The heat sink 5 is made of copper or a copper alloy; in this embodiment, it is made of phosphorus-deoxidized copper. A flow path for cooling fluid is provided in the heat sink 5.

[0047] In this embodiment, the heat sink 5 and the metal layer 13 are bonded by a solder layer 7 made of solder material. The solder layer 7 is made of, for example, Sn-Ag, Sn-In, or Sn-Ag-Cu solder material.

[0048] And, as Figure 1 As shown, the insulating circuit board 10 of this embodiment includes: a ceramic substrate 11; and a surface disposed on one side of the ceramic substrate 11 (on...). Figure 1 The circuit layer 12 (top) and the circuit layer disposed on the other side of the ceramic substrate 11 (on the top). Figure 1 The metal layer 13 (with the middle layer below) is located below.

[0049] The ceramic substrate 11 is made of silicon nitride (Si3N4), which has excellent insulation and heat dissipation properties. The thickness of the ceramic substrate 11 is set in the range of 0.2 mm or more and 1.5 mm or less, and in this embodiment, it is set to 0.32 mm.

[0050] like Figure 4 As shown, the circuit layer 12 is located on one side of the ceramic substrate 11 (on... Figure 4 The middle part (top) is formed by joining a copper plate 42 made of copper or a copper alloy.

[0051] In this embodiment, the circuit layer 12 is formed by bonding an oxygen-free copper rolled plate onto a ceramic substrate 11.

[0052] Furthermore, the thickness of the copper plate 42 that forms the circuit layer 12 is set in the range of 0.1 mm or more and 2.0 mm or less; in this embodiment, it is set to 0.6 mm.

[0053] like Figure 4 As shown, the metal layer 13 passes through the other side of the ceramic substrate 11 (on the other side). Figure 4 (The middle part is below) is formed by joining copper plates 43 made of copper or copper alloys.

[0054] In this embodiment, the metal layer 13 is formed by bonding an oxygen-free copper rolled plate onto a ceramic substrate 11.

[0055] Furthermore, the thickness of the copper plate 43 that forms the metal layer 13 is set in the range of 0.1 mm or more and 2.0 mm or less; in this embodiment, it is set to 0.6 mm.

[0056] like Figure 2 As shown, at the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, an active metal nitride layer 21 and an Ag-Cu alloy layer 22 are sequentially formed from the ceramic substrate 11 side.

[0057] It can also be said that the active metal nitride layer 21 is part of the ceramic substrate 11. It can also be said that the Ag-Cu alloy layer 22 is part of the circuit layer 12 and the metal layer 13. Therefore, the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 (copper plates 42, 43) is the interface between the active metal nitride layer 21 and the Ag-Cu alloy layer 22. When the Ag-Cu alloy layer 22 is not present, the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 (copper plates 42, 43) is the interface between the active metal nitride layer 21 and the circuit layer 12 and the metal layer 13 (copper plates 42, 43).

[0058] And, as Figure 2As shown in (a), in the insulating circuit board 10 of this embodiment, the interface structure between the peripheral region A and the central region B of the circuit layer 12 and the metal layer 13 is defined as follows.

[0059] In addition, in this embodiment, such as Figure 2 As shown in (a), the peripheral region A of the circuit layer 12 and the metal layer 13 is the following region: in the cross section along the stacking direction of the circuit layer 12 and the metal layer 13 and the ceramic substrate 11, the region extends 200 μm inward from the end of the circuit layer 12 and the metal layer 13 in the width direction.

[0060] And, as Figure 2 As shown in (a), the central region B of the circuit layer 12 and the metal layer 13 is a region with a width of 200 μm, including the center of the circuit layer 12 and the metal layer 13 in the width direction in a cross section along the stacking direction of the circuit layer 12 and the metal layer 13 and the ceramic substrate 11.

[0061] Here, as Figure 2 As shown in (b), in the peripheral region A of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, an active metal compound containing Si and an active metal (Ti in this embodiment) is present in a region E 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 (metal layer 13) side (the interface with the Ag-Cu alloy layer 22) towards the circuit layer 12 (metal layer 13) side. A Area ratio P in A It is below 10%.

[0062] And, as Figure 2 As shown in (c), in the central region B of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, an active metal compound containing Si and an active metal (Ti in this embodiment) is present in a region E 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 (metal layer 13) side (the interface with the Ag-Cu alloy layer 22) towards the circuit layer 12 (metal layer 13) side. B Area ratio P in B It is below 10%.

[0063] Furthermore, in this embodiment, the area ratio P of the active metal compound in the peripheral region A of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 is... A The area ratio P of the active metal compound in the central region B of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 B The ratio of P A / P B It is in the range of 0.7 or higher and 1.4 or lower.

[0064] In addition, examples of intermetallic compounds (active metal compounds) containing Si and active metal (Ti) include TiSi2, TiSi, Ti5Si4, Ti5Si3, and Ti5Si, with Ti5Si3 being used in this embodiment.

[0065] Furthermore, in this embodiment, it is preferable that the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 is [not specified]. A The thickness t1 of the active metal nitride layer 21B formed in the central region B of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13. B In the range of 0.05 μm and 0.8 μm, their thickness is greater than t1. A / t1 B Within the range of 0.7 to 1.4. The active metal nitride layer 21 (21A, 21B) is formed by the aggregation of active metal nitride particles. The average particle size is 10 nm to 100 nm.

[0066] Furthermore, in this embodiment, the bonding material 45 contains Ti as an active metal. Since the ceramic substrate 11 is made of silicon nitride, the active metal nitride layer 21 (21A, 21B) is made of titanium nitride (TiN). That is, the active metal nitride layer 21 (21A, 21B) is formed by the aggregation of titanium nitride (TiN) particles with an average particle size of 10 nm or more and 100 nm or less.

[0067] Furthermore, in this embodiment, it is preferable that the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 is [not specified]. A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 is [not specified]. B The ratio of t2 A / t2 B It is in the range of 0.7 or higher and 1.4 or lower.

[0068] Furthermore, the thickness of the Ag-Cu alloy layer 22 (22A, 22B) is preferably 1 μm or more and 30 μm or less.

[0069] The following is for reference. Figure 3 and Figure 4 The manufacturing method of the insulating circuit board 10 according to this embodiment will be described.

[0070] (Joint material installation process S01)

[0071] Copper plate 42 is prepared to become circuit layer 12 and copper plate 43 is prepared to become metal layer 13.

[0072] Furthermore, a bonding material 45 is applied to the bonding surface of the copper plate 42, which forms the circuit layer 12, and the copper plate 43, which forms the metal layer 13, and then dried. The coating thickness of the paste-like bonding material 45 is preferably set in the range of 10 μm or more and 50 μm or less after drying.

[0073] In this embodiment, the paste-like bonding material 45 is applied by screen printing.

[0074] The bonding material 45 contains Ag and an active metal (selected from one or more of Ti, Zr, Nb, and Hf). In this embodiment, an Ag-Ti solder (Ag-Cu-Ti solder) is used as the bonding material 45. Furthermore, as the Ag-Ti solder (Ag-Cu-Ti solder), a solder with the following composition is preferably used, for example: the solder contains Cu in the range of 0% to 45% by mass and Ti as an active metal in the range of 0.5% to 20% by mass, with the remainder being Ag and unavoidable impurities.

[0075] The specific surface area of ​​the Ag powder contained in the bonding material 45 is preferably 0.15 m². 2 / g or more, preferably 0.25m 2 / g or more, further preferably 0.40m 2 / g or more. On the other hand, the specific surface area of ​​the Ag powder contained in the bonding material 45 is preferably 1.40m². 2 / g or less, more preferably 1.00m 2 / g or less, more preferably 0.75m 2 / g or less.

[0076] Furthermore, regarding the particle size of the Ag powder contained in the paste-like bonding material 45, it is preferable that D10 is in the range of 0.7 μm or more and 3.5 μm or less, and D100 is in the range of 4.5 μm or more and 23 μm or less. D10 is the particle size with a cumulative frequency of 10% based on volume in the particle size distribution obtained by laser diffraction scattering particle size distribution measurement method, and D100 is the particle size with a cumulative frequency of 100% based on volume.

[0077] Here, in the pressurization and heating process S03 described later, by pressurizing along the stacking direction, the generated liquid phase is repelled from the central part of the copper plates 42 and 43 to the peripheral part, and the peripheral part of the copper plates 42 and 43 contains a relatively large amount of active metal components.

[0078] Therefore, in this embodiment, as shown in Figure 5, the bonding material 45 is coated in such a way that the coating thickness of the bonding material 45A in the peripheral portion of the copper plate 42 that forms the circuit layer 12 and the copper plate 43 that forms the metal layer 13 is thinner than the coating thickness of the bonding material 45B in the central portion of the copper plate 42 that forms the circuit layer 12 and the copper plate 43 that forms the metal layer 13.

[0079] In addition, it is preferable that the difference between the coating thickness of bonding material 45A in the peripheral portion of copper plate 42 which becomes circuit layer 12 and copper plate 43 which becomes metal layer 13 and the coating thickness of bonding material 45B in the central portion is in the range of 5 μm to 15 μm.

[0080] The peripheral portion of the coating bonding material 45A is a peripheral area that includes the peripheral region and has an area of ​​1.5% to 10% of the surface area of ​​the copper plates 42 and 43, and the maximum line width of the peripheral portion is 1 mm. The central portion of the coating bonding material 45B is a central region that includes the central region and has an area of ​​90% to 98.5% of the surface area of ​​the copper plates 42 and 43.

[0081] (Lamination process S02)

[0082] Next, on one side of the ceramic substrate 11 (on Figure 4 The copper plate 42 (top) is laminated to form the circuit layer 12 via bonding material 45, and on the other side of the ceramic substrate 11 (on the top) Figure 4 The copper plate 43 (bottom) is laminated to form the metal layer 13 via bonding material 45.

[0083] (Pressure and heating process S03)

[0084] Next, while the copper plate 42, ceramic substrate 11 and copper plate 43 are under pressure, they are heated in a furnace under vacuum atmosphere to melt the bonding material 45.

[0085] Here, the heating temperature in the pressurization and heating process S03 is preferably in the range of 800°C or higher and 850°C or lower. The total temperature integral value in the heating process from 780°C to the heating temperature and the holding process at the heating temperature is preferably in the range of 7°C·h or higher and 120°C·h or lower.

[0086] Furthermore, the pressurization load in the pressurization and heating process S03 is preferably in the range of 0.029 MPa or more and 2.94 MPa or less.

[0087] Furthermore, the vacuum level in the pressurization and heating process S03 is preferably 1×10⁻⁶. -6 Pa or higher and 5×10 -2 Within the range below Pa.

[0088] (Cooling process S04)

[0089] Furthermore, after the pressurization and heating process S03, cooling is performed to solidify the molten bonding material 45, which will become the copper plate 42 of the circuit layer 12 and the ceramic substrate 11, and the ceramic substrate 11 and the copper plate 43 of the metal layer 13 are bonded together.

[0090] Furthermore, the cooling rate in this cooling process S04 is preferably in the range of 2°C / min or higher and 20°C / min or lower. Here, the cooling rate refers to the cooling rate from the heating temperature to the Ag-Cu eutectic temperature, i.e., 780°C.

[0091] As described above, the insulating circuit board 10 of this embodiment is manufactured by means of a bonding material preparation process S01, a lamination process S02, a pressurization and heating process S03, and a cooling process S04.

[0092] (Radiator joining process S05)

[0093] Next, the heat sink 5 is bonded to the other side of the metal layer 13 of the insulating circuit board 10.

[0094] The insulating circuit board 10 and the heat sink 5 are stacked with solder material and placed in a heating furnace. The insulating circuit board 10 and the heat sink 5 are soldered together through the solder layer 7.

[0095] (Semiconductor device bonding process S06)

[0096] Next, the semiconductor element 3 is bonded to one side of the circuit layer 12 of the insulating circuit board 10 by soldering.

[0097] Through the above processes, a product is manufactured. Figure 1 The power module 1 shown.

[0098] According to the insulating circuit board 10 (copper-ceramic bond) of this embodiment with the structure described above, in the peripheral region A of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, an active metal compound containing Si and an active metal (Ti in this embodiment) is present in a region E 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 (metal layer 13) side (the interface with the Ag-Cu alloy layer 22) towards the circuit layer 12 (metal layer 13) side. A Area ratio P in A The content is less than 10%, and in the central region B of the interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13, the active metal compound containing Si and active metal (Ti in this embodiment) is present in a region E 10 μm from the interface of the active metal nitride layer 21 on the circuit layer 12 (metal layer 13) side (the interface with the Ag-Cu alloy layer 22) towards the circuit layer 12 (metal layer 13) side.B Area ratio P in B The hardness is below 10%, thus preventing the bonding interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 from becoming too hard.

[0099] Furthermore, in order to further suppress the bonding interface between the ceramic substrate 11 and the circuit layer 12 and the metal layer 13 from becoming too hard, the area ratio P of the aforementioned active metal compound is increased. A P B Preferably, it is 8% or less, more preferably 7% or less, and even more preferably 5% or less. Furthermore, it is preferable to have an area ratio P of the active metal compound... A P B It is set to 1.5% or more, more preferably 2% or more, and even more preferably 3% or more.

[0100] Furthermore, due to the area ratio P of the active metal compound in the peripheral region A of circuit layer 12 and metal layer 13... A The area ratio P of the active metal compound in the central region B of circuit layer 12 and metal layer 13 B The ratio of P A / P B Within the range of 0.7 to 1.4, the hardness of the peripheral region A of the circuit layer 12 and the metal layer 13 and the central region B of the circuit layer 12 and the metal layer 13 will not differ significantly, which can suppress the generation of cracks in the ceramic substrate 11 under load thermal cycling and result in excellent thermal cycling reliability.

[0101] Furthermore, to further improve the reliability of thermal cycling, it is more preferable to increase the area ratio P of the active metal compound in the peripheral region A of the circuit layer 12 and the metal layer 13. A The area ratio P of the active metal compound in the central region B of circuit layer 12 and metal layer 13 B The ratio of P A / P B The value is set within the range of 0.8 or higher and 1.2 or lower, and more preferably within the range of 0.9 or higher and 1.1 or lower.

[0102] Furthermore, in this embodiment, when the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is... A The thickness t1 of the active metal nitride layer 21B formed in the central region B of circuit layer 12 and metal layer 13 B Within the range of 0.05μm and 0.8μm, the ceramic substrate 11 is reliably and firmly bonded to the circuit layer 12 and the metal layer 13 through the active metal, and the hardening of the bonding interface is further suppressed.

[0103] Furthermore, in order to more firmly bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13, it is preferable to have a thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t1 of the active metal nitride layer 21B formed in the central region B of circuit layer 12 and metal layer 13 B It is set to 0.08μm or more, and more preferably 0.15μm or more.

[0104] Furthermore, to further suppress the bonding interface from becoming too hard, it is preferable to limit the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t1 of the active metal nitride layer 21B formed in the central region B of circuit layer 12 and metal layer 13 B It is set to 0.6 μm or less, and more preferably to 0.4 μm or less.

[0105] Furthermore, in this embodiment, when the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is... A The thickness t1 of the active metal nitride layer 21B formed in the central region B of circuit layer 12 and metal layer 13 B The ratio of t1 A / t1 B When the hardness is in the range of 0.7 or higher and 1.4 or lower, the hardness of the bonding interface in the peripheral region A and the central region B of the circuit layer 12 and the metal layer 13 will not have a large difference, which can further suppress the generation of cracks in the ceramic substrate 11 under load thermal cycling.

[0106] Furthermore, in order to further suppress the formation of cracks in the ceramic substrate 11 during thermal cycling, it is more preferable to increase the thickness t1 of the active metal nitride layer 21A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t1 of the active metal nitride layer 21B formed in the central region B of circuit layer 12 and metal layer 13 B The ratio of t1 A / t1 B The value is set within the range of 0.8 or higher and 1.2 or lower, and more preferably within the range of 0.9 or higher and 1.1 or lower.

[0107] Furthermore, in this embodiment, when the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is... A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. BWithin the range of 1 μm to 30 μm, the Ag of the bonding material 45 described later reacts sufficiently with the circuit layer 12 and the metal layer 13, so that the ceramic substrate 11 is reliably and firmly bonded to the circuit layer 12 and the metal layer 13, and further suppresses the hardening of the bonding interface.

[0108] Furthermore, in order to more firmly bond the ceramic substrate 11 to the circuit layer 12 and the metal layer 13, it is preferable to have a thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B It is set to 3μm or larger, and more preferably 5μm or larger.

[0109] Furthermore, to further suppress the bonding interface from becoming too hard, it is preferable to limit the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B It is set to 25μm or less, and more preferably to 15μm or less.

[0110] Furthermore, in this embodiment, when the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13 is... A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B The ratio of t2 A / t2 B When the hardness is in the range of 0.7 or higher and 1.4 or lower, the hardness of the bonding interface in the peripheral region A and the central region B of the circuit layer 12 and the metal layer 13 will not have a large difference, which can further suppress the generation of cracks in the ceramic substrate under load thermal cycling.

[0111] Furthermore, in order to further suppress the formation of cracks in the ceramic substrate 11 during thermal cycling, it is more preferable to increase the thickness t2 of the Ag-Cu alloy layer 22A formed in the peripheral region A of the circuit layer 12 and the metal layer 13. A The thickness t2 of the Ag-Cu alloy layer 22B formed in the central region B of the circuit layer 12 and the metal layer 13. B The ratio of t2 A / t2 B The value is set within the range of 0.8 or higher and 1.2 or lower, and more preferably within the range of 0.9 or higher and 1.1 or lower.

[0112] The embodiments of the present invention have been described above, but the present invention is not limited thereto, and appropriate changes can be made without departing from the technical requirements of the present invention.

[0113] For example, in this embodiment, a power module is constructed by mounting semiconductor elements on an insulating circuit board, but it is not limited to this. For example, an LED module can be constructed by mounting LED elements on the circuit layer of the insulating circuit board, or a thermoelectric module can be constructed by mounting thermoelectric elements on the circuit layer of the insulating circuit board.

[0114] Furthermore, in this embodiment, Ti was described as an example of the active metal contained in the bonding material, but it is not limited to this; it is acceptable as long as it contains one or more active metals selected from Ti, Zr, Hf, and Nb. Additionally, these active metals may be contained in the form of hydrides.

[0115] Furthermore, in this embodiment, the area ratio P of the active metal compound in the peripheral region of the circuit layer and the metal layer is controlled by adjusting the coating thickness of the bonding material in the peripheral and central regions of the copper plate. A The area ratio P of active metal compounds in the central region of the circuit layer and the metal layer B The situation has been described, but it is not limited to this. Alternatively, the bonding material applied to the periphery and center of the copper plate can be made of different materials to control the area ratio P of the active metal compound in the peripheral region of the circuit layer and the metal layer. A The area ratio P of active metal compounds in the central region of the circuit layer and the metal layer B .

[0116] For example, by adjusting the specific surface area (BET value) of the Ag powder contained in the bonding material, the area ratio P of the aforementioned active metal compound can be controlled. A P B That is, if the specific surface area of ​​Ag powder is small, the sinterability of the paste-like bonding material is high, and a liquid phase is easily generated during the pressurization and heating processes, promoting the diffusion of the active metal, thereby increasing the area ratio of the aforementioned active metal compound. On the other hand, if the specific surface area of ​​Ag powder is large, the sinterability of the paste-like bonding material is low, and a liquid phase is not easily generated during the pressurization and heating processes, inhibiting the diffusion of the active metal, thereby decreasing the area ratio of the aforementioned active metal compound.

[0117] Furthermore, bonding materials containing different types and amounts of active metals can be applied to the periphery and center of the copper plate respectively.

[0118] Furthermore, this embodiment describes the formation of a circuit layer by bonding a rolled sheet of oxygen-free copper to a ceramic substrate, but it is not limited to this. A circuit layer can also be formed by bonding copper sheets, formed from stamped copper plates, to a ceramic substrate in a circuit pattern configuration. In this case, each copper sheet only needs to have the interface structure with the ceramic substrate as described above.

[0119] Furthermore, in this embodiment, the case where the bonding material is provided on the bonding surface of the copper plate is described, but it is not limited to this. The bonding material can be provided between the ceramic substrate and the copper plate, or it can be provided on the bonding surface of the ceramic substrate.

[0120] Example

[0121] The results of the confirmation experiments conducted to verify the effectiveness of the present invention will be described below.

[0122] First, a ceramic substrate (40mm×40mm, 0.32mm thick) made of silicon nitride (Si3N4) was prepared.

[0123] Furthermore, a 37mm x 37mm copper plate with a thickness of 0.8mm, made of oxygen-free copper, was prepared as the copper plate to serve as the circuit layer. Additionally, a 37mm x 37mm copper plate with a thickness of 0.8mm, also made of oxygen-free copper, was prepared as the copper plate to serve as the metal layer.

[0124] A bonding material containing Ag powder with BET values ​​shown in Table 1 is applied to the periphery of a copper plate that forms both a circuit layer and a metal layer, such that the target thickness after drying is the value shown in Table 1.

[0125] Furthermore, in the center of the copper plate that forms the circuit layer and the metal layer, a bonding material containing Ag powder with the BET value shown in Table 1 is applied in such a way that the target thickness after drying is the value shown in Table 1.

[0126] In addition, a paste-like material is used as the bonding material, and the amounts of Ag, Cu, and active metals are shown in Table 1.

[0127] Furthermore, the BET value (specific surface area) of the Ag powder was determined by vacuum degassing at 150°C for 30 minutes using AUTOSORB-1 manufactured by Quantacharrome as a pretreatment, and by N2 adsorption, liquid nitrogen at 77K, and the BET multi-point method.

[0128] A copper plate, which will serve as the circuit layer, is stacked on one side of the ceramic substrate. Furthermore, a copper plate, which will serve as the metal layer, is stacked on the other side of the ceramic substrate.

[0129] The laminate was heated under pressure along the lamination direction to produce an Ag-Cu liquid phase. The pressure load was 0.294 MPa, and the temperature integral values ​​are shown in Table 2.

[0130] Furthermore, by cooling the heated laminate, the copper plate that will become the circuit layer, the ceramic substrate, and the metal plate that will become the metal layer are joined together to obtain an insulating circuit substrate (copper-ceramic composite).

[0131] The obtained insulating circuit board (copper-ceramic junction) was evaluated for its area ratio of active metal compounds, active metal nitride layer, Ag-Cu alloy layer, and thermal cycling reliability as follows.

[0132] (Area ratio of active metal compounds)

[0133] Cross sections of the interface between the circuit layer and the metal layer and the ceramic substrate were observed using an EPMA device. Elemental distribution maps (50 μm width × 30 μm height) of the active metal and Si were obtained in five fields of view in the peripheral and central regions of the circuit layer and the metal layer, respectively.

[0134] Then, as Figure 6 As shown, in the region extending 10 μm from the active metal nitride layer towards the surface of the circuit layer (metal layer), the overlapping portion of Si and the active metal is identified as an active metal compound containing Si and the active metal, and the area ratio of the active metal compound is calculated. The area ratio is the value when the area of ​​50 μm × 10 μm is set to 100%. Furthermore, Table 2 lists the average values ​​for five fields of view (a total of ten fields of view).

[0135] (Active metal nitride layer)

[0136] Using a scanning electron microscope (ULTRA55 manufactured by Carl Zeiss NTS, accelerating voltage 1.8 kV), the cross-section of the interface between the circuit layer, the metal layer, and the ceramic substrate was measured at 30,000x magnification. Elemental mappings of N and active metal elements were obtained in five fields of view using energy-dispersive X-ray diffraction (EDT). The presence of an active metal nitride layer was identified when active metal elements and N were present in the same region.

[0137] Observations were made in five fields of view (a total of ten fields of view), and the average value obtained by dividing the area where the active metal element and N are present in the same region by the measured width was taken as the "thickness of the active metal nitride layer".

[0138] (Ag-Cu alloy layer)

[0139] Using an EPMA apparatus, elemental mappings of Ag, Cu, and active metals were obtained at cross-sections of the interface between the circuit layer and the ceramic substrate, and at the interface between the ceramic substrate and the metal layer. Elemental mappings were obtained in five fields of view.

[0140] Furthermore, when Ag + Cu + active metal = 100% by mass, the area with an Ag concentration of 15% by mass or higher is designated as the Ag-Cu alloy layer. Its area is calculated, and the value of this area divided by the width of the measurement area (area / width of the measurement area) is determined. The average value of this value is taken as the thickness of the Ag-Cu alloy layer and recorded in Table 2.

[0141] (Reliability of hot and cold cycles)

[0142] The above-mentioned insulating circuit board was subjected to a thermal cycle of 40°C for 5 minutes and then 150°C for 5 minutes until 2000 cycles were completed. SAT (ultrasonic testing) was performed every 100 cycles to confirm the presence or absence of ceramic cracks and to evaluate the number of times ceramic cracks occurred. The evaluation results are shown in Table 2.

[0143] [Table 1]

[0144]

[0145] Table 2]

[0146]

[0147] In Comparative Example 1, the area ratio of the active metal compound containing Si and active metal in the region 10 μm from the active metal nitride layer toward the copper plate side was greater than 10%, and the number of cracks generated in the thermal cycling test was 1100.

[0148] In Comparative Example 2, the area fraction P of the active metal compound in the peripheral region of the copper plate is... A The area ratio P of active metal compounds in the central region of the copper plate B The ratio of P A / P B The value is 0.6, and the number of cracks generated in the thermal cycling test is 1300.

[0149] In Comparative Example 3, the area fraction P of the active metal compound in the peripheral region of the copper plate was... A The area ratio P of active metal compounds in the central region of the copper plate B The ratio of P A / P B The value is 1.5, and the number of cracks generated in the thermal cycling test is 1200.

[0150] In contrast, in Examples 1 to 8 of the present invention, the area fraction of the active metal compound containing Si and the active metal in the region 10 μm from the active metal nitride layer toward the copper plate side is 10% or less, and the area fraction P of the active metal compound in the peripheral region of the copper plate is... A The area ratio P of active metal compounds in the central region of the copper plate B The ratio of P A / P B With a strength between 0.7 and 1.4, the number of cracks generated in the thermal cycling test is 1500 to over 2000, demonstrating excellent reliability in thermal cycling.

[0151] The results of the above confirmation experiments confirm that, according to the present invention, an insulating circuit board (copper-ceramic joint) can be provided that can suppress the generation of cracks in ceramic components even under severe thermal cycling and has excellent thermal cycling reliability.

[0152] Industrial availability

[0153] The copper-ceramic bonding agent and insulating circuit board of this embodiment are suitable for use in power modules, LED modules and thermoelectric modules.

[0154] Symbol Explanation

[0155] 10. Insulating circuit board (copper-ceramic bonding)

[0156] 11. Ceramic substrate (ceramic component)

[0157] 12 circuit layers (copper components)

[0158] 13 metal layers (copper components)

[0159] 21 (21A, 21B) Active metal nitride layers

[0160] 22 (22A, 22B) Ag-Cu alloy layer

Claims

1. A copper-ceramic joint, formed by joining a copper component made of copper or a copper alloy and a ceramic component made of silicon nitride, characterized in that, At the interface between the ceramic component and the copper component, an active metal nitride layer is formed on the ceramic component side. The area fraction of the active metal compound containing Si and the active metal in a region of 10 μm from the active metal nitride layer toward the copper component side is less than 10%. The area ratio P of the active metal compound in the peripheral region of the copper component A and the area ratio P of the active metal compound in the central region of the copper component B The ratio of P A / P B Within the range of 0.7 to 1.4, The peripheral region of the copper component is a region extending 200 μm inward from a position 20 μm inward along the width direction of the cross-section along the stacking direction of the copper component and the ceramic component. The central region of the copper component is a 200μm wide region in the cross-section along the stacking direction of the copper component and the ceramic component, including the center of the copper component in the width direction.

2. The copper-ceramic joint according to claim 1, characterized in that, The thickness t1 of the active metal nitride layer formed in the peripheral region of the copper component A The thickness t1 of the active metal nitride layer formed in the central region of the copper component B Within the range of 0.05 μm and 0.8 μm, the thickness ratio t1 A / t1 B It is in the range of 0.7 or higher and 1.4 or lower.

3. The copper-ceramic joint according to claim 1 or 2, characterized in that, At the interface between the ceramic component and the copper component, an Ag-Cu alloy layer is formed on the side of the copper component. The thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper component A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper component. B Within the range of 1 μm to 30 μm, the thickness ratio t2 A / t2 B It is in the range of 0.7 or higher and 1.4 or lower.

4. An insulating circuit board, formed by bonding a copper plate made of copper or a copper alloy to the surface of a ceramic substrate made of silicon nitride, characterized in that, At the interface between the ceramic substrate and the copper plate, an active metal nitride layer is formed on the ceramic substrate side. The area fraction of the active metal compound containing Si and active metal in a region of 10 μm from the active metal nitride layer toward the copper plate side is less than 10%. The area ratio P of the active metal compound in the peripheral region of the copper plate A and the area ratio P of the active metal compound in the central region of the copper plate B The ratio of P A / P B Within the range of 0.7 to 1.4, The peripheral region of the copper plate is a region extending 200 μm inward from a position 20 μm inward along the width direction of the cross section along the stacking direction of the copper plate and the ceramic substrate. The central region of the copper plate is a region with a width of 200 μm, including the center of the copper plate in the width direction, in a cross section along the stacking direction of the copper plate and the ceramic substrate.

5. The insulating circuit board according to claim 4, characterized in that, The thickness t1 of the active metal nitride layer formed in the peripheral region of the copper plate A The thickness t1 of the active metal nitride layer formed in the central region of the copper plate B Within the range of 0.05 μm and 0.8 μm, the thickness ratio t1 A / t1 B It is in the range of 0.7 or higher and 1.4 or lower.

6. The insulating circuit board according to claim 4 or 5, characterized in that, At the interface between the ceramic substrate and the copper plate, an Ag-Cu alloy layer is formed on the copper plate side. The thickness t2 of the Ag-Cu alloy layer formed in the peripheral region of the copper plate A and the thickness t2 of the Ag-Cu alloy layer formed in the central region of the copper plate B Within the range of 1 μm to 30 μm, the thickness ratio t2 A / t2 B It is in the range of 0.7 or higher and 1.4 or lower.

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