Feedforward low-voltage linear voltage stabilizing circuit with symmetrical structure and voltage stabilizing output method

Abstract

The application discloses a feedforward low-voltage linear voltage stabilizing circuit with a symmetrical structure and a voltage stabilizing output method, and belongs to the field of integrated circuit design. The application amplifies power noise by a feedforward current channel, carries out summation operation with circuit noise amplified by an error amplifier in a summation operation current channel, inputs the amplified noise to a gate of a power tube, and is used for eliminating extra noise generated at an output end, so that the power supply rejection ratio under high frequency can be improved without increasing loop bandwidth to increase static power consumption; the circuit structure is symmetrical, the feedforward current channel is multiplexed, and an output is connected to two symmetrical summation operation amplifiers, so that the power supply rejection ratio of the LDO is improved, and the linear adjustment rate and the load adjustment rate of the LDO are also improved to a certain extent. The application can be applied to an IP module sensitive to power noise, and high-precision and low-noise stable voltage is provided for the IP module.

Description

Technical Field

[0001] This invention relates to a feedforward low-voltage linear regulator circuit with a symmetrical structure and a method for regulating output voltage, belonging to the field of integrated circuit design. Background Technology

[0002] Low dropout linear regulators, also known as LDOs, are a commonly used type of power management chip. Due to their simple circuit structure, fewer external components, high precision, low noise, absence of electromagnetic interference, and low design cost, they are often used to power IP modules that are sensitive to power supply noise.

[0003] In recent years, with the continuous development of 5G, AI, and biometric technologies, cameras have been upgraded generation after generation. Whether for online office work, online medical care, or facial recognition technology, the requirements for camera stability and clarity have gradually increased. As the core component of a camera, the image sensor is highly susceptible to power supply interference. Power supply noise can also affect the ability of pixels to capture light normally, leading to a decrease in image quality. Therefore, the power management circuit of the image sensor needs to provide a "clean" power supply voltage, and thus low-voltage linear regulators (LDOs) are often used to provide a stable voltage. However, even though LDOs have a certain ability to suppress power supply ripple, traditional LDOs still have a poor power supply rejection ratio (PSRR) at high frequencies, causing the circuit to malfunction at high frequencies. The main reasons are: 1) the effective output conductance of the transfer transistor; 2) the need for a complex gain stage to improve DC gain; and 3) the limited bandwidth of the feedback loop. Therefore, it is necessary to study structures that improve the power supply rejection ratio of LDOs at high frequencies.

[0004] Common techniques for improving the power supply rejection ratio (PSRR) of an LDO include: 1) adding simple RC filter circuits at the input and output of the LDO; 2) cascading multiple LDOs while maintaining voltage drop. Simple RC filtering reduces input voltage ripple; however, this technique increases the voltage drop in the high-current LDO due to the high voltage across the resistor. Using transistor cascading can achieve a high PSRR over a wide frequency range, but this technique increases area and leads to a high voltage drop.

[0005] In his paper, Mohamed El-Nozahi proposed a low-voltage linear regulator (LDO) with a feedforward path. The paper analyzes the reasons for the decrease in power supply rejection ratio (PSRR) of LDOs at high frequencies and proposes a feedforward structure to improve the PSRR of LDOs at high frequencies. However, when LDOs power multiple readout arrays in image sensors, errors caused by mismatch still exist, and there is still room for improvement in the load regulation and line regulation of LDOs.

[0006] Common low-voltage linear regulator circuits employ feedforward paths and add low-pass filters (CN116166081A) to improve power supply rejection ratio (PSRR), but this also increases the LDO's power consumption. Some LDOs use negative capacitor compensation structures (CN116719382A) to ensure good PSRR at high frequencies. However, when the current flowing through the power transistor changes, the parasitic capacitance at the power transistor's gate also changes. In this case, the negative capacitance generated by the compensation circuit cannot effectively offset the parasitic capacitance at the power transistor's gate, leading to a deterioration in mid-to-high frequency power supply ripple suppression performance. Summary of the Invention

[0007] To improve the power supply rejection ratio and load regulation of an LDO, this invention provides a feedforward low-voltage linear regulator circuit with a symmetrical structure and a voltage regulation output method, the technical solution of which is as follows:

[0008] The first objective of this invention is to provide a low-voltage linear regulator circuit, comprising: a bandgap reference voltage source, a feedforward current path, a summation module, an error amplification module, a feedback resistor network module, and a power output stage;

[0009] The bandgap reference voltage source is used to provide bias current for the feedforward current path and summation module, and to provide reference voltage, bias voltage and bias current for the error amplification module;

[0010] The feedforward current path is used to amplify the noise caused by the limited conductance of the power output stage. The input of the feedforward current path is connected to the power supply voltage, and the output is connected to the summation module, transmitting the amplified power supply noise to the summation module.

[0011] The summation module includes: symmetrically distributed summation amplifier circuits; each summation amplifier circuit is connected to the output terminal of the feedforward current path, and is used to sum the amplified power supply noise with the voltage signal amplified by the error amplification module, and input the result to the power output stage;

[0012] The error amplification module includes: symmetrically distributed error amplifiers; the output terminal of each error amplifier is connected to the input terminal of the summation operation amplifier circuit, and the input terminals are respectively connected to the feedback resistor network module; the error amplifier amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation operation amplifier circuit for the next step of calculation;

[0013] The feedback resistor network module includes: a symmetrically distributed feedback resistor network; each feedback resistor network is connected to the input terminal of the error amplifier.

[0014] The power output stage has a symmetrical structure and is connected to each summing operational amplifier circuit. It is used to receive feedback loop signals and adjust the output current accordingly to achieve a stable output voltage.

[0015] Optionally, the feedforward current path includes: an integrating operational amplifier; the output terminal of the integrating operational amplifier is connected to the symmetrically distributed summing operational amplifier circuit.

[0016] Optionally, the summation module includes: a first summation operational amplifier and a second summation operational amplifier, the first summation operational amplifier and the second summation operational amplifier being symmetrically distributed, and their output terminals being respectively connected to the gates of symmetrical PMOS power transistors in the power output stage.

[0017] Optionally, the error amplifier module includes a first operational amplifier and a second operational amplifier, which are symmetrically distributed to construct two symmetrical main loops of the LDO.

[0018] Optionally, the power output stage includes two identical PMOS power transistors;

[0019] The sources of the two PMOS power transistors are connected to the power supply voltage, and their gates are connected to the first summing operational amplifier and the second summing operational amplifier, respectively. Their drains are connected to each other through a switch and connected to the output terminal of the voltage regulator circuit.

[0020] A second objective of this invention is to provide a low-voltage linear regulator output method, implemented using any of the low-voltage linear regulator circuits described above, comprising:

[0021] The circuit is powered by a bandgap reference voltage source.

[0022] Amplify power supply noise using a feedforward current path;

[0023] The error amplification module amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation module.

[0024] The summation module is used to sum the amplified power supply noise and the voltage amplified by the error amplification module, and the result is input to the power output stage.

[0025] The power output stage receives feedback loop signals and adjusts the output current accordingly to achieve a stable output voltage.

[0026] A third objective of the present invention is to provide an image sensor comprising the low-voltage linear regulator circuit described in any of the preceding claims, wherein the low-voltage linear regulator circuit is used to power the readout array.

[0027] The beneficial effects of this invention are:

[0028] First, the feedforward current path of this invention amplifies the power supply noise generated by the transconductance of the power transistor. In the summation current path, it is summed with the circuit noise amplified by the error amplifier, and the amplified noise is input to the gate of the power transistor to eliminate additional noise generated at the output. Therefore, it can improve the power supply rejection ratio at high frequencies without increasing the loop bandwidth and thus increasing quiescent power consumption.

[0029] Secondly, in terms of circuit architecture, the circuit structure is symmetrical, with the feedforward current path multiplexed, and the output connected to two symmetrical summing operational amplifiers. In this structure, excluding the multiplexed feedforward current path, the summing operational amplifier, error amplifier, power transistor, and feedback resistor are all two symmetrical structures. Based on a single feedforward LDO, this structure not only improves the LDO's power supply rejection ratio, but also, through symmetrical multiplexing, enhances the LDO's line regulation and load regulation.

[0030] Therefore, the symmetrical feedforward low-voltage linear regulator circuit of this invention is widely used in image sensor readout arrays. It can simultaneously power multiple columns of readouts, and the symmetrical structure can reduce errors caused by mismatch, thereby improving the accuracy of the image sensor. At the same time, the feedforward current path can reduce power supply noise during image sensor operation and provide a high-precision, low-noise stable voltage when powering the global buffer. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a block diagram of the symmetrical feedforward low-voltage linear regulator circuit of the present invention.

[0033] Figure 2 This is a diagram of the symmetrical feedforward low-voltage linear regulator circuit of the present invention.

[0034] Figure 3 This is a circuit diagram of the symmetrical low-dropout linear regulator of the present invention when powering a power array.

[0035] Figure 4 This is a layout diagram of the distributed power supply of the LDO to the readout array in the image sensor according to the present invention.

[0036] Figure 5This invention compares the power supply ripple suppression capability of the present invention with that of a conventional LDO circuit when the load current is 20mA. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0038] Example 1:

[0039] This embodiment provides a low-voltage linear regulator circuit, including: a bandgap reference voltage source, a feedforward current path, a summation module, an error amplification module, a feedback resistor network module, and a power output stage;

[0040] The bandgap reference voltage source is used to provide bias current for the feedforward current path and summation module, and to provide reference voltage and bias current for the error amplification module;

[0041] The feedforward current path is used to amplify the noise caused by the limited conductance of the power output stage. The input of the feedforward current path is connected to the power supply voltage, and the output is connected to the summation module, which transmits the amplified power supply noise to the summation module.

[0042] The summation module includes: symmetrically distributed summation amplifier circuits; each summation amplifier circuit is connected to the output terminal of the feedforward current path, and is used to sum the amplified power supply noise with the voltage signal amplified by the error amplifier module, and input the result to the power output stage;

[0043] The error amplification module includes: symmetrically distributed error amplifiers; the output terminal of each error amplifier is connected to the input terminal of the operational amplifier circuit, and the input terminals are respectively connected to the feedback resistor network module; the error amplifier amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation operational amplifier circuit for the next step of calculation;

[0044] The feedback resistor network module includes: a symmetrically distributed feedback resistor network; each feedback resistor network is connected to the input terminal of the error amplifier.

[0045] The power output stage has a symmetrical structure and is connected to each summing operational amplifier circuit. It is used to receive feedback loop signals and adjust the output current accordingly to achieve a stable output voltage.

[0046] Example 2:

[0047] This embodiment provides a low-voltage linear regulator circuit. (See [link]) Figure 1 It includes: a bandgap reference voltage source, a feedforward current path, a summation module, an error amplification module, a feedback resistor network module, and a power output stage;

[0048] The bandgap reference voltage source is used to provide stable voltage and current unaffected by temperature, to provide bias current for the feedforward current path and summation module, and to provide stable reference voltage, bias voltage and bias current for the error amplification module.

[0049] like Figure 2 As shown, the feedforward current path consists of an integrating operational amplifier, with its input connected to a bandgap reference voltage source and its output connected to two summing operational amplifiers in the summing operation module. The feedforward current path is used to amplify the power supply noise that has passed through the finite conductance of the power output stage, and then transmits the amplified noise from the bandgap reference voltage source to the summing operational amplifiers.

[0050] The summation module consists of two symmetrical summation operational amplifiers. It sums the amplified power supply noise with the voltage signal amplified by the error amplifier module and inputs the result to the power output stage. The two output terminals of the summation operational amplifier are connected to the gates of two symmetrical PMOS power transistors in the power output stage, respectively.

[0051] The error amplification module consists of two symmetrical operational amplifiers, which respectively construct two symmetrical main loops of the LDO. The output of each error amplifier is connected to the input of the operational amplifier circuit, and the input is connected to the feedback resistor network module. The error amplifier amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summing operational amplifier for the next step of calculation.

[0052] The feedback resistor network module includes: a symmetrically distributed feedback resistor network; each feedback resistor network is connected to the input terminal of the error amplifier.

[0053] The power output stage consists of two identical PMOS power transistors, each connected to the output of a summing operational amplifier. These transistors receive feedback loop signals and adjust the output current accordingly to achieve a stable output voltage. The power output stage uses a source-follower configuration, providing high power supply rejection.

[0054] The working principle of this embodiment is as follows: the bandgap reference circuit supplies power to the circuit. The input power supply ripple is amplified by the feedforward operational amplifier in the feedforward current path. The summing operational amplifier outputs the ripple through the feedforward path to the gate of the power transistor to eliminate the decrease in power supply rejection ratio at high frequencies caused by the limited conductance of the MOS power transistor. The summing amplifier combines the LDO's own feedback regulation loop with the feedforward current path to ensure the normal operation of the LDO.

[0055] Structurally, the LDO adopts a symmetrical structure and reuses the feedforward current path. The power transistor, summing operational amplifier, error amplifier, and resistor feedback network are all symmetrical.

[0056] When switch S1 is closed, when the output voltage V OUT Due to load changes or other reasons, the voltage drops, causing a decrease in the voltage across the two series voltage divider resistors. This results in a decrease in the voltage at the negative input terminal of the error amplifier, and consequently, a decrease in the voltage V between the positive and negative input terminals. ref Compared to the voltage level, the error amplifier will decrease its output. The positive input of the summing operational amplifier is connected to the output of the error amplifier. This amplification increases the feedback component at the output of the summing operational amplifier. The output of the summing operational amplifier is then connected to the gate of the power transistor, causing the gate voltage of the power transistor to decrease while the source voltage remains constant. This increases the absolute value of the voltage difference between the gate and source terminals of the power transistor, leading to an increase in the gate-source current. This increase in output current will cause the output voltage V to decrease. OUT Similarly, the small ripple in the input voltage at the source of the power transistor is amplified by the feedforward operational amplifier and the summing operational amplifier, and the amplified ripple is input to the gate of the power transistor to eliminate the small ripple input at the source.

[0057] In this embodiment, the feedforward current path amplifies the power supply noise generated by the transconductance of the power transistor. In the summation current path, it is summed with the circuit noise amplified by the error amplifier. The amplified noise is then input to the gate of the power transistor to eliminate additional noise generated at the output. Therefore, the power supply rejection ratio at high frequencies can be improved without increasing the loop bandwidth and thus the quiescent power consumption.

[0058] In terms of circuit architecture, the circuit structure of this embodiment is symmetrical. The feedforward current path is multiplexed, and the output is connected to two symmetrical summing operational amplifiers. In this structure, excluding the multiplexed feedforward current path, the summing operational amplifier, error amplifier, power transistor, and feedback resistor are all two symmetrical structures. Based on a single feedforward LDO, this structure not only improves the LDO's power supply rejection ratio, but also, through symmetrical multiplexing, improves the LDO's line regulation and load regulation.

[0059] Example 3:

[0060] This embodiment applies a symmetrical feedforward low-voltage linear regulator circuit to the image sensor readout array, such as... Figure 4 As shown.

[0061] Figure 2 This is a diagram of the symmetrical feedforward low-voltage linear regulator circuit in this embodiment. Figure 3 A symmetrical low-dropout linear regulator circuit diagram for powering a power supply array.

[0062] When powering multiple arrays in an image sensor, it is necessary to ensure the consistency of the power supply voltage. However, mismatch often causes new errors. At this time, switch S1 is turned on, and the LDO has two output ports. When distributing power supply to the readout array, due to the symmetrical structure of the LDO in this embodiment, it can be powered from both sides at the same time. Therefore, the output error of the readout array caused by power supply mismatch can be reduced, thereby improving the accuracy of the readout array.

[0063] Figure 4 This is a layout diagram of distributed power supply for the readout array using an LDO in an image sensor. When power is supplied to the readout array in the image sensor, switch S1 in the LDO is turned on, and... Figure 3 The connection shown transforms one LDO into two symmetrical LDOs, LDO-A and LDO-B, which share a feedforward structure. The two outputs supply power to the readout array from the left and right sides respectively, thus providing a relatively stable voltage to power the array.

[0064] The symmetrical feedforward low-voltage linear regulator circuit in this embodiment is often used in image sensor readout arrays. It can simultaneously power multiple columns of readouts. The symmetrical structure can reduce errors caused by mismatch, thereby improving the accuracy of the image sensor. At the same time, the feedforward current path can reduce power supply noise during image sensor operation and provide a high-precision, low-noise stable voltage when powering the global buffer.

[0065] Example 4:

[0066] This embodiment provides a low-voltage linear regulator output method, implemented using the low-voltage linear regulator circuit described in Embodiment 1 or 2, including:

[0067] The circuit is powered by a bandgap reference voltage source.

[0068] The noise in the power supply section is amplified by using a feedforward current path;

[0069] The error amplification module amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation module.

[0070] The summation module is used to sum the amplified power supply noise and the voltage amplified by the error amplification module, and the result is input to the power output stage.

[0071] The power output stage receives the feedback loop signal and adjusts the output current accordingly to achieve a stable output voltage.

[0072] Some steps in the embodiments of the present invention can be implemented using software, and the corresponding software program can be stored in a readable storage medium, such as an optical disc or a hard disk.

[0073] Figure 5 This comparison examines the power supply ripple suppression capability of the proposed LDO circuit with a load current of 20mA. It can be seen that the proposed LDO achieves a 30dB improvement in power supply rejection ratio at 38MHz.

[0074] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A low-voltage linear regulator circuit, characterized in that, The circuit includes: a bandgap reference voltage source, a feedforward current path, a summation module, an error amplification module, a feedback resistor network module, and a power output stage; The bandgap reference voltage source is used to provide bias current for the feedforward current path and summation module, and to provide reference voltage, bias voltage and bias current for the error amplification module; The feedforward current path is used to amplify the noise caused by the limited conductance of the power output stage. The input of the feedforward current path is connected to the power supply voltage, and the output is connected to the summation module, transmitting the amplified power supply noise to the summation module. The summation module includes: symmetrically distributed summation amplifier circuits; each summation amplifier circuit is connected to the output terminal of the feedforward current path, and is used to sum the amplified power supply noise with the voltage signal amplified by the error amplification module, and input the result to the power output stage; The error amplification module includes: symmetrically distributed error amplifiers; the output terminal of each error amplifier is connected to the input terminal of the summation operation amplifier circuit, and the input terminals are respectively connected to the feedback resistor network module; the error amplifier amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation operation amplifier circuit for the next step of calculation; The feedback resistor network module includes: a symmetrically distributed feedback resistor network; each feedback resistor network is connected to the input terminal of the error amplifier. The power output stage has a symmetrical structure and is connected to each summing operational amplifier circuit. It is used to receive feedback loop signals and adjust the output current accordingly to achieve a stable output voltage. The feedforward current path includes: an integrating operational amplifier; the output terminal of the integrating operational amplifier is connected to the symmetrically distributed summing operational amplifier circuit respectively; The summation operation module includes: a first summation operational amplifier and a second summation operational amplifier, which are symmetrically distributed and whose output terminals are respectively connected to the gates of symmetrical PMOS power transistors in the power output stage. The error amplifier includes a first operational amplifier and a second operational amplifier, which are symmetrically distributed to construct two symmetrical main loops of the LDO. The power output stage includes two identical PMOS power transistors; The sources of the two PMOS power transistors are connected to the power supply voltage, and their gates are connected to the first summing operational amplifier and the second summing operational amplifier, respectively. Their drains are connected to each other through a switch and connected to the output terminal of the voltage regulator circuit.

2. A low-voltage linear regulated output method, characterized in that, The method is implemented using the low-voltage linear regulator circuit described in claim 1, including: The circuit is powered by a bandgap reference voltage source. Amplify power supply noise using a feedforward current path; The error amplification module amplifies the error between the signal on the feedback resistor and the reference voltage signal provided by the bandgap reference voltage source, and outputs the result to the summation module. The summation module is used to sum the amplified power supply noise and the voltage amplified by the error amplification module, and the result is input to the power output stage. The power output stage receives feedback loop signals and adjusts the output current accordingly to achieve a stable output voltage.

3. An image sensor, characterized in that, The image sensor includes the low-voltage linear regulator circuit as described in claim 1, and the low-voltage linear regulator circuit is used to power the readout array.

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