Experimental methods and equipment for single-chip analog digital-to-analog / analog-to-digital conversion chips

Abstract

The present invention discloses an experimental method and equipment for simulating digital-to-analog / analog-to-digital conversion chips of a single-chip microcomputer, and relates to the field of signal processing technology. Specifically, it includes: selecting an interface-bearing PCB board that is completely consistent with the input and output interface of the target chip to be simulated, connecting it to the single-chip microcomputer, and unifying the general interface of the single-chip microcomputer with the behavior of the target chip; controlling the single-chip microcomputer to simulate the functional behavior of the signal processing logic and input and output interface of the target chip to be simulated; completing the conversion of the general interface and general signal processing protocol of the single-chip microcomputer to the specific interface and signal processing logic of the target chip; the input signal passes through the input signal preprocessing function and then undergoes digital-to-analog / analog-to-digital conversion to obtain the output signal; and collecting four types of signal data and sending them to a display for display. The present invention simulates the digital-to-analog signal conversion and analog-to-digital signal conversion hardware chips produced by a specific manufacturer, and is a device and method for experimental teaching of mutual conversion between digital signals and analog signals in colleges and universities.

Description

Technical Field

[0001] The invention belongs to the technical field of signal processing, and in particular relates to an experimental method and equipment for a single-chip computer analog digital-to-analog / analog-to-digital conversion chip. Background Art

[0002] Digital circuits and analog circuits are basic courses for many majors in science and engineering in colleges and universities. The key knowledge points of these two courses are the mutual conversion between digital signals and analog signals. For students, they need to master not only the principles, but also the practical application skills. However, in the current digital and analog electronic teaching, textbooks usually use hardware chips of specific manufacturers' models for digital signal conversion to analog signal and analog signal conversion to digital signal to conduct principle and experimental teaching. These chips are usually packaged finished products, and their internal signal processing logic cannot be shown to students, which brings great inconvenience to the digital and analog electronic teaching in colleges and universities.

[0003] In addition, due to the continuous development of science and technology, the chips of specific manufacturers currently in use on the market are no longer available in China. This poses a great challenge to the teaching of digital and analog electronics, because theoretical and experimental teaching requires the use of these specific chips for explanation, and these chips must be used to complete experimental operations, and the theoretical calculation results and experimental observation results must be compared for teaching. The technical characteristics, parameters, and input and output of the new chip models are quite different from those of the old chips, which is very unfavorable for the teaching and experiments of the existing textbooks. At the same time, due to the packaging form of the chip, students are unable to understand the internal structure and processing logic of the chip, which also limits their in-depth understanding of digital and analog circuits.

[0004] Therefore, it is an urgent problem for those skilled in the art to propose an experimental method and equipment for simulating digital-to-analog / analog-to-digital conversion chips of single-chip microcomputers to solve the difficulties existing in the prior art. Summary of the invention

[0005] The present invention proposes an experimental method and equipment for simulating digital-to-analog / analog-to-digital conversion chips using a single-chip microcomputer. The single-chip microcomputer with digital-to-analog conversion and analog-to-digital conversion peripheral modules is used to completely simulate the hardware chips of specific manufacturers and models that convert digital signals into analog signals and analog signals into digital signals in terms of operation mode and data processing logic principles, so that students can better understand the internal structure and processing logic of the digital-to-analog conversion chip and the signal processing process.

[0006] In order to achieve the above object, the present invention adopts the following technical solution:

[0007] The experimental method of simulating digital-to-analog / analog-to-digital conversion chip by single-chip microcomputer includes the following steps:

[0008] S1: Select an interface-carrying PCB board that is consistent with the input and output interface of the target chip to be simulated, connect the interface-carrying PCB board to the single-chip microcomputer, and make the interface of the interface-carrying PCB board consistent with the behavior of the target chip through the interface protocol conversion function;

[0009] S2: Control the MCU to dynamically select a suitable interface and protocol conversion algorithm through the chip selection function in the MCU, so that the MCU can correctly simulate the functional behavior of the target chip signal processing logic and input and output interface required to be simulated;

[0010] S3: The interface and protocol conversion function in the MCU is used to complete the conversion of the general interface and general signal processing protocol of the MCU to the specific interface and specific signal processing logic of the target chip;

[0011] S4: The input signal is pre-processed and then converted by the digital-to-analog / analog-to-digital function to obtain the output signal; four types of signal data are collected and sent to the display for display.

[0012] In the above method, optionally, the interface bearing PCB board in S1 is specifically:

[0013] The interface-carrying PCB board is provided with an interface that is consistent with the input and output interface of the target chip. The name, precision, speed, and behavior of the interface are consistent with the target chip. There are multiple types of interface-carrying PCB boards, and each type corresponds to all the input and output interfaces of one or several target chips.

[0014] The above method is optional, and the specific steps of S3 are: dynamically configuring the pins, clocks, registers, and conversion parameters of the microcontroller to realize the conversion of the general interface and general signal processing protocol of the microcontroller to the specific interface and specific signal processing logic of the target digital-to-analog / analog-to-digital conversion chip.

[0015] The above method optionally includes dynamically configuring the pins, clocks, registers, and conversion parameters of the microcontroller:

[0016] S301: Set the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode;

[0017] S302: Setting the system clock and peripheral clock speed of the digital-to-analog and analog-to-digital conversion modules to ensure that the speed matches the clock speed specified in the interface protocol of the target hardware chip;

[0018] S303: Initialize the data registers of the digital-to-analog and analog-to-digital conversion modules in the single-chip microcomputer;

[0019] S304: Setting conversion parameters, including but not limited to conversion mode, conversion resolution, and reference voltage.

[0020] In the above method, optionally, the specific steps of S301 are:

[0021] S3011: Select the pins on the microcontroller that have digital-to-analog and analog-to-digital conversion functions;

[0022] S3012: Set the electrical characteristics of the pins according to the interface and protocol of the target chip;

[0023] S3013: Configure the working parameters of the digital-to-analog and analog-to-digital conversion modules, and start the digital-to-analog and analog-to-digital conversion through the corresponding control registers;

[0024] The specific steps of S302 are:

[0025] S3021: System clock configuration: The interface and protocol conversion module reads the target chip clock capability data and the performance data of the MCU, and sets the frequency of the MCU system clock;

[0026] S3022: Peripheral clock configuration: configure the appropriate clock for the digital-to-analog and analog-to-digital conversion modules by selecting the peripheral clock source and setting the clock division factor;

[0027] S3023: adjusting the clock speed according to the specifications of the target hardware chip;

[0028] S3024: After configuration is complete, the clock speed is automatically tested and verified;

[0029] The specific steps of S304 are:

[0030] S3041: According to the application requirements and the performance of the target hardware chip, set the accuracy of the digital-to-analog and analog-to-digital conversion on the microcontroller, that is, the resolution, so that the accuracy of the digital-to-analog and analog-to-digital conversion is consistent with the accuracy of the target chip;

[0031] S3042: Set the speed of digital-to-analog and analog-to-digital conversion, i.e., sampling rate;

[0032] S3043: Set the reference voltage according to the hardware chip specifications and application requirements;

[0033] S3044: Set the input / output range of digital-to-analog and analog-to-digital conversion according to the hardware chip specifications and application requirements;

[0034] S3045: Use the microcontroller direct memory access mode DMA to automatically manage the data transmission of ADC analog-to-digital conversion and DAC digital-to-analog conversion through programming;

[0035] S3046: After configuration is complete, automatic testing and verification are performed to ensure that the conversion parameters are set correctly.

[0036] The above method is optional. The data preprocessing function in S4 mainly includes:

[0037] S401: Automatically detect the signal-to-noise ratio, signal strength, and modulation mode of the input signal, autonomously reduce the interference noise of the input signal, enhance the strength of the effective signal, and demodulate the modulated signal;

[0038] S402: Signal data format conversion: automatically convert the data format of the input signal to the data format required by the chip according to the data format supported by the target hardware chip;

[0039] S403: Simulation of complex data input scenarios: For application scenarios that require simultaneous parallel input of multiple signals, multiple parallel signals are generated based on basic signals and parameters and digital-to-analog / analog-to-digital conversion operations are performed simultaneously.

[0040] In the above method, optionally, the four types of signal data in S4 include: input analog and digital signals, final result signals after digital-to-analog / analog-to-digital conversion, intermediate processing results of the signal processing process from signal input to digital-to-analog / analog-to-digital conversion, and intermediate processing results of the signal processing process from signal digital-to-analog / analog-to-digital conversion to final output.

[0041] An experimental device for simulating digital-to-analog / analog-to-digital conversion chips of a single-chip microcomputer, which performs any of the experimental methods for simulating digital-to-analog / analog-to-digital conversion chips of a single-chip microcomputer described above, comprises an interface-bearing PCB board, a single-chip microcomputer, a data display module connected in sequence, and a chip selection module, an interface and protocol conversion module, an input signal preprocessing module, and a digital-to-analog and analog-to-digital conversion module connected in sequence on the single-chip microcomputer;

[0042] Interface carrier PCB board: The interface carrier PCB board provides an interface that is completely consistent with the input and output interface of the target chip;

[0043] Chip selection module: controls the microcontroller to dynamically select the interface and protocol conversion algorithm according to the target chip signal processing logic and input and output interface functional behavior to be simulated;

[0044] Interface and protocol conversion module: dynamically configure the microcontroller's pins, clocks, registers, and conversion parameters;

[0045] Input signal preprocessing module: minimize the limitation of input signal;

[0046] Data display module: collects four types of signal data and sends them to the monitor for display.

[0047] The above device, optionally, the interface and protocol conversion module includes the following sub-modules connected in sequence: a pin mode configuration module, a clock speed configuration module, a data register initialization module, and a conversion parameter setting module;

[0048] Pin mode configuration module: sets the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode;

[0049] Clock speed configuration module: set the clock speed of the digital-to-analog and analog-to-digital conversion modules;

[0050] Data register initialization module: initializes the data registers of the digital-to-analog and analog-to-digital conversion modules;

[0051] Conversion parameter setting module: complete the setting of conversion parameters.

[0052] It can be seen from the above technical solutions that, compared with the prior art, the present invention provides an experimental method and device for a single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip, which has the following beneficial effects:

[0053] (1) It can realize the input and output interface and signal processing logic behavior consistent with the specific old-model digital-to-analog / analog-to-digital conversion chips used in standard textbooks, solving the problem that the chips cannot be used for teaching due to discontinuation of production;

[0054] (2) The details of the entire process from data input to data conversion output can be fully displayed in a visual graphical way during teaching, which is conducive to students' deep understanding of knowledge;

[0055] (3) It has good expansibility and can be connected to other real hardware, other signal processing modules, chips and peripheral modules to form a larger complete signal processing system, which is consistent with the actual electronic information teaching content and can be flexibly expanded to other signal systems in various standard textbooks.

[0056] (4) Compared with the original target chip, the present invention can reduce the restrictions on the quality and type of input signals through the signal preprocessing function, and can simulate various complex scenarios of parallel and serial mixed input of multiple signals, greatly simplifying the data preparation difficulty of teaching experiments and reducing the complexity of operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0058] Figure 1 It is a flow chart of the experimental method of the single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip disclosed in the present invention;

[0059] Figure 2 This is a structural diagram of the experimental equipment for the single-chip analog digital-to-analog / analog-to-digital conversion chip disclosed in the present invention. DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0061] In this application, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, the elements defined by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0062] Reference Figure 1 As shown, the experimental method of the single-chip microcomputer simulation digital-to-analog / analog-to-digital conversion chip includes the following steps:

[0063] S1: Select an interface-carrying PCB board that is consistent with the input and output interface of the target chip to be simulated, connect the interface-carrying PCB board to the single-chip microcomputer, and make the interface of the interface-carrying PCB board consistent with the behavior of the target chip through the interface protocol conversion function;

[0064] S2: Control the MCU to dynamically select a suitable interface and protocol conversion algorithm through the chip selection function in the MCU, so that the MCU can correctly simulate the functional behavior of the target chip signal processing logic and input and output interface required to be simulated;

[0065] S3: The interface and protocol conversion function in the MCU is used to complete the conversion of the general interface and general signal processing protocol of the MCU to the specific interface and specific signal processing logic of the target chip;

[0066] S4: The input signal is pre-processed and then converted by the digital-to-analog / analog-to-digital function to obtain the output signal; four types of signal data are collected and sent to the display for display.

[0067] Furthermore, the interface bearing PCB board in S1 is specifically:

[0068] The PCB board provides an interface that is completely consistent with the input and output interface of the target chip. The name, accuracy, speed, and behavior of the interface are completely consistent with the actual target chip. There can be multiple types of such interface-carrying PCB boards, and each type can correspond to all the input and output interfaces of one or several target chips.

[0069] Furthermore, the specific steps of S3 are: dynamically configuring the pins, clocks, registers, and conversion parameters of the microcontroller to complete the conversion of the general interface and general signal processing protocol of the microcontroller to the specific interface and specific signal processing logic of the target digital-to-analog / analog-to-digital conversion chip.

[0070] Furthermore, the dynamic configuration of the pins, clocks, registers, and conversion parameters of the single-chip microcomputer specifically includes:

[0071] S301: Set the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode. For example, if the target chip uses the SPI interface, some pins need to be set as outputs (for sending data) and some pins need to be set as inputs (for receiving data).

[0072] S302: Setting the system clock and peripheral clock speed of the digital-to-analog and analog-to-digital conversion modules to ensure that the speed matches the clock speed specified in the interface protocol of the target hardware chip;

[0073] S303: Initializing the data registers of the digital-to-analog and analog-to-digital conversion modules in the single-chip microcomputer. The initialization process usually involves operations such as clearing registers and setting initial values;

[0074] S304: Setting conversion parameters, including but not limited to conversion mode, conversion resolution, reference voltage, such as conversion mode (single conversion or continuous conversion), conversion resolution, reference voltage, etc.

[0075] Furthermore, the specific steps of S301 are:

[0076] S3011: Select the pins on the microcontroller that have digital-to-analog and analog-to-digital conversion functions. These pins may be dedicated or multi-functional. If the pins are multi-functional, you need to set the working mode of the pins in the configuration register of the microcontroller to make them work in digital-to-analog and analog-to-digital conversion modes. For example, if you are using an STM32 series microcontroller, you can set the pin mode by modifying the GPIO port mode register (GPIOx_MODER);

[0077] S3012: According to the interface and protocol of the target chip, set the electrical characteristics of the pins, such as input / output direction, pull-up / pull-down resistor, open-drain / push-pull output, etc. For example, if the target chip interface is SPI protocol, then usually one pin is required as clock signal output, one pin as data input, one pin as data output, and one or more pins may be required as chip select signals;

[0078] S3013: Configure the working parameters of the digital-to-analog and analog-to-digital conversion modules, and start the digital-to-analog and analog-to-digital conversion through corresponding control registers, such as conversion rate, resolution, reference voltage, etc., and start the digital-to-analog and analog-to-digital conversion through corresponding control registers;

[0079] The specific steps of S302 are:

[0080] S3021: System clock configuration: The interface and protocol conversion module reads the target chip clock capability data and the performance data of the microcontroller, and sets the frequency of the microcontroller system clock by configuring the clock source (such as internal RC oscillator, external crystal oscillator, etc.) and the clock prescaler. For example, in the STM32 microcontroller, the system clock can be configured through the RCC (Reset and ClockControl) module;

[0081] S3022: Peripheral clock configuration: configure the appropriate clock for the digital-to-analog and analog-to-digital conversion modules by selecting the peripheral clock source (such as APB bus, AHB bus, etc.) and setting the clock division factor. For example, in the STM32 microcontroller, the clock of each peripheral can be configured through the RCC module;

[0082] S3023: Adjust the clock speed according to the specifications of the target hardware chip. Hardware chips (such as digital-to-analog and analog-to-digital conversion chips) usually have a maximum operating frequency that cannot be exceeded.

[0083] S3024: After configuration is complete, the program ensures that the clock speed is set correctly by testing and verification. The program measures the period of the clock signal or uses the debugging function of the microcontroller to check the value of the clock register;

[0084] The specific steps of S304 are:

[0085] S3041: According to the application requirements and the performance of the target hardware chip, set the accuracy of the digital-to-analog and analog-to-digital conversion on the microcontroller, that is, the resolution, that is, the number of bits of ADC and DAC, so that the accuracy of the digital-to-analog and analog-to-digital conversion is consistent with the accuracy of the target chip. For example, if the ADC is 12 bits, then it can convert the input analog signal into a digital value between 0-4095. If the DAC is 12 bits, then it can convert the digital value between 0-4095 into the corresponding analog signal. Therefore, by setting the number of bits of ADC and DAC through microcontroller programming, the accuracy of the digital-to-analog conversion and analog-to-digital conversion can be adjusted to make it consistent with the accuracy of the target chip, so that the signal processing result is not distorted. This is usually achieved by configuring the corresponding control registers. For example, in the STM32 microcontroller, the CR1 register of the ADC module can set the resolution of the ADC;

[0086] S3042: Set the speed of digital-to-analog and analog-to-digital conversion, that is, the sampling rate, that is, how many times the ADC and DAC can perform conversions per second. The higher the sampling rate, the faster the conversion speed. However, too high a sampling rate may result in reduced conversion accuracy. Therefore, by programming the sampling rate of the ADC and DAC, the speed of digital-to-analog conversion and analog-to-digital conversion can be adjusted. This usually involves selecting an appropriate clock source and setting the clock division coefficient. For example, in the STM32 microcontroller, the CR2 register of the ADC module can set the ADC sampling time;

[0087] S3043: Set the appropriate reference voltage according to the hardware chip specifications and application requirements. This voltage may be internally generated or externally provided. For example, in the STM32 microcontroller, the SMPR register of the ADC module can set the ADC reference voltage.

[0088] S3044: Set the input / output range of the digital-to-analog and analog-to-digital conversion according to the specifications of the hardware chip and application requirements. For example, if it is an ADC, you may need to set the maximum and minimum voltage of the input signal; if it is a DAC, you may need to set the maximum and minimum value of the output voltage;

[0089] S3045: Use the MCU direct memory access mode DMA to automatically manage the data transfer of ADC analog-to-digital conversion and DAC digital-to-analog conversion through programming, so that the MCU CPU can perform other tasks without participating in data transmission, thereby improving the overall performance of the system and ensuring that the signal processing speed of the MCU is higher than the hardware speed of the target chip;

[0090] S3046: After configuration is complete, ensure that the conversion parameters are set correctly through automatic testing and verification, by measuring the conversion results, or by using the microcontroller's debugging function to check the values ​​of related registers.

[0091] Furthermore, the data preprocessing functions in S4 mainly include:

[0092] S401: Automatically detect the signal-to-noise ratio, signal strength, modulation mode and other characteristics of the input signal, autonomously reduce the interference noise of the input signal, enhance the strength of the effective signal, and demodulate the modulated signal using means such as filtering, oversampling, amplification / attenuation, modulation / demodulation, etc.;

[0093] S402: Signal data format conversion: according to the data format supported by the target hardware chip, the data format of the input signal is automatically converted to the data format required by the chip, for example, binary data can be automatically converted to decimal, or integer data can be converted to floating point numbers;

[0094] S403: Simulation of complex data input scenarios: For application scenarios that require simultaneous parallel input of multiple signals, multiple parallel signals are generated based on basic signals and parameters and digital-to-analog / analog-to-digital conversion operations are performed simultaneously.

[0095] Furthermore, the four types of signal data in S4 include: input analog and digital signals, final result signals after digital-to-analog / analog-to-digital conversion, intermediate processing results of the signal processing process from signal input to digital-to-analog / analog-to-digital conversion, and intermediate processing results of the signal processing process from signal digital-to-analog / analog-to-digital conversion to final output.

[0096] and Figure 1 Corresponding to the method, the present invention also discloses an experimental device for a single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip, which is used to implement the method, specifically referring to Figure 2 As shown, it includes an interface carrying PCB board, a single-chip microcomputer, a data display module connected in sequence, and a chip selection module, an interface and protocol conversion module, an input signal preprocessing module, and a digital-to-analog and analog-to-digital conversion module connected in sequence on the single-chip microcomputer;

[0097] Interface carrier PCB board: The interface carrier PCB board provides an interface that is completely consistent with the input and output interface of the target chip;

[0098] Chip selection module: controls the microcontroller to dynamically select the interface and protocol conversion algorithm according to the target chip signal processing logic and input and output interface functional behavior to be simulated;

[0099] Interface and protocol conversion module: dynamically configure the microcontroller's pins, clocks, registers, and conversion parameters;

[0100] Input signal preprocessing module: minimize the limitation of input signal;

[0101] Data display module: collects four types of signal data and sends them to the monitor for display.

[0102] Further, the interface and protocol conversion module includes the following submodules connected in sequence: a pin mode configuration module, a clock speed configuration module, a data register initialization module, and a conversion parameter setting module;

[0103] Pin mode configuration module: sets the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode;

[0104] Clock speed configuration module: set the clock speed of the digital-to-analog and analog-to-digital conversion modules;

[0105] Data register initialization module: initializes the data registers of the digital-to-analog and analog-to-digital conversion modules;

[0106] Conversion parameter setting module: complete the setting of conversion parameters.

[0107] Furthermore, it also includes a graphical target chip selection configuration module: a graphical target chip selection configuration interface, which allows users to select a specific manufacturer, model, and function of the D / A conversion chip to be simulated from a target chip library in a graphical way. The system automatically sends various parameters of the chip to the single-chip chip simulation system according to the user's selection, and also downloads the chip configuration to the single-chip microcomputer, controls the single-chip microcomputer to automatically configure various interfaces and data transmission protocols, and executes the D / A conversion algorithm logic of the specific chip, so as to realize the automatic configuration of the single-chip microcomputer to simulate the key functions of the specific target chip. It can greatly simplify the configuration process and assist chip experimental teaching.

[0108] Specifically, the steps of the graphical target chip selection configuration module are as follows: (1) target chip database, which contains the parameters and algorithm data of various target chips to be simulated; (2) graphical selection window, which allows users to select the chip to be simulated from the database panel by graphical drag and drop; (3) automatic generation of configuration parameter module, which automatically generates the configuration file of the microcontroller according to the selected chip; (4) configuration tool interface, which downloads and loads the generated configuration to the microcontroller development board.

[0109] Example:

[0110] In the specific implementation of the present invention, the GD32F103VCT6 single chip microcomputer is selected to simulate the digital-to-analog conversion target chip DAC0832 and the analog-to-digital conversion target chip ADC0809.

[0111] When the GD32F103VCT6 MCU implements the digital-to-analog and analog-to-digital conversion functions of the DAC0832 and ADC0809 chips, the analog interface of the MCU is a special interface that needs to be specified, and the digital control port can be freely specified.

[0112] The corresponding relationship of the analog interface is:

[0113] ADC chip: IN0~IN7 are simulated by ADC_INx pins of the microcontroller;

[0114] DAC chip: Iout is simulated by DAC_OUTx of the microcontroller.

[0115] In the process of using the GD32F103VCT6 single-chip microcomputer to realize the digital-to-analog and analog-to-digital conversion functions of the DAC0832 and ADC0809 chips, the specific implementation schemes of the following invention steps are related to the models of specific single-chip microcomputers and target chips. The specific methods are different for various single-chip microcomputers and target chips, and need to be customized according to the data manuals of different single-chip microcomputers and chips. The other modules and steps mentioned in the present invention are common solutions for various single-chip microcomputers and target chips. The customized implementation scheme for realizing the functions of DAC0832 and ADC0809 chips using the GD32F103VCT6 single-chip microcomputer is as follows:

[0116] (1) Pin mode configuration

[0117] 1) The GD32F103VCT6 chip has multiple GPIO ports. The pin mode of each port can be set through the GPIOx_CTL0 and GPIOx_CTL1 (x represents the port number A / B / C, etc.) registers of the corresponding port.

[0118] The specific settings are as follows:

[0119] A. Enable the GPIO port clock:

[0120] Set the GPIO port clock enable bit corresponding to the RCC_APB2ENR register to 1.

[0121] B. Set GPIO mode:

[0122] In the GPIOx_CTL0 register, set the MODEy bit (y represents the pin number) for each pin to the desired mode. The modes include analog mode, floating input, push-pull output, open-drain output, etc.

[0123] C. Set GPIO speed:

[0124] In the GPIOx_CTL0 register, the OSPEEDy bits for each pin are set to the desired speed. The speeds can be selected as low, medium, high, or super high.

[0125] D. Set pull-up / pull-down:

[0126] In the GPIOx_CTL0 register, the Px_y bit for each pin is set to pull-up or pull-down.

[0127] E. Set the multiplexing function:

[0128] In the GPIOx_CTL1 register, set the AFSELx bit for each pin to 1 to enable the alternate function.

[0129] Then modify the multiplexing function number required by AFRyx configuration

[0130] 2) DAC0832 uses a parallel communication protocol, and realizes data transmission and control conversion process through the combination of control bits and data bits. It can provide 12-bit precision digital-to-analog conversion function. The ADC chip model is ADC0809, which uses a parallel communication protocol and realizes analog signal acquisition and digital conversion through the combination of control bits and data bits. It provides 8-bit resolution analog-to-digital conversion function. By setting the GPIO interface of GD32F103VCT6, the electrical characteristics of the interface pins with DAC0832 and ADC0809 can be correctly realized.

[0131] A. The interface settings for DAC0832 on GD32F103VCT6 are as follows:

[0132] A1. Set GPIO to push-pull output mode

[0133] The control bits WR, CS, and RD of DAC0832 need to be configured as the GPIO push-pull output mode of GD32, and MODEy is set to 01 in the GPIOx_CTL0 register.

[0134] A2. Set the data bit width to 12 bits

[0135] Since the data bit width of DAC0832 is 12 bits, the GPIO data port bit width corresponding to GD32 needs to be set to 12 bits, and IOWID is set to 11 in the GPIOx_CTL1 register.

[0136] A3.Configure data transmission direction

[0137] Since the data line of DAC0832 is output, it is necessary to configure the GPIODIRy of the GPIOx_CTL1 register of GD32 corresponding to the data bit to 1, that is, the output direction.

[0138] A4.Configure clock frequency

[0139] The conversion rate of DAC0832 is 30kHz, so the output clock frequency of the GD32 port needs to be greater than this value, which can be achieved by enabling the high-speed IO clock of RCC_APB2ENR.

[0140] A5. Matching port logic level

[0141] Configure the logic level of the GD32GPIO port according to the power supply voltage of DAC0832. For example, if the power supply is 5V, set it to 5V to match DAC0832.

[0142] B. Correctly match the interface of ADC0809 on GD32F103VCT6, as follows:

[0143] B1. Data bit is set to input mode

[0144] The data bit width of ADC0809 is 8 bits. It is necessary to configure the GPIO data bit of GD32 to input mode and set MODEy=00 in GPIOx_CTL0.

[0145] B2. Control bit is set to output mode

[0146] The WR, CS, and RD control bits of ADC0809 need to be configured as push-pull output mode. Set MODEy=01 of GPIOx_CTL0 in GD32.

[0147] B3.Configure data bit width

[0148] Since the data bit width of ADC0809 is 8 bits, GD32 needs to set the data port bit width of GPIO to 8 bits, and set IOWID=7 in GPIOx_CTL1.

[0149] B4. Configuration control bit direction

[0150] GD32's GPIO supports input and output direction settings. For ADC0809, the control bit needs to be set to output direction, that is, GPIODIRy=1 in GPIOx_CTL1.

[0151] B5. Configure sampling time

[0152] The conversion time of ADC0809 is 100us, so the interval for GD32 to read data needs to be greater than this time, which can be achieved through a timer or software delay.

[0153] B6. Matching logic level

[0154] The default GPIO level of GD32 is 3.3V, and the logic high level of the port needs to be set according to the supply voltage of ADC0809.

[0155] Configure the working parameters of the digital-to-analog and analog-to-digital conversion modules

[0156] To implement digital-to-analog and analog-to-digital conversion of DAC0832 and ADC0809 on GD32F103VCT6, it is necessary to correctly configure the DAC and ADC peripheral modules.

[0157] Specific parameter configuration method:

[0158] A.DAC Configuration

[0159] A1. Enable DAC clock (DACEN of RCC_APB1ENR = 1);

[0160] A2. Configure the trigger source (DMAEN / TEN / BFOEN of DAC_CTL);

[0161] A3. Set the data to be left-aligned or right-aligned (ALIGN of DAC_CTL);

[0162] A4. Select the DAC output channel (SELx of DAC_SWTR);

[0163] A5. Set DAC output buffer enable (DWBEN of DAC_CTL);

[0164] A6. Write the data to be converted to DAC_R12DH / DAC_L12DH.

[0165] B.ADC Configuration

[0166] B1. Enable ADC clock (ADCEN of RCC_APB2ENR = 1);

[0167] B2. Configure ADC frequency division coefficient (ADC_PSC register);

[0168] B3. Set ADC data alignment format (DAL of ADC_CTL0);

[0169] B4. Configure ADC scan mode (DISNUM of ADC_CTL0);

[0170] B5. Select ADC channel (ADC_CHSEL register);

[0171] B6. Set sampling time (ADC_SPLTIME register);

[0172] B7. Start ADC conversion (ADCON of ADC_CTL0);

[0173] B8. Wait for the conversion to complete (ADC_STAT register);

[0174] B9. Read the conversion result (ADC_RDTR register).

[0175] (2) Clock speed configuration module

[0176] 1) System clock configuration

[0177] For the GD32F103VCT6 chip, the system clock can be configured mainly through the RCC (Reset and Clock Control) module. Specifically, you can follow the steps below:

[0178] A. Configure HXTAL clock:

[0179] A1. Enable HXTAL clock (HXTALEN in RCC_CTL0 = 1);

[0180] A2. Wait for HXTAL to stabilize (HXTALSTB=1 in RCC_CTL0).

[0181] B. Set AHB, APB1 and APB2 prescalers:

[0182] B1. HPRE in RCC_CFG configures the AHB prescaler;

[0183] B2. PPRE1 in RCC_CFG configures the APB1 prescaler;

[0184] B3.PPRE2 in RCC_CFG configures the APB2 prescaler.

[0185] C. Select the system clock source:

[0186] SCLKSEL in C1.RCC_CFG selects HXTAL or HIRC as the system clock.

[0187] D. Configure PLL clock:

[0188] D1. Enable PLL (PLLEN in RCC_CTL0 = 1);

[0189] D2. Set the PLL multiplication factor (PLLMUL configuration in RCC_CFG);

[0190] D3. Wait for PLL to stabilize (PLLSTB in RCC_CTL0=1).

[0191] E. Finally, use PLL as the system clock:

[0192] SCLKSEL in E1.RCC_CFG selects PLL as the system clock.

[0193] Peripheral clock configuration

[0194] The GD32F103VCT6 MCU implements the digital-to-analog-to-analog conversion of the DAC0832 and ADC0809 chips. It is necessary to correctly configure the clocks of the two peripheral DAC and ADC. The specific configuration steps are as follows:

[0195] A. Enable DAC clock

[0196] In the RCC_APB1ENR register, set the DACEN bit to 1 to enable the DAC peripheral clock.

[0197] B. Enable ADC clock

[0198] In the RCC_APB2ENR register, set the ADCEN bit to 1 to enable the ADC peripheral clock.

[0199] C. Configure ADC peripheral clock pre-scaling

[0200] The ADC clock frequency needs to be lower than 14MHz, so the system clock needs to be prescaled. Configure the prescaler ratio in the ADC_PSC register, with a typical value of 6 (division ratio = P+1).

[0201] D. Configure the port clock related to the DAC / ADC pin

[0202] Enable the clock of the GPIO port related to DAC / ADC, and set the clock enable bit of the corresponding GPIO port in RCC_APB2ENR.

[0203] E. Confirm the PLL output frequency

[0204] The PLL clock frequency needs to be supplied to the ADC, and it is necessary to confirm that the PLL output is in the range of 14 to 60 MHz.

[0205] F. Adjust FLASH delay parameters

[0206] If the peripheral frequency exceeds 24MHz, the FLASH delay parameters need to be adjusted to confirm whether the FLASH reading and writing are normal.

[0207] Adjust the clock speed according to the target hardware chip specifications

[0208] According to the specific parameters of DAC0832 and ADC0809 chips, GD32F103VCT6 needs to adjust the clock speed as follows:

[0209] A. The conversion rate of DAC0832 is 30kHz, so the clock frequency of the GPIO port of GD32 and its interface needs to be greater than 30kHz. You can configure RCC_APB2ENR to enable the high-speed IO port, and the clock is generally 60MHz.

[0210] B. The conversion time of ADC0809 is 100us, that is, the conversion rate is about 10kHz. Therefore, the rate at which GD32 reads ADC data needs to be lower than this value. The reading interval can be controlled to be above 100us through a timer or software delay.

[0211] C. The maximum operating frequency of ADC0809 is about 15kHz, so the operating clock frequency of ADC needs to be lower than 15kHz. The ADC clock of GD32 comes from PLL, and the PLL output frequency needs to be kept below 14MHz, typically 4-14MHz.

[0212] D. The PLL output frequency range is 4-72MHz. To meet the ADC requirements, the PLL multiplication factor can be configured to 4-14, and the PLL output frequency is 4-14MHz.

[0213] E. The pre-division ratio of the ADC clock can be configured to 3 or 4, so the ADC operating clock frequency is in the range of 1-4.7MHz, which meets the requirements.

[0214] F. Adjust the FLASH access time so that the read delay is greater than the ADC conversion time.

[0215] 3) The GD32F103VCT6 MCU is tested and verified by the program to ensure that the clock speed is set correctly

[0216] A. Check whether the system clock frequency of GD32F103 is set correctly.

[0217] A1. Read the SCLKSEL bit field of the RCC_CFG register directly to confirm whether the system clock source is selected correctly:

[0218] A1.1 This bit field selects HXTAL / HIRC / PLL as the system clock.

[0219] A2. Use the SYSTICK timer to detect the system clock:

[0220] A2.1 Configure the SYSTICK timer to count;

[0221] A2.2 Read the Reload and Current values ​​to calculate the counting cycle;

[0222] A2.3 Calculate the system clock frequency based on the period.

[0223] A3. Use timer input capture to detect system clock frequency:

[0224] A3.1 Use the input capture function of a timer;

[0225] A3.2 Input a reference signal with an accurate frequency, such as 1MHz;

[0226] A3.3 Read the captured count value and calculate the timer clock;

[0227] A3.4 Determine the system clock frequency based on the pre-scaling factor.

[0228] A4. Use software delay timing to detect the system clock:

[0229] A4.1 Insert a counter into an accurate delay function;

[0230] A4.2 Count the number of cycles executed by the delay function;

[0231] A4.3 Calculate the system clock frequency.

[0232] B. Check whether the GD32F103VCT6 peripheral clock speed is set correctly:

[0233] B1. Directly read the value of the clock frequency related register:

[0234] B1.1 Read the RCC_CFG register to verify the PLL configuration value;

[0235] B1.2 Read RCC_CTL0 to confirm that the PLL is stable and used as the system clock;

[0236] B1.3 Read ADC_PSC to confirm the ADC pre-scaling configuration value.

[0237] B2. Use a timer to perform a timing test:

[0238] B2.1 Configure a timer, such as TIM3;

[0239] B2.2 counting mode, the counting cycle is 1 second;

[0240] B2.3 Read the timer timing value and calculate the timer clock;

[0241] B2.4 calculates the system clock frequency through pre-division.

[0242] B3.ADC sampling function timing:

[0243] B3.1 Configure the ADC to sample an analog input channel;

[0244] B3.2 Get the timestamp in the ADC conversion completion callback function;

[0245] B3.3 Calculate the time interval between each sampling and ensure it is above 100us.

[0246] B4.GPIO delay function timing:

[0247] B4.1 Use GPIO delay function to achieve accurate delay;

[0248] B4.2 Insert the clock frequency calculation code and measure the delay accuracy;

[0249] B4.3 Verify that the delay time of the delay function is consistent with the theoretical calculation.

[0250] B5. Print debugging information and check clock-related status.

[0251] (3) Data register initialization

[0252] GD32F103VCT6 uses its own DAC and ADC peripherals to implement the digital-to-analog / analog-to-digital conversion functions of the DAC0832 and ADC0809 chips. The data registers are initialized for the DAC and ADC themselves. The main steps are:

[0253] A.DAC register initialization

[0254] A1 enables DAC clock: RCC_APB1ENR|=1<<29;

[0255] A2 configures DAC trigger source: DAC_CTL|=trigger source;

[0256] A3 selects DAC output channel: DAC_SWTR|=1<<channel number;

[0257] A4 configures DAC data alignment format: DAC_CTL|=1< <DAC_CTL_ALIGN;

[0258] B.ADC register initialization

[0259] B1 enables ADC clock: RCC_APB2ENR|=1<<9;

[0260] B2 configures the ADC pre-scaling coefficient: ADC_PSC = division ratio;

[0261] B3 selects ADC channel: ADC_CHSEL|=1<<channel number;

[0262] B4 configures ADC data format: ADC_CTL0|=1< <ADC_CTL0_DAL;

[0263] B5 enables ADC conversion: ADC_CTL0|=1< <ADC_CTL0_ADCON;

[0264] Conversion parameter settings

[0265] Accuracy Configuration

[0266] The conversion accuracy of the DAC and ADC of GD32F103VCT6 can be configured to achieve the same conversion effect as DAC0832 and ADC0809. The main accuracy configuration steps are as follows:

[0267] A.DAC precision configuration

[0268] A1. The conversion accuracy of DAC0832 is 12 bits. The DAC accuracy of GD32 can reach 12 bits. Set the DWBEN bit of the DAC_CTL register, enable the DAC data buffer, and write 12-bit data in the DAC_R12BDHR register for conversion.

[0269] B.ADC Accuracy Configuration

[0270] B1. The conversion accuracy of ADC0809 is 8 bits. The ADC accuracy of GD32 can reach 8 bits. Set the RES[1:0] bits of ADC_CTL0 to 00, configure the ADC accuracy to 8 bits, and read the ADC_RD8R0 register to get the 8-bit conversion result.

[0271] C. Reduce the DAC / ADC reference voltage range, increase the LSB value, and improve accuracy

[0272] C1.DAC / ADC accuracy is proportional to the reference voltage. Lowering the reference voltage can improve the range resolution, but the voltage range must cover the input requirements.

[0273] Speed ​​Configuration

[0274] In order to make the DAC and ADC conversion speed of GD32F103 match DAC0832 and ADC0809, the conversion rate needs to be configured:

[0275] A.DAC speed configuration

[0276] The conversion rate of DAC0832 is 30kHz

[0277] A1. Configure the DAC clock of GD32 to be at least 30kHz, enable the DAC high-speed clock: RCC_APB1ENR|=1<<29, configure PLL to provide high-speed clock

[0278] A2. Configure the DAC trigger source to software trigger.

[0279] DAC_CTL|=DAC_TRIGGER_SOFTWARE

[0280] A3. Continuously write DAC data register in a loop to achieve a rate of more than 30kHz

[0281] B.ADC speed configuration

[0282] ADC0809 conversion time is 100us, about 10kHz

[0283] B1. Configure the ADC clock to not exceed 10kHz of ADC0809, configure ADC_PSC pre-scaling, and reduce the PLL frequency to provide ADC clock

[0284] B2. The software controls the reading frequency by judging the conversion status of ADC_STAT. The reading interval should not be less than the conversion time of ADC0809.

[0285] Reference voltage configuration

[0286] In order to achieve the same conversion characteristics as DAC0832 and ADC0809, the DAC and ADC of GD32F103 need to configure the reference voltage correctly. The reference voltage configuration steps are as follows:

[0287] A.DAC reference voltage configuration:

[0288] The reference voltage of DAC0832 is 5V.

[0289] A1. Set the GD32 internal DAC reference voltage value to 5 V. Configure the VOSEL bit of the DAC_MCTL register to select the internal reference voltage source.

[0290] B.ADC reference voltage configuration:

[0291] The reference voltage of ADC0809 is 5V.

[0292] B1. Set the internal ADC reference voltage value of GD32 to 5V. Configure the RSEL bit of the ADC_CTL1 register and select VDDA as the reference voltage source.

[0293] 4) Input and output range configuration

[0294] In order to match the input / output range of DAC0832 and ADC0809, the DAC and ADC of GD32F103 need to be configured with the following input / output ranges:

[0295] A.DAC input and output range configuration

[0296] A1. Input data: Configure as 12-bit width, write digital value in the range of 0-4095 for DA conversion

[0297] A2. Output voltage: Configured to 0-5V range, select the range through the MAMPx bit of DAC_MCTL

[0298] B.ADC input and output range configuration

[0299] B1. Input voltage: Configured as 0-5V range, select the range through the RANGE bit of ADC_CTL1

[0300] B2. Output data: Configure as 8-bit width, read 8-bit ADC data register, and obtain 0-255 range output

[0301] C. Data accuracy matches input range

[0302] C1. If the accuracy is 12 bits, the theoretical accuracy of the 0-5V range is 1.22mV

[0303] C2. Under 8-bit accuracy, the theoretical accuracy of the 0-5V range is 19.5mV

[0304] D. Port voltage level can be set to match input and output logic level

[0305] E. Input and output quantity matching (single-ended / differential input, number of channels)

[0306] 5) Direct Memory Access (DMA) mode configuration

[0307] Both DAC and ADC of GD32F103 support DMA transfer mode. To match DAC0832 and ADC0809, the following DMA mode configuration can be considered:

[0308] DAC DMA Configuration

[0309] A1. Enable DAC DMA mode: DAC_CTL|=DAC_DMA_ENABLE;

[0310] A2. Configure DMA transfer source address and data quantity;

[0311] A3. Configure DMA trigger source as DAC send trigger DMA_SxCR_EN=1;

[0312] A4.DMA will automatically trigger the next transfer after the data transfer is completed;

[0313] A5. Realize continuous high-speed DAC conversion output.

[0314] B.ADC DMA Configuration

[0315] B1. Enable ADC DMA mode: ADC_CTL1|=ADC_DMA_ENABLE;

[0316] B2. Configure DMA target address and data quantity;

[0317] B3. Configure DMA trigger source as ADC receive trigger DMA_SxCR_EN=1;

[0318] B4.DMA will automatically transfer data after ADC conversion is completed;

[0319] B5. Realize continuous high-speed ADC sampling and conversion.

[0320] C. Configure the number of DMA transfers to match the number of DAC / ADC conversions

[0321] 6) Automatically test and verify conversion parameters

[0322] After GD32F103 configures the DAC and ADC conversion parameters, create the following program to automatically test and verify:

[0323] A. Test DAC conversion

[0324] A1. Configure DAC channel and enable conversion;

[0325] A2. Loop write the known input data (which means the digital quantity or analog voltage signal with a known value, used as the input test signal of DAC or ADC to help us evaluate whether the conversion parameters are correct), such as 0x800, 0x1000, 0xFFF;

[0326] A3. Measure the DAC output voltage value and calculate the deviation from the theoretical value;

[0327] A4. Verify the measuring range, accuracy and other parameters.

[0328] B. Test ADC conversion

[0329] B1. Input a known voltage source, such as 2.5V, 4.2V;

[0330] B2. Configure ADC channels and start conversion;

[0331] B3. Read ADC conversion result data;

[0332] B4. Calculate voltage value: U = data / 4095*reference voltage

[0333] B5. Compare the deviation between the calculated value and the actual input;

[0334] B6. Verify input range, accuracy and other parameters.

[0335] C. Test DAC and ADC series conversion

[0336] C1.DAC output is connected to ADC input;

[0337] C2. Loop write DAC data and read ADC data;

[0338] C3. Compare ADC read data with DAC write data;

[0339] C4. Verify the matching between DAC and ADC.

[0340] D. Use interrupt and DMA modes to further test conversion performance.

[0341] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0342] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. Experimental method of single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip, characterized in that: The following steps are involved: S1: Select an interface-carrying PCB board that is consistent with the input and output interface of the target chip to be simulated, connect the interface-carrying PCB board to the single-chip microcomputer, and make the interface of the interface-carrying PCB board consistent with the behavior of the target chip through the interface protocol conversion function; S2: Control the MCU to dynamically select a suitable interface and protocol conversion algorithm through the chip selection function in the MCU, so that the MCU can correctly simulate the functional behavior of the target chip signal processing logic and input and output interface required to be simulated; S3: completing the conversion of the general interface and general signal processing protocol of the single-chip microcomputer to the specific interface and specific signal processing logic of the target chip through the interface and protocol conversion function in the single-chip microcomputer; the specific steps are: dynamically configuring the pins, clocks, registers, and conversion parameters of the single-chip microcomputer to realize the conversion of the general interface and general signal processing protocol of the single-chip microcomputer to the specific interface and specific signal processing logic of the target digital-to-analog / analog-to-digital conversion chip; Dynamic configuration of the microcontroller's pins, clocks, registers, and conversion parameters specifically includes: S301: Set the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode; S302: Setting the system clock and peripheral clock speed of the digital-to-analog and analog-to-digital conversion modules to ensure that the speed matches the clock speed specified in the interface protocol of the target hardware chip; S303: Initialize the data registers of the digital-to-analog and analog-to-digital conversion modules in the single-chip microcomputer; S304: Setting conversion parameters, including but not limited to conversion mode, conversion resolution, and reference voltage; The specific steps of S301 are: S3011: Select the pins on the microcontroller that have digital-to-analog and analog-to-digital conversion functions; S3012: Set the electrical characteristics of the pins according to the interface and protocol of the target chip; S3013: Configure the working parameters of the digital-to-analog and analog-to-digital conversion modules, and start the digital-to-analog and analog-to-digital conversion through the corresponding control registers; S4: The input signal is converted through the input signal preprocessing function and then through the digital-to-analog / analog-to-digital conversion function to obtain the output signal; four types of signal data are collected and sent to the display for display; the four types of signal data include: input analog and digital signals, the final result signal after digital-to-analog / analog-to-digital conversion, the intermediate processing result of the signal processing process from the input to the digital-to-analog / analog-to-digital conversion, and the intermediate processing result of the signal processing process from the digital-to-analog / analog-to-digital conversion to the final output.

2. The experimental method of the single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip according to claim 1, characterized in that: The interface-bearing PCB board in S1 is as follows: The interface-carrying PCB board is provided with an interface that is consistent with the input and output interface of the target chip. The name, precision, speed, and behavior of the interface are consistent with the target chip. There are multiple types of interface-carrying PCB boards, and each type corresponds to all the input and output interfaces of one or several target chips.

3. The experimental method of the single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip according to claim 1, characterized in that: The specific steps of S302 are: S3021: System clock configuration: The interface and protocol conversion module reads the target chip clock capability data and the performance data of the MCU, and sets the frequency of the MCU system clock; S3022: Peripheral clock configuration: configure the appropriate clock for the digital-to-analog and analog-to-digital conversion modules by selecting the peripheral clock source and setting the clock division factor; S3023: adjusting the clock speed according to the specifications of the target hardware chip; S3024: After configuration is complete, the clock speed is automatically tested and verified; The specific steps of S304 are: S3041: According to the application requirements and the performance of the target hardware chip, set the accuracy of the digital-to-analog and analog-to-digital conversion on the microcontroller, that is, the resolution, so that the accuracy of the digital-to-analog and analog-to-digital conversion is consistent with the accuracy of the target chip; S3042: Set the speed of digital-to-analog and analog-to-digital conversion, i.e., sampling rate; S3043: Set the reference voltage according to the hardware chip specifications and application requirements; S3044: Set the input / output range of digital-to-analog and analog-to-digital conversion according to the hardware chip specifications and application requirements; S3045: Use the microcontroller direct memory access mode DMA to automatically manage the data transmission of ADC analog-to-digital conversion and DAC digital-to-analog conversion through programming; S3046: After configuration is complete, automatic testing and verification are performed to ensure that the conversion parameters are set correctly.

4. The experimental method of the single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip according to claim 1, characterized in that: The data preprocessing functions in S4 mainly include: S401: Automatically detect the signal-to-noise ratio, signal strength, and modulation mode of the input signal, autonomously reduce the interference noise of the input signal, enhance the strength of the effective signal, and demodulate the modulated signal; S402: Signal data format conversion: automatically convert the data format of the input signal to the data format required by the chip according to the data format supported by the target hardware chip; S403: Simulation of complex data input scenarios: For application scenarios that require simultaneous parallel input of multiple signals, multiple parallel signals are generated based on basic signals and parameters and digital-to-analog / analog-to-digital conversion operations are performed simultaneously.

5. Experimental equipment for single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip, characterized in that: An experimental method for performing a single-chip microcomputer analog digital-to-analog / analog-to-digital conversion chip according to any one of claims 1 to 4, comprising an interface-bearing PCB board, a single-chip microcomputer, a data display module connected in sequence, and a chip selection module, an interface and protocol conversion module, an input signal preprocessing module, and a digital-to-analog and analog-to-digital conversion module connected in sequence on the single-chip microcomputer; Interface carrier PCB board: The interface carrier PCB board provides an interface that is completely consistent with the input and output interface of the target chip; Chip selection module: controls the microcontroller to dynamically select the interface and protocol conversion algorithm according to the target chip signal processing logic and input and output interface functional behavior to be simulated; Interface and protocol conversion module: dynamically configure the microcontroller's pins, clocks, registers, and conversion parameters; Input signal preprocessing module: minimize the limitation of input signal; Data display module: collects four types of signal data and sends them to the monitor for display.

6. The experimental equipment of the single-chip computer analog digital-to-analog / analog-to-digital conversion chip according to claim 5, characterized in that: The interface and protocol conversion module includes the following submodules connected in sequence: a pin mode configuration module, a clock speed configuration module, a data register initialization module, and a conversion parameter setting module; Pin mode configuration module: sets the pins on the microcontroller connected to the digital-to-analog and analog-to-digital conversion modules to the correct mode; Clock speed configuration module: set the clock speed of the digital-to-analog and analog-to-digital conversion modules; Data register initialization module: initializes the data registers of the digital-to-analog and analog-to-digital conversion modules; Conversion parameter setting module: complete the setting of conversion parameters.

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