A vertical structure LED chip

Abstract

The present application relates to the technical field of LED chips, and specifically provides a vertical structure LED chip, including: a substrate layer, an N-type conductive metal layer, an insulating layer, a P-type conductive metal layer, a p-GaN layer, an InGaN / GaN multiple quantum well layer, and an n-GaN layer connected in sequence. The insulating layer includes a plurality of through holes penetrating through the P-type conductive metal layer, the p-GaN layer, and the InGaN / GaN multiple quantum well layer. The N-type conductive metal layer is connected to the n-GaN layer through the through holes; two P electrodes are symmetrically arranged at the edge center of the P-type conductive metal layer; the chip can effectively solve the problem that due to the two P electrodes being symmetrically arranged at the intersection of both sides of the vertical structure LED chip, the distances from the P electrodes to the two side edges of the LED chip are inconsistent, resulting in the luminous intensity of the side edge close to the P electrode being lower than that of the side edge far from the P electrode, thus causing uneven spot distribution of the vertical structure LED chip.

Description

Technical Field

[0001] The present application relates to the technical field of LED chips, and more particularly, to a vertical structure LED chip. Background Art

[0002] A light emitting diode is a device that converts electrical energy into light energy using a PN junction. Due to the advantages of good controllability, fast startup, long life, high luminous efficiency, safety, energy conservation and environmental protection of the light emitting diode, the light emitting diode (LED) is currently widely used in indoor lighting, outdoor lighting, vehicle lamps and handheld lighting and other application fields.

[0003] Existing vertical structure LED chips, as Figure 1 shown, in existing vertical structure LED chips, two P electrodes ( Figure 1 a in) are symmetrically arranged at the intersection of both sides of the vertical structure LED chip. Since the current density decreases as the distance from the P electrode increases, that is, the closer to the P electrode, the greater the current. Due to the limitations of the semiconductor material characteristics of the LED itself, a large current density will cause current congestion in a local area of the LED chip, resulting in the phenomenon of local area heating and decreased luminous brightness of the LED chip. Therefore, in existing vertical structure LED chips, due to the two P electrodes of the vertical structure LED chip being symmetrically arranged at the intersection of both sides of the vertical structure LED chip, the distances from the P electrode to the two side edges of the LED chip are inconsistent, resulting in the luminous intensity of the side edge close to the P electrode being lower than that of the side edge far from the P electrode (refer to Figure 2 , Figure 2 is the brightness distribution diagram of the existing vertical structure LED chip. The darker the color, the weaker the luminous intensity. Therefore, the luminous intensity of the left edge of the existing vertical structure LED chip is greater than that of the right edge), resulting in the problem of uneven spot distribution of the vertical structure LED chip.

[0004] In response to the above problems, there is currently no effective technical solution. Summary of the Invention

[0005] The purpose of the present application is to provide a vertical structure LED chip, which can effectively solve the problem that due to the two P electrodes of the vertical structure LED chip being symmetrically arranged at the intersection of both sides of the vertical structure LED chip, the distances from the P electrode to the two side edges of the LED chip are inconsistent, resulting in the luminous intensity of the side edge close to the P electrode being lower than that of the side edge far from the P electrode, thus resulting in the problem of uneven spot distribution of the vertical structure LED chip.

[0006] The present application provides a vertical structure LED chip, which includes:

[0007] A sequentially connected substrate layer, N-type conductive metal layer, insulating layer, P-type conductive metal layer, p-GaN layer, InGaN / GaN multiple quantum well layer, and n-GaN layer. The insulating layer has a plurality of through holes penetrating the P-type conductive metal layer, p-GaN layer, and InGaN / GaN multiple quantum well layer. A plurality of through holes are arranged in a rectangular array on the insulating layer. The N-type conductive metal layer is connected to the n-GaN layer through the through holes;

[0008] Two P electrodes are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer.

[0009] A vertical structure LED chip provided by the present application includes a sequentially connected substrate layer, N-type conductive metal layer, insulating layer, P-type conductive metal layer, p-GaN layer, InGaN / GaN multiple quantum well layer, n-GaN layer, and two P electrodes. Since the two P electrodes are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer, that is, the minimum distances from the two P electrodes to the two sides of the vertical structure LED chip are equal. Therefore, the current densities and light emission intensities of the two sides of the vertical structure LED chip are the same, effectively solving the problem that because the two P electrodes of the vertical structure LED chip are symmetrically arranged at the intersection of the two sides of the vertical structure LED chip, the distances from the P electrodes to the two sides of the LED chip are inconsistent, resulting in the light emission intensity of the side close to the P electrode being lower than that of the side far from the P electrode, thus causing uneven light spot distribution of the vertical structure LED chip, and further effectively improving the light emission uniformity of the vertical structure LED chip.

[0010] Optionally, the N-type conductive metal layer includes a sequentially connected bonding layer, bonding layer, current blocking layer, and N electrode layer. The minimum distance between the bonding layer and the substrate layer is less than the minimum distance between the N electrode layer and the substrate layer.

[0011] Optionally, the distance between adjacent through holes is 150 μm - 250 μm. The cross-sectional shape of the through hole is an annular shape. The radius of the inner circle of the through hole is 10 μm - 25 μm, and the height of the through hole is 1000 nm - 2000 nm.

[0012] Since the distance between adjacent through holes is 150 μm - 250 μm, this technical solution can effectively avoid the situation that due to the too small distance between adjacent through holes, the distance between two light emitting points is too small and the current density is too large, resulting in heat generation and a decrease in light emission brightness of the vertical structure LED chip, and due to the too large distance between adjacent through holes, the number of light emitting points of the vertical structure LED chip is too small and the light emission brightness of the vertical structure LED chip is insufficient.

[0013] Optionally, the P-type conductive metal layer includes a metal protection layer and a metal reflection layer. The metal protection layer is connected to the insulating layer. A groove is provided on the metal protection layer, and the metal reflection layer is filled in the groove. The p-GaN layer is connected to the metal reflection layer, and one end of the P electrode is connected to the metal protection layer.

[0014] Optionally, the vertical structure LED chip further includes a passivation layer. The passivation layer and the metal protection layer enclose a sealed cavity, and the metal reflection layer, the p-GaN layer, the InGaN / GaN multiple quantum well layer, and the n-GaN layer are all located in the sealed cavity.

[0015] Since the passivation layer and the metal protection layer enclose a sealed cavity, and the metal reflection layer, the p-GaN layer, the InGaN / GaN multiple quantum well layer, and the n-GaN layer are all located in the sealed cavity, that is, the sealed cavity of this technical solution can seal the metal reflection layer, the p-GaN layer, the InGaN / GaN multiple quantum well layer, and the n-GaN layer. Therefore, this technical solution can effectively avoid the situation where the metal reflection layer, the p-GaN layer, the InGaN / GaN multiple quantum well layer, and the n-GaN layer are oxidized due to contact with the external environment.

[0016] Optionally, the material of the metal reflection layer is silver and nickel, the thickness of the metal reflection layer is 100 nm - 300 nm, and the metal reflectivity of the metal reflection layer is greater than or equal to 95%.

[0017] Optionally, the material of the metal protection layer is any one or more of chromium, titanium, platinum, and gold, and the thickness of the metal protection layer is 1000 nm - 2000 nm.

[0018] Optionally, the pad cross-section of the P electrode is fan-shaped, and the diameter of the P electrode is 50 μm - 100 μm.

[0019] Optionally, the material of the insulating layer is SiO2, and the thickness of the insulating layer is 500 nm - 1000 nm.

[0020] Optionally, the material of the substrate layer is any one of sapphire, silicon, and silicon carbide.

[0021] As can be seen from the above, a vertical - structure LED chip provided by the present application includes a substrate layer, an N - type conductive metal layer, an insulating layer, a P - type conductive metal layer, a p - GaN layer, an InGaN / GaN multi - quantum well layer, an n - GaN layer, and two P electrodes connected in sequence. Since the two P electrodes are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer, that is, the minimum distances from the two P electrodes to the two side edges of the vertical - structure LED chip are equal, the current densities and light - emitting intensities of the two side edges of the vertical - structure LED chip are the same. Thus, it effectively solves the problem that because the two P electrodes of the vertical - structure LED chip are symmetrically arranged at the intersection of the two sides of the vertical - structure LED chip, the distances from the P electrodes to the two side edges of the LED chip are inconsistent, resulting in the light - emitting intensity of the side edge close to the P electrode being lower than that of the side edge far from the P electrode, and thus leading to uneven light - spot distribution of the vertical - structure LED chip. Furthermore, it effectively improves the light - emitting uniformity of the vertical - structure LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 FIG. 6 is a top - view structural schematic diagram of an existing vertical - structure LED chip.

[0023] Figure 2 FIG. 7 is a brightness distribution diagram of an existing vertical - structure LED chip.

[0024] Figure 3 FIG. 8 is a top - view structural schematic diagram of a vertical - structure LED chip provided by an embodiment of the present application.

[0025] Figure 4 FIG. 9 is a brightness distribution diagram of a vertical - structure LED chip provided by an embodiment of the present application.

[0026] Figure 5 FIG. 10 is a cross - sectional structural schematic diagram of a vertical - structure LED chip provided by an embodiment of the present application along the vertical direction.

[0027] Reference Numerals: 1. Substrate layer; 2. Bonding layer; 3. Bonding layer; 4. Current blocking layer; 5. N - electrode layer; 6. Insulating layer; 7. Metal protection layer; 8. Metal reflection layer; 9. p - GaN layer; 10. InGaN / GaN multi - quantum well layer; 11. n - GaN layer; 12. Passivation layer; 13. P - electrode; 14. N - type conductive metal layer; 15. P - type conductive metal layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0028] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but merely represents the selected embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative efforts belong to the scope of protection of the present application.

[0029] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, the terms "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0030] As Figures 3 - 5 shown, the present application provides a vertical structure LED chip, which includes:

[0031] A substrate layer 1, an N-type conductive metal layer 14, an insulating layer 6, a P-type conductive metal layer 15, a p-GaN layer 9, an InGaN / GaN multiple quantum well layer 10, and an n-GaN layer 11 connected in sequence. The insulating layer 6 has a plurality of through holes penetrating the P-type conductive metal layer 15, the p-GaN layer 9, and the InGaN / GaN multiple quantum well layer 10. The plurality of through holes are arranged in a rectangular array on the insulating layer 6. The N-type conductive metal layer 14 is connected to the n-GaN layer 11 through the through holes;

[0032] Two P electrodes 13, symmetrically arranged at the centers of two edges of the rectangle corresponding to the insulating layer 6.

[0033] A vertical structure LED chip provided by the present application includes a substrate layer 1, an N-type conductive metal layer 14, an insulating layer 6, a P-type conductive metal layer 15, a p-GaN layer 9 (p-type gallium nitride layer), an InGaN / GaN multi-quantum well layer 10 (indium gallium nitride / gallium nitride multi-quantum well layer), and an n-GaN layer 11 (n-type gallium nitride) connected in sequence. The substrate layer 1, the N-type conductive metal layer 14, the insulating layer 6, the P-type conductive metal layer 15, the p-GaN layer 9, the InGaN / GaN multi-quantum well layer 10, and the n-GaN layer 11 can be fabricated by existing manufacturing processes for vertical structure LED chips. The substrate layer 1 of this embodiment can support the N-type conductive metal layer 14, the insulating layer 6, the P-type conductive metal layer 15, the p-GaN layer 9, the InGaN / GaN multi-quantum well layer 10, the n-GaN layer 11, and the P electrode 13. In this embodiment, the N-type conductive metal layer 14 and the P-type conductive metal layer 15 are isolated from each other by providing an insulating layer 6 between them. Since the N-type conductive metal layer 14 of this embodiment needs to be connected to the n-GaN layer 11 and isolated from the P-type conductive metal layer 15 and the p-GaN layer 9, the insulating layer 6 of this embodiment has a plurality of through holes penetrating through the P-type conductive metal layer 15, the p-GaN layer 9, and the InGaN / GaN multi-quantum well layer 10. The plurality of through holes are arranged in a rectangular array on the insulating layer 6. It should be understood that since the material of the through holes is the same as that of the insulating layer 6, this embodiment is equivalent to providing a plurality of through holes made of insulating material on the insulating layer 6. A vertical structure LED chip provided by the present application further includes two P electrodes 13. The two P electrodes 13 of this embodiment are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer 6, that is, the P electrode 13 of this embodiment is connected to the P-type conductive metal layer 15. It should be understood that since the plurality of through holes are arranged in a rectangular array on the insulating layer 6 and the P electrodes 13 are arranged at the centers of two edges of the corresponding rectangle of the insulating layer 6, if the number of columns of the through holes is odd, the P electrode of this embodiment preferably occupies the position of one through hole for setting; if the number of columns of the through holes is even, the P electrode of this embodiment does not need to occupy the position of the through hole for setting. It should be understood that since a light-emitting diode is a device that converts electrical energy into light energy using a PN junction, and the N-type conductive metal layer 14 is connected to the n-GaN layer 11 through the through holes, each through hole of this embodiment corresponds to a light-emitting point of the vertical structure LED chip.

[0034] The working principle of this embodiment is as follows: A vertical - structure LED chip provided by this application includes a substrate layer 1, an N - type conductive metal layer 14, an insulating layer 6, a P - type conductive metal layer 15, a p - GaN layer 9, an InGaN / GaN multi - quantum well layer 10, an n - GaN layer 11, and two P electrodes 13, which are connected in sequence. Since the two P electrodes 13 are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer 6, that is, the minimum distances from the two P electrodes 13 to the two side edges of the vertical - structure LED chip are equal. Therefore, the current densities and light - emitting intensities of the two side edges of the vertical - structure LED chip are the same (refer to Figure 4 , the light - emitting intensity of the left edge of the vertical - structure LED chip is the same as that of the right edge). Thus, it effectively solves the problem that because the two P electrodes 13 of the vertical - structure LED chip are symmetrically arranged at the intersection of the two sides of the vertical - structure LED chip, the distances from the P electrodes 13 to the two side edges of the LED chip are inconsistent, resulting in the light - emitting intensity of the side close to the P electrode 13 being lower than that of the side far from the P electrode 13, and thus the light - spot distribution of the vertical - structure LED chip is uneven. Furthermore, it effectively improves the light - emitting uniformity of the vertical - structure LED chip. In addition, since the two P electrodes 13 of this embodiment are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer 6, the current density of the vertical - structure LED chip of this embodiment is symmetric up - down and left - right.

[0035] In some embodiments, the N - type conductive metal layer 14 includes a bonding layer 2, a bonding layer 3, a current - blocking layer 4, and an N - electrode layer 5, which are connected in sequence. The minimum distance between the bonding layer 2 and the substrate layer 1 is less than the minimum distance between the N - electrode layer 5 and the substrate layer 1. Specifically, the material of the N - electrode layer 5 in this embodiment can be any one or more of chromium (Cr), titanium (Ti), aluminum (Al), platinum (Pt), and gold (Au). The N - electrode layer 5 in this embodiment is connected to the n - GaN layer 11 through a through - hole. This embodiment can form the N - electrode layer 5 by evaporating metal on the current - blocking layer 4 using an electron - beam evaporation method. The N - electrode layer 5 forms an N - electrode column at the position of the through - hole. The N - electrode layer 5 forms an ohmic contact with the n - GaN layer 11. Since the N - electrode column penetrates the P - type conductive metal layer 15, the p - GaN layer 9, and the InGaN / GaN multi - quantum well layer 10, this embodiment can effectively reduce the light - blocking of the light - emitting surface and at the same time form a better heat - conduction channel inside the vertical - structure LED chip.

[0036] In some embodiments, the distance between adjacent vias is 150 μm - 250 μm. The cross-sectional shape of the via is an annular ring. The radius of the inner circle of the via is 10 μm - 25 μm, and the height of the via is 1000 nm - 2000 nm. Since the distance between adjacent vias is 150 μm - 250 μm, this embodiment can effectively avoid the situation where the distance between two light-emitting points is too small due to the too-small distance between adjacent vias, resulting in too-high current density, which in turn causes heat generation and a decrease in the light-emitting brightness of the vertical-structure LED chip, as well as the situation where the number of light-emitting points of the vertical-structure LED chip is too small and the light-emitting brightness of the vertical-structure LED chip is insufficient due to the too-large distance between adjacent vias.

[0037] In some embodiments, the P-type conductive metal layer 15 includes a metal protection layer 7 and a metal reflection layer 8. The metal protection layer 7 is connected to the insulating layer 6. There is a groove on the metal protection layer 7, and the metal reflection layer 8 is filled in the groove. The p-GaN layer 9 is connected to the metal reflection layer 8, and one end of the P electrode 13 is connected to the metal protection layer 7. In this embodiment, an ohmic contact is formed by connecting the p-GaN layer 9 to the metal reflection layer 8, and the metal protection layer 7 of this embodiment can protect the metal reflection layer 8.

[0038] In some embodiments, the vertical-structure LED chip further includes a passivation layer 12. The passivation layer 12 and the metal protection layer 7 enclose a sealed cavity, and the metal reflection layer 8, the p-GaN layer 9, the InGaN / GaN multiple quantum well layer 10, and the n-GaN layer 11 are all located in the sealed cavity. The vertical-structure LED chip of this embodiment further includes a passivation layer 12. Since the passivation layer 12 and the metal protection layer 7 enclose a sealed cavity, and the metal reflection layer 8, the p-GaN layer 9, the InGaN / GaN multiple quantum well layer 10, and the n-GaN layer 11 are all located in the sealed cavity, that is, the sealed cavity of this embodiment can seal the metal reflection layer 8, the p-GaN layer 9, the InGaN / GaN multiple quantum well layer 10, and the n-GaN layer 11. Therefore, this embodiment can effectively avoid the situation where the metal reflection layer 8, the p-GaN layer 9, the InGaN / GaN multiple quantum well layer 10, and the n-GaN layer 11 are oxidized due to contact with the external environment.

[0039] In some embodiments, the material of the metal reflection layer 8 is silver (Ag) and nickel (Ni). The thickness of the metal reflection layer 8 is 100 nm - 300 nm, and the metal reflectivity of the metal reflection layer 8 is greater than or equal to 95%. Specifically, this embodiment can form the metal reflection layer 8 by evaporating metal on the metal protection layer 7 using an electron beam evaporation method.

[0040] In some embodiments, the material of the metal protection layer 7 is any one or more of chromium, titanium, platinum, and gold, and the thickness of the metal protection layer 7 is 1000 nm - 2000 nm. Specifically, in this embodiment, the metal protection layer 7 can be formed by evaporating metal on the insulating layer 6 by means of electron beam evaporation.

[0041] In some embodiments, the pad cross-section of the P electrode 13 is fan-shaped, and the diameter of the P electrode 13 is 50 μm - 100 μm. Specifically, the material of the P electrode 13 in this embodiment is any one or more of chromium, titanium, aluminum, platinum, and gold, and the height of the P electrode 13 in this embodiment is 1000 nm - 2000 nm. It should be understood that the pad cross-section of the P electrode 13 in this embodiment can also be semi-elliptical, semi-circular, rounded rectangular, a combined figure of a rectangle and a semi-circle, or semi-elliptical. Since the pad of the P electrode 13 in this embodiment is a symmetric curved or arc structure, and this curved or arc structure is arranged towards the center of the insulating layer 6, this embodiment can effectively reduce the brightness loss of the reflective layers on both sides of the P electrode 13 and make the light-emitting effects on both sides of the P electrode 13 uniform and symmetric.

[0042] In some embodiments, the ratio of the distance between the top of the P electrode 13 and the passivation layer to the cross-sectional width of the P electrode 13 in the vertical direction is 1:5 - 1:2. When the ratio of the distance between the top of the P electrode 13 and the passivation layer to the cross-sectional width of the P electrode 13 is 1:5 - 1:2, this embodiment can improve the convenience of external connection of the P electrode 13 on the premise of ensuring a sufficiently large ratio of the light-emitting area. In addition, since the input current of the P electrode 13 in this embodiment has a larger expansion direction compared with the existing input current of the P electrode 13, this embodiment can effectively reduce the isolation area of the P electrode 13, that is, reduce the distance between the top of the P electrode 13 and the passivation layer (refer to Figure 1 and Figure 3 )

[0043] In some embodiments, the number of rows of the N electrode columns is equal to the number of columns of the N electrode columns. Since this embodiment only requires two P electrodes to make the N electrode columns with equal number of rows and columns on the insulating layer 6 emit light evenly, this embodiment can effectively reduce the production cost and light-emitting cost of the vertical structure LED chip. In addition, since the number of rows of the N electrode columns is equal to the number of columns of the N electrode columns, that is, the rectangle corresponding to the insulating layer 6 in this embodiment is a square, that is, the distance between the two P electrodes 13 is twice the distance from the P electrode 13 to the side of the vertical structure LED chip. Therefore, in the case of ensuring uniform brightness between the two P electrodes 13, the brightness between the P electrode 13 and the side of the vertical structure LED chip is also uniform, that is, the brightness of the side of the vertical structure LED chip is equal to the brightness of the center point of the connection line of the two P electrodes 13.

[0044] In some embodiments, the material of the insulating layer 6 is SiO2, and the thickness of the insulating layer 6 is 500 nm - 1000 nm. This embodiment can form the insulating layer 6 by means of chemical vapor deposition on the N-type conductive metal layer 14 using plasma-enhanced chemical vapor deposition. Specifically, the deposition temperature of the chemical vapor deposition in this embodiment is 200 - 300 °C.

[0045] In some embodiments, the material of the substrate layer 1 is any one of sapphire, silicon, and silicon carbide.

[0046] As can be seen from the above, a vertical structure LED chip provided by the present application includes a substrate layer 1, an N-type conductive metal layer 14, an insulating layer 6, a P-type conductive metal layer 15, a p-GaN layer 9, an InGaN / GaN multi-quantum well layer 10, an n-GaN layer 11, and two P electrodes 13 connected in sequence. Since the two P electrodes 13 are symmetrically arranged at the centers of two edges of the corresponding rectangle of the insulating layer 6, that is, the minimum distances from the two P electrodes 13 to the two sides of the vertical structure LED chip are equal, the current densities and light emission intensities of the two sides of the vertical structure LED chip are the same. Thus, it effectively solves the problem that because the two P electrodes 13 of the vertical structure LED chip are symmetrically arranged at the intersection of the two sides of the vertical structure LED chip, the distances from the P electrodes 13 to the two sides of the LED chip are inconsistent, resulting in the light emission intensity of the side close to the P electrode 13 being lower than that of the side far from the P electrode 13, thereby causing uneven light spot distribution of the vertical structure LED chip, and further effectively improving the light emission uniformity of the vertical structure LED chip.

[0047] In the embodiments provided by the present application, it should be understood that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0048] The above description is only for the embodiments of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A vertical structure LED chip, characterized in that, The vertical structure LED chip includes: A substrate layer, an N-type conductive metal layer, an insulating layer, a P-type conductive metal layer, a p-GaN layer, an InGaN / GaN multi-quantum well layer, and an n-GaN layer connected in sequence. The insulating layer has a plurality of through holes penetrating the P-type conductive metal layer, the p-GaN layer, and the InGaN / GaN multi-quantum well layer. The plurality of through holes are arranged in a rectangular array on the insulating layer. The N-type conductive metal layer is connected to the n-GaN layer through the through holes; Two P electrodes symmetrically arranged at the centers of two edges of the rectangle corresponding to the insulating layer; A passivation layer; The distance between adjacent through holes is 150 μm - 250 μm. The cross-sectional shape of the through hole is an annular shape. The radius of the inner circle of the through hole is 10 μm - 25 μm. The height of the through hole is 1000 nm - 2000 nm; The P-type conductive metal layer includes a metal protection layer and a metal reflection layer. The metal protection layer is connected to the insulating layer. There are grooves on the metal protection layer. The metal reflection layer is filled in the grooves. The p-GaN layer is connected to the metal reflection layer. One end of the P electrode is connected to the metal protection layer. The passivation layer and the metal protection layer enclose a sealed cavity. The metal reflection layer, the p-GaN layer, the InGaN / GaN multi-quantum well layer, and the n-GaN layer are all located in the sealed cavity; The ratio of the distance between the top of the P electrode and the passivation layer to the cross-sectional width of the P electrode in the vertical direction is 1:5 - 1:

2.

2. The vertical structure LED chip according to claim 1, characterized in that, The N-type conductive metal layer includes a bonding layer, a bonding layer, a current blocking layer, and an N electrode layer connected in sequence. The minimum distance between the bonding layer and the substrate layer is less than the minimum distance between the N electrode layer and the substrate layer.

3. The vertical structure LED chip according to claim 1, characterized in that, The material of the metal reflection layer is silver and nickel. The thickness of the metal reflection layer is 100 nm - 300 nm. The metal reflectivity of the metal reflection layer is greater than or equal to 95%.

4. The vertical structure LED chip according to claim 1, characterized in that, The material of the metal protection layer is any one or more of chromium, titanium, platinum, and gold. The thickness of the metal protection layer is 1000 nm - 2000 nm.

5. The vertical structure LED chip according to claim 1, characterized in that, The pad cross-section of the P electrode is fan-shaped. The diameter of the P electrode is 50 μm - 100 μm.

6. The vertical structure LED chip according to claim 1, characterized in that, The material of the insulating layer is SiO2. The thickness of the insulating layer is 500 nm - 1000 nm.

7. The vertical structure LED chip according to claim 1, characterized in that, The material of the substrate layer is any one of sapphire, silicon, and silicon carbide.

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