Method for configuring embedded table in memory, method for accessing memory and computing device

Abstract

The embodiment of the present invention relates to a method for configuring an embedded table in a memory, a method for accessing a memory, and a computing device. The method for configuring an embedded table in a memory comprises: determining the size and layout of the embedded table, wherein the embedded table comprises a plurality of table entries; and configuring the embedded table in the memory at least based on the remaining space of the memory, so as to realize the conversion of the virtual address to the physical address at least based on the index of the table entry related to the virtual address received and the embedded table. According to the scheme provided by the present invention, the batch conversion of the virtual address to the physical address can be realized, and the operation efficiency is improved.

Description

Technical Field

[0001] Embodiments of the present invention generally relate to the field of computer technology, and more particularly to a method for configuring an embedded table in a memory, a method for accessing a memory, and a computing device. Background Art

[0002] When a user accesses memory, the virtual address (VA) input by the user needs to be converted into a physical address (PA) first, so as to access the memory based on the physical address. The traditional method for converting virtual addresses to physical addresses includes: a processor (such as a central processing unit (CPU) or a graphics processing unit (GPU)) sends the virtual address to a memory management unit (MMU), and the memory management unit converts the virtual address into a physical address based on a page table entry (PTE).

[0003] However, when performing operations such as near memory computing (NMC) that require batch conversion of virtual addresses to physical addresses, the throughput of the memory management unit is seriously lower than the throughput requirement of the conversion of virtual addresses to physical addresses required by the operation. In other words, the processing capacity of the memory management unit is difficult to meet the requirements of near memory computing, resulting in low computing efficiency and serious lag. If a dedicated memory management unit with high throughput is developed, the dedicated memory management unit to be developed will have a large area and will be difficult to fully utilize when performing non-near memory operations, which will easily lead to a waste of resources. Summary of the invention

[0004] In view of the above problems, the present invention provides a method for configuring an embedded table in a memory, a method for accessing a memory and an electronic device, so as to realize batch conversion from virtual addresses to physical addresses and improve operation efficiency.

[0005] According to a first aspect of the present invention, a method for configuring an embedded table in a memory is provided, comprising: determining the size and layout of the embedded table, the embedded table comprising a plurality of table entries; and configuring the embedded table in the memory based at least on the remaining space of the memory, so as to realize conversion of a virtual address to a physical address based at least on the received index of the table entry related to the virtual address and the embedded table.

[0006] In some embodiments, determining the size and layout of the embedded table includes: determining a data access pattern based on a computing task; and determining a layout of the embedded table based on the determined data access pattern.

[0007] In some embodiments, the layout of the embedded table includes: a layout of tiling table items horizontally, a layout of tiling table items vertically, and a layout of a combination of tiling table items horizontally and tiling table items vertically.

[0008] In some embodiments, determining the size of the embedded table includes: determining the number of entries in the embedded table; determining the space occupied by each entry; and determining the size of the embedded table based on the number of entries and the space occupied by each entry.

[0009] In some embodiments, configuring the embedded table in the memory based at least on the remaining space of the memory includes: reading the remaining space of the memory; comparing the size of the embedded table with the remaining space of the read memory; and in response to the size of the embedded table being less than or equal to the remaining space of the read memory, configuring the embedded table in the memory.

[0010] According to a second aspect of the present invention, a method for accessing memory is provided, comprising: obtaining an initial position of an embedded table configured in the memory, and a width of a cache line of the memory, the embedded table comprising a plurality of table entries; and in response to receiving an index of a table entry related to a virtual address, implementing a conversion of a virtual address to a physical address based at least on the received index of the table entry related to the virtual address and the embedded table, so as to access the memory based on the physical address.

[0011] In some embodiments, the method for accessing memory also includes: determining a table entry type of an embedded table, wherein converting a virtual address to a physical address based at least on an index of a received table entry related to the virtual address and the embedded table includes: determining a physical address based on an index of a received table entry related to the virtual address, an initial position of the embedded table, a width of a cache line of the memory, and a table entry type.

[0012] In some embodiments, determining the physical address includes: determining the granularity of the index of the table entry based on the table entry type; and determining the physical address by summing the product of the initial position of the embedded table and the width of the cache line of the memory, and the product of the index of the table entry and the granularity of the index of the table entry.

[0013] In some embodiments, the method for accessing a memory further includes: in response to accessing the memory based on the physical address, performing an aggregation or dispersion operation on the data in the memory.

[0014] According to a third aspect of the present invention, a computing device is provided, comprising: a host side, configured to allocate an embedded table so as to configure the embedded table in a memory; and a device side, configured to access the memory according to the method of the second aspect of the present invention so as to perform aggregation or dispersion operations.

[0015] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other features, advantages and aspects of the embodiments of the present invention will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements.

[0017] Figure 1 A schematic diagram showing the principle of near memory operation according to an embodiment of the present disclosure is shown.

[0018] Figure 2 A schematic diagram of a computing device according to an embodiment of the present invention is exemplarily shown.

[0019] Figure 3 A flow chart of a method for configuring an embedded table in a memory according to an embodiment of the present invention is shown.

[0020] Figures 4A-4F A schematic diagram of an exemplary embedding table according to an embodiment of the present invention is shown.

[0021] Figure 5 A flow chart of a method for accessing a memory according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0022] The following is a description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0023] As used herein, the term "including" and its variations mean open inclusion, i.e., "including but not limited to". Unless otherwise stated, the term "or" means "and / or". The term "based on" means "based at least in part on". The terms "an example embodiment" and "an embodiment" mean "at least one example embodiment". The term "another embodiment" means "at least one additional embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0024] As described above, in the traditional scheme for converting virtual addresses to physical addresses, the memory management unit implements the conversion of virtual addresses to physical addresses based on the mapping relationship between virtual addresses and physical addresses recorded in the page table. However, since the memory management unit is designed for the traditional computing core-centric system, its processing power can mainly serve the computing core. With the introduction and application of near-memory operations, it can, for example, enable the data in the memory to be directly operated without passing through the computing core through special instructions. In this case, the computing core only provides control logic for data operations.

[0025] Figure 1 A schematic diagram showing the principle of near memory operation according to an embodiment of the present disclosure is shown.

[0026] Near memory operations usually perform simple operations on data so that operations related to the data can be completed in memory as much as possible. For example, refer to Figure 1 As shown in Example 1, near memory operation may refer to: embedding an embedding table in the memory to aggregate the data in multiple table entries in the embedded table, and continuously storing the result data obtained by aggregation in the result buffer of the memory, which is equivalent to moving the data. In another example, as shown in Example 2, near memory operation may also refer to: writing the result data continuously stored in the result buffer of the memory back to the embedding table of the memory in a scattered manner.

[0027] Furthermore, if Figure 1 As shown, when performing near-memory operations, the computing core will issue instructions to the memory, but the data does not pass through the computing core. That is to say, when performing near-memory operations or similar operations, the computing core basically does not perform operations, but assigns tasks related to the operation to the memory system through instructions. For example, based on the virtual address received in the user operation, the computing core sends the virtual address to the memory management unit to convert it into a physical address, and then the second-level cache (L2 Cache) in the storage system accesses the memory based on the converted physical address to read the corresponding data for operation, thereby realizing near-memory operations on the data. Since near-memory operations include large-scale data movement or aggregation, it is necessary to convert virtual addresses to physical addresses in batches. At this time, the throughput of the memory management unit is seriously lower than the throughput of the conversion of virtual addresses to physical addresses required for near-memory operations. However, if a dedicated memory management unit with high throughput is developed, it will occupy a large amount of chip area, and it is difficult to fully utilize it when performing non-near-memory operations, which is easy to cause resource waste.

[0028] In order to at least partially solve one or more of the above problems and other potential problems, combined with the inventive concept of the present invention, considering that the essence of the conversion from virtual address to physical address is a mathematical operation, and since the computing core is mainly responsible for issuing instructions during the near memory operation process, and the vector operation unit (vector engine) configured thereon basically does not participate in the operation, the exemplary embodiment of the present invention proposes a scheme for configuring an embedded table in a memory. In this scheme, by determining the size and layout of the embedded table, the embedded table includes multiple table entries; and at least based on the remaining space of the memory, the embedded table is configured in the memory, so that the vector operation unit configured on the computing core can be used to implement the batch conversion of the virtual address to the physical address based on the index of the table entry related to the virtual address received and the embedded table. Therefore, the scheme of the present invention can realize the batch conversion of the virtual address to the physical address by utilizing the computing power of the vector operation unit configured on the computing core, while not affecting the computing processing of the computing core itself. Further, the scheme of the present invention obtains the corresponding physical address based on the virtual address calculation by mathematical operation, without the need to implement the conversion of the virtual address to the physical address through the memory management unit, thereby improving the computing efficiency.

[0029] The following will be combined Figures 2 to 3 A scheme for configuring an embedded table in a memory according to an embodiment of the present invention is described in detail.

[0030] Figure 2 The schematic diagram of the computing device 200 according to the embodiment of the present invention is exemplarily shown. It should be understood that the computing device 200 may further include additional units not shown, and the scope of the present invention is not limited in this respect.

[0031] like Figure 2 As described above, the computing device 200 may include a host end 210 and a device end 220 .

[0032] Regarding the host side 210, it can be configured to: determine the size and layout of the embedding table, wherein the embedding table includes a plurality of table entries; and configure the embedding table in the memory based on at least the remaining space of the memory.

[0033] Regarding the device end 220, it can be configured to: obtain the initial position of the embedded table configured in the memory, and the width of the cache line of the memory; implement the conversion of the virtual address to the physical address based on at least the index of the table entry related to the virtual address and the embedded table, so as to access the memory based on the physical address. According to an embodiment of the present invention, the device end 220 can also be configured to: issue instructions related to operations; and in response to accessing the memory based on the physical address, perform aggregation or dispersion operations on the data in the memory.

[0034] Figure 3FIG. 3 is a flow chart of a method 300 for configuring an embedded table in a memory according to an embodiment of the present invention. The method 300 may be performed as follows: Figure 2 The method 300 is executed at the computing device 200 shown. It should be understood that the method 300 may also include additional actions not shown and / or may omit the actions shown, and the scope of the present invention is not limited in this respect.

[0035] In step 302, the host determines the size and layout of the embedded table, wherein the embedded table includes a plurality of table entries.

[0036] The embedded table may refer to a table configured in the memory and including a plurality of table entries, wherein each table entry corresponds to a physical address in the physical address space of the memory.

[0037] Regarding the layout of the embedded table, it may include: a layout of tiling table items horizontally, a layout of tiling table items vertically, and a layout of a combination of tiling table items horizontally and tiling table items vertically.

[0038] Regarding the layout mode of horizontally tiling table items, it means that the table items in the embedded table are arranged row by row from left to right. Regarding the layout mode of vertically tiling table items, it means that the table items in the embedded table are arranged column by column from bottom to top. In some other embodiments of the present invention, a combination of the above two modes can also be used to arrange the table items in the embedded table, which is not limited here.

[0039] Generally, a memory usually has multiple memory channels. According to an embodiment of the present invention, when all memory channels in the memory are used to configure the embedded table, the embedded table can adopt a layout mode of horizontally tiling table entries or a layout mode of vertically tiling table entries across all memory channels. Figure 4A and Figure 4B Exemplary embedded tables 400A and 400B configured using all memory channels are shown, wherein embedded table 400A adopts a layout mode of tiling table entries horizontally, and embedded table 400B adopts a layout mode of tiling table entries vertically. According to an embodiment of the present invention, when only one memory channel in the memory is used to configure the embedded table, the embedded table can adopt a layout mode of tiling table entries horizontally or a layout mode of tiling table entries vertically within the one memory channel. Figure 4C An exemplary embedded table 400C configured using one memory channel is shown, wherein the embedded table 400C adopts a layout method of horizontally tiling table entries. According to an embodiment of the present invention, when some memory channels in the memory are used to configure the embedded table, the embedded table can adopt a desired layout method in each memory channel in turn, for example, adopting the same layout method for each memory channel, or alternately adopting different layout methods. Figure 4D and Figure 4E4 shows an exemplary embedded table 400D and an embedded table 400E configured using a portion of the memory channels, wherein the embedded table 400D and the embedded table 400E adopt different layouts. FIG. 4A to FIG. 4E The layout of the embedded table shown is only exemplary. Those skilled in the art can also make the embedded table have other layout forms based on the above principles of the present invention.

[0040] According to an embodiment of the present invention, the layout of the embedded table may be related to, for example, a computing task. That is, the layout of the embedded table may be determined based on the computing task. In some embodiments, determining the layout of the embedded table may include: determining a data access mode based on the computing task; and determining the layout of the embedded table based on the determined data access mode.

[0041] Regarding the computing task, it may be a computing task involving virtualization or multi-task parallelism, or a computing task involving decomposing accessed data into different memory channels.

[0042] Regarding the data access mode, it can indicate the number of computing cores accessing the embedded table. According to an embodiment of the present invention, the number of memory channels used to configure the embedded table can be determined based on the number of computing cores accessing the embedded table. In other words, the number of memory channels used to configure the embedded table can be determined based on the data access mode. In response to the determined number of memory channels, the layout of the embedded table can then be determined. For example, when the number of computing cores accessing the embedded table is 1, the number of memory channels used to configure the embedded table is 1, that is, the embedded table is configured in only one memory channel. At this time, the embedded table can be made to adopt a layout method of horizontally tiling table entries (such as Figure 4C In another example, when multiple computing cores access the embedded table, multiple memory channels are required to configure the embedded table, that is, the embedded table is configured in some or all of the memory channels. In this case, the same layout can be used for each memory channel (such as Figure 4D ) or alternately using different layouts (such as Figure 4E ), or layout the embedded table across these memory channels, such as making the embedded table span the memory channels and tiling the table entries horizontally (such as Figure 4A ) or vertically tiled table items (as shown Figure 4B as shown) for layout.

[0043] For example, when the computing task involves virtualization, the data access mode can be determined to be accessing one or part of all memory channels of the memory, that is, the embedded table is configured in one or part of the memory channels, thereby determining the layout of the embedded table as, for example, FIG. 4C to FIG. 4EAny of the layouts shown in .

[0044] In some other examples, if it is determined based on the computing task that the accessed data is expected to be decomposed into all memory channels of the memory to improve the memory bandwidth, the embedding table may have the following structure: Figure 4A or Figure 4B The layout shown in FIG. 1 is as follows; if it is determined based on the computing task that the accessed data is expected to be concentrated in one memory channel, the embedded table can be made to have the following Figure 4C The layout shown.

[0045] According to some embodiments of the present invention, the layout of the embedded table can be adjusted dynamically. For example, the layout of the embedded table can be adjusted dynamically based on different computing tasks.

[0046] Regarding the size of the embedded table, it may be related to the number of table entries in the embedded table and the space occupied by each table entry. According to an embodiment of the present invention, determining the size of the embedded table may include: determining the number of table entries in the embedded table; determining the space occupied by each table entry; and determining the size of the embedded table based on the number of table entries and the space occupied by each table entry. For example, when the space occupied by each table entry in the embedded table is the same, the size of the embedded table = the number of table entries * the space occupied by each table entry.

[0047] According to an embodiment of the present invention, it is further necessary to determine whether the memory has enough remaining space so as to completely configure the embedded table in the memory. Figure 3 In step 304, the host side configures an embedding table in the memory based at least on the remaining space of the memory, so as to realize the conversion from the virtual address to the physical address based at least on the received index of the table entry related to the virtual address and the embedding table.

[0048] According to an embodiment of the present invention, the size of the embedded table can be compared with the remaining space of the memory to determine whether the embedded table can be configured in the memory. For example, in some embodiments, configuring the embedded table in the memory based on at least the remaining space of the memory may include: reading the remaining space of the memory; comparing the size of the embedded table with the remaining space of the read memory; and in response to the size of the embedded table being less than or equal to the remaining space of the read memory, configuring the embedded table in the memory. If the size of the embedded table is larger than the remaining space of the memory, it means that the embedded table cannot be configured in the memory, for example, it is necessary to release part of the space in the memory in order to configure the embedded table in the memory.

[0049] It should be understood that the remaining memory space here refers to the continuous, unoccupied space in the memory.

[0050] Figure 4F A schematic diagram of an exemplary embedding table 400F according to an embodiment of the present invention is shown.

[0051] like Figure 4F As shown, an embedding table 400F is configured in the memory physical address space. The embedding table 400F includes n entries, entry 0 to entry n-1. Among them, Figure 4F The embedded table 400F adopts the layout of horizontally tiling table entries as described above, that is, the N table entries it includes are arranged row by row starting from table entry 0, and each row has w table entries.

[0052] Furthermore, if Figure 4F As shown, each table entry in the embedded table 400F corresponds to a physical address in the physical address space of the memory. Therefore, according to the inventive concept of the present invention, the physical address of the table entry corresponding to the received virtual address is obtained, that is, the conversion from the virtual address to the physical address is realized, so that the memory can be accessed directly based on the physical address of the table entry obtained. Figure 5 Detailed description based on Figure 4F The scheme of accessing memory of the embedded table 400F.

[0053] Figure 5 1 is a flowchart of a method 500 for accessing memory according to an embodiment of the present invention. The method 500 may be performed as follows: Figure 2 The method 500 is executed at the computing device 200 shown. It should be understood that the method 500 may also include additional actions not shown and / or may omit the actions shown, and the scope of the present invention is not limited in this respect.

[0054] In step 502, the device side obtains the initial position of the embedded table configured in the memory and the width of the cache line of the memory.

[0055] Regarding the initial position of the configured embedding table, it refers to the distance between the embedding table and the initial position of the memory, as given by Figure 4F As shown in A.

[0056] Regarding the width of the memory cache line, as given by Figure 4F As shown in B, it can be determined based on the number of memory channels and the size of the minimum granularity of each channel. According to an embodiment of the present invention, when the size of the minimum granularity of each channel is the same, the width of the cache line of the memory = the number of memory channels * the size of the minimum granularity of the channel.

[0057] According to an embodiment of the present disclosure, based on the configured initial position of the embedding table and the width of the cache line of the memory, the starting address of the embedding table can be determined. Specifically, the starting address of the embedding table = the configured initial position of the embedding table (ie, Figure 4F A)*the width of the memory cache line (i.e., Figure 4F B). In other words, Figure 4FThe A*B area shown in may correspond to an occupied portion of the memory physical address space.

[0058] In addition, according to an embodiment of the present disclosure, the initial position of the configured embedding table and the width of the cache line of the memory can be determined when the embedding table is configured by the host side, and sent by the host side to the device side.

[0059] In step 504, in response to receiving the index of the table entry related to the virtual address, the device side implements the conversion of the virtual address to the physical address based on at least the received index of the table entry related to the virtual address and the embedded table, so as to access the memory based on the physical address.

[0060] Regarding the conversion of a virtual address to a physical address based at least on the index of a received table entry related to the virtual address and an embedded table, it may include: determining the physical address based at least on the index of a received table entry related to the virtual address, the initial position of the embedded table, and the width of a cache line of the memory.

[0061] Regarding the index of the table entry related to the virtual address, it can be used to indicate the virtual address in the table entry. According to an embodiment of the present invention, the index of the table entry related to the virtual address can be input by the user into the device end. Specifically, in response to the index of the table entry related to the virtual address input by the user, the virtual address in the table entry indicated by the index is determined so as to calculate the physical address based on the determined virtual address. For example, the index input by the user is 1, and based on the index 1 and the table header corresponding to the index 1, the virtual address in the table entry indicated by the index 1 can be determined.

[0062] According to some embodiments of the present invention, the physical address of the table entry of the embedded table is related to the table entry type of the embedded table. In this case, the physical address can be determined based on the index of the table entry related to the virtual address received, the initial position of the embedded table, the width of the cache line of the memory, and the table entry type.

[0063] Regarding the table entry type of the embedded table, it can be, for example, a floating point (float) or a half-precision floating point (half float). The granularity of the index of the table entry can be determined by the table entry type. For example, if the table entry type is a floating point (float), the granularity of the index of the table entry is 4 bytes. In another example, an entry includes 8 floating points, and the granularity of the index of the table entry is 32 bytes. Generally, the granularity of the index of the table entry is related to the element type and the number of elements in the table entry. According to an embodiment of the present invention, the table entry type of the embedded table can be determined by user input.

[0064] Regarding determining the physical address, it may refer to: determining the granularity of the index of the table entry based on the table entry type; and determining the physical address by summing the product of the initial position of the embedded table and the width of the cache line of the memory, and the product of the index of the table entry and the granularity of the index of the table entry. In other words, it can be calculated by the following formula 1 as follows Figure 4F The physical address of the entry in the embedded table 400F is:

[0065] Physical address of the embedded table entry =

[0066] Initial position of the embedding table * width of the memory cache line + formula 1

[0067] Index of the table entry related to the virtual address*granularity of the index of the table entry Wherein, as described above, the index of the table entry related to the virtual address is input by the user.

[0068] Based on the above formula 1, the physical address of the table entry of the embedded table corresponding to the virtual address can be obtained by calculation, thereby realizing the conversion of the virtual address to the physical address using the embedded table configured in the memory. Moreover, this conversion of the virtual address to the physical address can be completed in the vector operation unit of the computing core, so that the batch conversion of the virtual address to the physical address can be realized, and there is no need to realize the address conversion through the memory management unit, so it is more efficient.

[0069] Further, according to an embodiment of the present invention, the memory can be accessed based on the physical address calculated by the above formula 1, and aggregation or dispersion operations can be performed on the data in the memory.

[0070] In summary, an embodiment of the present invention provides a method for configuring an embedding table in a memory, calculating a physical address corresponding to a virtual address based on the embedding table configured in the memory, and accessing the memory based on the calculated physical address to implement a solution such as near memory operation.

[0071] According to an embodiment of the present invention, the host side may, for example, configure the embedded table in the memory and obtain configuration information related to the embedded table, such as the initial position of the embedded table, the width of the cache line of the memory, etc. According to some embodiments of the present invention, the host side may determine the size and layout of the embedded table to be configured, and configure the embedded table in the memory based on at least the remaining space of the memory.

[0072] According to an embodiment of the present invention, the host side may send the acquired configuration information related to the embedding table to the device side, that is, the device side may acquire the initial position of the embedding table configured in the memory and the width of the cache line of the memory through the host side.

[0073] According to an embodiment of the present invention, for example, the index of the table entry related to the virtual address is input to the device end by a user, that is, the index of the table entry related to the virtual address is received by the device end.

[0074] According to an embodiment of the present invention, the physical address corresponding to the virtual address is calculated by the device side based on at least the index of the table entry related to the virtual address and the configuration information related to the embedded table. Specifically, the physical address corresponding to the virtual address indicated by the index of the table entry input by the user is calculated by the device side based on the formula: physical address of the table entry of the embedded table = initial position of the embedded table * width of the cache line of the memory + index of the table entry related to the virtual address * granularity of the index of the table entry. According to an embodiment of the present invention, the above calculation on the physical address can be performed by the vector operation unit of the computing core at the device side to realize the conversion of the virtual address to the physical address.

[0075] According to an embodiment of the present invention, instructions related to near memory operations, such as those related to the near memory operations, are issued by the device side. For example, instructions related to near memory operations, such as those related to the near memory operations, are issued by a computing core at the device side.

[0076] According to an embodiment of the present invention, in response to instructions related to near memory operations, near memory operations are performed at the device end. According to some embodiments of the present invention, in response to received instructions, the device end can access the memory based on the calculated physical address to perform aggregation or dispersion operations on the data in the memory. For example, the memory system at the device end, such as the second-level cache (L2 Cache), can access the memory based on the calculated physical address to read the corresponding data for operation, and write the operation results back to the memory, thereby realizing near memory operations on the data at the device end.

[0077] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

[0078] The above are only optional embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for configuring an embedded table in a memory, characterized in that: include: Determine the size and layout of an embedded table, wherein the embedded table includes a plurality of table entries; as well as At least based on the remaining space of the memory, the embedded table is configured in the memory, so as to realize the conversion of the virtual address to the physical address based on at least the received index of the table entry related to the virtual address and the embedded table, wherein the conversion of the virtual address to the physical address is realized by the vector operation unit of the computing core of the device end; The determining of the size and layout of the embedded table includes: determining a data access mode based on a computing task; and determining a layout of the embedded table based on the determined data access mode.

2. The method according to claim 1, characterized in that The layout of the embedded table includes: a layout of tiling table items horizontally, a layout of tiling table items vertically, and a layout of a combination of tiling table items horizontally and tiling table items vertically.

3. The method according to claim 1, characterized in that: Determining the size of the embedding table involves: Determining the number of entries in the embedded table; Determine the space occupied by each table entry; and The size of the embedding table is determined based on the number of entries and the space occupied by each entry.

4. The method according to claim 1, characterized in that: Based at least on the remaining space of the memory, configuring the embedded table in the memory comprises: Read the remaining space of the memory; Comparing the size of the embedding table with the remaining space of the read memory; and In response to the size of the embedded table being less than or equal to the remaining space of the read memory, the embedded table is configured in the memory.

5. A method for accessing memory, characterized in that: include: Obtaining an initial position of an embedded table configured in a memory and a width of a cache line of the memory, wherein the embedded table includes a plurality of table entries, wherein a layout of the embedded table is determined based on a computing task; as well as In response to receiving an index of a table entry related to a virtual address, a conversion from a virtual address to a physical address is implemented at least based on the received index of the table entry related to the virtual address and the embedded table, so as to access the memory based on the physical address, and the conversion from the virtual address to the physical address is implemented by a vector operation unit of a computing core on the device side.

6. The method according to claim 5, characterized in that Also includes: Determine the entry type of the embedded table, where Implementing the conversion of the virtual address to the physical address based at least on the received index of the table entry related to the virtual address and the embedded table includes: A physical address is determined based on the received index of the entry related to the virtual address, the initial position of the embedding table, the width of the cache line of the memory, and the entry type.

7. The method according to claim 6, characterized in that Determining the physical address involves: Determining a granularity of an index of the entry based on the entry type; and The physical address is determined by summing the product of the initial position of the embedded table and the width of the cache line of the memory and the product of the index of the table entry and the granularity of the index of the table entry.

8. The method according to claim 7, characterized in that Also includes: In response to accessing the memory based on the physical address, an aggregation or dispersion operation is performed on the data in the memory.

9. A computing device, characterized in that include: The host side is configured to allocate the embedding table so as to configure the embedding table in the memory; The device side is configured to access the memory according to any method of claims 5-8 to perform aggregation or dispersion operations.

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