A frequency multiplier, signal transmitter, and radar chip

Abstract

The embodiment of the application discloses a frequency multiplier, a signal transmitter and a radar chip, and relates to the field of electronic circuits.The frequency multiplier comprises a signal generator configured to receive a continuous frequency modulation (FMCW) signal and output a square wave signal with the same frequency as the FMCW signal; and a third harmonic amplifier coupled to the signal generator and configured to amplify the third harmonic in the square wave signal and output a FMCW signal with a frequency three times higher than the FMCW signal.The above scheme can improve the generation efficiency of the FMCW signal with a frequency three times higher.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of electronic circuits, and in particular to a frequency multiplier, a signal transmitter and a radar chip. BACKGROUND

[0002] A frequency multiplier is a circuit that produces an output signal whose frequency is an integer multiple of the input signal frequency. In generating a triple frequency signal, an oscillator can be used to generate an oscillation near the triple frequency, and then a nonlinear amplifier can be used to generate a third harmonic signal, and the oscillator can be injection-locked by this signal, thereby outputting a triple frequency signal with greater power.

[0003] In the above implementation, the design of the triple frequency module is relatively complex, and many risks may be caused, such as: with the changes of process angle, power voltage and temperature (Process, Voltage, Temperature, PVT), the oscillator may not start, or the oscillation frequency of the oscillator may deviate and cannot be injection-locked, etc. In addition, in order to obtain a larger injection locking range (Locking Range, LR), the third harmonic power injected cannot be too small, which may cause the nonlinear amplifier generating the third harmonic to consume a large amount of power. SUMMARY

[0004] To solve any of the above technical problems, embodiments of the present application provide a frequency multiplier, a signal transmitter and a radar chip.

[0005] To achieve the purposes of the embodiments of the present application, the embodiments of the present application provide a frequency multiplier, comprising:

[0006] a signal generator configured to receive a continuous frequency modulation (FMCW) signal and output a square wave signal with the same frequency as the FMCW signal;

[0007] a third harmonic amplifier coupled to the signal generator and configured to amplify a third harmonic in the square wave signal and output a triple frequency FMCW signal.

[0008] A signal transmitter comprises

[0009] a FMCW signal generator, a frequency multiplication circuit comprising the frequency multiplier, and a power amplifier; wherein:

[0010] the FMCW signal generator is configured to generate a FMCW signal under the control of a frequency division adjustment signal;

[0011] the frequency multiplication circuit is coupled to the FMCW signal generator and configured to convert the frequency of the FMCW signal to a millimeter wave frequency band radio frequency (RF) FMCW signal by using the frequency multiplier;

[0012] The power amplifier is coupled to the frequency multiplier and is configured to amplify the power of the radio frequency FMCW signal and output the radio frequency FMCW signal.

[0013] A radar chip comprises:

[0014] The transmitting antenna converts the received radio frequency FMCW signal into a probe signal wave and radiates the probe signal wave to free space.

[0015] The receiving antenna converts the echo signal wave into a radio frequency receiving signal, wherein the probe signal wave is reflected by an object to form the echo signal wave.

[0016] The signal transmitter is connected to the transmitting antenna and feeds the generated radio frequency FMCW signal to the transmitting antenna.

[0017] The signal receiver is connected to the receiving antenna and is configured to process the radio frequency receiving signal into a baseband digital signal using the radio frequency transmitting signal and output the baseband digital signal.

[0018] One of the above technical solutions has the following advantages or beneficial effects:

[0019] The signal generator generates a square wave signal corresponding to the FMCW signal, and the third harmonic amplifier amplifies the third harmonic component in the square wave signal to obtain a triple frequency FMCW signal, thereby achieving the purpose of generating a high frequency signal. Compared with the prior art of using an oscillator to generate a third harmonic component, the proportion of the third harmonic component in the square wave signal is higher, so that the third harmonic component extracted by the triple frequency amplifier is more, thereby improving the generation efficiency of the triple frequency FMCW signal.

[0020] Other features and advantages of the embodiments of the present application will be described in the following description, and some will become apparent from the description, or will be understood by those skilled in the art. The purpose and other advantages of the embodiments of the present application can be achieved and obtained by the structures specifically pointed out in the specification, claims and drawings. BRIEF DESCRIPTION OF DRAWINGS

[0021] The accompanying drawings are used to provide a further understanding of the technical solutions of the embodiments of the present application, and constitute a part of the specification, and are used to explain the technical solutions of the embodiments of the present application together with the embodiments of the present application, and do not constitute a limitation on the technical solutions of the embodiments of the present application.

[0022] Figure 1 The structure diagram of the frequency multiplier provided by the embodiments of the present application is shown in the following figure:

[0023] Figure 2(a) is a frequency domain distribution diagram of the square wave signal after fast Fourier transform;

[0024] Figure 2(b) is a schematic diagram of the frequency domain distribution of the oscillation signal after fast Fourier transform;

[0025] FIG3( a ) is a schematic diagram of a signal generator in a frequency multiplier;

[0026] FIG3( b ) is a schematic diagram of an inverter circuit;

[0027] FIG4( a ) is a schematic diagram of a signal generator in a frequency multiplier;

[0028] FIG4( b ) is another schematic diagram of a signal generator in a frequency multiplier;

[0029] FIG4( c ) is another schematic diagram of a signal generator in a frequency multiplier;

[0030] FIG5( a ) is another schematic diagram of a signal generator in a frequency multiplier;

[0031] FIG5( b ) is a schematic diagram of a current mirror in the signal generator shown in FIG5( a );

[0032] FIG6( a ) is a schematic diagram of a frequency tripler amplifier in a frequency multiplier;

[0033] FIG6( b ) is another schematic diagram of a frequency tripling amplifier;

[0034] Figure 7 A schematic diagram of a signal transmitter used in an embodiment of the present application;

[0035] Figure 8 A schematic diagram of a radar chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] To make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that, unless there is a conflict, the embodiments and features in the embodiments of the present application can be combined with each other in any way.

[0037] In radar systems, frequency multipliers are used to multiply the frequency of the frequency-modulated continuous wave (FMCW) signal generated by a phase-locked loop (PLL) to a radio frequency band such as millimeter waves. As mentioned in the background introduction, due to various limitations of injection locking in frequency multipliers, radar systems typically target the frequency band of the radiated electromagnetic waves. The higher the frequency of the FMCW signal generated by the PLL, the lower the multiplier required, thereby reducing the design difficulty of the frequency multiplier. However, the higher the frequency of the FMCW signal generated by the PLL, the more difficult it is to suppress the phase noise of the FMCW signal. Large phase noise can cause the radar system to miss or misdetect targets due to noise when using echo signals for target detection.

[0038] To systematically address the multiple technical difficulties encountered in related technologies, such as phase noise suppression and injection locking, the present invention provides a solution that utilizes the presence of higher harmonics in the oscillation signal and achieves frequency multiplication by separating these higher harmonics. Furthermore, considering that FMCW signals continuously vary in frequency within a frequency band, the frequency multiplier maintains stable operation within the corresponding frequency band for higher harmonics.

[0039] If the aforementioned frequency multiplier is used to triple the FMCW signal, the frequency of the FMCW signal can be below 25 GHz. If the tripler circuit in the frequency multiplier is cascaded with other frequency multiplier circuits (such as a doubler circuit) to achieve higher frequency multiples, the frequency of the FMCW signal can be reduced to 10-11 GHz or even lower. Because at least a portion of the frequency multiplier circuits in the frequency multiplier provided by this solution do not employ an injection locking scheme, the problems associated with injection locking are significantly suppressed. Furthermore, because the frequency multiplier can provide high-frequency conversion of the FMCW signal, it effectively reduces the possibility of undesirable phase noise, such as that caused by the excessively high FMCW frequency generated by the preceding circuit (i.e., the phase-locked loop).

[0040] In some examples, the frequency multiplier may be manufactured using a short-channel device manufacturing process, for example, using a process with a thickness of 40 nanometers or less (e.g., 40 nm or 22 nm), so that at least some of its components, such as the oscillation wave generation circuit and the RF amplification circuit, are capable of processing RF signals.

[0041] Figure 1 This is a schematic diagram of the structure of the frequency multiplier provided in the embodiment of the present application. Figure 1 As shown, the frequency multiplier 10 includes a signal generator 11 and a frequency tripler amplifier 12 ; wherein: the signal generator 11 receives an FMCW signal and outputs a square wave signal with the same frequency as the FMCW signal.

[0042] The square wave signal can be decomposed into a fundamental wave, a third harmonic wave and a higher odd harmonic wave, and therefore, a signal generator can be used to replace the oscillator as a third harmonic component generation device. Further, compared with other square wave signals (such as a ramp signal or a sine signal) generated by some oscillators, the proportion of the third harmonic component in the square wave signal is higher than that of the third harmonic component in the other square wave signals.

[0043] FIGS. 2(a) and 2(b) are frequency domain distribution diagrams of a square wave signal and a certain ramp signal after Fast Fourier Transform (FFT), respectively. As shown in FIG. 2(a), the ratio of the third harmonic component to the direct current component in the square wave signal is 8 / 3π. As shown in FIG. 2(b), the ratio of the third harmonic component to the direct current component in the oscillation signal is less than 8 / 3π. From the above comparison, it can be seen that the signal generator can more efficiently generate the third harmonic component.

[0044] Further, the number of input terminals and output terminals of the signal generator 11 can be different according to different application scenarios.

[0045] Specifically, the signal generator 11 has two input terminals and one output terminal, and is a differential input single-ended output signal generator; or the signal generator has one input terminal and one output terminal, and is a single-ended input single-ended output signal generator; or the signal generator has two input terminals and two output terminals, and is a differential input differential output signal generator.

[0046] In the above, differential input refers to that the signal generator 11 receives two FMCW signals, and the two FMCW signals constitute a differential signal, that is, the amplitudes of the two FMCW signals are the same and the phases are opposite.

[0047] Taking the square wave generator as an example, in the above, differential output refers to that the square wave generator outputs two square wave signals, and the two square wave signals constitute a differential signal, that is, the amplitudes of the two square wave signals are the same and the phases are opposite.

[0048] The third harmonic amplifier is coupled to the signal generator and is used to amplify the third harmonic in the square wave signal and output a three-fold frequency FMCW signal.

[0049] When the received square wave signal is a differential signal, the third harmonic amplifier can be a differential amplifier, which is used to amplify the third harmonic component in the square wave signal corresponding to the differential signal and output a three-fold frequency differential signal FMCW signal.

[0050] The differential amplifier is an amplifier that amplifies the voltage difference between two input signals with a fixed gain.

[0051] Compared with some examples using an oscillator to generate the third harmonic component, the third harmonic component in the square wave signal has a higher proportion, so that the third harmonic component extracted by the tripler amplifier is more, and the generation efficiency of the tripler FMCW signal is improved.

[0052] The third harmonic amplifier can be a radio frequency amplifier. The radio frequency amplifier can be used to amplify the signal, which can effectively amplify the third harmonic and suppress other spurs. Compared with the oscillator injection method, the working bandwidth of the radio frequency amplifier is wider, and is independent of the injection locking range. The performance of the radio frequency amplifier is more stable with PVT changes.

[0053] In Figure 1 In the structure shown, a signal generator is used to generate a square wave signal corresponding to an FMCW signal, and a third harmonic amplifier is used to amplify the third harmonic component in the square wave signal to obtain a tripler FMCW signal, thereby achieving the purpose of generating a high-frequency signal. In addition, compared with using an oscillator to generate the third harmonic component, the third harmonic component in the square wave signal has a higher proportion, so that the third harmonic component extracted by the tripler amplifier is more, and the generation efficiency of the tripler FMCW signal is improved.

[0054] The frequency multiplier provided by the embodiments of the present application will be described below:

[0055] FIG. 3(a) is a schematic diagram of a signal generator 11 in a frequency multiplier 10 shown in FIG. 2. Figure 1 As shown in FIG. 3(a), the signal generator 11 includes N inverter circuits connected in cascade, where N is an integer greater than or equal to 2.

[0056] Specifically, the N inverter circuits are connected in cascade, where an input end of the first inverter circuit is configured to receive an FMCW signal, and an output end of the Nth inverter circuit is configured to output a square wave signal. An input end of an nth inverter circuit is connected to an output end of an (n-1)th inverter circuit, and an output end of the nth inverter circuit is connected to an input end of an (n+1)th inverter circuit, where n=2, 3, …, N-1.

[0057] At least part of the inverter circuits includes an inverter 111 and a resistor 112. The resistor 112 is connected between the input end and the output end of the corresponding inverter 111. One FMCW signal passes through the N inverter circuits connected in cascade to form one square wave signal.

[0058] Specifically, the inverter 111 has a corresponding resistor 112, where one end of the resistor 112 is connected to the input end of the inverter 111, and the other end is connected to the output end of the inverter circuit 111.

[0059] A resistor 112 is connected in parallel with the two ends of the inverter 111, so as to set a feedback loop for the inverter 111, and the resistor 112 is used to feed back the output signal after being reversed by 180 degrees to the input end of the inverter circuit, so as to form a negative feedback amplifier circuit.

[0060] Fig. 3(b) is a schematic diagram of the connection between the inverter 111 and the resistor 112 in Fig. 3(a). As shown in Fig. 3(b), at least one of the N inverter circuits 111 is a self-biased inverter circuit.

[0061] The self-biased inverter circuit comprises a third switch tube M3 and a fourth switch tube M4; the control end of the third switch tube M3 is connected to the control end of the fourth switch tube M4; the input end of the third switch tube M4 is connected to a system voltage VDD; the input end of the fourth switch tube M4 is connected to the output end of the third switch tube M3, and the output end of the fourth switch tube is grounded.

[0062] The control end of the third switch tube M3 and the control end of the fourth switch tube M4 are provided with a first connection point as an input end IN for receiving an input signal; the output end of the third switch tube M3 and the input end of the fourth switch tube M4 are provided with a second connection point as an output end OUT for outputting a processed signal.

[0063] The resistor 112, marked as R in Fig. 3(a) and Fig. 3(b), has one end connected to the input end IN and the other end connected to the output end OUT.

[0064] At least one of the third switch tube M3 and the fourth switch tube M4 is a MOS tube or a CMOS tube. Similarly, at least one of the first switch tube M1, the second switch tube M2, the fifth switch tube M5 and the sixth switch tube M6 mentioned below is a MOS tube or a CMOS tube.

[0065] By selecting one or more inverter circuits in the cascaded N inverter circuits as a self-biased inverter circuit, the inverter circuit can be placed on a suitable DC bias point while ensuring the conversion of the FMCW signal to a square wave signal, thereby avoiding the condition of low gain of the output signal of the inverter circuit.

[0066] Fig. 4(a) is Figure 1 Another schematic diagram of the signal generator 11 in the frequency multiplier 10 shown in Fig. 4(a). As shown in Fig. 4(a), the signal generator 11 comprises a comparator circuit; wherein the output end of the comparator circuit is used to output a square wave signal.

[0067] Taking the comparator circuit receiving the single-ended FMCW signal as an example, one input end of the comparator circuit receives the FMCW signal, and the other input end receives a reference signal (such as 0v voltage). The comparator circuit performs signal inversion by comparing the voltage of the electrical signals of the two input ends, so as to output the square wave signal of the FMCW. If multiple comparators are included in the comparator circuit, the square wave signal of the FMCW can be outputted.

[0068] As compared with the structure shown in FIG. 3(a), the structure shown in FIG. 4(a) requires fewer elements, facilitating the layout and wiring on the circuit board.

[0069] FIG. 4(b) is another schematic diagram of the comparator circuit in the frequency multiplier. As shown in FIG. 4(b), one input end of the comparator circuit is used to receive the FMCW signal, and the other input end of the comparator is connected with a reference voltage Vref, wherein the size of the reference voltage Vref can be the direct current level of the FMCW signal; and the output end of the comparator is used to output the square wave signal.

[0070] One end of the first impedance device is connected with the one input end, and the other end is connected with a first direct current bias voltage (DCbias1), which is used to adjust the voltage value of the one input end; one end of the second impedance device is connected with the other input end, and the other end is connected with a second direct current bias voltage (DCbias2), which is used to adjust the voltage value of the other input end.

[0071] The size of the first direct current bias voltage (DCbias1) and the second direct current bias voltage (DCbias2) can be equal, or one of them is greater than the other. Further, the size of the first direct current bias voltage (DCbias1) and the second direct current bias voltage (DCbias2) can be in a multiple relationship. The first impedance device and the second impedance device can be resistors.

[0072] The first impedance device and the second impedance device are used for voltage adjustment, so as to ensure that the square wave signal outputted by the comparator circuit is a standard square wave, avoid the upper and lower edges of the outputted square wave signal having an arc, and ensure the integrity of the square wave signal.

[0073] FIG. 4(c) is a second schematic diagram of the comparator circuit in the frequency multiplier. As shown in FIG. 4(c), the two input ends of the comparator circuit receive two differential FMCW signals respectively; and the output end of the comparator circuit is used to output the square wave signal.

[0074] Fig. 5(a) is another schematic diagram of the signal generator in the frequency multiplier. As shown in Fig. 5(a), the signal generator 11 utilizes the feature of the current mirror to provide a mirror current, and generates a square wave signal with a suitable fluctuation range by adjusting the on-off of different current paths of the current mirror. To this end, the signal generator 11 comprises a current mirror circuit, a first switch tube M1 and a second switch tube M2; wherein: the current mirror circuit is connected to a first current transmission path and a second current transmission path, so that there is a preset current proportional relationship between a first DC bias signal transmitted by the first current transmission path and a second DC bias signal transmitted by the second current transmission path; the first switch tube M1 is connected to the first current transmission path, and a control end of the first switch tube M1 is used to receive an FMCW signal; the second switch tube M2 is connected to the second current transmission path, and a control end of the second switch tube M2 receives a reference signal or another FMCW signal; wherein, the second current transmission path is provided with an output end to output the square wave signal.

[0075] Taking the FMCW signal as a single-ended signal as an example, the second switch tube M2 is connected to Vref, so that the second switch tube M2 is off; when the first switch tube M1 is turned on under the control of the FMCW signal, the output end OUT outputs a DC signal, and the current value of the DC signal is determined according to the preset current proportional relationship and the current value flowing through the first switch tube M1; when the first switch tube M1 is off, the first current transmission path in which the first switch tube M1 is located has no current, and thus the second current transmission path in which the output end OUT is located also has no current. In this way, a square wave signal with the same frequency as the FMCW signal is formed.

[0076] Taking the FMCW signal as a differential signal as an example, the first switch tube M1 is connected to one of the differential signals, and the second switch tube M2 is connected to the other FMCW signal 2 of the differential signals; due to the anti-phase and equal-amplitude feature of the differential signals, and the first switch tube M1 and the second switch tube M2 are switch tubes manufactured by the same process. In this way, when the first switch tube M1 is turned on under the control of the FMCW signal 1 and the second switch tube M2 is off under the control of the FMCW signal 2, currents are transmitted in the first current transmission path and the second current transmission path of the current mirror circuit, so that the output end OUT has current output; when the first switch tube M1 is off under the control of the FMCW signal 1 and the second switch tube M2 is turned on under the control of the FMCW signal 2, no current is transmitted in the first current transmission path and the second current transmission path of the current mirror circuit, so that the output end OUT has no current output. In this way, a square wave signal with the same frequency as the FMCW signal is formed.

[0077] In the embodiments of the present application, the current mirror is used to copy or multiply the current signal, and the multiplication factor can be greater than 1 or less than 1. That is, the current signal output from one end of the current mirror is copied or multiplied as another current signal output from the other end. The copied current signal has the same size as the used current signal. If the multiplication factor is n, the multiplied current signal has n times the size of the used current signal. The value of n is greater than 0 and not equal to 1.

[0078] The current mirror circuit can be formed based on a CMOS transistor or a PMOS transistor. For example, FIG. 5(b) is a schematic diagram of the current mirror in the signal generator 11 shown in FIG. 5(a). As shown in FIG. 5(b), the current mirror circuit includes a fifth switch transistor M5 and a sixth switch transistor M6, wherein:

[0079] The input end of the fifth switch transistor M5 and the input end of the sixth switch transistor M6 are connected to the supply voltage VDD. The control end of the fifth switch transistor M5 and the control end of the sixth switch transistor M6 are connected. A connection point is arranged between the control end of the fifth switch transistor M5 and the control end of the sixth switch transistor M6. Another connection point is arranged at the output end of the fifth switch transistor M5, and the two connection points are connected.

[0080] The output end of the fifth switch transistor M5 is used as the first output end of the current mirror, and the output end of the sixth switch transistor is used as the second output end of the current mirror.

[0081] The characteristics of the current mirror can be used to make the first DC bias voltage (DC bias1) and the second DC bias voltage (DC bias2) have the same size or a multiple relationship.

[0082] FIG. 6(a) is a schematic diagram of the tripler amplifier in the frequency multiplier 10. As shown in FIG. 6(a), the tripler amplifier 12 includes a radio frequency amplifier and a filter. The filter is connected to the radio frequency amplifier and is used to filter the signal processed by the radio frequency amplifier.

[0083] Specifically, the filter can filter the interference signal (e.g., fundamental wave or high-order harmonic component) mixed in the third harmonic component to reduce the interference signal in the processed signal.

[0084] FIG. 6(b) is another schematic diagram of the tripler amplifier. As shown in FIG. 6(b), the filter is a notch filter, as shown in the device in the dashed box in FIG. 6(b). The resonance frequency of the notch filter is the frequency of the interference signal, which is used to filter out the interference signal.

[0085] Figure 7 A schematic diagram of a signal transmitter for use in embodiments of the present application. As shown, the signal transmitter comprises a FMCW signal generator, a frequency multiplier circuit comprising a frequency multiplier as described in any of the above examples, and a power amplifier; wherein: Figure 7

[0086] The FMCW signal generator generates a FMCW signal under the control of a frequency division adjustment signal. The FMCW signal generator can be any generator that can generate a FMCW signal.

[0087] For example, the FMCW signal generator is a phase-locked loop that generates a FMCW signal based on the frequency division adjustment signal. The phase-locked loop comprises a voltage-controlled oscillator, a charge pump, a frequency and phase detector, a frequency divider, and a modulator. The frequency and phase detector receives a reference clock signal and a frequency division signal, and is connected to the charge pump; the charge pump is connected to the voltage-controlled oscillator to provide a control voltage; the voltage-controlled oscillator is controlled by the control voltage to output a square wave signal with adjustable frequency; the frequency divider is connected between the voltage-controlled oscillator and the frequency and phase detector to divide the frequency of the square wave signal and output the frequency division signal. The frequency and phase detector detects the reference clock signal and the frequency division signal, and outputs a representation signal (up, down signal) corresponding to the order of the respective transition edges; the charge pump adjusts the output control voltage according to the representation signal; the voltage-controlled oscillator changes the frequency of the output square wave signal according to the amplitude change of the received control voltage. When the frequency of the square wave signal is constant, the control voltage is stable. To output the FMCW signal, the modulator outputs the frequency division adjustment signal according to the preset frequency variation linearity, so that the frequency divider adjusts the frequency division signal in the loop of the square wave signal by changing the frequency division ratio, so that the output square wave signal is a FMCW signal.

[0088] The frequency multiplier circuit is coupled to the FMCW signal generator for converting the frequency of the FMCW signal to a millimeter wave frequency band using the frequency multiplier in the frequency multiplier circuit. Here, according to the frequency band of the FMCW signal, in some examples, the frequency multiplier circuit only contains the tripler in the above examples.

[0089] The frequency multiplier can generate a third harmonic component based on the signal generator, improve the output efficiency of the tripler FMCW signal, and use a radio frequency amplifier to amplify the third harmonic component, reduce the interference of the tripler FMCW signal, and improve the signal-to-noise ratio of the output signal of the frequency multiplier.

[0090] In another example, the frequency multiplier circuit comprises cascaded frequency multipliers, wherein the cascaded frequency multipliers comprise the tripler in the above examples. For example, the frequency multiplier circuit further comprises one or at least two frequency doublers, which are cascaded with the frequency multiplier, so that the frequency multiplier circuit amplifies the frequency of the FMCW signal by a factor of 6 or more.​

[0091] Specifically, an input end of the at least one frequency doubler can be connected with an output end of the frequency multiplier, for continuing frequency amplification on the FMCW signal whose frequency is amplified by 3 times; or an output end of the at least one frequency doubler can be connected with an input end of the frequency multiplier, for outputting the FMCW signal whose frequency is amplified by 2 times, so that the frequency multiplier continues frequency amplification on the FMCW signal whose frequency is amplified by 2 times.

[0092] Under the premise that the frequency of the radio frequency FMCW signal is pre-set, by setting one or more frequency doublers, the purpose of increasing the frequency multiplication capability of the frequency multiplication circuit can be achieved, so as to reduce the frequency of the FMWC signal output by the FMCW signal generator.

[0093] Since the frequency of the FMWC signal output by the FMCW signal generator is smaller, the phase noise in the FMWC signal will be smaller accordingly, so that the phase random change carried in the radio frequency FMWC will be further less, and therefore the interference signal generated due to the phase random change in the radio frequency FMWC signal transmission process is reduced.

[0094] The power amplifier is used for power amplifying and outputting the radio frequency FMCW signal to meet the radiation range of the detection signal wave. The power amplifier includes one or more common source amplifiers, etc. For example, it contains a plurality of cascaded common source amplifiers.

[0095] Figure 8 A schematic diagram of a radar sensor provided by an embodiment of the present application is shown in FIG. 1. Figure 8 As shown in FIG. 1, the radar sensor includes:

[0096] a transmitting antenna, which converts the received radio frequency FMCW signal into a detection signal wave to be radiated to free space;

[0097] a receiving antenna, which converts a return signal wave into a radio frequency receiving signal; wherein the detection signal wave is reflected by an object to form the return signal wave;

[0098] a signal transmitter, which is connected with the transmitting antenna and feeds the generated radio frequency FMCW signal to the transmitting antenna;

[0099] a signal receiver, which is connected with the receiving antenna and is used for processing the radio frequency receiving signal into a baseband digital signal by using the radio frequency transmitting signal and outputting the baseband digital signal.

[0100] In the radar sensor, the above circuit modules can be integrated in the same radar chip, or the antennas can be externally arranged on a high-frequency wiring board where the radar chip is located.

[0101] The phase error and bandwidth linearity of the radio frequency FMCW signal output by the signal transmitter of the present application are obviously improved, so that the detection accuracy of the radar sensor is improved.

[0102] Further, the signal transmitter can also use a frequency multiplier manufactured by a process below 40 nanometers to amplify the frequency of the FMCW signal, which can support the processing of FMCW signals in the range of 10-25 GHz and can be suitable for the use requirements of millimeter wave radar chips.

[0103] Further, by increasing the multiplication capability of the frequency multiplication circuit in the signal transmitter, the requirement for the output frequency of the FMCW signal generator can be reduced, the frequency of the FMCW signal output by the FMCW signal generator can be controlled to be lower, the phase noise of the FMCW signal is smaller, and the random change of the phase carried by the radio frequency FMCW signal emitted by the transmitting antenna is reduced, so that the interference signal in the echo signal wave received by the signal receiver through the receiving antenna is reduced, and the signal-to-noise ratio of the echo signal wave is improved.

[0104] In one embodiment, the present application also provides an electronic device, comprising: a device body; and a radar sensor as in the above embodiments arranged on the device body; wherein the radar sensor is used for target detection.

[0105] In one embodiment of the present application, the radar sensor can be arranged outside the device body, in another embodiment of the present application, the radar sensor can also be arranged inside the device body, and in other embodiments of the present application, the radio device can also be partially arranged inside the device body and partially arranged outside the device body. The embodiments of the present application do not limit this, and the specific arrangement is determined according to the situation.

[0106] It should be noted that the radar sensor can realize functions such as target detection by transmitting and receiving FMCW-based electromagnetic signals, to provide detection target information and / or communication information to the device body, and to assist or even control the operation of the device body.

[0107] In an optional embodiment, the device body described above can be a component and product applied in fields such as smart home, transportation, smart home, consumer electronics, monitoring, industrial automation, cabin detection, and health care. For example, the device body can be a smart transportation device (such as a car, a bicycle, a motorcycle, a ship, a subway, a train, etc.), a security device (such as a camera), a liquid level / flow rate detection device, a smart wearable device (such as a bracelet, glasses, etc.), a smart home device (such as a sweeping robot, a door lock, a television, an air conditioner, a smart lamp, etc.), various communication devices (such as a mobile phone, a tablet computer, etc.), and the like, and can also be various instruments for detecting vital sign parameters and various devices carrying the instruments, such as cabin detection of a car, indoor personnel monitoring, smart medical devices, consumer electronic devices, etc.

[0108] In yet another optional embodiment, when the device body described above is applied to an advanced driver assistance system (i.e., ADAS), the radio device (such as a millimeter wave radar) as a vehicle-mounted sensor can provide various functional safety guarantees for the ADAS system, such as automatic brake assistance (i.e., AEB), blind spot detection warning (i.e., BSD), auxiliary lane change warning (i.e., LCA), and reverse auxiliary warning (i.e., RCTA).

[0109] For example, the vehicle configured with the radar sensor further includes a vehicle shell, a vehicle driving system, and a vehicle control system.

[0110] The vehicle shell is provided with at least one mounting hole or fence to mount the radar sensor. For example, the mounting hole is provided at one or more positions on the vehicle shell according to the needs of the vehicle control system for the measurement information provided by the radar sensor. For example, the mounting hole is a plurality of mounting holes and is provided at four corner positions of the vehicle shell and / or a rearview mirror position, etc. The mounting hole can also be provided at the front and rear of the vehicle and / or at the door position, etc.

[0111] The driving system of the vehicle is used to drive the overall movement of the vehicle, such as forward movement, reverse movement, turning, etc. The driving system includes, for example, an engine, a transmission mechanism, and wheels, etc.

[0112] The vehicle control system is connected with the radar sensor and is used to provide warning information and / or control the vehicle driving system to perform a safety emergency operation according to the measurement information.

[0113] The vehicle control system comprises a radar warning device of the vehicle, and can further comprise an automatic auxiliary driving system. In the case of the radar sensor connecting the radar warning device, the radar sensor is arranged at a body corner position at the rear of the vehicle, and is used to provide obstacle information within a range of about 90° from the body side of the vehicle to the rear of the vehicle. When the radar warning device determines that there is an obstacle in the corresponding range according to the measurement information provided by the radar sensor during the reversing process, corresponding warning information such as a beeping sound or an image is provided. In the case of the radar sensor connecting the automatic auxiliary driving system, the radar sensor is arranged at a body corner position at the rear of the vehicle, and is used to provide obstacle information within a range of about 90° from the body side of the vehicle to the rear of the vehicle. When the automatic auxiliary driving system determines that there is an obstacle in the corresponding range according to the measurement information provided by the radar sensor during the reversing process, the vehicle is controlled to slow down or even stop.

[0114] The technical features of the above embodiments can be combined in any manner. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described, but as long as the combinations of the technical features do not exist, they should be considered as the scope of the present application.

[0115] It should be noted that the above are only the preferred embodiments of the present application and the technical principles applied. Those skilled in the art will understand that the present application is not limited to the specific embodiments herein, and those skilled in the art can make various obvious changes, readjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. A signal transmitter comprising a frequency-modulated continuous wave (FMCW) signal generator, a frequency multiplication circuit comprising a frequency multiplier, and a power amplifier; wherein: the FMCW signal generator is configured to generate a FMCW signal under the control of a frequency division adjustment signal; the frequency multiplication circuit is coupled to the FMCW signal generator and is configured to convert the frequency of the FMCW signal to a radio frequency band by using the frequency multiplier to obtain a radio frequency FMCW signal; and the power amplifier is coupled to the frequency multiplication circuit and is configured to power amplify the radio frequency FMCW signal and output a radio frequency transmission signal; wherein the frequency multiplier comprises: a signal generator configured to receive a continuous frequency-modulated (FMCW) signal and output a square wave signal at the same frequency as the FMCW signal; and a third harmonic amplifier coupled to the signal generator and configured to amplify a third harmonic in the square wave signal to output a triple frequency FMCW signal. The signal generator comprises a differential input, single-ended output signal generator, a single-ended input, single-ended output signal generator, or a differential input, differential output signal generator. The signal generator comprises: a cascade of N inverter circuits; wherein at least some of the inverter circuits comprise an inverter and a resistor; the resistor is connected between the input and output of the corresponding inverter; wherein a FMCW signal is passed through the cascade of N inverter circuits to form the square wave signal; and N is an integer greater than or equal to 2. At least one of the N inverter circuits is a self-biased inverter. The signal generator comprises a comparator circuit; wherein: the two inputs of the comparator circuit receive a single-ended FMCW signal and a reference signal, or the two inputs of the comparator circuit receive two differential FMCW signals; and the output of the comparator circuit is configured to output the square wave signal. The signal generator comprises a current mirror circuit, a first switch tube, and a second switch tube; wherein: the current mirror circuit is connected to a first current transmission path and a second current transmission path, such that the first current transmission path transmits a first DC bias signal and the second current transmission path transmits a second DC bias signal, and the first switch tube is connected to the first current transmission path and the control end of the first switch tube is configured to receive a FMCW signal; the second switch tube is connected to the second current transmission path and the control end of the second switch tube is configured to receive a reference signal or another FMCW signal; and the second current transmission path is provided with an output end to output the square wave signal. The third harmonic amplifier comprises a radio frequency amplifier.

2. The signal transmitter of claim 1, wherein, Further comprising: a filter connected to the third harmonic amplifier and configured to filter the triple frequency FMCW signal processed by the third harmonic amplifier.

3. The signal transmitter of claim 1 or 2, wherein The signal generator is manufactured using a short channel device process. The frequency multiplication circuit further comprises a frequency doubler cascaded with the frequency multiplier.

4. The signal transmitter of claim 3, wherein, Further comprising: a transmitting antenna configured to convert the received radio frequency FMCW signal into a probe signal wave and radiate it into free space.

5. The signal transmitter of claim 1 or 2, wherein ​ 6. The signal launcher of claim 1, wherein, ​ ​ ​ 7. The signal transmitter according to claim 1, characterized in that: ​ 8. The signal launcher of claim 1, wherein, ​ ​ 9. The signal launcher of claim 1, wherein, ​ 10. The signal launcher of claim 1, wherein, ​ 11. A radar sensor, characterized by ​ ​ a receiving antenna, which converts echo signal waves into radio frequency receiving signals; wherein the probe signal waves form the echo signal waves after being reflected by the object; a signal transmitter as claimed in any one of claims 1 to 10, which is connected to the transmitting antenna and feeds the generated radio frequency FMCW signal to the transmitting antenna; a signal receiver, which is connected to the receiving antenna and processes the radio frequency receiving signals into baseband digital signals using the radio frequency transmitting signals and outputs the baseband digital signals.

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