A multi-thread data synchronization method and system applied to PLC and device

Abstract

The application discloses a kind of multi-threaded data synchronization method and system applied to PLC and device, comprising: the data used by all multi-threaded is divided into one write multi-use, multi-write multi-use, public three types;According to the relationship between thread and memory, allocate independent memory area;Lock each independent memory area;Timing synchronization data of each independent memory area;Each thread runs according to its corresponding independent memory area, and the result of program running is put into each independent memory area;Timing update the data of actual memory;Repeat the process of timing synchronization data of each independent memory area to timing update the data of actual memory, realize the running of entire program and the update of data.The application can greatly reduce the system call overhead of various locks while still fully utilizing the multi-core resources of processor to realize the parallel synchronous running of multi-threaded for the complex system with more threads requiring data synchronization, so as to improve the efficiency of program running and the real-time of system.

Description

TECHNICAL FIELD

[0001] The present application relates to a data synchronization method and system, in particular to a multi-thread data synchronization method and system applied to PLC and device. BACKGROUND

[0002] There are a large number of threads running in PLC and device, which independently access the public data. In order to ensure the consistency of the data, various synchronization locks such as semaphore, mutex, file lock and the like are used.

[0003] When a thread needs to access the data, it first acquires the lock to lock the use right of the resource, and then releases the lock after the use is completed for other threads to use. If a thread tries to acquire the resource, other threads have locked the resource, and the thread can use it only after other threads release the resource. Figure 1 For example, thread 1 acquires the resource at T1 to continue running, and thread 2 fails to acquire the resource at T2, and thread 2 can continue to execute only when thread 1 releases the resource at T3.

[0004] The lock mechanism well solves the problem of multi-thread resource competition, but in PLC which has many threads, much competition and high real-time requirement, the lock mechanism also causes efficiency problems.

[0005] The common method is to use a large lock for all resources. When a thread needs a part of the resource, it uses the lock to lock the use right of all resources, and then releases the resource for other threads to use after the control is completed. This method is simple and not prone to errors, but the final running effect is equivalent to single-thread running or single-core running, and the computing power of the multi-core CPU cannot be utilized. Another method is to divide the resources into small pieces, and use a lock for each small piece. The thread only needs to lock the part of the resource it needs. This method seems reasonable, but in fact, since the resources are cut into small pieces, there are a large number of lock requests and release work of the threads, and the lock operation is a system-level call, which means that the program execution process will be switched from user mode to system mode and then back to user mode. Compared with ordinary program execution, this overhead is huge, and as a result, the thread execution time is greatly increased. Figure 2 . SUMMARY

[0006] The present application aims to provide a multi-thread data synchronization method and system applied to PLC and device, so as to greatly reduce the system overhead of data synchronization and improve the real-time performance of the entire device.

[0007] Technical scheme: the application comprises the following steps: dividing all data used by multi-thread into three types of one-write-multiple-use, multiple-write-multiple-use and public use; allocating independent memory areas according to the relationship between threads and memory; locking each independent memory area; timing synchronization of data of each independent memory area; each thread runs according to the corresponding independent memory area and puts the program running result into the independent memory area; timing updating of data of the actual memory; repeating the process of timing synchronization of data of each independent memory area to timing updating of data of the actual memory to realize the running of the whole program and the updating of data.

[0008] The basis of the data classification is how many threads write the data: the data is only written by one thread, which is one-write-multiple-use, the data is written by several threads, which is multiple-write-multiple-use, and the remaining data is public use.

[0009] The independent memory areas are allocated according to the relationship between threads and memory, and the specific allocation method is as follows: an independent memory area is established for the thread corresponding to the one-write-multiple-use memory; an independent memory area is established for the multiple threads corresponding to the multiple-write-multiple-use memory; an independent memory area is established for the remaining threads.

[0010] The independent memory areas are locked, and the specific locking method is as follows: the memory used independently by a single thread is not locked; a local lock is added to the independent memory area shared by multiple threads; a global lock is added to the public data.

[0011] When timing synchronization of data of each independent memory area, the data of one-write-multiple-use and multiple-write-multiple-use is synchronized to each independent memory area, and the public data is not synchronized.

[0012] When timing synchronization of data of each independent memory area, the data in the actual memory is repeatedly written into the independent memory according to the direction of the read data arrow.

[0013] When timing updating of data of the actual memory, the data in each allocated independent memory is written into the actual memory in turn, and only the part responsible for writing by each thread or multiple threads is written.

[0014] When timing updating of data of the actual memory, the data of the independent memory is written into the corresponding actual memory area according to the direction of the write data arrow.

[0015] A multi-thread data synchronization system applied to PLC and device is used to realize a multi-thread data synchronization method applied to PLC and device.

[0016] A computer readable storage medium has a computer program stored thereon, and the computer program is executed by a processor to realize the above-mentioned multi-thread data synchronization method applied to PLC and device.

[0017] Beneficial effects: The application can greatly reduce the system call overhead of various locks in the traditional synchronization mode, and still make full use of the multi-core resources of the processor to realize the parallel synchronization running of multi-threading, so as to improve the efficiency of program running and the real-time of the system. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A schematic diagram of the prior art when a certain thread needs to access data;

[0019] Figure 2 A schematic diagram of the prior art when resources are processed in different ways;

[0020] Figure 3 A schematic diagram of the multi-thread data synchronization method of the application. DETAILED DESCRIPTION

[0021] The application will be further described below with reference to the drawings.

[0022] A multi-thread data synchronization method applied to a PLC and a device of the application comprises the following steps:

[0023] Step 1: All data used by multi-threading is divided into one-write-many, many-write-many and public three types, and the basis of data classification is how many threads write the data. The data is only written by one thread, which is one-write-many type, the data is written by several threads (the number of threads can be determined according to actual needs), which is many-write-many type, and the remaining data is public type.

[0024] Step 2: Independent memory areas are allocated according to the relationship between threads and memories: an independent memory area is established for the thread corresponding to the one-write-many memory; an independent memory area is established for the multiple threads corresponding to the many-write-many memory; and an independent memory area is established for the remaining threads.

[0025] Step 3: The memory used by single thread is not locked; the independent memory area shared by multi-thread is locally locked; and the public data is globally locked.

[0026] Step 4: The data in each independent memory area is synchronized at a fixed time, and the one-write-many and many-write-many data is synchronized to each independent memory area, and the public data is not synchronized.

[0027] Step 5: Each thread runs according to its corresponding independent memory area, and the result of program running is put into the independent memory area.

[0028] Step 6: The data in the actual memory is updated at a fixed time, and the data in each independent memory area allocated in step 2 is written into the actual memory in sequence when synchronized, and only the part written by each thread or multiple threads is written.

[0029] Step 7: Repeat steps 4, 5, and 6 to run the entire PLC or device program and update the data.

[0030] The present invention also includes a multi-threaded data synchronization system applied to a PLC and a device, which is used to implement the multi-threaded data synchronization method applied to a PLC and a device.

[0031] Example

[0032] A multi-threaded data synchronization method applied to a PLC and a device in this embodiment includes the following steps:

[0033] Step 1: Divide all data used by multiple threads into three types: single write multiple use, multiple write multiple use, and public. Figure 3 As shown, the data is divided into 7 blocks, among which D1, D2, D3, and D4 are write-once-multiple-use data, D5 and D6 are write-multiple-use data, and D7 is public data.

[0034] Step 2: Allocate independent memory areas based on the relationship between threads and memory: establish an independent memory area for the thread corresponding to the single-write multi-use memory; establish an independent memory area for multiple threads corresponding to the multi-write multi-use memory; and establish an independent memory area for the remaining threads.

[0035] Seven independent memory areas are established for all 11 threads, namely independent memory 1 to independent memory 7. Independent memory 1 to independent memory 4 are used by threads T1 to T4 respectively, independent memory 5 is used by threads T5 and T6, independent memory 6 is used by threads T7, T8, and T9, and independent memory 7 is used by threads T10 and T11.

[0036] Step 3: Do not lock the memory used independently by a single thread; add a local lock to the independent memory area shared by multiple threads; and add a global lock to the common data.

[0037] Independent memory 1 to independent memory 4 are not locked; local lock 1 is added to the D5 data of independent memory 5, and local lock 1 is only used by threads T5 and T6; local lock 2 is added to the D6 data of independent memory 6, and local lock 2 is only used by threads T7, T8, and T9; a global lock is added to the common data D7 in the actual memory for use by all threads.

[0038] Step 4: Periodically synchronize the data in each independent memory area. During synchronization, synchronize the write-once-multiple-use and multiple-write-multiple-use data to each independent memory area, but do not synchronize the common data. During synchronization, repeatedly write the data D1-D6 in the actual memory to independent memory 1-independent memory 7 in the direction of the "read data" arrow.

[0039] Step 5: Each thread runs according to its own independent memory area and puts the results of the program running into its own independent memory area.

[0040] Threads T1 to T4 directly interact with their corresponding independent memories 1 to 4; threads T5 and T6 interact directly with D1, D2, D3, D4, and D6 in independent memory 5, and interact with D5 through a local lock mechanism; threads T7, T8, and T9 interact directly with D1, D2, D3, D4, and D5 in independent memory 6, and interact with D6 through a local lock mechanism; all threads interact through a global lock mechanism when using D7 data.

[0041] Step 6: Update the data in the actual memory regularly. During synchronization, write the data in each independent memory allocated in step 2 into the actual memory in sequence. When writing, only write the part that each thread or multiple threads are responsible for writing.

[0042] During synchronization, D1 of independent memory 1 is written to D1 of the actual memory area according to the direction of the "write data" arrow, D2 of independent memory 2 is written to D2 of the actual memory area, and D6 of independent memory 6 is written to D6 of the actual memory area to complete the update of the actual memory.

[0043] Step 7: Repeat steps 4 to 6 to run the entire PLC or device program and update the data.

[0044] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0045] The computer storage media of the embodiments of the present application can adopt any combination of one or more computer readable media. The computer readable media can be computer readable signal media or computer readable storage media. The computer readable storage media may, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination of the above. More specific examples (non-exhaustive list) of the computer readable storage media include: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, the computer readable storage media can be any tangible medium that contains or stores a program that can be used by or in connection with an instruction execution system, apparatus or device.

[0046] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device that implements the steps specified in the flow Figure 1 one or more flows and / or blocks Figure 1 one or more blocks or multiple blocks.

[0047] These computer program instructions can also be loaded into a computer or other programmable data processing apparatus, so that a series of operation steps are performed on the computer or other programmable device to produce a computer implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in the flow Figure 1 one or more flows and / or blocks Figure 1 one or more blocks or multiple blocks.

Claims

1. A multi-threaded data synchronization method applied to PLC and device, characterized in that: include: All data used by multiple threads are divided into three types: one-write multiple-use, multiple-write multiple-use, and public. The basis for data classification is how many threads write the data: data written by only one thread is one-write multiple-use, data written by several threads is multiple-write multiple-use, and the remaining data is public; independent memory areas are allocated according to the relationship between threads and memory; each independent memory area is locked, specifically: the memory used independently by a single thread is not locked; a local lock is added to the independent memory area shared by multiple threads; a global lock is added to the public data; the data of each independent memory area is synchronized regularly, and the one-write multiple-use and multiple-write multiple-use data are synchronized to each independent memory area, and the public data is not synchronized; each thread runs according to its corresponding independent memory area, and puts the results of the program running into its own independent memory area; the data in the actual memory is updated regularly; the process of regularly synchronizing the data of each independent memory area to regularly updating the data in the actual memory is repeated to realize the operation of the entire program and the update of data.

2. A multi-threaded data synchronization method for PLC and device according to claim 1, characterized in that: The independent memory area is allocated according to the relationship between threads and memory. The specific allocation method is: establish an independent memory area for the thread corresponding to the single-write multi-use memory; establish an independent memory area for multiple threads corresponding to the multi-write multi-use memory; and establish an independent memory area for the remaining threads.

3. The multi-threaded data synchronization method for PLC and device according to claim 1, characterized in that: When the data in each independent memory area is synchronized at a fixed time, the data in the actual memory is repeatedly written into the independent memory in the direction of the data reading arrow.

4. The multi-threaded data synchronization method for PLC and device according to claim 1, characterized in that: When the data in the actual memory is updated periodically, the data in the allocated independent memories are written into the actual memory in sequence, and only the part that each thread or multiple threads is responsible for writing is written during writing.

5. The multi-threaded data synchronization method for PLC and device according to claim 4, characterized in that: When the data of the actual memory is updated periodically, the data of the independent memory is written into the corresponding actual memory area respectively according to the direction of the data writing arrow.

6. A multi-threaded data synchronization system applied to PLC and devices, characterized in that: The system is used to implement a multi-threaded data synchronization method applied to a PLC and a device as described in any one of claims 1 to 5.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement a multi-threaded data synchronization method applied to a PLC and a device according to any one of claims 1 to 5.

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