A GaN-HEMT device and a method for preparing the same

Abstract

The present application provides a GaN-HEMT device and a preparation method thereof. The GaN-HEMT device comprises a channel layer, a barrier layer, a first passivation layer and a gate; the barrier layer is arranged on the channel layer, and the barrier layer is used to form a two-dimensional electron gas at the interface between the channel layer and the barrier layer; the first passivation layer is arranged on a side of the barrier layer away from the channel layer, and the first passivation layer is a P-GaN layer; the gate is arranged on a side of the first passivation layer away from the barrier layer, and the gate forms an ohmic contact with the first passivation layer; the present application sets the P-GaN layer as the first passivation layer, and the first passivation layer can shield surface traps to improve the device's resistance to current collapse.

Description

Technical Field

[0001] The present application belongs to the technical field of HEMT devices, and in particular, relates to a GaN-HEMT device and a preparation method thereof. Background Art

[0002] GaN-HEMT (High Electron Mobility Transistors) devices are electronic devices based on gallium nitride (GaN) materials, which have the advantages of high speed, high efficiency and high power density. In GaN-HEMT devices, GaN materials have high electron mobility and saturated electron velocity, which enables the device to achieve high-speed switching and high-efficiency conversion. GaN-HEMT devices can be divided into depletion-mode GaN (Depletion-Mode, D-Mode) and enhancement-mode GaN (Enhancement-Mode, E-Mode).

[0003] In the related art, an enhanced GaN device adds a P-type gallium nitride epitaxial layer to the gate to realize an E-Mode HEMT device. GaN HEMT devices are prone to current collapse during switching.

[0004] Therefore, how to improve the current collapse resistance of GaN-HEMT devices is a problem that those skilled in the art currently need to solve. Summary of the invention

[0005] The purpose of the present application is to provide a GaN-HEMT device and a method for preparing the same, in order to solve the problem that the GaN-HEMT device in the conventional technology is prone to current collapse.

[0006] A first aspect of an embodiment of the present application provides a GaN-HEMT device, the GaN-HEMT device comprising:

[0007] Channel layer;

[0008] A barrier layer, disposed on the channel layer, the barrier layer being used to form a two-dimensional electron gas in the channel layer;

[0009] A first passivation layer, disposed on a side of the barrier layer away from the channel layer, wherein the first passivation layer is a P-GaN layer;

[0010] A gate is disposed on a side of the first passivation layer away from the barrier layer, and the gate forms an ohmic contact with the first passivation layer.

[0011] In some embodiments of the present application, the GaN-HEMT device further includes:

[0012] A buffer layer, disposed on a side of the channel layer away from the barrier layer;

[0013] The second passivation layer is arranged on a side of the buffer layer away from the channel layer, and the second passivation layer is a P-GaN layer.

[0014] In some embodiments of the present application, the GaN-HEMT device further includes a source electrode, which is disposed at one end of the channel layer and electrically connected to the channel layer; one end of the source electrode extends to the second passivation layer and is connected to the second passivation layer, and the other end of the source electrode extends above the gate.

[0015] In some embodiments of the present application, the GaN-HEMT device further includes a source field plate, which is connected to one end of the source electrode close to the gate; wherein the source field plate extends in a direction parallel to the gate and covers the gate.

[0016] In some embodiments of the present application, the GaN-HEMT device further includes a drain, which is disposed at one end of the channel layer away from the source and electrically connected to the channel layer; one end of the drain is connected to the channel layer, and the other end extends above the gate.

[0017] In some embodiments of the present application, the GaN-HEMT device further includes a drain field plate, which is connected to an end of the drain electrode close to the gate; wherein the drain field plate extends in a direction close to the source field plate.

[0018] In some embodiments of the present application, an insulating layer is provided between the source field plate and the drain field plate.

[0019] In some embodiments of the present application, the GaN-HEMT device further includes a current blocking layer, and the current blocking layer is disposed on the barrier layer and the first passivation layer.

[0020] In some embodiments of the present application, the channel layer is a GaN layer;

[0021] And / or, the barrier layer is an AlGaN layer;

[0022] And / or, the buffer layer is a GaN layer.

[0023] In a second aspect, the present application also provides a method for preparing a GaN-HEMT device, which is used to prepare the GaN-HEMT device as described above.

[0024] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: the above-mentioned GaN-HEMT device and its preparation method, the GaN-HEMT device comprises a channel layer, a barrier layer, a first passivation layer and a gate; the barrier layer is arranged on the channel layer, and the barrier layer is used to form a two-dimensional electron gas at the interface between the channel layer and the barrier layer; the first passivation layer is arranged on the side of the barrier layer away from the channel layer, and the first passivation layer is a P-GaN layer; the gate is arranged on the side of the first passivation layer away from the barrier layer, and the gate forms an ohmic contact with the first passivation layer; the present application sets the P-GaN layer as the first passivation layer, and the gate and the first passivation layer form an ohmic contact, which can provide a path for free hole outflow and injection for the first passivation layer, and the first passivation layer can shield surface traps to improve the device's resistance to current collapse. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of the structure of a GaN-HEMT device provided in one embodiment of the present application.

[0026] Specific element symbol description: 100-substrate, 200-AIN nucleation layer, 300-second passivation layer, 400-buffer layer, 500-channel layer, 600-drain, 610-drain field plate, 620-insulating layer, 700-source, 710-source field plate, 800-barrier layer, 900-first passivation layer, 910-current blocking layer, 1000-gate, 1100-protective layer. DETAILED DESCRIPTION

[0027] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0029] It should be understood that the terms "length", "width", "up", "down", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0030] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0031] It should be noted that GaN-HEMT devices are electronic devices based on gallium nitride materials, which have the advantages of high speed, high efficiency and high power density. In GaN-HEMT devices, GaN materials have high electron mobility and saturated electron velocity, which enables the device to achieve high-speed switching and high-efficiency conversion. GaN-HEMT devices include depletion-mode GaN and enhancement-mode GaN.

[0032] In the related art, an enhanced GaN device is realized by adding a P-type gallium nitride epitaxial layer to the gate to realize an E-Mode HEMT device.

[0033] Therefore, based on this, the present application improves the relevant GaN-HEMT device structure and its preparation method.

[0034] Please refer to Figure 1 , Figure 1 The schematic diagram of the structure of the GaN-HEMT device provided by the present embodiment is shown. A GaN-HEMT device of the present embodiment includes a channel layer 500, a barrier layer 800, a first passivation layer 900 and a gate 1000; the barrier layer 800 is arranged on the channel layer 500, and the barrier layer 800 is used to form a two-dimensional electron gas at the interface between the channel layer 500 and the barrier layer 800; the first passivation layer 900 is arranged on the side of the barrier layer 800 away from the channel layer 500, and the first passivation layer 900 is a P-GaN layer; the gate 1000 is arranged on the side of the first passivation layer 900 away from the barrier layer 800, and the gate 1000 forms an ohmic contact with the first passivation layer 900.

[0035] It should be explained that the channel layer 500 is a two-dimensional electron gas transport channel, which is usually located above the buffer layer 400. The channel layer 500 generally uses intrinsic GaN material, which is mainly because the intrinsic GaN material does not contain impurities and has a relatively small scattering effect on the two-dimensional electron gas, thereby improving the mobility of the two-dimensional electron gas. In some embodiments, the thickness of the channel layer 500 is several hundred nanometers. If it is too thin, it will be difficult for the buffer layer 400 to deplete the two-dimensional electron gas in the channel. If it is too thick, since intrinsic GaN is an n-type material, it will provide a large leakage channel under high field, thereby affecting the breakdown characteristics of the device. The two-dimensional electron gas is a two-dimensional electron gas system (Two-Dimensional Electron Gas, 2DEG). It is an electronic system in which electrons are restricted in one direction and can move freely in the other two directions.

[0036] It is also necessary to explain that, in a semiconductor device, the barrier layer 800 is a very important structural layer, which can control and regulate the flow of current and signals and improve the stability and reliability of the device.

[0037] The current gate and the P-GaN layer are usually designed to be in Schottky contact. However, the present application sets the P-GaN layer as the first passivation layer 900, and an ohmic contact is formed between the first passivation layer 900 and the gate 1000. This design enables the gate 1000 to provide a path for the first passivation layer 900 to flow out and inject free holes.

[0038] In the off state, surface traps can capture or release charges. When the device is turned on, if the electrons captured by the surface traps cannot be released in time, the output current will be affected.

[0039] At zero bias, the two-dimensional electron gas under the first passivation layer 900 is depleted. Under the off-state drain voltage, the thin first passivation layer 900 can form a depletion region extending from the drain to the gate 1000 (contrary to the traditional GaN HEMT device).

[0040] In addition, the GaN HEMT device of this embodiment is not affected by surface traps because the first passivation layer 900 connected to the gate 1000 can actively provide / release charges through the gate 1000, which means that during the opening and closing processes, holes can be quickly accumulated and released in the first passivation layer 900 to shield the influence caused by the surface traps capturing charges.

[0041] In some embodiments, the thickness of the first passivation layer 900 is 20-100 nm. If the thickness of the first passivation layer 900 is too thick, the two-dimensional electron gas of the channel layer 500 may not be exhausted, and the E-Mode device cannot be made. Exemplarily, a portion of the first passivation layer 900 is located at the bottom of the gate 1000, and the thickness of the portion is 100 nm. Another portion of the first passivation layer 900 extends beyond the bottom of the gate 1000, and the thickness of the portion is 20-50 nm.

[0042] In a specific embodiment, the thickness of the first passivation layer 900 can be controlled during the ion implantation step.

[0043] In some embodiments, the channel layer 500 has a thickness of 400 nm and the barrier layer 800 has a thickness of 15 nm.

[0044] In some embodiments of this application, please continue to refer to Figure 1 The GaN-HEMT device of this embodiment further includes a buffer layer 400 and a second passivation layer 300; the buffer layer 400 is arranged on the side of the channel layer 500 away from the barrier layer 800; the second passivation layer 300 is arranged on the side of the buffer layer 400 away from the channel layer 500, and the second passivation layer 300 is a P-GaN layer.

[0045] It should be explained that the buffer layer 400 of the vertical GaN HEMT device can be used as a material layer that bears high voltage. The buffer layer 400 can reduce the electric field strength inside the transistor, thereby improving the reliability and performance of the transistor. The buffer layer 400 can also be used as an isolation layer to prevent the GaN material from interdiffusion with the Si substrate 100.

[0046] In some embodiments, the buffer layer has a thickness of 1.5-1.9 μm. The second passivation layer has a thickness of 0.1-0.5 μm.

[0047] In some embodiments of this application, please continue to refer to Figure 1 The GaN-HEMT device of this embodiment also includes a source electrode 700, which is arranged at one end of the channel layer 500 and is electrically connected to the channel layer 500; one end of the source electrode 700 extends to the second passivation layer 300 and is connected to the second passivation layer 300, and the other end of the source electrode 700 extends above the gate 1000.

[0048] Specifically, the GaN-HEMT device further includes a source field plate, which is connected to an end of the source electrode close to the gate electrode; wherein the source field plate extends in a direction parallel to the gate electrode and covers the gate electrode.

[0049] It should be explained that in GaN-HEMT, the source 700 and the drain 600 can be connected to the GaN layer through field plates. The source field plate 710 (S-FP) and the drain field plate 610 (D-FP) can provide a uniform channel electric field and improve the withstand voltage.

[0050] In this embodiment, the second passivation layer 300 and the source 700 are connected together by the source field plate 710, so that a dynamic charge storage layer can be formed in the second passivation layer 300, which is conducive to improving the GaN-HEMT device. Specifically, a PN junction can be formed between the dynamic charge storage layer and the channel layer 500. When a voltage bias is applied between the drain 600 and the source 700 of the device, the anti-parallel PN junction diode is in a reverse bias state. During the shutdown process, a higher drain voltage bias will cause a higher potential difference between the P-type doped dynamic charge storage layer and the drain 600, which will increase the reverse bias voltage across the anti-parallel PN junction diode and enhance the depletion of free holes in the P-type doped dynamic charge storage layer. As the energy band of the P-type doped dynamic charge storage layer on the drain 600 side decreases, a large number of holes are depleted. Holes flow out of the P-type doped dynamic charge storage layer to the source, and the remaining ionized acceptors are regarded as net negative charges stored in the P-type doped dynamic charge storage layer. The remaining net negative charge reduces the charge density of the two-dimensional electron gas, which is also negatively charged, and the two-dimensional electron gas is depleted faster, thereby reducing the turn-off time of the device and thus reducing the turn-off loss.

[0051] In some embodiments of this application, please continue to refer to Figure 1 The GaN-HEMT device of this embodiment further includes a drain 600 , which is disposed at one end of the channel layer 500 away from the source 700 and is electrically connected to the channel layer 500 ; one end of the drain 600 is connected to the channel layer 500 , and the other end extends above the gate 1000 .

[0052] Specifically, the GaN-HEMT device further includes a drain field plate, which is connected to an end of the drain electrode close to the gate; wherein the drain field plate extends in a direction close to the source field plate.

[0053] In some embodiments of this application, please continue to refer to Figure 1 In this embodiment, an insulating layer 620 is disposed between the source field plate 710 and the drain field plate 610 .

[0054] In some embodiments of this application, please continue to refer to Figure 1The GaN-HEMT device of this embodiment further includes a current blocking layer 910 (HR-GaN, high resistance gallium nitride), which is on the barrier layer 800 and the first passivation layer 900. The function of the current blocking layer 910 in the GaN-HEMT device is to improve the withstand voltage and reliability of the device.

[0055] In some embodiments, the gate 1000 is covered with a protection layer 1100 . The source field plate 700 and the drain field plate 600 are covered on the protection layer 1100 .

[0056] For example, the protective layer 1100 may be a SiNx layer, where SiNx is a silicon nitride material, where x represents the atomic ratio of nitrogen to silicon. SiNx is commonly used in electronic devices as an insulating layer 620 and a protective layer 1100 because it has the advantages of high hardness, low dielectric constant, high chemical stability, and high thermal stability. In GaN-HEMT devices, SiNx can be used as a passivation layer to protect the device surface from oxidation and corrosion, thereby improving the stability and reliability of the device.

[0057] In some embodiments of the present application, the channel layer 500 is a GaN layer; and / or the barrier layer 800 is an AlGaN layer; and / or the buffer layer 400 is a GaN layer.

[0058] In some embodiments, the barrier layer 800 is Al 0.3 Ga 0.7 N layers.

[0059] In some embodiments, the GaN-HEMT device further includes a substrate 100 , on which an AlN nucleation layer 200 is disposed, and on which the second passivation layer 300 is disposed. Exemplarily, the substrate 100 is a Si substrate 100 .

[0060] Furthermore, in order to better implement the GaN-HEMT device in any of the above embodiments, based on the GaN-HEMT device structure, the present application also provides a method for preparing a GaN-HEMT device, which is used to prepare the GaN-HEMT device in any of the above embodiments.

[0061] Specifically, the preparation method of the GaN-HEMT device includes:

[0062] S100: growing a nucleation layer AlN on a substrate; specifically, the thickness of the nucleation layer AlN is 10 nm;

[0063] S200: growing a first buffer layer GaN on the nucleation layer AlN; specifically, the thickness of the first buffer layer GaN is 1 μm;

[0064] S300: growing a second passivation layer P-GaN on the first buffer layer GaN;

[0065] S400: growing a second buffer layer GaN on the second passivation layer P-GaN;

[0066] S500: growing a channel layer GaN on the second buffer layer GaN;

[0067] S600: Growing a barrier layer Al on the channel layer GaN x Ga y N; specifically, x∈[0.2, 0.3];

[0068] S700: growing a first passivation layer P-GaN on the barrier layer;

[0069] S800: performing ion implantation on the first passivation layer P-GaN to form a current blocking layer HR-GaN; specifically, the ion implantation is performed twice, the first time the ion implantation is performed around the first passivation layer P-GaN, and the second time the ion implantation is performed on the first passivation layer P-GaN and toward the first passivation layer P-GaN.

[0070] S900: depositing a protective layer SiNx on the first passivation layer P-GaN;

[0071] S1000: etching a portion of the protective layer SiNx to prepare a gate, and connecting the gate to the first passivation layer P-GaN;

[0072] S1100: depositing a protective layer SiNx on the gate;

[0073] S1200: preparing a source field plate, a drain field plate, a source electrode and a drain electrode;

[0074] S1300: depositing an insulating layer SiO2 between the source field plate and the drain field plate.

[0075] It should be noted that, the present application uses the P-GaN HEMT device structure as an example to illustrate the design of the present application, but it is also applicable to other E-Mode GaN-based HEMT device structures, such as E-Mode GaN-based HEMT devices with trench gate design, and other D-Mode GaN-based HEMT device structures are also applicable, so as to support the protection scope of the rights.

[0076] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0077] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0078] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0079] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0080] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A GaN-HEMT device, characterized in that: The GaN-HEMT device comprises: Channel layer; A barrier layer, disposed on the channel layer, the barrier layer being used to form a two-dimensional electron gas at an interface between the channel layer and the barrier layer; A first passivation layer is arranged on a side of the barrier layer away from the channel layer, and the first passivation layer is a P-GaN layer; A gate is arranged on a side of the first passivation layer away from the barrier layer, and the gate forms an ohmic contact with the first passivation layer; A buffer layer, disposed on a side of the channel layer away from the barrier layer; A second passivation layer is disposed on a side of the buffer layer away from the channel layer, and the second passivation layer is a P-GaN layer; A source electrode, the source electrode being arranged at one end of the channel layer and being electrically connected to the channel layer; one end of the source electrode extending to the second passivation layer and being connected to the second passivation layer, and the other end of the source electrode extending above the gate; A source field plate, the source field plate is connected to an end of the source electrode close to the gate; wherein the source field plate extends in a direction parallel to the gate and covers the gate; A drain electrode, the drain electrode is arranged at one end of the channel layer away from the source electrode and is electrically connected to the channel layer; one end of the drain electrode is connected to the channel layer, and the other end extends to above the gate; wherein the drain electrode is inserted between the channel layers; A drain field plate is connected to an end of the drain electrode close to the gate; wherein the drain field plate extends in a direction close to the source field plate.

2. The GaN-HEMT device according to claim 1, characterized in that: An insulating layer is disposed between the source field plate and the drain field plate.

3. The GaN-HEMT device according to claim 1, characterized in that: The GaN-HEMT device further includes a current blocking layer, which is disposed on the barrier layer and the first passivation layer.

4. The GaN-HEMT device according to any one of claims 1 to 3, characterized in that: The channel layer is a GaN layer; And / or, the barrier layer is an AlGaN layer; And / or, the buffer layer is a GaN layer.

5. A method for preparing a GaN-HEMT device, characterized in that: Used to prepare the GaN-HEMT device as claimed in any one of claims 1 to 4.

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