Exemption Document Generation Method, Chip Inspection Method, Device and Electronic Equipment
By adding information that characterizes the location of the underlying module in the exemption file, the problem of repeatedly confirming abnormal exemptions in chip inspection is solved, and a more efficient and accurate inspection process is achieved.
Patent Information
- Application Number
- CN202311681511.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-08
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2043-12-08
AI Technical Summary
When checking the chip, it is necessary to repeatedly check whether the abnormality of the underlying module can be exempted, resulting in repeated labor.
By adding the first position information that characterizes the position of the underlying module in the chip in the exemption file, the scope of the exemption file will be limited, thereby avoiding abnormal exemption of other underlying modules.
It realizes that when checking the chip, it does not need to confirm again whether the abnormality of the underlying module can be exempted, reduces repeated inspection steps, and improves inspection efficiency and accuracy.
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Figure CN117744579B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of computers, and in particular, to a method for generating an exemption file, a method for chip inspection, a device, and an electronic device. Background Art
[0002] Currently, large-scale SoCs (System on Chip) all adopt a bottom-up design method, that is, first design the underlying modules, and then assemble the underlying modules into a whole. After each underlying module is designed, it is usually checked whether the underlying module violates the circuit design rules. After the underlying modules are assembled into a complete chip, it is also necessary to check whether the assembled chip violates the circuit design rules.
[0003] During the inspection process, there may be some exceptions that violate the circuit design rules but do not have an adverse impact on the module or the chip. Therefore, an exemption file can be used to exempt the exceptions that do not have an adverse impact, thus avoiding repeated inspections. However, in the chip design process, after each underlying module is designed, it is checked whether the underlying module violates the circuit design rules; and after the underlying modules are assembled into a whole, it is checked whether the assembled chip violates the circuit design rules. Since the exemption file corresponding to the underlying module cannot be applied to the inspection of whether the assembled chip violates the circuit design rules, the exceptions that have been exempted by the exemption file during the inspection of whether the underlying module violates the circuit design rules will be detected again during the inspection of the chip, resulting in the need for the staff checking the chip to confirm again whether the exceptions of the underlying module of the chip can be exempted, causing repeated labor. Summary of the Invention
[0004] This application provides a method for generating an exemption file, a method for chip inspection, a device, and an electronic device to solve the problem in the prior art that during the inspection of a chip, it is necessary to repeatedly check whether the exceptions of the underlying module of the chip can be exempted, resulting in repeated labor.
[0005] In a first aspect, this application provides a method for generating an exemption file, including: obtaining an exemption file corresponding to an underlying module and first position information, where the first position information represents the position of the underlying module in the chip; adding the first position information to the exemption file to obtain a target exemption file.
[0006] In the prior art, after checking whether the underlying module violates the circuit design rules, the exemption file generated for exempting risk-free exceptions is for the underlying module corresponding to the exemption file. If the exemption file corresponding to the underlying module is applied to check whether the chip violates the circuit design rules, it may occur that the exemption file corresponding to one underlying module exempts the exceptions existing in other underlying modules, resulting in the problem that the exceptions existing in the chip cannot be completely detected. Therefore, in this solution, the first position information representing the position of the underlying module in the chip is added to the exemption file, so that the scope in which the exemption file takes effect can be limited by the first position information, and thus the situation of exempting the exceptions occurring in other underlying modules will not occur. Therefore, the target exemption file can be applied to check whether the chip violates the circuit design rules, so that it is not necessary for the staff to confirm again whether the exceptions of the underlying modules of the chip can be exempted.
[0007] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, the exemption file further includes exemption information; at least part of the exemption information of the exemption file includes second position information, and the second position information represents the position where the exemption information takes effect in the underlying module.
[0008] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, adding the first position information to the exemption file includes: adding the first position information to each piece of first target exemption information; the first target exemption information is the exemption information including the second position information.
[0009] In the embodiments of the present application, by adding the first position information to each piece of first target exemption information, the complete position where each piece of exemption information takes effect is included in each piece of exemption information. Furthermore, in the subsequent case where the target exemption file is applied to check whether the chip violates the circuit design rules, the exemption information can be directly used without reading the first position information from other places, reducing the steps of using the target exemption file to check whether the chip violates the circuit design rules.
[0010] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, the obtained target exemption file includes second target exemption information of the exemption file; the second target exemption information is the exemption information that does not include the second position information, and the first position information is not added to the second target exemption information in the target exemption file.
[0011] In the embodiments of the present application, since the second target exemption information does not include the second location information, it can be determined that the second target exemption information is used to exempt a certain type of exception and is not limited to a specific underlying module. Therefore, the first location information does not need to be added to the second target exemption information, thereby realizing the exemption of the entire type of exception.
[0012] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, after obtaining the target exemption file, the method further includes: for each piece of the second target exemption information in the target exemption file: confirming whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, deleting the second target exemption information in the target exemption file.
[0013] In the embodiments of the present application, since the structures of different underlying modules are different, even for the same type of exception, the impacts caused in different underlying modules may be different. Therefore, even if a certain type of exception can be exempted in a certain underlying module, it cannot be determined whether this type of exception can also be exempted in other underlying modules of the chip. Therefore, it is also possible to confirm whether the second target exemption information is applicable to each underlying module in the chip. If it is not applicable, the second target exemption information needs to be deleted to avoid the situation where exceptions that should not be exempted in other underlying modules are exempted by the second target exemption information.
[0014] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, after obtaining the target exemption file, the method further includes: for each piece of the second target exemption information in the target exemption file: confirming whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, adding the first location information to the second target exemption information.
[0015] In the embodiments of the present application, since the structures of different underlying modules are different, even for the same type of exception, the impacts caused in different underlying modules may be different. Therefore, even if a certain type of exception can be exempted in a certain underlying module, it cannot be determined whether this type of exception can also be exempted in other underlying modules of the chip. Therefore, it is also possible to confirm whether the second target exemption information is applicable to each underlying module in the chip. If it is not applicable, the first location information is added to the second target exemption information to limit the position where the second target exemption information takes effect, preventing the situation where exceptions that should not be exempted in other underlying modules are exempted by the second target exemption information.
[0016] Second aspect, the present application provides a chip inspection method, including: obtaining target exemption files corresponding to each underlying module in the chip; the target exemption files corresponding to each underlying module are obtained according to the method described in the above first aspect and / or any possible implementation manner of the above first aspect; checking whether the chip violates the circuit design rules according to the target exemption files corresponding to each underlying module.
[0017] In the embodiment of the present application, since the first position information representing the position of the underlying module in the chip is added to the target exemption file, the scope in which the target exemption file takes effect can be defined by the first position information, so that the situation of abnormally exempting other underlying modules in the chip will not occur. Therefore, the target exemption file can be applied to check whether the chip violates the circuit design rules, so that it is not necessary for the staff to confirm again whether the abnormality of the underlying module of the chip can be exempted.
[0018] Combined with the technical solution provided in the above second aspect, in some possible implementation manners, the checking whether the chip violates the circuit design rules according to the target exemption files corresponding to each underlying module includes: checking whether the chip violates the circuit design rules to obtain an initial inspection report; using the target exemption file to filter the abnormalities detected in the initial inspection report to obtain a final inspection report; wherein, each target exemption file is used to filter the abnormalities that appear at the position corresponding to the first position information included in itself in the initial inspection report.
[0019] In the embodiment of the present application, since each target exemption file is used to filter the abnormalities that appear at the position corresponding to the first position information included in itself in the initial inspection report, that is, it will not filter the abnormalities that appear in other underlying modules except the underlying module corresponding to the first position information, therefore, the situation of abnormally exempting other underlying modules in the chip will not occur, and the accuracy of the inspection result is improved.
[0020] Third aspect, the present application provides an exemption file generation device, including: a first acquisition module and a first processing module. The first acquisition module is used to acquire the exemption file corresponding to the underlying module and the first position information, and the first position information represents the position of the underlying module in the chip; the first processing module is used to add the first position information to the exemption file to obtain a target exemption file.
[0021] Fourth aspect, the present application provides a chip inspection device, including: a second acquisition module and a second processing module. The second acquisition module is configured to acquire target exemption files corresponding to each underlying module in the chip; the target exemption files corresponding to each underlying module are obtained according to the method described in the first aspect and / or any possible implementation manner of the first aspect above; the second processing module is configured to inspect whether the chip violates circuit design rules according to the target exemption files corresponding to each underlying module.
[0022] Fifth aspect, the present application provides an electronic device, including: a memory and a processor, the memory is connected to the processor; the memory is used for storing programs; the processor is used for calling the programs stored in the memory to execute the method described in the first aspect and / or any possible implementation manner of the first aspect above.
[0023] Sixth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is run by a computer, it executes the method described in the first aspect and / or any possible implementation manner of the first aspect above. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0025] Figure 1 It is a schematic flowchart of a method for generating an exemption file shown in an embodiment of the present application;
[0026] Figure 2 It is a schematic flowchart of a method for inspecting a chip shown in an embodiment of the present application;
[0027] Figure 3 It is a structural block diagram of a device for generating an exemption file shown in an embodiment of the present application;
[0028] Figure 4 It is a structural block diagram of a chip inspection device shown in an embodiment of the present application;
[0029] Figure 5 It is a structural block diagram of an electronic device shown in an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0030] The following will describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application.
[0031] It should be noted that similar reference numerals and letters denote similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. At the same time, in the description of the present application, relative terms such as "first", "second", etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variation thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device.
[0032] The technical solution of the present application will be described in detail below with reference to the accompanying drawings.
[0033] Please refer to Figure 1 , Figure 1 which is a schematic flowchart of a method for generating an exemption document shown in an embodiment of the present application. The steps included therein will be described below with reference to Figure 1 thereof.
[0034] S100: Obtain the exemption document corresponding to the underlying module and the first location information.
[0035] Among them, the first location information characterizes the location of the underlying module in the chip.
[0036] Optionally, during the process of developing a chip, in order to improve the development efficiency, the chip is usually split into multiple levels according to different functions, and the smallest unit after splitting is the underlying module. In this case, the first location information may be the hierarchical path of the underlying module in the chip.
[0037] For example, if the chip includes multiple subsystems, and each subsystem includes multiple underlying modules, then the first location information may be which subsystem of the chip the underlying module belongs to, that is, the hierarchical path of the underlying module in the chip. In addition to the way of splitting the chip into two levels (subsystem, underlying module) exemplified here, the chip can also be split into more levels, and the above example should not be regarded as a limitation to the present application.
[0038] For example, if the chip includes subsystem A and subsystem B, and subsystem A includes underlying module 1 and underlying module 2, and subsystem B includes underlying module 3 and underlying module 4, then the first location information of underlying module 1 can be expressed as "chip - subsystem A - underlying module 1". Similarly, the first location information of underlying module 3 can be expressed as "chip - subsystem B - underlying module 3". The example here is only for easy understanding and should not be regarded as a limitation to the present application.
[0039] The exemption file corresponding to the underlying module and the first location information can be pre-obtained and stored in a local storage medium, and can be directly called when needed. Alternatively, the exemption file corresponding to the underlying module and the first location information can also be obtained in real time from a third-party device when needed.
[0040] In one implementation, after obtaining the exemption file corresponding to the underlying module and the first location information, an object can be created for each exemption file. Then, the first location information of the exemption file corresponding to each object is recorded in the attribute value of the object.
[0041] S200: Add the first location information to the exemption file to obtain a target exemption file.
[0042] The exemption file can include at least one piece of exemption information. Among them, the exemption file can be multiple pieces of exemption information recorded in a table form, or can also be multiple pieces of exemption information recorded in a text form. The specific format of the exemption file is not restricted here.
[0043] In one implementation, at least part of the exemption information in the exemption file includes second location information, and the second location information represents the location where the exemption information takes effect in the underlying module.
[0044] The second location information can refer to a certain electronic component in the underlying module, or can also refer to a certain circuit in the underlying module.
[0045] In this case, since the exemption information includes the second location information, and the first location information is added to the exemption file, when this piece of exemption information is needed, the underlying module in which the exemption file takes effect can be determined according to the first location information included in the exemption file, and then the location where each piece of exemption information in the exemption file takes effect in the underlying module can be determined according to the second location information. Thus, it is possible to prevent the situation where the exemption file abnormally exempts parts in other underlying modules that should not be exempted.
[0046] In one implementation, the first location information can be stored independently of the exemption information in the target exemption file. Alternatively, the first location information can also be directly written into the exemption information.
[0047] In one implementation, the specific method of adding the first location information to the exemption file can be: adding the first location information to each piece of exemption information in the exemption file.
[0048] Since this exemption file is used to filter out exceptions that occur in its corresponding underlying module, by adding the first location information to each exemption information, it is possible to determine the underlying module where the exemption information takes effect through the first location information during the subsequent chip inspection process, thereby preventing the situation where this exemption information exempts exceptions that should not be exempted in other underlying modules.
[0049] In one implementation, the specific way to add the first location information to the exemption file can be: adding the first location information to each first target exemption information. The first target exemption information is the exemption information that includes the second location information.
[0050] In this case, the processed first target exemption information includes the first location information and the second location information. The specific location where the exemption information takes effect can be located in the chip through the first location information and the second location information.
[0051] For the sake of easy understanding, taking the first location information as "chip - subsystem A - underlying module 1" and the first target exemption information as "Circuit 1 violates Rule A and can be exempted" as an example, the second location information in this first target exemption information is "Circuit 1". After adding the first location information to the first target exemption information, the first target exemption information can be "chip - subsystem A - underlying module 1 - Circuit 1 violates Rule A and can be exempted". The position where the processed first target exemption information takes effect in the chip can be accurately located through "chip - subsystem A - underlying module 1 - Circuit 1". The example here is only for easy understanding and should not be regarded as a limitation to this application.
[0052] In one implementation, the obtained target exemption file includes the second target exemption information of the exemption file; the second target exemption information is the exemption information that does not include the second location information, and the first location information is not added to the second target exemption information in the target exemption file.
[0053] Since the second target exemption information does not include the second location information, the second target exemption information is used to exempt a type of exception and is not limited to a certain position of the underlying module. Therefore, the first location information does not need to be added to the second target exemption information, thereby realizing the exemption of the entire type of exception.
[0054] Since the structures of different underlying modules are different, even for the same type of exception, the impacts caused in different underlying modules may be different. Therefore, even if a type of exception can be exempted in a certain underlying module, it cannot be determined whether this type of exception can also be exempted in other underlying modules of the chip. Optionally, the second target exemption information is marked for subsequent confirmation of the second target exemption information.
[0055] In one implementation, when the second target exemption information of the exemption file is included in the target exemption file and the first location information is not added to the second target exemption information, after obtaining the target exemption file, for each piece of the second target exemption information in the target exemption file, it is also possible to: confirm whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, delete the second target exemption information from the target exemption file. If the second target exemption information is applicable to each underlying module in the chip, retain the second target exemption information.
[0056] Among them, confirming whether the second target exemption information is applicable to each underlying module in the chip means confirming whether the exception for which the second target exemption is used will have no adverse effects on each underlying module. If it will have no adverse effects on any underlying module, it is confirmed that the second target exemption information is applicable to each underlying module in the chip. If it will have adverse effects on at least one of the underlying modules, it is confirmed that the second target exemption information is not applicable to each underlying module in the chip.
[0057] By confirming whether the second target exemption information is applicable to each underlying module in the chip, if it is not applicable, the second target exemption information needs to be deleted to avoid the situation where an exception that should not be exempted in other underlying modules is exempted by the second target exemption information.
[0058] In one implementation, when the second target exemption information of the exemption file is included in the target exemption file and the first location information is not added to the second target exemption information, after obtaining the target exemption file, for each piece of the second target exemption information in the target exemption file, it is also possible to: confirm whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, add the first location information to the second target exemption information.
[0059] Among them, the specific method of confirming whether the second target exemption information is applicable to each underlying module in the chip is the same as the method described above, which will not be briefly described here.
[0060] By confirming whether the second target exemption information is applicable to each underlying module in the chip, if it is not applicable, add the first location information to the second target exemption information to limit the location where the second target exemption information takes effect and prevent the situation where an exception that should not be exempted in other underlying modules is exempted by the second target exemption information.
[0061] In one implementation, the exemption file generation method may further include: generating a chip exemption file, where the chip exemption file includes a target exemption file corresponding to each underlying module included in the chip.
[0062] Based on the same technical concept, the present application also provides a chip inspection method, as Figure 2 shown, and the steps it includes will be described below in conjunction with Figure 2 this.
[0063] S300: Obtain the target exemption files corresponding to the respective underlying modules within the chip.
[0064] The target exemption files corresponding to the respective underlying modules are obtained according to the aforementioned exemption file generation method.
[0065] Among them, the target exemption files corresponding to the respective underlying modules within the chip can be pre-obtained and stored in a storage medium, and can be directly called when needed. Alternatively, the target exemption files corresponding to the respective underlying modules within the chip can also be generated in real time according to the above-mentioned exemption file generation method when needed.
[0066] In one implementation, when there is a chip exemption file, the specific implementation of S300 can be: obtain the chip exemption file. Among them, the chip exemption file includes a target exemption file corresponding to each underlying module included in the chip.
[0067] S400: Check whether the chip violates the circuit design rules according to the target exemption files corresponding to the respective underlying modules.
[0068] Since the target exemption file includes first position information, therefore, the underlying module for which the target exemption file becomes effective can be determined according to the first position information.
[0069] In one implementation, the specific way to check whether the chip violates the circuit design rules according to the target exemption files corresponding to the respective underlying modules can be: first check whether the chip violates the circuit design rules to obtain an initial inspection report. Then use the target exemption file to filter the anomalies detected in the initial inspection report to obtain a final inspection report; among them, each target exemption file is used to filter the anomalies that appear at the position corresponding to the first position information included in itself in the initial inspection report.
[0070] Since the first position information has two different storage methods in the target exemption file, therefore, there are the following two implementation ways to filter the initial inspection report using the target exemption file.
[0071] In the first implementation manner, the first position information is stored independently of the exemption information in the target exemption file. In this case, the specific manner of filtering the initial inspection report by using the target exemption file may be: obtaining the first position information in the target exemption file, and determining the underlying module in which the target exemption file takes effect. Then, the target exemption file is used to filter the anomalies that appear at the positions corresponding to the first position information included in itself in the initial inspection report.
[0072] In the second implementation manner, the first position information is written into at least part of the exemption information in the target exemption file. In this case, the specific manner of filtering the initial inspection report by using the target exemption file may be: for each exemption information in the target exemption file, determining the position information (the first position information and / or the second position information) included in the exemption information, and determining the position where the exemption information takes effect based on the position information. Then, the exemption information is used to filter the anomalies that appear at the positions corresponding to all the position information included in itself in the initial inspection report.
[0073] If there is no position information in the exemption information, then all the anomalies in the initial inspection report are filtered by using the exemption information.
[0074] In one implementation manner, after checking whether the chip violates the circuit design rules according to the target exemption files corresponding to the underlying modules, the anomalies in the initial inspection report that have not been filtered are confirmed. That is, it is confirmed whether the anomalies in the initial inspection report that have not been filtered can be exempted. If they can be exempted, a new exemption file is created for the anomalies. If they cannot be exempted, the chip is modified for the anomalies.
[0075] When the chip is inspected again and a new initial inspection report is obtained, the target exemption files corresponding to the underlying modules and the newly obtained exemption file are used to filter the anomalies in the new initial inspection report. If there are no anomalies in the new initial inspection report after the filtering process, the inspection ends. If there are still anomalies in the new initial inspection report after the filtering process, it is confirmed whether the anomalies in the new initial inspection report that have not been filtered can be exempted. This process is repeated until there are no anomalies in the latest initial inspection report after the filtering process.
[0076] Based on the same technical concept, the present application also provides an exemption file generation device, as Figure 3 shown. The exemption file generation device 100 includes a first acquisition module 110 and a first processing module 120.
[0077] The first acquisition module 110 is configured to acquire the exemption file corresponding to the underlying module and the first position information, where the first position information represents the position of the underlying module in the chip.
[0078] The first processing module 120 is configured to add first location information to the exemption file to obtain a target exemption file.
[0079] In one implementation, the exemption file further includes exemption information; at least part of the exemption information of the exemption file includes second location information, and the second location information represents the location where the exemption information takes effect in the underlying module.
[0080] The first processing module 120 is specifically configured to add the first location information to each piece of first target exemption information; the first target exemption information is exemption information including the second location information.
[0081] In one implementation, the obtained target exemption file includes second target exemption information of the exemption file; the second target exemption information is exemption information that does not include the second location information, and the first location information is not added to the second target exemption information in the target exemption file.
[0082] After obtaining the target exemption file, the first processing module 120 is further configured to, for each piece of the second target exemption information in the target exemption file: confirm whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, delete the second target exemption information in the target exemption file.
[0083] After obtaining the target exemption file, the first processing module 120 is further configured to, for each piece of the second target exemption information in the target exemption file: confirm whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, add the first location information to the second target exemption information.
[0084] The exemption file generation device 100 provided by the embodiments of the present application has the same implementation principle and the same technical effects as those of the foregoing exemption file generation method embodiments. For the sake of brief description, for the parts not mentioned in the device embodiments, reference may be made to the corresponding content in the foregoing exemption file generation method embodiments.
[0085] Based on the same technical concept, the present application further provides a chip inspection device 200, as Figure 4 shown. The chip inspection device 200 includes a second acquisition module 210 and a second processing module 220.
[0086] The second acquisition module 210 is configured to acquire target exemption files corresponding to the respective underlying modules in the chip; the target exemption files corresponding to the respective underlying modules are obtained according to the foregoing exemption file generation method.
[0087] The second processing module 220 is used to check whether the chip violates the circuit design rules according to the target exemption files corresponding to each bottom-level module.
[0088] The second processing module 220 is specifically used to check whether the chip violates the circuit design rules to obtain an initial inspection report; use the target exemption file to filter the anomalies detected in the initial inspection report to obtain a final inspection report; wherein each target exemption file is used to filter the anomalies that appear at a position corresponding to the first position information included in the initial inspection report.
[0089] The chip inspection device 200 provided in the embodiment of the present application has the same implementation principle and technical effects as those of the aforementioned chip inspection method embodiment. For the sake of brief description, for matters not mentioned in the device embodiment, reference may be made to the corresponding contents in the aforementioned chip inspection method embodiment.
[0090] See also Figure 5 , which is an electronic device 300 provided in an embodiment of the present application. The electronic device 300 includes: a processor 310 and a memory 320.
[0091] The memory 320 and the processor 310 are electrically connected to each other directly or indirectly to achieve data transmission or interaction. For example, these components can be electrically connected to each other via one or more communication buses or signal lines. The memory 320 is used to store computer programs, such as Figure 3 and / or Figure 4 The software functional modules shown in the figure are the exemption file generating device 100 and / or the chip inspecting device 200.
[0092] Among them, the exemption file generation device 100 includes at least one software function module that can be stored in the memory 320 in the form of software or firmware or fixed in the operating system (OS) of the electronic device 300. The processor 310 is used to execute the executable module stored in the memory 320, such as the software function module or computer program included in the exemption file generation device 100. At this time, the processor 310 is used to obtain the exemption file and the first position information corresponding to the underlying module, and the first position information represents the position of the underlying module in the chip; the first position information is added to the exemption file to obtain the target exemption file.
[0093] Among them, the chip inspection device 200 includes at least one software function module that can be stored in the memory 320 in the form of software or firmware or fixed in the operating system (OS) of the electronic device 300. The processor 310 is used to execute the executable module stored in the memory 320, such as the software function module or computer program included in the chip inspection device 200. At this time, the processor 310 is used to obtain the target exemption file corresponding to each underlying module in the chip; the target exemption file corresponding to each underlying module is obtained according to the aforementioned exemption file generation method; according to the target exemption file corresponding to each underlying module, check whether the chip violates the circuit design rules.
[0094] Among them, the memory 320 can be, but is not limited to, RAM (Random Access Memory), ROM (Read Only Memory), PROM (Programmable Read-Only Memory), EPROM (Erasable Programmable Read-Only Memory), EEPROM (Electric Erasable Programmable Read-Only Memory), etc.
[0095] The processor 310 may be an integrated circuit chip with signal processing capabilities. The above-mentioned processor may be a general-purpose processor, including a CPU (Central Processing Unit), an NP (Network Processor), etc.; it may also be a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. A general-purpose processor may be a microprocessor or the processor 310 may also be any conventional processor, etc.
[0096] The electronic device 300 mentioned above includes but is not limited to a personal computer, a server, etc.
[0097] An embodiment of the present application also provides a non-volatile computer-readable storage medium (hereinafter referred to as the storage medium), on which a computer program is stored. When the computer program is run by a computer such as the above-mentioned electronic device 300, the exemption file generation method and / or the chip inspection method shown above are executed. The computer-readable storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories, random access memories, magnetic disks, or optical discs.
[0098] The foregoing is only a preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A method for generating an exemption file, characterized in that, it includes: Obtain the exemption file corresponding to the underlying module and the first position information, where the first position information represents the position of the underlying module in the chip; Limit the scope in which the exemption file takes effect through the first position information; Add the first position information to the exemption file to obtain a target exemption file; Wherein, the exemption file further includes exemption information; at least part of the exemption information in the exemption file includes second position information, and the second position information represents the position where the exemption information takes effect in the underlying module; The obtained target exemption file includes the second target exemption information of the exemption file; the second target exemption information is the exemption information that does not include the second position information, and the first position information is not added to the second target exemption information in the target exemption file. After obtaining the target exemption file, the method further includes: For each piece of the second target exemption information in the target exemption file: confirm whether the exception that the second target exemption information is used to exempt will have an adverse impact on each underlying module; if the second target exemption information will have an adverse impact on at least one of the underlying modules, then delete the second target exemption information in the target exemption file.
2. The method according to claim 1, characterized in that, Adding the first position information to the exemption file includes: Adding the first position information to each piece of first target exemption information; the first target exemption information is the exemption information that includes the second position information.
3. The method according to claim 1, characterized in that, After obtaining the target exemption file, the method further includes: For each piece of the second target exemption information in the target exemption file: confirm whether the second target exemption information is applicable to each underlying module in the chip; if the second target exemption information is not applicable to each underlying module in the chip, then add the first position information to the second target exemption information.
4. A method for checking a chip, characterized in that, it includes: Obtain the target exemption files corresponding to the respective underlying modules in the chip; The target exemption files corresponding to the respective underlying modules Obtained according to the method described in any one of claims 1-3; Check whether the chip violates the circuit design rules according to the target exemption files corresponding to the respective underlying modules.
5. The method according to claim 4, characterized in that, The step of checking whether the chip violates the circuit design rules according to the target exemption files corresponding to the respective underlying modules includes: Check whether the chip violates the circuit design rules to obtain an initial inspection report; Use the target exemption file to filter the exceptions detected in the initial inspection report to obtain a final inspection report; Wherein, each target exemption file is used to filter the exceptions that appear at the positions corresponding to the first position information included in itself in the initial inspection report.
6. An exemption file generation device, characterized in that, it includes: A first acquisition module, configured to acquire an exemption file corresponding to a bottom layer module and first position information, where the first position information represents the position of the bottom layer module in the chip; Define the scope in which the exemption file takes effect through the first position information; A first processing module, configured to add the first position information to the exemption file to obtain a target exemption file; wherein, the exemption file further includes exemption information; at least part of the exemption information in the exemption file includes second position information, and the second position information represents the position in the bottom layer module where the exemption information takes effect; Wherein, the obtained target exemption file includes second target exemption information of the exemption file; the second target exemption information is exemption information that does not include the second position information, and the first position information is not added to the second target exemption information in the target exemption file. The first processing module is further configured to, for each piece of the second target exemption information in the target exemption file: confirm whether the exception exempted by the second target exemption information will have an adverse impact on each bottom layer module; if the second target exemption information will have an adverse impact on at least one of the bottom layer modules, delete the second target exemption information in the target exemption file.
7. A chip inspection device Characterized in that It includes: A second acquisition module, configured to acquire target exemption files corresponding to each bottom layer module in the chip; The target exemption files corresponding to each of the bottom layer modules Obtained according to the method according to any one of claims 1-5; A second processing module, configured to check whether the chip violates circuit design rules according to the target exemption files corresponding to each bottom layer module.
8. An electronic device Characterized in that It includes: A memory and a processor, the memory is connected to the processor; The memory is used to store programs; The processor is configured to call the program stored in the memory to execute the method according to any one of claims 1-5.
9. A computer-readable storage medium Characterized in that A computer program is stored thereon, and when the computer program is run by a computer, it executes the method according to any one of claims 1-5.
Citation Information
Patent Citations
Method and apparatus for creating and managing waiver descriptions for design verification
US20120297352A1