Method and system for evaluating sensitive intervals of single event functional errors of reconfigurable chips
By performing laser irradiation and infrared imaging analysis on reconfigurable chips using various typical test procedures, the problem of assessing the sensitivity of dynamic reconfigurable circuits to single-event functional errors was solved, enabling accurate assessment of the overall chip performance and guidance for hardening design.
Patent Information
- Application Number
- CN202311423998.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-30
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2043-10-30
AI Technical Summary
Existing technologies are insufficient to comprehensively assess the single-event functional fault (SEF) sensitivity of dynamically reconfigurable circuits in different application scenarios, and cannot traverse the circuit's test program, resulting in inaccurate SEF sensitivity assessments.
By designing various typical test procedures, laser irradiation tests were conducted on different functional modules of the reconfigurable chip to obtain the single-event functional error saturation cross section. Combined with the analysis of the sensitive bit map using an infrared imaging system, the single-event functional error sensitive range was determined.
It provides a comprehensive and accurate assessment of the overall performance of reconfigurable chips, guides radiation hardening design, and improves the accuracy and testing efficiency of chip radiation resistance assessment.
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Figure CN117761516B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a method and system for laser evaluation of the single-event functional error sensitive region of a reconfigurable chip, belonging to the field of device testing technology. Background Technology
[0002] Network information has become the fifth strategic space of equal importance to land, sea, air, and space in the military field, and is crucial to national defense security. Information security in integrated air-space-ground information networks requires dynamically reconfigurable chips. Radiation-resistant dynamically reconfigurable chips, possessing the flexibility of general-purpose processors and the performance of application-specific integrated circuits, can meet the urgent needs of software-defined satellites, information processing payloads in integrated air-space-ground information networks, and low-Earth orbit satellite constellations. The development of software-defined satellites requires dynamically reconfigurable chips as core information processing chips. As an intelligent satellite system with an open architecture based on space-based supercomputing, the application of dynamically reconfigurable chips can not only add new functions to the satellite system through real-time dynamic reconfiguration, featuring definable requirements, reconfigurable hardware, reconfigurable software, and reconfigurable functions, but also improve satellite performance through algorithm improvements or repair faults. Dynamically reconfigurable chips dynamically construct satellite systems that can meet various mission requirements, thereby completing complex and ever-changing space missions, effectively supporting high-speed exchange, efficient storage, intelligent processing, and flexible application of various data / information in software-defined satellites, gradually improving the intelligence level of satellites, and achieving continuous on-orbit evolution.
[0003] With the application of dynamically reconfigurable chips in aerospace, new radiation effects and reliability issues have emerged due to the differences in their working mechanism and structure compared to traditional chips. When reconfigurable chips are used in defense and aerospace fields, high-energy particles and heavy particles in the radiation environment can cause ionization of the semiconductor material, leading to various forms of failure. Radiation resistance is one of the most important indicators for reconfigurable chips used in space applications. Accurate and objective test data can directly reflect the radiation resistance of radiation-resistant reconfigurable chips, making research on radiation effect testing methods of these chips extremely important.
[0004] Currently, most domestic literature on radiation effects related to reconfigurable chips focuses on single-event upsets (SETs) and hardening techniques for memory, while there is insufficient understanding of functional testing for dynamically reconfigurable circuits. Dynamically reconfigurable circuits execute different test programs in different application scenarios, and the circuit's SET sensitivity is highly program-dependent. Different users have different focuses and application scenarios for dynamically reconfigurable circuits, making it impossible to exhaustively test all possible test programs. If different users use the circuit, SET tests need to be performed on different test programs. Due to limited testing time each year, only specific test programs can currently be selected for testing, but this does not represent the circuit's SET sensitivity under other test programs. Summary of the Invention
[0005] The purpose of this invention is to overcome the above-mentioned defects and provide a method and system for evaluating the single-event functional error (SEE) sensitivity range of reconfigurable chips. This invention solves the technical problem that it is difficult to evaluate the SEE sensitivity of reconfigurable chips. The invention can obtain the SEE sensitivity range of reconfigurable chips and provides important support for evaluating the overall performance of reconfigurable chips.
[0006] To achieve the above-mentioned objectives, the present invention provides the following technical solution:
[0007] This invention provides a method and system for laser evaluation of the single-event functional error (SEE) sensitivity range of reconfigurable chips. It presents evaluation methods and testing procedures for SEE of different modules. By conducting laser experiments on various typical test procedures, the invention irradiates key functional modules of the reconfigurable chip in different regions, obtaining multiple sets of SEE cross-sectional curves to determine the SEE sensitivity range of key functional modules. Simultaneously, by utilizing circuit layout and an infrared imaging system, the invention obtains sensitivity bitmaps of key functional modules in the dynamic reconfigurable chip, allowing for objective analysis of the contribution of different functional modules to the SEE sensitivity of the reconfigurable chip. This provides comprehensive and accurate guidance for understanding the overall radiation resistance performance of reconfigurable chips and offers important reference for radiation-hardened circuit design. This invention features comprehensive testing of SEE types and sensitive functional modules, providing a reference for SEE testing and SEE performance evaluation of such reconfigurable chips.
[0008] A method for evaluating the single-event functional error sensitive region of a reconfigurable chip includes:
[0009] S1 enables the reconfigurable chip to execute a typical test program;
[0010] S2 performs laser irradiation tests on each functional module in the reconfigurable chip to obtain the single-event functional error saturation cross section of each functional module; the functional modules include PE processing unit array, on-chip interconnect network and controller;
[0011] S3 causes the reconfigurable chip to execute the next typical test program, and repeats step S2 until all typical test programs have been executed.
[0012] S4 obtains the single-event functional error sensitive range of each functional module based on the single-event functional error saturation cross section under each typical test procedure.
[0013] Furthermore, the number of typical test programs is ≥3;
[0014] The resource utilization rates of each functional module vary across multiple typical test programs. At least one typical test program results in a resource utilization rate of each functional module that is lower than the lower limit of the resource utilization rate under actual working conditions, and at least another typical test program results in a resource utilization rate of each functional module that is higher than the upper limit of the resource utilization rate under actual working conditions.
[0015] Furthermore, when executing each typical test program, the controller first loads the typical test program into the program memory of the PE unit through the on-chip interconnect network. After loading, the controller configures the clock signal and reset signal for the PE unit through the on-chip interconnect network. The PE unit executes the typical test program according to the clock signal and reset signal.
[0016] The different resource utilization rates of each functional module in a typical test program include: the different call frequencies of each functional module and the different instructions issued to each functional module.
[0017] Multiple typical test programs iterate through the instructions issued by each functional module, and then execute the instructions under the actual working conditions of each functional module.
[0018] Furthermore, step S2 also includes:
[0019] Record the laser energy, total laser flux, total number of single-event faults, and error location coordinates when a single-event fault occurs in each functional module;
[0020] Use an infrared camera to acquire sensitive bitmap information of the location where a single-event functional error occurs;
[0021] Based on the error location coordinates, layout information, and sensitive bitmap information, the specific components in each functional module that experienced single-event functional errors were identified.
[0022] Furthermore, in step S2, when conducting laser irradiation experiments at different laser energies, the laser energy is represented by the linear energy transfer (LET) of the laser particles, and the different laser energies include at least the following five energy points:
[0023] LET = 8 MeV.cm 2 / mg, LET = 13MeV.cm 2 / mg, LET = 22MeV.cm 2 / mg,
[0024] LET = 37 MeV.cm 2 / mg, LET = 75MeV.cm 2 / mg.
[0025] Furthermore, in step S2, the method for obtaining the single-event functional error saturation cross section includes:
[0026] The laser energy is continuously increased until the Weibull curve at a certain laser energy reaches saturation. The maximum single-event function error (SEM) section in the Weibull curve at this point is taken as the SEM saturation section.
[0027] Furthermore, Weibull curves are plotted based on LET and single-event function error cross-sections; the single-event function error cross-section is obtained based on the total number of single-event function errors.
[0028] The total number of single-event function errors is the sum of the number of single-event function errors and the number of single-event function interruptions.
[0029] A single-event functional error (SEE) refers to an operational error that can be automatically recovered. If an error occurs during a single execution of a typical test program, but the result is correct in the next loop, then a single-event functional error is considered to have occurred.
[0030] A single event interrupt (SEE) is an unrecoverable interruption that requires a reset or power-on to recover. If a typical test program fails to execute an error in three consecutive cycles, or if the serial port freezes and fails to send data, and cannot recover after irradiation is stopped, then a single event interrupt is considered to have occurred.
[0031] Furthermore, in step S4, the method for obtaining the single-event functional error sensitive range of each functional module based on the single-event functional error saturation cross section under each typical test procedure includes:
[0032] Assuming there are n typical test programs, let σ denote the single-event functional error saturation cross sections of the PE processing unit array, on-chip interconnect network, and controller under each typical test program. SPE1 ……σ SPEn σ SI1 ……σ SIn and σ SC1 ……σ SCn ;
[0033] Let σ SPEmax =max{σ SPE1 ……σ SPEn},σ SPEmin =min{σ SPE1 ……σ SPEn};
[0034] σ SImax =max{σ SI1 ……σ SIn},σ SImin =min{σ SI1 ……σ SIn};
[0035] σSCmax =max{σ SC1 ……σ SCn}, σ SCmin =min{σ SC1 ……σ SCn};
[0036] The single-event functional error sensitive intervals for the PE processing unit array, on-chip interconnect network, and controller are respectively [σ SPEmin ,σ SPEmax ]、[σ SImin ,σ SImax ] and [σ SCmin ,σ SCmax ].
[0037] A system for evaluating the single-event functional error sensitive range of a reconfigurable chip includes a programmable power supply module, a host computer control center module, and a control area module;
[0038] The programmable power supply module supplies power to the reconfigurable chip under test and the control area module according to the power control command input by the host computer control center module, obtains the current status of the reconfigurable chip under test and feeds it back to the host computer control center module.
[0039] The host computer control center module outputs power control commands to the programmable power supply module and monitors the current based on the current status input by the programmable power supply module; it also outputs test programs and test configuration code streams to the control area module.
[0040] The control area module receives the typical test program and test configuration code stream input from the host computer control center module and outputs it to the reconfigurable chip under test. It obtains the data obtained by the reconfigurable chip under test according to the typical test program and test configuration code stream, determines whether a single-event functional error has occurred in the reconfigurable chip under test, and obtains the single-event functional error saturation cross section.
[0041] Compared with the prior art, the present invention has at least one of the following advantages:
[0042] (1) This invention creatively proposes a method for evaluating the single-event functional error sensitive range of a reconfigurable chip, and provides a method for obtaining single-event functional error test of different functional modules of a reconfigurable chip. It can separately count the single-event functional error cross section of each independent functional module in the reconfigurable chip, and intuitively reflect the contribution value of each independent functional module to the single-event sensitivity characteristics of the chip, providing an important reference for radiation hardening design.
[0043] (2) The present invention obtained a set of single-event sensitivity characteristic curves of reconfigurable chips and obtained the single-event functional error sensitive range of reconfigurable chips, which provides important support for the evaluation of the overall performance of reconfigurable chips.
[0044] (3) The present invention can obtain a single-event functional error sensitive location map of a reconfigurable chip, which can intuitively reflect the single-event sensitivity of different functional modules of the circuit.
[0045] (4) The single-event test system for reconfigurable chips in this invention provides a stable and reliable test environment for testing the single-event effect of reconfigurable chips. Attached Figure Description
[0046] Figure 1 This is a schematic diagram of a single-event effect testing system for a reconfigurable chip according to the present invention;
[0047] Figure 2 This is a flowchart of a method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to the present invention;
[0048] Figure 3 This is a flowchart of a reconfigurable chip laser single-particle laser irradiation test according to the present invention. Detailed Implementation
[0049] The features and advantages of the present invention will become clearer and more apparent from the following detailed description.
[0050] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments. Although various aspects of embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated otherwise.
[0051] Existing single-event effect (SEE) testing methods for reconfigurable chips suffer from the difficulty in comprehensively obtaining the SEE sensitivity of different functional modules, and often use the SEE cross-section under a certain test program to characterize the SEE sensitivity of the entire chip. This invention discloses a method for laser evaluation of the SEE sensitivity range of reconfigurable chips. It designs several typical test programs and conducts laser radiation experiments on different functional modules according to the designed test schemes, obtaining the SEE cross-section of each functional module of the chip under different test programs. This provides a reference for the evaluation of the SEE performance of reconfigurable chips. This invention also discloses a SEE testing system for reconfigurable chips, including a programmable power supply module, a host computer control center module, and a control area module, providing a stable testing environment for the implementation of the SEE testing method for reconfigurable chips.
[0052] This invention essentially establishes a database of circuit susceptibility under different user test programs, obtaining the single-event sensitivity (SES) of this circuit under extreme conditions (maximum and minimum resource utilization), i.e., the sensitivity range. This allows users to have a holistic understanding of the circuit's SES, ensuring that regardless of the test program used, the SES will fall within this range, eliminating the need for SES tests on every user program. This invention is of great significance for comprehensively understanding the radiation resistance performance of reconfigurable circuits.
[0053] The functional testing of a chip under test (DUT) mainly includes the processing unit array, on-chip interconnect network, and controller. This invention's single-event functional error (SEE) testing method for reconfigurable chips first designs SEE test schemes for different functional modules; then, it writes various representative and differentiated typical test programs and conducts radiation tests according to the functional error test schemes, recording and statistically analyzing the SEE counts during the process; finally, it calculates the SEE cross-sections for different functional modules. By comparing and analyzing the SEE cross-sections of different functional modules, this invention can determine the sensitivity percentage of different functional modules in the reconfigurable chip, and perform system-level hardening on functional modules with high sensitivity percentages.
[0054] This invention provides a method for laser evaluation of the single-event functional error sensitive region of a reconfigurable chip, specifically comprising the following steps:
[0055] (1) Design n different typical test programs P1, P2...Pn (n≥3). The test programs need to cover important functional modules such as the PE processing unit array, on-chip interconnect network and controller of the reconfigurable chip.
[0056] The working principle of the three important functional modules is as follows: The controller first loads the algorithm program to be executed into the program memory of the PE unit through the on-chip interconnect network. At this time, the PE unit does not perform any operation. After this operation is completed, the controller configures the clock signal and reset signal for the PE unit through the on-chip interconnect network, and the PE unit begins to execute various calculation programs.
[0057] The P1 test program executes simple algorithms, such as matrix multiplication. When executing the P1 program, the controller first loads the matrix algorithm program into the program memory of the PE unit through the on-chip interconnect network. At this time, the PE unit does not perform any operation. After this operation is completed, the controller configures the clock signal and reset signal for the PE unit through the on-chip interconnect network, and the PE unit begins to execute the matrix multiplication operation program.
[0058] Similarly, design test programs for n different complex algorithms, such as P2 performing MD5 (Message-Design Algorithm 5); P3 performing matrix division; P4 performing AES encryption (Advanced Encryption Standard); and P5 performing SHA256 (Secure Hash Algorithm). The execution of the program is the same as P1.
[0059] (2) Execute test program P1 and conduct laser single-particle irradiation tests on the PE processing unit array, on-chip interconnect network and controller in different regions. Monitor the single-particle phenomenon of the reconfigurable chip during the test.
[0060] (3) During the laser simulation, when a single event (single event functional error) occurs, record the experimental phenomena such as laser energy and error position coordinates at this time, and analyze the sensitive circuit structure that causes the single event based on the coordinate position and layout information.
[0061] (4) Change the laser energy to obtain the single-particle functional error saturation cross section σ of different functional modules under test program P1. SPE1 , σ SI1 , σ SC1 ;
[0062] (5) Execute test programs P2, P3, ... Pn in sequence, and repeat steps (2) to (4) until all different functional modules have completed testing under n typical test programs and valid data σ of different functional modules under different test programs has been obtained. SPE2 , σ SI2 , σ SC2 …σ SPEn , σ SIn , σ SCn ;
[0063] (6) The obtained experimental data are processed and analyzed to obtain the maximum and minimum single-event effect error section range of different functional modules under different test programs, which provides important support for the single-event performance evaluation of reconfigurable circuits.
[0064] Specifically, P1, P2...Pn are typical test programs written for different functional testing requirements, and σ SPE1 ……σ SPEn , σ SI1 ……σ SIn , σ SC1 ……σ SCn This is to obtain the single-event functional error saturation cross sections of different functional modules obtained under different test procedures.
[0065] Furthermore, the implementation method in step (2) is as follows:
[0066] 2.1 Prepare back irradiation test samples of reconfigurable chips, design a test system capable of performing functional tests on reconfigurable chips, and complete functional debugging;
[0067] 2.2 Execute test program P1 on the reconfigurable chip;
[0068] 2.3 Fix the reconfigurable chip testing system on a three-dimensional translation stage, adjust the focal plane of the laser equipment, and focus the laser onto the surface of the chip substrate;
[0069] 2.4 Determine the origin position of the laser scan and set parameters such as initial laser energy, scanning step size, scanning speed, repetition frequency, and Z-axis offset;
[0070] 2.5 Set the scanning range according to the PE processing unit array coordinates in the actual layout, conduct laser scanning tests on it, monitor and record whether a single-event functional error occurs in the reconfigurable chip, whether the current increases, the laser energy, position coordinates, functional error type and other test phenomena when a functional error occurs;
[0071] 2.6 Change the scanning area to the on-chip interconnect network and perform laser scanning tests on it, monitor and record the test phenomena of the reconfigurable chip;
[0072] 2.7 Similarly, change the scanning area to the controller to perform laser scanning tests, monitor and record the test phenomena of the reconfigurable chip.
[0073] Furthermore, the implementation method of step (3) is as follows:
[0074] 3.1 When a single-event event occurs, record the laser energy, error location coordinates, chip current, single-event error type, and error count, etc.
[0075] 3.2 Using an infrared camera to perform sensitive bitmap imaging of the error location provides more direct support for the analysis of sensitive circuit structures;
[0076] 3.3 Based on the coordinate position, layout information and sensitive bitmap information, a comprehensive analysis is conducted on the sensitive circuit structure that exhibits single-event effects.
[0077] Traditional heavy ion testing reveals that the sensitive circuit structure indicates an error in the PE cell processing array, on-chip interconnect network, and controller. It's impossible to predict which specific flip-flop, register, or transistor within the circuit is faulty. However, if the designer has the circuit layout, they can pinpoint the exact location of the single-event effect (SEE) in the sensitive circuit by matching the error location coordinates with the layout, identifying which register or transistor is malfunctioning. This is information that heavy ion testing cannot provide, and the resulting sensitive circuit structure information offers precise reference for circuit hardening. Laser testing, which irradiates the circuit substrate from the back, cannot directly visualize the actual circuit structure at the faulty sensitive location. Infrared imaging technology, however, allows visualization of the actual sensitive circuit structure. Therefore, infrared bitmap imaging of the fault location can directly reveal the circuit structure experiencing the SEE. Furthermore, infrared imaging can verify whether the sensitive location of the SEE matches the circuit structure mapped to the specific layout using coordinates.
[0078] The magnitude of laser energy, the coordinates of the sensitive location, and the structure of the sensitive circuit are used to characterize or indicate the sensitive characteristics of the circuit from angles other than the sensitive region. This makes the sensitivity analysis of the circuit more comprehensive and facilitates designers to strengthen or modify the circuit.
[0079] Furthermore, the implementation method of step (4) is as follows:
[0080] Under test program P1, laser scanning experiments were conducted at different energies. The laser single-event fault (SIF) data at different energy points were plotted as Weibull curves (the horizontal axis represents the LET value, and the vertical axis represents the SIF saturation cross section). It was observed whether the SIF cross section curve of the reconfigurable chip reached saturation. If saturation was not reached, the laser energy was increased by 0.1 nJ, and the experiment was repeated. Data was obtained and Weibull curves were plotted until the curve saturated. The maximum SIF cross section in the Weibull curve at this point was recorded as the SIF saturation cross section of the reconfigurable chip's functional module. The SIF saturation cross section σ of different functional modules of the circuit under test program P1 was recorded. SPE1 , σ SI1 , σ SC1 .
[0081] Furthermore, the implementation method of step (5) is as follows:
[0082] 5.1 Execute test program P2 to conduct laser experiments at different laser energies to obtain the single-event functional error cross-sections of different functional modules at different laser energies, and perform Weibull curve fitting until the single-event error saturation cross-section is obtained;
[0083] Under test program P2, laser scanning experiments were conducted at different energies. The laser single-event fault data at different energy points were plotted as Weibull curves. The saturation level of the reconfigurable chip's single-event fault cross-section curve was observed. If saturation was not reached, the laser energy was increased by 0.1 nJ, and the experiment was repeated. Data was obtained and Weibull curves were plotted until the curve saturated. The maximum single-event fault cross-section in the Weibull curve at this point was recorded as the saturation cross-section of the reconfigurable chip's functional module. The saturation cross-section σ of the single-event fault cross-section of different functional modules of the circuit under test program P2 was recorded. SPE2 , σ SI2 , σ SC2 .
[0084] 5.2 Execute the test program P3..Pn, conduct laser experiments at different laser energies to obtain the single-event functional error cross-sections of different functional modules at different laser energies, and perform Weibull curve fitting until the single-event error saturation cross-section is obtained.
[0085] Under the test program P3..Pn, laser scanning experiments were conducted at different energies. The laser single-event test data at different energy points were plotted as Weibull curves. It was observed whether the single-event functional error cross-section curve of the reconfigurable chip reached saturation. If it did not reach saturation, the laser energy was increased by 0.1nJ, and the experiment was repeated. Data was obtained and Weibull curves were plotted until the curve saturated. The maximum single-event functional error cross-section in the Weibull curve at this time was recorded as the single-event functional error saturation cross-section of the reconfigurable chip functional module.
[0086] Furthermore, the implementation method of step (6) is as follows:
[0087] By plotting the single-event fault (SEF) cross-sections of different functional modules as a set of Weibull curves, the minimum and maximum SEF saturation cross-sections of the reconfigurable chip under different test programs are obtained, representing the lower and upper limits of the sensitivity range of the functional modules. This provides a holistic understanding of the SEF performance range of the reconfigurable chip.
[0088] A single-event functional error testing system for a reconfigurable chip includes a programmable power supply module, a host computer control center module, and a control area module;
[0089] The programmable power supply module supplies power to the reconfigurable chip under test and the control area module according to the power control command input by the host computer control center module, obtains the current status of the reconfigurable chip under test and feeds it back to the host computer control center module.
[0090] The host computer control center module outputs power control commands to the programmable power supply module and monitors the current based on the current status input by the programmable power supply module; it also outputs test programs and test configuration code streams to the control area module.
[0091] The control area module receives the test program and test configuration code stream input from the host computer control center module and outputs them to the reconfigurable chip under test. It obtains the data obtained from the test program and test configuration code stream of the reconfigurable chip under test to determine whether a single-event effect occurs in the reconfigurable chip under test and calculates the single-event functional error section.
[0092] Example 1
[0093] like Figure 1 As shown, this embodiment of the invention provides a single-event effect testing system for a reconfigurable chip, including a programmable power supply module, a host computer control center module, a control area module, and a test area module; the reconfigurable chip functional testing includes a PE processing unit array, an on-chip interconnect network, and a controller.
[0094] The programmable power supply module provides power and current monitoring for the reconfigurable chip under test. The collected current data is uploaded to the host computer and stored via the network port.
[0095] The host computer control center module is controlled by host computer software and has functions such as configuring code stream, reading back, power control, current monitoring, and interrupt monitoring.
[0096] The control module includes a code stream storage area, a PROM, and a main control FPGA. It is responsible for configuring the reconfigurable chip under test, SEFI monitoring, readback, and uploading error counts.
[0097] The test area module, or reconfigurable chip under test, includes a controller module, on-chip interconnect network, PE processing unit array, and memory.
[0098] Before irradiation, the host computer control center module communicates with the controller module of the reconfigurable chip under test (DUT) via an RS485 interface. The control FPGA in the controller module is responsible for downloading the test configuration code stream to the DUT. Based on the test configuration code stream, the DUT is configured before irradiation, and the configurable resources are initialized, including processing unit functions, interconnects, and other resources. During irradiation, the programmable power supply module monitors the IO current and core current of the DUT in real time, thereby monitoring the DUT's operating status. The host computer control center module sets the sampling period, and the control area module reads back the code stream generated by the DUT after irradiation in real time according to the set sampling period, counts the number of functional errors of different functional test modules of the DUT, and sends this data back to the host computer control center module through the communication interface.
[0099] like Figure 2As shown, this invention provides a method for laser evaluation of the single-event functional error (SEE) sensitive region of a reconfigurable chip. Different test programs are designed for different computational tasks to reconfigure the reconfigurable logic device during task execution. The differences lie in the resource allocation strategy and reconfiguration method of each test program. During execution, the device configuration files corresponding to each stage are configured onto the reconfigurable logic device sequentially according to time, ultimately completing the computational task. SEE tests are performed on different functional modules of the reconfigurable circuit under different test programs to obtain the SEE cross-section of each functional module.
[0100] The first step is to write n typical test programs P1-Pn;
[0101] The second step is to execute test program P1 on the reconfigurable chip;
[0102] The third step is to set the laser parameters, irradiate the chip with laser in different areas, and monitor the single-particle phenomenon.
[0103] The fourth step is to determine whether a single-event effect has occurred. If it has, record the experimental phenomena and coordinate information at this time. If no single-event effect has occurred, increase the laser energy and repeat the experiment until a single-event effect occurs.
[0104] Fifth step: Change the laser energy to obtain the single-particle functional error saturation cross section of different functional modules;
[0105] Step 6: Execute test program P2 and repeat steps 3 to 5 to obtain the single-event functional error saturation cross section of the chip under test program P2.
[0106] Step 7, similarly, execute test programs P3...Pn to obtain the single-event functional error saturation cross section of the chip under different test programs;
[0107] The eighth step involves processing and analyzing the obtained experimental data to obtain a set of single-event functional error cross-sectional sensitivity characteristic curves of the reconfigurable chip under different test programs, ultimately obtaining the chip's optimal and worst sensitivity characteristics.
[0108] This invention focuses on single-event functional errors occurring in processing unit arrays, controllers, and on-chip interconnect networks. In the first step, the requirements for designing n different typical test procedures are as follows:
[0109] Typical test programs P1 to Pn need to cover important functional modules of the reconfigurable chip, such as the PE processing unit array, on-chip interconnect network, and controller.
[0110] Typical test programs P1 to Pn require 100% coverage of circuit instructions, and the instruction set executed is different when executing different test programs;
[0111] To demonstrate the radiation resistance of reconfigurable chips at different levels, each test program should have varying levels of functional module utilization, instruction set calls, and program complexity.
[0112] The instruction set refers to all the operations that a test program needs to perform on a circuit during execution; these are collectively called the instruction set.
[0113] 100% circuit instruction coverage means that the designed test program needs to traverse all the circuit's instructions, such as read instructions, write instructions, and jump instructions.
[0114] The utilization rate (resource utilization rate) of functional modules refers to the frequency of calls to each functional module during the execution of the test program. The higher the call frequency, the higher the utilization rate.
[0115] Calling an instruction set refers to calling different instructions during program execution. The complexity of test programs should be as varied as possible, meaning that when designing test programs, some programs only perform simple write and read functions, some programs can perform more complex functions such as addition, subtraction, multiplication, and division, and some programs can perform more complex operations, such as encryption and decryption algorithms. However, among P1 to Pn, at least one test program has a resource utilization rate lower than the lower limit of the actual resource utilization rate, and one test program has a resource utilization rate higher than the upper limit of the actual resource utilization rate.
[0116] Single-event functional error criterion:
[0117] A single-event functional error (SEE) refers to an operational error that can be automatically recovered. If an error occurs during a single execution of a typical test program, but the result is correct in the next loop, then a single-event functional error is considered to have occurred.
[0118] A single event interrupt (SEE) is an unrecoverable interruption that requires a reset or power-on to recover. If a typical test program fails to execute an error in three consecutive cycles, or if the serial port freezes and stops sending data, and cannot recover after irradiation is stopped, then a single EEE is considered to have occurred.
[0119] The total number of single-event function errors is obtained by adding the number of single-event function interruptions to the total number of single-event function errors, and this value is used to calculate the single-event function error cross section.
[0120] In the third step, during the laser simulation, when a single-particle duality error occurs, the experimental phenomena such as laser energy, total laser flux, error count, and error location coordinates are recorded:
[0121] If no single-event effect occurs, adjust the laser energy and continue the laser experiment. Change the laser energy to include at least five energy points (equivalent heavy ion LET = 8 MeV.cm). 2 / mg, LET = 13MeV.cm2 / mg, LET = 22MeV.cm 2 / mg, LET = 37MeV.cm 2 / mg, LET = 75MeV.cm 2 / mg), irradiation experiments were conducted at different laser energies to monitor the single-particle sensitivity characteristics of the reconfigurable chip. LET refers to linear energy transfer, which is the energy deposited per unit path of a charged particle in a material.
[0122] If the equivalent LET = 75 MeV.cm 2 If no single-event effect (SEE) is observed at a laser energy of / mg, then the laser energy is gradually increased in increments of 0.1nJ each time, and the laser scanning test is repeated until a SEE occurs. If a SEE occurs, the error count is incremented, and the laser energy, total laser flux, error count, error location coordinates, chip current, and SEE type are recorded. The SEE cross-section σ of the PE processing unit array is calculated separately. PE1 Single-event functional error cross section σ of on-chip interconnect networks I1 And the single-event functional error section σ of the controller C1 .
[0123] Each time a single-event event occurs, an infrared camera is used to perform sensitive bitmap imaging of the error location, providing more direct support for the analysis of sensitive circuit structures. Based on the coordinate position, layout information, and sensitive bitmap information, the sensitive circuit structure that is experiencing a single-event event is comprehensively analyzed.
[0124] like Figure 3 As shown, the flowchart of a reconfigurable chip laser single-particle laser irradiation test according to the present invention is as follows:
[0125] (31) Prepare back irradiation test samples of reconfigurable chips, design a test system capable of performing functional tests of reconfigurable chips and complete functional debugging;
[0126] (32) Execute test program P1 on the reconfigurable chip;
[0127] (33) Fix the reconfigurable chip test system on a three-dimensional translation stage, adjust the focal plane of the laser device, and focus the laser onto the surface of the chip substrate;
[0128] (34) Determine the origin position of the laser scan and set parameters such as initial laser energy, scanning step size, scanning speed, repetition frequency, and Z-axis offset;
[0129] (35) Set the scanning range according to the PE processing unit array coordinates in the actual layout, conduct laser scanning tests on it, monitor and record the test phenomena of the reconfigurable chip;
[0130] (36) Change the scanning area to the on-chip interconnect network to perform laser scanning test, monitor and record the test phenomena of the reconfigurable chip;
[0131] (37) Similarly, the scanning area was changed to the controller to perform laser scanning tests, and the test phenomena of the reconfigurable chip were monitored and recorded.
[0132] By changing the laser energy and repeating the above steps, more single-event sensitivity information from the reconfigurable chip can be obtained.
[0133] In the fourth step, the laser energy is changed to obtain the single-event functional error saturation cross section σ of different functional modules of the test program P1 under different laser energies. SPE1 , σ SI1 , σ SC1 The steps are as follows:
[0134] Single-event error (SEE) data at different energy points were plotted as Weibull curves. The SEE curve of the reconfigurable chip was observed to determine if it reached saturation. If saturation was achieved, the SEE saturation cross-section was recorded. If saturation was not achieved, the laser energy was increased by 0.1 nJ, and the experiment was repeated. Data was collected and Weibull curves were plotted until the curve saturated. The SEE saturation cross-sections of different functional modules of the reconfigurable chip at this point were recorded. The SEE saturation cross-section (σsat) is the maximum error cross-section that the chip can achieve under particle bombardment at different LET (Left-Effect Time) values.
[0135] σ PE For the error section of the PE processing unit array, σ I For the error section of the on-chip interconnect network, σ C For the error section of the controller, σ SPE σ is the error saturation cross section of the PE processing unit array. SI For the error saturation cross section of the on-chip interconnect network, σ SC This represents the error saturation section of the controller.
[0136] In the fifth step, steps (2) to (4) are repeated until all different functional modules have completed testing and obtained valid data under n typical test programs. The steps are as follows:
[0137] (51) Execute test program P2, conduct laser experiments at different laser energies to obtain single-event functional error cross sections of different functional modules at different laser energies, perform Weibull curve fitting until the single-event functional error saturation cross section is obtained.
[0138] (52) Execute the test program P3...Pn in sequence, conduct laser tests at different laser energies to obtain the single-event functional error cross sections of different functional modules at different laser energies, perform Weibull curve fitting, until the single-event functional error saturation cross section is obtained.
[0139] In the sixth step, the obtained experimental data will be processed and analyzed to give the single-event functional error (SEE) cross-section sensitive range of different functional modules. Specifically, the SEE cross-sections of different functional modules will be plotted as a set of curves to obtain the minimum and maximum SEE cross-sections of the reconfigurable chip under different test programs, thus obtaining the size of the sensitive range of the reconfigurable chip.
[0140] The present invention has been described in detail above with reference to specific embodiments and exemplary examples; however, these descriptions should not be construed as limiting the present invention. Those skilled in the art will understand that various equivalent substitutions, modifications, or improvements can be made to the technical solutions and embodiments of the present invention without departing from the spirit and scope of the invention, and all such modifications and improvements fall within the scope of the present invention. The scope of protection of the present invention is defined by the appended claims.
[0141] The contents not described in detail in this specification are common knowledge to those skilled in the art.
Claims
1. A method for evaluating the single-event functional error sensitive region of a reconfigurable chip, characterized in that, include: S1 enables the reconfigurable chip to execute a typical test program; S2 performs laser irradiation tests on each functional module in the reconfigurable chip to obtain the single-event functional error saturation cross section of each functional module; the functional modules include PE processing unit array, on-chip interconnect network and controller; S3 causes the reconfigurable chip to execute the next typical test program, and repeats step S2 until all typical test programs have been executed. S4 obtains the single-event functional error sensitive range of each functional module based on the single-event functional error saturation cross section under each typical test procedure. The number of typical test programs is ≥3; The resource utilization rates of each functional module are different in multiple typical test programs. At least one typical test program has a resource utilization rate of each functional module that is lower than the lower limit of the resource utilization rate of each functional module under the actual working conditions, and at least another typical test program has a resource utilization rate of each functional module that is higher than the upper limit of the resource utilization rate of each functional module under the actual working conditions. In step S4, the method for obtaining the single-event functional error sensitive range of each functional module based on the single-event functional error saturation cross section under each typical test procedure includes: Assuming there are n typical test programs, let σ denote the single-event functional error saturation cross sections of the PE processing unit array, on-chip interconnect network, and controller under each typical test program. SPE1 ……σ SPEn σ SI1 ……σ SIn and σ SC1 ……σ SCn ; Let σ SPEmax = max{σ SPE1 ……σ SPEn}, σ SPEmin = min{σ SPE1 ……σ SPEn}; s SImax =max{σ SI1 ……s SIn },s SImin =min{σ SI1 ……s SIn }; s SCmax =max{σ SC1 ……s SCn },s SCmin =min{σ SC1 ……s SCn }; The single-event functional error sensitive intervals for the PE processing unit array, on-chip interconnect network, and controller are respectively [σ SPEmin ,σ SPEmax ]、[σ SImin ,σ SImax ] and [σ SCmin ,σ SCmax ].
2. The method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to claim 1, characterized in that, When executing each typical test program, the controller first loads the typical test program into the program memory of the PE unit through the on-chip interconnect network. After loading, the controller configures the clock signal and reset signal for the PE unit through the on-chip interconnect network. The PE unit executes the typical test program according to the clock signal and reset signal. The different resource utilization rates of each functional module in a typical test program include: the different call frequencies of each functional module and the different instructions issued to each functional module. Multiple typical test programs iterate through the instructions issued by each functional module, and then execute the instructions under the actual working conditions of each functional module.
3. The method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to claim 1, characterized in that, Step S2 also includes: Record the laser energy, total laser flux, total number of single-event faults, and error location coordinates when a single-event fault occurs in each functional module; Use an infrared camera to acquire sensitive bitmap information of the location where a single-event functional error occurs; Based on the error location coordinates, layout information, and sensitive bitmap information, the specific components in each functional module that experienced single-event functional errors were identified.
4. The method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to claim 1, characterized in that, In step S2, when conducting laser irradiation experiments at different laser energies, the laser energy is represented by the linear energy transfer (LET) of the laser particles. The different laser energies include at least the following five energy points: LET=8MeV.cm 2 / mg、LET=13MeV.cm 2 / mg、LET=22MeV.cm 2 / mg、 LET=37MeV.cm 2 / mg、LET=75MeV.cm 2 / mg。 5. The method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to claim 4, characterized in that, In step S2, the method for obtaining the single-event functional error saturation cross section includes: The laser energy is continuously increased until the Weibull curve at a certain laser energy reaches saturation. The maximum single-event function error (SEM) section in the Weibull curve at this point is taken as the SEM saturation section.
6. The method for evaluating the single-event functional error sensitive region of a reconfigurable chip according to claim 5, characterized in that, Plot the Weibull curve based on LET and single-event function error (SEFE) cross-sections; obtain the single-event function error (SEFE) cross-section based on the total number of SEFE errors. The total number of single-event function errors is the sum of the number of single-event function errors and the number of single-event function interruptions. A single-event functional error refers to a computational error that can be automatically recovered from. If an error occurs during a single execution of the typical test program, and the result is correct in the next loop, then it is determined that a single-particle functional error has occurred. A single event interrupt (SEE) is an unrecoverable interruption that requires a reset or power-on to recover. If a typical test program fails to execute an error in three consecutive cycles, or if the serial port freezes and fails to send data, and cannot recover after irradiation is stopped, then a single event interrupt is considered to have occurred.
7. A system for evaluating the single-event functional error sensitive region of a reconfigurable chip, characterized in that, A method for evaluating the single-event functional error sensitive region of a reconfigurable chip as described in any one of claims 1-6, the system comprising a programmable power supply module, a host computer control center module, and a control area module; The programmable power supply module supplies power to the reconfigurable chip under test and the control area module according to the power control command input by the host computer control center module, obtains the current status of the reconfigurable chip under test and feeds it back to the host computer control center module. The host computer control center module outputs power control commands to the programmable power supply module and monitors the current based on the current status input by the programmable power supply module; it also outputs test programs and test configuration code streams to the control area module. The control area module receives the typical test program and test configuration code stream input from the host computer control center module and outputs it to the reconfigurable chip under test. It obtains the data obtained by the reconfigurable chip under test according to the typical test program and test configuration code stream, determines whether a single-event functional error has occurred in the reconfigurable chip under test, and obtains the single-event functional error saturation cross section.
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