A load current detection system

Abstract

The present invention relates to a load current detection system, which belongs to the technical field of integrated circuits. The load current detection system includes a power tube current sampling circuit, a current comparison circuit and a load current detection circuit. The power tube current sampling circuit samples the load current; the current comparison circuit determines the magnitude of the output terminal voltage according to the load sampling signal; the load current detection circuit outputs a load detection logic signal according to the output terminal voltage of the current comparison circuit, the load sampling signal and the reference voltage to realize load current detection, which can be used as a basis for judgment by other circuits. At the same time, the magnitude of the detection current can be changed by adjusting the resistance value of the first resistor. The load current detection system of the present invention has a simple structure and low cost, and is suitable for charging modules of various mobile devices.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, in particular to the field of integrated circuit technology, and specifically refers to a load current detection system. Background Art

[0002] With the development of radio technology, various fast-charging mobile devices are becoming more and more common. As the switching current and charging voltage of these fast-charging devices increase, the charging power of the power tube becomes higher and higher. In some scenarios, we need to limit the load current. Therefore, it is inevitable to introduce a current detection circuit into the circuit. Then, according to the load current detection result, the subsequent circuit is given as the basis for further work.

[0003] Therefore, it is necessary to study a technical solution for a load current detection circuit. Summary of the invention

[0004] The purpose of the present invention is to overcome the above-mentioned shortcomings of the prior art and provide a load current detection system which has a simple structure, low cost and is suitable for a charging module of a mobile device.

[0005] In order to achieve the above-mentioned purpose, the load current detection system of the present invention has the following structure:

[0006] The load current detection system includes: a power tube current sampling circuit, a current comparison circuit and a load current detection circuit.

[0007] The power tube current sampling circuit is used to sample the load current Iload to generate a load sampling signal V5;

[0008] The current comparison circuit comprises a first resistor R1, and the magnitude of the voltage V3 at the output end of the current comparison circuit is determined according to the magnitude of the first current I1 passing through the first resistor R1 by the load sampling signal V5;

[0009] The load current detection circuit includes a switch S1 and a comparator CMP. The switch S1 is turned on and off by the output voltage V3 of the current comparison circuit. The two ends of the switch S1 are respectively connected to the load sampling signal V5 and the positive input end of the comparator CMP. The negative input end of the comparator CMP is connected to the reference voltage Vref. The output end of the comparator CMP outputs a load detection signal Load_detect.

[0010] In the load current detection system, in the power tube current sampling circuit, the load current Iload is sampled by the power tube N1; the gate of the power tube N1 is connected to the output terminal GATE of the charge pump (Chargebump), and is also connected to the gate terminal of the sampling tube N2; the drain of the power tube N1 is connected to the input voltage VIN and the drain of the sampling tube N2; the source of the power tube N1 is connected to the output voltage VOUT; the source of the sampling tube N2 provides the load sampling signal V5; the width-to-length ratio of the power tube N1 and the sampling tube N2 is N:1.

[0011] In the load current detection system, the upper end of the first resistor R1 is connected to the source of the sampling tube N2, the current of the first resistor R1 is the first current I1, and the lower end of the first resistor R1 is connected to the upper end of the fourth resistor R4;

[0012] The source of the first PMOS transistor P1 is connected to the lower end of the fourth resistor R4, and the gate of the first PMOS transistor P1 is connected to the gate of the second PMOS transistor P2; the drain of the PMOS transistor P1 is connected to the output voltage V3 of the current comparison circuit and to the drain of the third NMOS transistor N3;

[0013] The gate and drain of the second PMOS tube P2 are short-circuited, and the gate of the second PMOS tube P2 is connected to the gate of the first PMOS tube P1 to form a current mirror; the width-to-length ratio of the first and second PMOS tubes P1 and P2 is 1:1; the source of the second PMOS tube P2 is connected to the lower end of the second resistor R2;

[0014] The upper end of the second resistor R2 is connected to the output voltage VOUT; and the second resistor R2 is the same as the fourth resistor R4;

[0015] The gate of the third NMOS tube N3 is connected to the gates of the fourth and fifth NMOS tubes N4 and N5, and the width-to-length ratio of the third, fourth and fifth NMOS tubes N3, N4 and N5 is 1:1:1, and the sources of the third, fourth and fifth NMOS tubes N3, N4 and N5 are all grounded;

[0016] The gate and source of the fifth NMOS transistor N5 are short-circuited to form a current mirror, and the drain of the fifth NMOS transistor N5 is connected to an external reference current source ibias.

[0017] In the load current detection system, the preset load detection current, that is, the magnitude of the first current I1, is adjusted by adjusting the resistance value of the first resistor R1.

[0018] In the load current detection system, the load current detection circuit further includes a third resistor R3, and one end of the switch S1 connected to the positive input end of the comparator CMP is grounded through the third resistor R3.

[0019] In the load current detection system, the switch S1 is a sixth NMOS tube N6, the gate of the sixth NMOS tube N6 is connected to the output voltage V3 of the current comparison circuit, the drain of the sixth NMOS tube N6 is connected to the load sampling signal, the source of the sixth NMOS tube N6 is connected to the positive input terminal of the comparator CMP, and is grounded through the third resistor R3.

[0020] The load current detection system using the invention includes: a power tube current sampling circuit, a current comparison circuit and a load current detection circuit. The power tube current sampling circuit samples the load current; the current comparison circuit determines the magnitude of the output voltage according to the load sampling signal; the load current detection circuit outputs a load detection logic signal according to the output voltage of the current comparison circuit, the load sampling signal and the reference voltage to realize load current detection, which can be used as a basis for judgment by other circuits. At the same time, the magnitude of the detection current can be changed by adjusting the resistance value of the first resistor. The load current detection system of the present invention has a simple structure and low cost, and is suitable for charging modules of various mobile devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic block diagram of the structure of a load current detection system of the present invention;

[0022] Figure 2 A specific circuit diagram of a load current detection system of the present invention;

[0023] Figure 3 A specific circuit diagram of an embodiment of a load current detection system of the present invention;

[0024] Figure 4 for Figure 3 A schematic diagram of a comparator output signal simulation in an embodiment. DETAILED DESCRIPTION

[0025] In order to more clearly understand the technical content of the present invention, the following embodiments are given in detail.

[0026] See also Figure 1 As shown, it is a schematic block diagram of the structure of a load current detection system of the present invention.

[0027] In one embodiment, the load current detection system, such as Figure 1 The circuit shown includes: a power tube current sampling circuit, a current comparison circuit and a load current detection circuit.

[0028] Specifically, if Figure 2 As shown, the power tube current sampling circuit is used to sample the load current Iload to generate a load sampling signal V5;

[0029] The current comparison circuit comprises a first resistor R1, and the magnitude of the voltage V3 at the output end of the current comparison circuit is determined according to the magnitude of the first current I1 passing through the first resistor R1 by the load sampling signal V5;

[0030] The load current detection circuit includes a switch S1 and a comparator CMP. The switch S1 is turned on and off by the output voltage V3 of the current comparison circuit. The two ends of the switch S1 are respectively connected to the load sampling signal V5 and the positive input end of the comparator CMP. The negative input end of the comparator CMP is connected to the reference voltage Vref. The output end of the comparator CMP outputs a load detection signal Load_detect.

[0031] In a preferred embodiment, Figure 2 , 3 As shown, in the power tube current sampling circuit, the load current Iload is sampled by the power tube N1; the gate of the power tube N1 (the first NMOS tube) is connected to the output terminal GATE of the charge pump (Chargebump), and is also connected to the gate terminal of the sampling tube N2 (the second NMOS tube); the drain of the power tube N1 is connected to the input voltage VIN and the drain of the sampling tube N2; the source of the power tube N1 is connected to the output voltage VOUT; the source of the sampling tube N2 provides the load sampling signal V5; the width-to-length ratio of the power tube N1 and the sampling tube N2 is N:1.

[0032] In the current comparison circuit, the upper end of the first resistor R1 is connected to the source of the sampling tube N2, the current of the first resistor R1 is the first current I1, and the lower end of the first resistor R1 is connected to the upper end of the fourth resistor R4; the preset load detection current, that is, the magnitude of the first current I1, can be adjusted by adjusting the resistance value of the first resistor R1;

[0033] The source of the first PMOS transistor P1 is connected to the lower end of the fourth resistor R4, and the gate of the first PMOS transistor P1 is connected to the gate of the second PMOS transistor P2; the drain of the PMOS transistor P1 is connected to the output voltage V3 of the current comparison circuit and to the drain of the third NMOS transistor N3;

[0034] The gate and drain of the second PMOS tube P2 are short-circuited, and the gate of the second PMOS tube P2 is connected to the gate of the first PMOS tube P1 to form a current mirror; the width-to-length ratio of the first and second PMOS tubes P1 and P2 is 1:1; the source of the second PMOS tube P2 is connected to the lower end of the second resistor R2;

[0035] The upper end of the second resistor R2 is connected to the output voltage VOUT; and the second resistor R2 is the same as the fourth resistor R4;

[0036] The gate of the third NMOS tube N3 is connected to the gates of the fourth and fifth NMOS tubes N4 and N5, and the width-to-length ratio of the third, fourth and fifth NMOS tubes N3, N4 and N5 is 1:1:1, and the sources of the third, fourth and fifth NMOS tubes N3, N4 and N5 are all grounded;

[0037] The gate and source of the fifth NMOS transistor N5 are short-circuited to form a current mirror, and the drain of the fifth NMOS transistor N5 is connected to an external reference current source ibias.

[0038] The load current detection circuit further includes a third resistor R3, and one end of the switch S1 connected to the positive input end of the comparator CMP is grounded through the third resistor R3.

[0039] In a more preferred embodiment, Figure 3 As shown, the switch S1 is a sixth NMOS tube N6, a gate of the sixth NMOS tube N6 is connected to the output voltage V3 of the current comparison circuit, a drain of the sixth NMOS tube N6 is connected to the load sampling signal, a source of the sixth NMOS tube N6 is connected to the positive input terminal of the comparator CMP, and is grounded through the third resistor R3.

[0040] In practical applications, the embodiment of the present invention provides a Figure 3 The load current sensing system shown.

[0041] GATE is the gate voltage of the power tube provided by the charge pump, ibias is the reference current provided externally, and Vref is the reference voltage provided by the external circuit. The specific working principle of the load current detection system is as follows:

[0042] N1 is a power tube, N2 is a sampling tube, and the sampling ratio of the two is N:1, so the current flowing through N1 and N2 is N:1. N3, N4, and N5 form a current mirror, where N3:N4:N5=1:1:1. P1 and P2 form a current mirror, and P1:P2=1:1. I1 and I2 are the currents flowing through resistors R1 and R2 respectively, so I1:I2=1:1. R2 and R4 act as current limiters, and R2=R4. The load current is defined as Iload, then

[0043] V4 = Isample × R3,

[0044] Isample=Vref / R3

[0045] =Iload / N

[0046] Isample is the sampling current at the output end of the sampling circuit of the power tube circuit;

[0047] If the on-resistance of tube N1 is defined as Ron, then the on-resistance of sampling tube N2 is Ron×N.

[0048] V5=VIN- Ron×N×Isample

[0049] =VIN- Ron×N×Vref / R3,

[0050] VOUT=VIN-Iload×Ron,

[0051] Because I1=I2, and P1 and P2 form a current mirror,

[0052] so

[0053] V1=V2,

[0054] so

[0055] VOUT=V5-VR1

[0056] =V5-R1×I1,

[0057] Can be launched

[0058] R1=(V5- VOUT) / I1

[0059] =(Iload×Ron - Ron×N×Vref / R3) / I1.

[0060] Therefore, the value of the preset load detection current can be adjusted by adjusting the resistance value of R1.

[0061] The preset load detection current of this load current detection system is 100mA.

[0062] When the load current does not exceed 100mA, the current flowing through the sampling tube N2 is relatively small, so I1<I2. Because the gates of P1 and P2 are the same, the source of P1 is smaller than the source of P2, so the pull-up ability of P1 is smaller than the pull-down ability of N3, so V3 is pulled low, the NMOS switch tube N6 (S1) is turned off, and V4 is low level. At this time, V4<Vref, and the comparison signal Load_detect given by the comparator CMP is low level.

[0063] On the contrary, as the load current gradually increases, I1 gradually increases. When the load current exceeds 100mA, I1>I2, because the gates of P1 and P2 are the same, the source of P1>the source of P2, so the pull-up capability of P1 is greater than the pull-down capability of N3, so V3 increases, gradually increasing until the NMOS switch N6 is turned on. When N6 is turned on, V4=Isample×R3, and at this time V4>Vref, the comparison signal load_detect is given as a high level through the comparator CMP.

[0064] From the simulation diagram Figure 4 It can be seen that when the load current Iload increases to around 100mA, the load current detection circuit works and gives a logic signal Load_detect high level.

[0065] in addition, Figure 2 The switch tube S1 described in the above may be a device with switch characteristics such as NMOS, BJT, etc. but is not limited thereto; Figure 2 The current mirrors N3, N4, N5, P1, and P2 may use, but are not limited to, MOS, BJT, and other devices that function as current mirrors.

[0066] The load current detection system using the invention includes: a power tube current sampling circuit, a current comparison circuit and a load current detection circuit. The power tube current sampling circuit samples the load current; the current comparison circuit determines the magnitude of the output voltage according to the load sampling signal; the load current detection circuit outputs a load detection logic signal according to the output voltage of the current comparison circuit, the load sampling signal and the reference voltage to realize load current detection, which can be used as a basis for judgment by other circuits. At the same time, the magnitude of the detection current can be changed by adjusting the resistance value of the first resistor. The load current detection system of the present invention has a simple structure and low cost, and is suitable for charging modules of various mobile devices.

[0067] In this specification, the present invention has been described with reference to specific embodiments thereof. However, it is apparent that various modifications and variations may be made without departing from the spirit and scope of the present invention. Therefore, the specification and drawings should be regarded as illustrative rather than restrictive.

Claims

1. A load current detection system, characterized in that: include: Power tube current sampling circuit, current comparison circuit and load current detection circuit, The power tube current sampling circuit is used to sample the load current Iload to generate a load sampling signal V5; The current comparison circuit comprises a first resistor R1, and the magnitude of the voltage V3 at the output end of the current comparison circuit is determined according to the magnitude of the first current I1 passing through the first resistor R1 by the load sampling signal V5; The load current detection circuit includes a switch S1 and a comparator CMP, wherein the switch S1 is turned on and off by the voltage V3 at the output end of the current comparison circuit, the two ends of the switch S1 are respectively connected to the load sampling signal V5 and the positive input end of the comparator CMP, the negative input end of the comparator CMP is connected to the reference voltage Vref, the output end of the comparator CMP outputs a load detection signal Load_detect, and further includes a third resistor R3, wherein one end of the switch S1 connected to the positive input end of the comparator CMP is grounded through the third resistor R3; In the power tube current sampling circuit, the load current Iload is sampled through the power tube N1; the gate of the power tube N1 is connected to the output terminal GATE of the charge pump Chargebump, and is also connected to the gate terminal of the sampling tube N2; the drain of the power tube N1 is connected to the input voltage VIN and the drain of the sampling tube N2; the source of the power tube N1 is connected to the output voltage VOUT; the source of the sampling tube N2 provides the load sampling signal V5; the width-to-length ratio of the power tube N1 and the sampling tube N2 is N:1, The resistance of the first resistor R1 is: R1=(V5-VOUT) / I1 =(Iload×Ron-Ron×N×Vref / R3) / I1, In the above formula, Ron is the on-resistance of the power tube N1. The preset load detection current, ie, the magnitude of the first current I1, is adjusted by adjusting the resistance value of the first resistor R1.

2. The load current detection system according to claim 1, characterized in that: The upper end of the first resistor R1 is connected to the source of the sampling tube N2, the current of the first resistor R1 is the first current I1, and the lower end of the first resistor R1 is connected to the upper end of the fourth resistor R4; The source of the first PMOS transistor P1 is connected to the lower end of the fourth resistor R4; the drain of the PMOS transistor P1 is connected to the output voltage V3 of the current comparison circuit and to the drain of the third NMOS transistor N3; The gate and drain of the second PMOS tube P2 are short-circuited, and the gate of the second PMOS tube P2 is connected to the gate of the first PMOS tube P1 to form a current mirror; the width-to-length ratio of the first and second PMOS tubes P1 and P2 is 1:1; the source of the second PMOS tube P2 is connected to the lower end of the second resistor R2; The upper end of the second resistor R2 is connected to the output voltage VOUT; and the second resistor R2 is the same as the fourth resistor R4; The gate of the third NMOS tube N3 is connected to the gates of the fourth and fifth NMOS tubes N4 and N5, and the width-to-length ratio of the third, fourth and fifth NMOS tubes N3, N4 and N5 is 1:1:1, and the sources of the third, fourth and fifth NMOS tubes N3, N4 and N5 are all grounded; the drain of the fourth NMOS tube N4 is connected to the drain of the second PMOS tube P2; The gate and drain of the fifth NMOS tube N5 are short-circuited to form a current mirror, and the drain of the fifth NMOS tube N5 is connected to an external reference current source ibias.

3. The load current detection system according to claim 2, characterized in that: The switch S1 is a sixth NMOS tube N6, a gate of the sixth NMOS tube N6 is connected to the output voltage V3 of the current comparison circuit, a drain of the sixth NMOS tube N6 is connected to the load sampling signal, a source of the sixth NMOS tube N6 is connected to the positive input terminal of the comparator CMP, and is grounded through the third resistor R3.

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