A time-division multiplexed multi-beam phased array architecture, chip, and electronic device

CN117833968BActive Publication Date: 2026-11-03TSINGHUA UNIVERSITY
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Patent Information

Application Number
CN202410151663.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-02-02
Publication Date
2026-11-03
Estimated Expiration
2044-02-02

AI Technical Summary

Technical Problem

Existing multi-beam millimeter-wave beamforming RF front-end technologies suffer from problems such as large chip area and low efficiency due to power back-off, especially when the number of multi-beam signals increases, it is difficult to guarantee linear signal amplification.

Method used

The system employs a time-division multiplexing multi-beam phased array architecture. Through the design of two beam input interfaces, four phase-shifting attenuation channels, two antenna channels, and a control unit, the system uses the control unit and clock signal to control the on/off state of the channel signals, ensuring that each antenna channel processes the signal from only one beam input interface, thereby achieving power distribution and combining of the two beam signals to the two antenna ports.

Benefits of technology

It effectively avoids the power back-off efficiency problem caused by the increase in beam signal, improves the overall efficiency of the transmitter, and reduces the layout area through compact layout and cross-skip layer design, thereby improving the system symmetry and the linear amplification capability of the signal.

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Abstract

The application provides a time division multiplexing multi-beam phased array architecture, a chip and electronic equipment, and relates to the technical field of antennas. Two beam input interfaces are connected with four phase shift attenuation channels through a power distribution network; the four phase shift attenuation channels are connected with two antenna channels through a power synthesis network; a control unit is connected with the four phase shift attenuation channels and is used for controlling the on-off of the four phase shift attenuation channels, so that only the signal input by any beam input interface is processed at any time. The application adopts a new overall architecture and a brand-new working mode of a front end channel, realizes power distribution and synthesis of multi-beam signals to multi-antenna ports, adds a control unit on each phase shift attenuation channel, controls the on-off of channel signals by a clock signal of a certain frequency, and guarantees that only the power of one beam signal needs to be returned at any time. The multi-beam phased array architecture has high symmetry, small layout area and high efficiency.
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Description

Technical Field

[0001] This invention relates to the field of antenna technology, and more particularly to a time-division multiplexed multi-beam phased array architecture, chip, and electronic device. Background Technology

[0002] In recent years, communication technology has developed rapidly, and people's demand for wireless data transmission rates has been increasing, making system capacity a major bottleneck. Currently, most major commercial communication systems operate below 6 GHz, and increasing the operating frequency is an effective way to solve this bottleneck problem. Over the past decade, millimeter-wave communication technology has developed rapidly, especially phased array technology, which has received widespread attention due to its ability to improve equivalent isotropic radiated power (EIRP), reduce noise figure, and flexibly adjust beam direction.

[0003] Based on traditional phased arrays, multi-beam analog beamforming radio frequency front-end arrays share a single antenna array and simultaneously generate multiple independent communication beams. Without sacrificing beam accuracy, this can greatly improve the efficiency of channel and antenna array utilization, thereby increasing the capacity of the communication system.

[0004] At present, there are still some key technical challenges to be overcome in multi-beam millimeter-wave beamforming RF front-end technology. Due to the complexity of multi-beamforming interconnects, the reported arrays are often small in scale and have a large single-channel chip area.

[0005] For antenna arrays, the spacing between adjacent antenna elements is typically half a wavelength to avoid grating lobes, and the chip area corresponding to each antenna element is fixed. For an N-beam RF front-end, each antenna needs to be connected to N phase-shifting attenuation paths, thus the chip area of ​​each path is severely limited.

[0006] Furthermore, for the transmitter's RF front-end, due to the need to process multiple signals, the equivalent overall peak-to-average power ratio will be higher, meaning the output power needs to be backed up further to ensure linear amplification of the output signal. However, for general amplifiers, the greater the output power back-up, the lower the overall efficiency of the transmitter often is. A key challenge for millimeter-wave multi-beam phased arrays is how to avoid the efficiency problem of power back-up caused by the increase in beam signals. Summary of the Invention

[0007] In view of the above problems, the present invention is proposed to provide a time-division multiplexed multibeam phased array architecture, chip, and electronic device that solves or partially solves the above problems.

[0008] The first aspect of the present invention provides a time-division multiplexing multi-beam phased array architecture, the multi-beam phased array architecture comprising: two beam input interfaces, four phase shift attenuation channels, two antenna channels, and a control unit;

[0009] The two beam input interfaces are connected to the four phase-shift attenuation channels via a power distribution network;

[0010] The four phase-shift attenuation channels are connected to the two antenna channels via a power combining network;

[0011] The control unit is connected to the four phase-shift attenuation channels and is used to control the on / off state of the four phase-shift attenuation channels so that at any given time, each antenna channel processes only the signal input from one of the beam input interfaces.

[0012] Optionally, the two beam input interfaces are located on the left side of the chip layout;

[0013] The four phase-shift attenuation channels are vertically arranged on the chip layout;

[0014] The two antenna channels are located on the right side of the chip layout.

[0015] Optionally, the two beam input interfaces are connected to the four phase-shift attenuation channels via two 1-to-2 power distribution networks;

[0016] The four phase-shift attenuation channels are connected to the two antenna channels via two 2-to-1 power combining networks.

[0017] Optionally, the control unit includes: two inverters and four switches;

[0018] The output of each of the four phase-shift attenuation channels is connected to the power combining network via a switch.

[0019] Two inverters are used to invert the clock signal to send the clock signal and its inverted signal to the target switch group;

[0020] The target switch group consists of two phase-shift attenuation channels connected to the same beam input interface among the four phase-shift attenuation channels, with their respective output terminals connected to switches.

[0021] Optionally, the output of the first phase-shifting attenuation channel, which is connected to the first beam input interface, is connected to the input of the first switch;

[0022] The output terminal of the first switch is connected to the first branch in the power combining network;

[0023] The output of the second phase-shift attenuation channel, which is connected to the first beam input interface, is connected to the input of the second switch.

[0024] The output terminal of the second switch is connected to the second branch of the power combining network;

[0025] The output of the third phase-shift attenuation channel, which is connected to the second beam input interface, is connected to the input of the third switch.

[0026] The output terminal of the third switch is connected to the third branch of the power combining network;

[0027] The output of the fourth phase-shift attenuation channel, which is connected to the second beam input interface, is connected to the input of the fourth switch.

[0028] The output terminal of the fourth switch is connected to the fourth branch of the power combining network;

[0029] The first switch and the fourth switch are controlled by an externally input clock signal and are simultaneously closed or opened.

[0030] The second switch and the third switch are controlled by the inverted signal of the clock signal, and are simultaneously closed or opened, and are always in the opposite state to the first switch and the fourth switch;

[0031] In the power combining network, the end of the first branch is connected to the end of the third branch, and then connected to the first antenna channel.

[0032] After the end of the second branch is connected to the end of the fourth branch, it is connected to the second antenna channel.

[0033] Optionally, cross-skip layers are used at the intersections of the traces in the power distribution network or the power combining network.

[0034] Optionally, all four switches are controlled by a clock signal of a preset frequency;

[0035] At any given time, the target switch group has one switch in a closed state and the other switch in an open state.

[0036] A second aspect of the present invention provides a chip, the chip comprising a time-division multiplexed multibeam phased array architecture as described in any of the first aspects.

[0037] A third aspect of the present invention provides an electronic device, the electronic device comprising a time-division multiplexed multibeam phased array architecture as described in any of the first aspects.

[0038] The time-division multiplexing multi-beam phased array architecture provided by the present invention includes: two beam input interfaces, four phase-shift attenuation channels, two antenna channels, and a control unit; the two beam input interfaces are connected to the four phase-shift attenuation channels through a power distribution network.

[0039] Four phase-shift attenuation channels are connected to two antenna channels via a power combining network; the control unit is connected to the four phase-shift attenuation channels and is used to control the on / off state of the four phase-shift attenuation channels so that at any given time, only the signal input from any one beam input interface is processed.

[0040] The time-division multiplexing multi-beam phased array architecture proposed in this invention differs from the traditional phased array architecture. It creatively adopts a new overall architecture and a completely new working mode for the front-end channels, realizing power distribution and combining of 2 beam signals to 2 antenna ports. A control unit is added to each phase-shift attenuation channel, and the on / off of the channel signal is controlled by a clock signal of a certain frequency. This ensures that at any time, only the power of one beam signal needs to be backed up, that is, it ensures linear signal amplification and avoids the efficiency problem of power back-up caused by the increase of beam signals.

[0041] In addition, the phase-shifting attenuation channels are arranged vertically in sequence, and the surrounding environment has good consistency. The use of cross-skipping layers at the intersection of the power distribution network and the power combining network can better ensure the consistency of the length, resulting in high symmetry of the multi-beam phased array architecture.

[0042] The low-frequency clock signal is integrated inside each phase-shifting attenuation channel. As many multiplexed circuit modules as possible, especially amplifiers and other amplifiers that take up a lot of space and consume a lot of current, are used. The core modules of the phased array, the phase shifters and attenuators, are designed together and laid out tightly. The transmission lines are replaced by a lumped model to save space, which makes the layout area of ​​the multi-beam phased array architecture small.

[0043] A clock signal of a certain frequency controls the on / off state of the channel signals, ensuring that each antenna channel processes only signals from a single beam interface at any given time. This eliminates the need for excessive power back-off at the front end of each antenna channel to achieve linear signal amplification, thus improving overall transmitter efficiency and resulting in a highly efficient multi-beam phased array architecture. Therefore, the time-division multiplexing multi-beam phased array architecture proposed in this invention has extremely high practicality. Attached Figure Description

[0044] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 This is a circuit diagram of a time-division multiplexed multibeam phased array architecture according to an embodiment of the present invention. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] The present invention proposes a time-division multiplexed multi-beam phased array architecture, which includes: two beam input interfaces, four phase-shift attenuation channels, two antenna channels, and a control unit; the two beam input interfaces are connected to the four phase-shift attenuation channels through a power distribution network.

[0048] Four phase-shift attenuation channels are connected to two antenna channels via a power combining network; the control unit is connected to the four phase-shift attenuation channels and is used to control the on / off state of the four phase-shift attenuation channels so that at any given time, only the signal input from any one beam input interface is processed.

[0049] To better explain and illustrate the time-division multiplexing multibeam phased array architecture proposed in this invention, refer to... Figure 1 The diagram shows a circuit structure of a time-division multiplexed multibeam phased array architecture. Figure 1 It includes: two beam input interfaces BEAM1 and BEAM2, four phase shift attenuation channels PSAC1, PSAC2, PSAC3, and PSAC4, two antenna channels T1 and T2, and a control unit. The two antenna channels T1 and T2 are respectively connected to the antenna output interfaces ANT1 and ANT2.

[0050] Figure 1 To more intuitively illustrate the circuit structure, the control unit is exemplified by a structure consisting of switches S1, S2, S3, and S4, and inverters INV1 and INV2. It should be noted that... Figure 1 The connections and components shown are exemplary and do not imply that the time-division multiplexing multi-beam phased array architecture proposed in this invention can only have such connections and components. Any circuit structure or component that can achieve the corresponding function can be replaced based on the technical solution disclosed in this invention. No specific examples are given in the embodiments of this invention.

[0051] In terms of layout, a preferred layout is as follows: the two beam input interfaces BEAM1 and BEAM2 are located on the left side of the chip layout; the four phase shift attenuation channels PSAC1, PSAC2, PSAC3, and PSAC4 are vertically arranged on the chip layout; and the two antenna channels T1 and T2 are located on the right side of the chip layout.

[0052] Two beam input interfaces, BEAM1 and BEAM2, are connected to four phase-shifting attenuation channels, PSAC1, PSAC2, PSAC3, and PSAC4, through two 1-to-2 power distribution networks; the four phase-shifting attenuation channels, PSAC1, PSAC2, PSAC3, and PSAC4, are connected to two antenna channels, T1 and T2, through two 2-to-1 power combining networks.

[0053] The control unit includes: four switches S1, S2, S3, and S4, and two inverters INV1 and INV2. Since the control switches need to control the on / off state of the phase shift attenuation channel, therefore:

[0054] Each of the four phase-shift attenuation channels PSAC1, PSAC2, PSAC3, and PSAC4 requires a switch at its output before being connected to the power combining network; for example... Figure 1 The output of the phase-shift attenuation channel PSAC1 is connected to the power combining network via switch S1; the output of the phase-shift attenuation channel PSAC2 is connected to the power combining network via switch S2; the output of the phase-shift attenuation channel PSAC3 is connected to the power combining network via switch S3; and the output of the phase-shift attenuation channel PSAC4 is connected to the power combining network via switch S4.

[0055] The four phase-shifting attenuation channels, PSAC1, PSAC2, PSAC3, and PSAC4, are arranged vertically in sequence, ensuring good consistency with the surrounding environment. The low-frequency clock signal is integrated within each phase-shifting attenuation channel. As many circuit modules as possible are multiplexed, especially amplifiers, which consume significant space and current. The core modules of the phased array—the phase shifters and attenuators—are designed together and compactly arranged. A lumped model is used for transmission lines to save space, resulting in a small footprint for the multi-beam phased array architecture.

[0056] Two inverters are used to invert the clock signal CLK, sending the clock signal CLK and its inverted form to the target switch group. The target switch group refers to two phase-shift attenuation channels connected to the same beam input interface out of the four phase-shift attenuation channels, with their respective outputs connected to switches. Specifically, switches S1 and S2 form one target switch group, and switches S3 and S4 form another.

[0057] The output of the first phase-shifting attenuation channel PSAC1, which is connected to the first beam input interface BEAM1, is connected to the input of the first switch S1; the output of the first switch S1 is connected to the first branch A1 in the power combining network.

[0058] The output of the second phase-shifting attenuation channel PSAC2, which is connected to the first beam input interface BEAM1, is connected to the input of the second switch S2; the output of the second switch S2 is connected to the second branch A2 of the power combining network.

[0059] The output of the third phase-shifting attenuation channel PSAC3, which is connected to the second beam input interface BEAM2, is connected to the input of the third switch S3; the output of the third switch S3 is connected to the third branch A3 of the power combining network.

[0060] The output of the fourth phase-shifting attenuation channel PSAC4, which is connected to the second beam input interface BEAM2, is connected to the input of the fourth switch S4; the output of the fourth switch S4 is connected to the fourth branch of the power combining network S4.

[0061] In this configuration, the first switch S1 and the fourth switch S4 are controlled by the externally input clock signal CLK, and are simultaneously closed or opened; the second switch S2 and the third switch S3 are controlled by the inverted signal of the clock signal CLK, and are simultaneously closed or opened, and are always in the opposite state to the first switch S1 and the fourth switch S4. That is, all four switches S1, S2, S3, and S4 are controlled by the clock signal CLK of a preset frequency. The difference is that after the clock signal CLK is inverted by the two inverters INV1 and INV2, it generates two in-phase clock signals and two inverted clock signals, which are used to control the four switches respectively.

[0062] Therefore, for any target switch group, at any given time, one switch is in the closed state and the other switch is in the open state. That is, when the first switch S1 is closed, the second switch S2 is open; when the first switch S1 is open, the second switch S2 is closed. Similarly, when the third switch S3 is closed, the fourth switch S4 is open; and when the third switch S3 is open, the fourth switch S4 is closed. Furthermore, the first switch S1 and the third switch S3 are closed or open simultaneously, and the second switch S2 and the fourth switch S4 are closed or open simultaneously.

[0063] By implementing the control method described above, a control unit is added to each phase-shift attenuation channel. The on / off state of the channel signal is controlled by a clock signal of a certain frequency. This ensures that only one beam signal power needs to be backed up at any given time, thus guaranteeing linear signal amplification. The front end of each antenna channel does not need to back up more power to meet the linear signal amplification requirement. This is beneficial to improving the overall transmitter efficiency and avoids the efficiency problem of power back-up caused by the increase of beam signals, resulting in high efficiency of the multi-beam phased array architecture.

[0064] In a power combining network, a preferred connection method is as follows: the end of the first branch A1 in the power combining network is connected to the end of the third branch A3 in the power combining network, and then connected to the first antenna channel T1; the end of the second branch A2 in the power combining network is connected to the end of the fourth branch A4 in the power combining network, and then connected to the second antenna channel T2.

[0065] Based on the above connection methods, combined with Figure 1 It can be seen that cross-skipping layers can be used at the intersections of the traces in the power distribution network or the power combining network. Using cross-skipping layers at the intersections of the traces in the power distribution network and the power combining network can better ensure the consistency of the trace length, thereby making the multi-beam phased array architecture highly symmetric.

[0066] Based on the aforementioned time-division multiplexing multi-beam phased array architecture, simulations and tests in the millimeter-wave Ka-band showed that the antenna of the proposed time-division multiplexing multi-beam phased array architecture can operate in the range of 25GHz-31GHz. In the Ka-band, this type of phased array chip layout can achieve good time-division multiplexing effects within a compact layout area, resulting in a significant improvement in transmitter efficiency. This verifies the practicality of the proposed time-division multiplexing multi-beam phased array architecture.

[0067] Based on the above time-division multiplexing multi-beam phased array architecture, the present invention also proposes a chip, the chip comprising the time-division multiplexing multi-beam phased array architecture as described above.

[0068] Based on the time-division multiplexing multi-beam phased array architecture described above, the present invention also proposes an electronic device, the electronic device comprising the time-division multiplexing multi-beam phased array architecture as described above.

[0069] Through the above examples, the time-division multiplexing multi-beam phased array architecture proposed in this invention includes: two beam input interfaces, four phase-shift attenuation channels, two antenna channels, and a control unit; the two beam input interfaces are connected to the four phase-shift attenuation channels through a power distribution network.

[0070] Four phase-shift attenuation channels are connected to two antenna channels via a power combining network; the control unit is connected to the four phase-shift attenuation channels and is used to control the on / off state of the four phase-shift attenuation channels so that at any given time, only the signal input from any one beam input interface is processed.

[0071] The time-division multiplexing multi-beam phased array architecture proposed in this invention differs from the traditional phased array architecture. It creatively adopts a new overall architecture and a completely new working mode for the front-end channels, realizing power distribution and combining of 2 beam signals to 2 antenna ports. A control unit is added to each phase-shift attenuation channel, and the on / off of the channel signal is controlled by a clock signal of a certain frequency. This ensures that at any time, only the power of one beam signal needs to be backed up, that is, it ensures linear signal amplification and avoids the efficiency problem of power back-up caused by the increase of beam signals.

[0072] In addition, the phase-shifting attenuation channels are arranged vertically in sequence, and the surrounding environment has good consistency. The use of cross-skipping layers at the intersection of the power distribution network and the power combining network can better ensure the consistency of the length, resulting in high symmetry of the multi-beam phased array architecture.

[0073] The low-frequency clock signal is integrated inside each phase-shifting attenuation channel. As many multiplexed circuit modules as possible, especially amplifiers and other amplifiers that take up a lot of space and consume a lot of current, are used. The core modules of the phased array, the phase shifters and attenuators, are designed together and laid out tightly. The transmission lines are replaced by a lumped model to save space, which makes the layout area of ​​the multi-beam phased array architecture small.

[0074] A clock signal of a certain frequency controls the on / off state of the channel signals, ensuring that each antenna channel processes only signals from a single beam interface at any given time. This eliminates the need for excessive power back-off at the front end of each antenna channel to achieve linear signal amplification, thus improving overall transmitter efficiency and resulting in a highly efficient multi-beam phased array architecture. Therefore, the multi-beam phased array architecture proposed in this invention has extremely high practicality.

[0075] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0076] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A time-division multiplexed multi-beam phased array architecture, characterized in that, The multi-beam phased array architecture includes: two beam input interfaces, four phase shift attenuation channels, two antenna channels, and a control unit; The two beam input interfaces are connected to the four phase-shift attenuation channels via a power distribution network; The four phase-shift attenuation channels are connected to the two antenna channels via a power combining network; The control unit is connected to the four phase-shift attenuation channels and is used to control the on / off state of the four phase-shift attenuation channels so that at any given time, each antenna channel processes only the signal input from one of the beam input interfaces. The control unit includes two inverters and four switches; the output of each of the four phase-shift attenuation channels is connected to the power combining network via a switch; the two inverters are used to invert the clock signal to send the clock signal and the inverted clock signal to the target switch group; wherein, the target switch group consists of two phase-shift attenuation channels connected to the same beam input interface, and the switches are connected to the outputs of their respective channels.

2. The multi-beam phased array architecture according to claim 1, characterized in that, The two beam input interfaces are located on the left side of the chip layout; The four phase-shift attenuation channels are vertically arranged on the chip layout; The two antenna channels are located on the right side of the chip layout.

3. The multi-beam phased array architecture according to claim 2, characterized in that, The two beam input interfaces are connected to the four phase-shift attenuation channels via two 1-to-2 power distribution networks; The four phase-shift attenuation channels are connected to the two antenna channels via two 2-to-1 power combining networks.

4. The multi-beam phased array architecture according to claim 1, characterized in that, The output of the first phase-shifting attenuation channel, which is connected to the first beam input interface, is connected to the input of the first switch. The output terminal of the first switch is connected to the first branch in the power combining network; The output of the second phase-shift attenuation channel, which is connected to the first beam input interface, is connected to the input of the second switch. The output terminal of the second switch is connected to the second branch of the power combining network; The output of the third phase-shift attenuation channel, which is connected to the second beam input interface, is connected to the input of the third switch. The output terminal of the third switch is connected to the third branch of the power combining network; The output of the fourth phase-shift attenuation channel, which is connected to the second beam input interface, is connected to the input of the fourth switch. The output terminal of the fourth switch is connected to the fourth branch of the power combining network.

5. The multi-beam phased array architecture according to claim 4, characterized in that, The first switch and the fourth switch are controlled by an externally input clock signal, and are simultaneously closed or opened; The second switch and the third switch are controlled by the inverted signal of the clock signal, and are simultaneously closed or opened, and are always in the opposite state to the first switch and the fourth switch; In the power combining network, the end of the first branch is connected to the end of the third branch, and then connected to the first antenna channel. After the end of the second branch is connected to the end of the fourth branch, it is connected to the second antenna channel.

6. The multi-beam phased array architecture according to claim 1, characterized in that, At the intersection of the traces in the power distribution network or the power combining network, cross-skip layers are used.

7. The multi-beam phased array architecture according to claim 1, characterized in that, All four switches are controlled by a clock signal of a preset frequency; At any given time, the target switch group has one switch in a closed state and the other switch in an open state.

8. A chip, characterized in that, The chip includes a time-division multiplexed multibeam phased array architecture as described in any one of claims 1-7.

9. An electronic device, characterized in that, The electronic device includes a time-division multiplexed multibeam phased array architecture as described in any one of claims 1-7.

Citation Information

Patent Citations

  • Phased array radio frequency multi-beam forming network and control method

    CN114460544A