Anti-reverse current circuit and power supply

Abstract

This invention provides an anti-reverse current circuit and power supply. The anti-reverse current circuit includes: a comparison module, a duty cycle determination module, and a drive module. The comparison module receives the sampled output current of the power supply at its input terminal and outputs a comparison signal based on the output current. The comparison signal indicates whether reverse current has occurred. The duty cycle determination module receives a preset PWM signal at its first input terminal, a loop PWM signal generated by the power supply's control loop at its second input terminal, a comparison signal at its control terminal, and a target duty cycle signal at its output terminal. The drive module generates a drive signal for the power supply based on the target duty cycle signal. This invention eliminates the need to modify the power supply's loop control parameters. When reverse current occurs, it switches to the preset PWM signal's duty cycle via hardware, increasing the power supply's output current to suppress reverse current. After reverse current disappears, it automatically switches back to the normal loop. The control method is simple, does not affect the power supply's normal loop, and effectively suppresses current reverse current.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and in particular to an anti-reverse current circuit and power supply. Background Technology

[0002] For PWM-controlled power supplies, a large capacitor is typically installed at the output terminal. When the power supply starts up slowly in parallel, the actual output voltage of the power supply is greater than the rated output voltage due to the voltage across the capacitor, resulting in reverse current flow.

[0003] In existing technologies, when reverse current occurs, the control parameters of the control loop are typically adjusted to increase the rated output current of the power supply to suppress the reverse current; once the reverse current disappears, the control parameters of the control loop are restored to normal. This process requires exiting the normal control loop, making parameter adjustment difficult and prone to causing power supply fluctuations. Summary of the Invention

[0004] This invention provides an anti-reverse current circuit and power supply to solve the problem in the prior art where adjusting the control parameters of the control loop to suppress current reverse current is difficult and can easily cause power fluctuations.

[0005] In a first aspect, embodiments of the present invention provide an anti-reverse power supply circuit; the circuit includes: a comparison module, a duty cycle determination module, and a driving module;

[0006] The input terminal of the comparator module is used to input the output current of the sampled power supply. The comparator module outputs a comparison signal based on the output current. When the comparison signal is in the first state, it indicates that reverse current has occurred. When the comparison signal is in the second state, it indicates that reverse current has not occurred.

[0007] The first input terminal of the duty cycle determination module is used to input a preset PWM signal, the second input terminal of the duty cycle determination module is used to input the loop PWM signal generated by the control loop of the power supply, the control terminal of the duty cycle determination module inputs a comparison signal, and the output terminal of the duty cycle determination module outputs the target duty cycle signal.

[0008] The drive module is used to generate a power drive signal based on the target duty cycle signal;

[0009] Specifically, when the comparison signal is in the first state, the duty cycle of the power supply drive signal is equal to the duty cycle of the preset PWM signal; when the comparison signal is in the second state, the duty cycle of the power supply drive signal is equal to the duty cycle of the loop PWM signal; and the duty cycle of the loop PWM signal is less than the duty cycle of the preset PWM signal.

[0010] Optionally, the first state is high level and the second state is low level; the duty cycle determination module includes: AND gate and OR gate;

[0011] The first input terminal of the AND gate is connected to the control terminal of the duty cycle determination module, the second input terminal of the AND gate is connected to the first input terminal of the duty cycle determination module, and the output terminal of the AND gate is connected to the first input terminal of the OR gate.

[0012] The second input terminal of the OR gate is connected to the second input terminal of the duty cycle determination module, and the output terminal of the OR gate is connected to the output terminal of the duty cycle determination module.

[0013] The loop PWM signal and the preset PWM signal have the same period, and the start and end points of each period are also the same.

[0014] Optionally, the first state is a first level and the second state is a second level; the comparison module includes: a hysteresis comparator;

[0015] The input of the hysteresis comparator is connected to the input of the comparison module, and the output of the hysteresis comparator is connected to the output of the comparison module.

[0016] If the current comparison signal is at the first level and the sampled output current of the power supply is greater than the first preset current, the comparator signal switches to the second level; otherwise, the comparison signal remains at the first level.

[0017] If the current comparison signal is at the second level and the sampled output current of the power supply is less than the second preset current, then the comparison signal switches to the first level; otherwise, the comparison signal remains at the second level.

[0018] The first preset current is greater than the second preset current.

[0019] Optionally, the first preset current is equal to 0, and the second preset current is less than 0.

[0020] Optionally, the first state is a first level, and the second state is a second level; the comparison module includes: a comparator;

[0021] The first input terminal of the comparator is connected to the input terminal of the comparison module, the second input terminal of the comparator is used to input the reference signal, and the output terminal of the comparator is connected to the output terminal of the comparison module.

[0022] If the output current of the sampled power supply is greater than the third preset current, the comparison signal is at the second level; otherwise, the comparison signal is at the first level.

[0023] Optionally, the duty cycle of the preset PWM signal is the maximum duty cycle allowed by the power supply.

[0024] Optional, the power supply includes: a synchronous rectification circuit.

[0025] Optionally, the power supply drive signals include: a first drive signal and a second drive signal; the synchronous rectification circuit includes: a first rectifier bridge, a second rectifier bridge, and a transformer;

[0026] The input terminal of the first rectifier bridge is used to connect to the DC power supply, and the output terminal of the first rectifier bridge is connected to the primary side of the transformer.

[0027] The input terminal of the second rectifier bridge is connected to the secondary side of the transformer, and the output terminal of the second rectifier bridge is connected to the load.

[0028] The first driving signal is used to drive the first rectifier bridge, and the second driving signal is used to drive the second rectifier bridge. The duty cycles of the first driving signal and the second driving signal are the same.

[0029] Optionally, the circuit may also include: a current sampling module;

[0030] The current sampling module is used to sample the output current of the power supply and send the sampled output current of the power supply to the input terminal of the comparison module.

[0031] Secondly, embodiments of the present invention provide a power supply system, including: a power supply and an anti-reverse current circuit as provided in any of the above embodiments.

[0032] This invention provides an anti-reverse current circuit and a power supply. The anti-reverse current circuit is applied to the power supply. The circuit includes a comparison module, a duty cycle determination module, and a drive module. The input terminal of the comparison module is used to input the sampled output current of the power supply, and the comparison module outputs a comparison signal based on the output current. When the comparison signal is in a first state, it indicates that reverse current has occurred; when the comparison signal is in a second state, it indicates that reverse current has not occurred. The first input terminal of the duty cycle determination module is used to input a preset PWM signal, and the second input terminal is used to input a loop PWM signal generated by the control loop of the power supply. The control terminal of the duty cycle determination module inputs the comparison signal, and the output terminal of the duty cycle determination module outputs a target duty cycle signal. The drive module generates a drive signal for the power supply based on the target duty cycle signal. When the comparison signal is in the first state, the duty cycle of the drive signal is equal to the duty cycle of the preset PWM signal; when the comparison signal is in the second state, the duty cycle of the drive signal is equal to the duty cycle of the loop PWM signal; the duty cycle of the loop PWM signal is less than the duty cycle of the preset PWM signal. In this embodiment of the invention, when reverse current flow occurs, the duty cycle of the power supply's drive signal (preset PWM signal duty cycle) is automatically increased by hardware to raise the power supply's rated output current and suppress reverse current flow. After the reverse current flow disappears, the system automatically switches back to the normal control loop and resumes normal operation. In this embodiment of the invention, the anti-reverse current flow circuit (hardware) and the normal control loop (software) work together without requiring modification of the control loop parameters, and do not affect the normal control loop of the power supply. Reverse current flow can be effectively suppressed with simple hardware, making the control simple and easy to implement. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the circuit structure of an anti-reverse current circuit provided in an embodiment of the present invention;

[0035] Figure 2 This is a circuit schematic diagram of a duty cycle determination module and a driving module provided in an embodiment of the present invention;

[0036] Figure 3 This is a circuit schematic diagram of a synchronous rectification circuit provided in an embodiment of the present invention. Detailed Implementation

[0037] To enable those skilled in the art to better understand this solution, the technical solutions in the embodiments of this solution will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this solution, not all of them. Based on the embodiments of this solution, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this solution.

[0038] The term "comprising" and any other variations thereof in the specification, claims, and accompanying drawings of this invention mean "including but not limited to," and are intended to cover a non-exclusive inclusion, not limited to the examples listed herein. Furthermore, the terms "first" and "second," etc., are used to distinguish different objects, not to describe a specific order.

[0039] The implementation of the present invention will be described in detail below with reference to the accompanying drawings:

[0040] Figure 1 This is a schematic diagram of an anti-reverse current circuit provided in an embodiment of the present invention. (Refer to...) Figure 1 The anti-reverse current circuit is applied to the power supply; the circuit includes: a comparison module 11, a duty cycle determination module 12, and a drive module 13;

[0041] The input terminal of the comparison module 11 is used to input the output current of the power supply obtained by sampling. The comparison module 11 outputs a comparison signal based on the output current. When the comparison signal is in the first state, it indicates that reverse feeding has occurred. When the comparison signal is in the second state, it indicates that reverse feeding has not occurred.

[0042] The first input terminal of the duty cycle determination module 12 is used to input the preset PWM signal PWM1, the second input terminal of the duty cycle determination module 12 is used to input the loop PWM signal PWM2 generated by the control loop of the power supply, the control terminal of the duty cycle determination module 12 inputs a comparison signal, and the output terminal of the duty cycle determination module 12 outputs the target duty cycle signal.

[0043] The drive module 13 is used to generate a power drive signal based on the target duty cycle signal;

[0044] Specifically, when the comparison signal is in the first state, the duty cycle of the power supply drive signal is equal to the duty cycle of the preset PWM signal PWM1; when the comparison signal is in the second state, the duty cycle of the power supply drive signal is equal to the duty cycle of the loop PWM signal PWM2; and the duty cycle of the loop PWM signal PWM2 is less than the duty cycle of the preset PWM signal PWM1.

[0045] In this embodiment of the invention, reference is made to Figure 1The comparison module 11 detects the magnitude of the power supply's output current, and the duty cycle determination module 12 outputs a target duty cycle signal based on the duty cycle. Then, a drive signal for the power supply is generated based on the target duty cycle signal. During reverse current surge, the target duty cycle signal is the duty cycle of a preset PWM signal PWM1. The duty cycle of the power supply's drive signal is increased to the duty cycle of the preset PWM signal PWM1, increasing the power supply's rated output current and suppressing reverse current surge. When the power supply's output current returns to normal and the reverse current surge disappears, the target duty cycle signal becomes the duty cycle of the loop PWM signal PWM2. The duty cycle of the power supply's drive signal automatically switches to the duty cycle of the loop PWM signal PWM2, restoring normal loop control. In this embodiment of the invention, the anti-reverse current surge circuit (hardware) and the normal control loop (software) work together without modifying the parameters of the control loop, without affecting the normal control loop of the power supply. Reverse current surge can be effectively suppressed with simple hardware, making control simple and easy to implement.

[0046] In one possible implementation, the first state is high level and the second state is low level; Reference Figure 2 The duty cycle determination module 12 may include: AND gates and OR gates;

[0047] The first input terminal of the AND gate is connected to the control terminal of the duty cycle determination module 12, the second input terminal of the AND gate is connected to the first input terminal of the duty cycle determination module 12, and the output terminal of the AND gate is connected to the first input terminal of the OR gate.

[0048] The second input terminal of the OR gate is connected to the second input terminal of the duty cycle determination module 12, and the output terminal of the OR gate is connected to the output terminal of the duty cycle determination module 12.

[0049] Among them, the loop PWM signal PWM2 and the preset PWM signal PWM1 have the same period, and the start and end points of each period are also the same.

[0050] In this embodiment of the invention, the first state is a high level and the second state is a low level.

[0051] When reverse power flow occurs, the comparison signal is high, and the AND gate outputs a preset PWM signal PWM1. The preset PWM signal PWM1 and the loop PWM signal PWM2 are output through an OR gate. Since the two PWM signals have the same period and the same start and end points, and the preset PWM signal PWM1 has a larger duty cycle, the OR gate outputs a preset PWM signal PWM1 with a larger duty cycle. The drive module 13 generates the power supply drive signal based on the preset PWM signal PWM1, increasing the rated output current of the power supply and suppressing reverse power flow.

[0052] When the reverse flow disappears, the comparison signal is low, the AND gate outputs a low level, and the OR gate outputs the loop PWM signal PWM2. The drive module 13 generates the power supply drive signal based on the loop PWM signal PWM2, and the power supply returns to the normal control loop.

[0053] It should be noted that the power supply has multiple drive signals, which are used to drive the various switching transistors in the power supply.

[0054] In one possible implementation, the first state is a first level and the second state is a second level; the comparison module 11 may include a comparator;

[0055] The first input terminal of the comparator is connected to the input terminal of the comparison module 11, the second input terminal of the comparator is used to input the reference signal, and the output terminal of the comparator is connected to the output terminal of the comparison module 11.

[0056] If the output current of the sampled power supply is greater than the third preset current, the comparison signal is at the second level; otherwise, the comparison signal is at the first level.

[0057] In this embodiment of the invention, a comparator is used to implement the comparison module 11. The reference signal corresponds to the third preset current. When the output current of the power supply is greater than the third preset current, the comparator outputs the second level; otherwise, it outputs the first level to determine whether there is reverse current.

[0058] For example, the third preset current is 0. The power supply output direction is positive. When reverse current occurs, the power supply output current is less than 0, and the comparison signal is at the first level; when the power supply's rated output current is greater than 0, the comparison signal is at the second level.

[0059] For example, the first level is high and the second level is low; the first input terminal of the comparator is the negative input terminal and the second input terminal of the comparator is the positive input terminal. When the output current of the power supply is greater than the third preset current, the comparator outputs a low level, indicating no reverse current; when the output current of the power supply is not greater than the third preset current, the comparator outputs a high level, indicating reverse current.

[0060] In one possible implementation, the first state is a first level and the second state is a second level; the comparison module 11 may include a hysteresis comparator;

[0061] The input terminal of the hysteresis comparator is connected to the input terminal of the comparison module 11, and the output terminal of the hysteresis comparator is connected to the output terminal of the comparison module 11.

[0062] If the current comparison signal is at the first level and the sampled output current of the power supply is greater than the first preset current, the comparator signal switches to the second level; otherwise, the comparison signal remains at the first level.

[0063] If the current comparison signal is at the second level and the sampled output current of the power supply is less than the second preset current, then the comparison signal switches to the first level; otherwise, the comparison signal remains at the second level.

[0064] The first preset current is greater than the second preset current.

[0065] To avoid frequent switching of the duty cycle of the power supply's drive signal when the power supply's output current is near the third preset current, the comparison module 11 in this embodiment of the invention is implemented using a hysteresis comparator. By setting the hysteresis interval, frequent switching of the duty cycle of the power supply's drive signal can be avoided, thereby improving the stability of the circuit.

[0066] In one possible embodiment, the first preset current can be equal to 0, and the second preset current can be less than 0.

[0067] When the power supply output current is detected to be less than 0, it indicates reverse current feeding. Increasing the duty cycle will cause the power supply output current to begin to shift in the positive direction. When it equals 0, it indicates that reverse current feeding has been suppressed and normal loop control can be restored.

[0068] The values ​​of the first preset current and the second preset current can be set according to actual application requirements, and are not limited to the values ​​mentioned above.

[0069] In one possible embodiment, the duty cycle of the preset PWM signal PWM1 is the maximum duty cycle allowed by the power supply.

[0070] In this embodiment of the invention, when reverse current is detected, the duty cycle of the power supply is increased to the maximum within a safe range to pull the current in the positive direction as quickly as possible, thereby reducing the reverse current time and lowering the risk of power supply failure.

[0071] In one possible embodiment, reference Figure 3 The power supply may include: a synchronous rectifier circuit.

[0072] In one possible implementation, the power supply drive signal may include: a first drive signal and a second drive signal; the synchronous rectification circuit includes: a first rectifier bridge 21, a second rectifier bridge 22, and a transformer T;

[0073] The input terminal of the first rectifier bridge 21 is used to connect to the DC power supply, and the output terminal of the first rectifier bridge 21 is connected to the primary side of the transformer T.

[0074] The input terminal of the second rectifier bridge 22 is connected to the secondary side of the transformer T, and the output terminal of the second rectifier bridge 22 is connected to the load.

[0075] The first driving signal is used to drive the first rectifier bridge 21, and the second driving signal is used to drive the second rectifier bridge 22. The duty cycles of the first driving signal and the second driving signal are the same.

[0076] The above-mentioned anti-backflow circuit can be applied to a synchronous rectifier circuit, where the first rectifier bridge 21 and the second rectifier bridge 22 perform synchronous rectification with the same duty cycle.

[0077] Specifically, Figure 2 The circuit structure of the drive module 13 is shown. The first drive signal includes two signals (PWM_11 and PWM_12). PWM_11 drives Q1 and Q3, and PWM_12 drives Q2 and Q4. PWM_12 can be obtained by delaying PWM_11.

[0078] The second drive signal includes two (PWM_21 and PWM_22); among them, PWM_21 drives Q5 and Q8, and PWM_22 drives Q6 and Q7. PWM_21 can be obtained by delaying PWM_22 by a preset time.

[0079] refer to Figure 2 and Figure 3 PWM_21, PWM_22, PWM_11, and PWM_12 jointly drive eight switches (Q1, Q2, Q3, Q4, Q5, Q6, Q7, and Q8) on the first and second rectifier bridges 21 and 22 to achieve synchronous rectification. When reverse current is detected, the duty cycle of each switch is increased to increase the output current of the synchronous rectification circuit and suppress reverse current. For the specific circuit of the drive module 13, refer to [reference needed]. Figure 2 This will not be elaborated upon here.

[0080] In one possible implementation, refer to Figure 3 The circuit may also include: a current sampling module 14;

[0081] The current sampling module 14 is used to sample the output current of the power supply and send the sampled output current of the power supply to the input terminal of the comparison module 11.

[0082] This embodiment of the invention also includes a current sampling module 14 for sampling the output current of the power supply. For example, refer to... Figure 3 The diagram illustrates the circuit structure of a current sampling module 14, which samples the output current of the power supply through a current transformer; the details will not be elaborated here.

[0083] Corresponding to the above embodiments, this invention also provides a power supply system, including a power supply and an anti-reverse current circuit provided in any of the above embodiments, and has the advantages of the above embodiments, which will not be described in detail here.

[0084] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit for preventing reverse backflow, characterized in that, Applied to power supplies; the above circuit includes: a comparison module, a duty cycle determination module, and a drive module; The input terminal of the comparison module is used to input the sampled output current of the power supply, and the comparison module outputs a comparison signal based on the output current; wherein, when the comparison signal is in a first state, it indicates that reverse feeding has occurred; when the comparison signal is in a second state, it indicates that reverse feeding has not occurred; The first input terminal of the duty cycle determination module is used to input a preset PWM signal, the second input terminal of the duty cycle determination module is used to input the loop PWM signal generated by the control loop of the power supply, the control terminal of the duty cycle determination module inputs the comparison signal, and the output terminal of the duty cycle determination module outputs the target duty cycle signal. The driving module is used to generate a driving signal for the power supply based on the target duty cycle signal; Wherein, when the comparison signal is in the first state, the duty cycle of the power supply drive signal is equal to the duty cycle of the preset PWM signal; when the comparison signal is in the second state, the duty cycle of the power supply drive signal is equal to the duty cycle of the loop PWM signal; the duty cycle of the loop PWM signal is less than the duty cycle of the preset PWM signal; The first state is a high level, and the second state is a low level; the duty cycle determination module includes: AND gates and OR gates; The first input terminal of the AND gate is connected to the control terminal of the duty cycle determination module, the second input terminal of the AND gate is connected to the first input terminal of the duty cycle determination module, and the output terminal of the AND gate is connected to the first input terminal of the OR gate. The second input terminal of the OR gate is connected to the second input terminal of the duty cycle determination module, and the output terminal of the OR gate is connected to the output terminal of the duty cycle determination module. The loop PWM signal and the preset PWM signal have the same period, and the start and end points of each period are also the same.

2. The anti-reverse current circuit as described in claim 1, characterized in that, The first state is a first level, and the second state is a second level; the comparison module includes: a hysteresis comparator; The input terminal of the hysteresis comparator is connected to the input terminal of the comparison module, and the output terminal of the hysteresis comparator is connected to the output terminal of the comparison module. If the current comparison signal is at the first level and the sampled output current of the power supply is greater than the first preset current, then the comparison signal switches to the second level; otherwise, the comparison signal remains at the first level. If the current comparison signal is at the second level and the sampled output current of the power supply is less than the second preset current, then the comparison signal switches to the first level; otherwise, the comparison signal remains at the second level. Wherein, the first preset current is greater than the second preset current.

3. The anti-reverse current circuit as described in claim 2, characterized in that, The first preset current is equal to 0, and the second preset current is less than 0.

4. The anti-reverse current circuit as described in claim 1, characterized in that, The first state is a first level, and the second state is a second level; the comparison module includes a comparator; The first input terminal of the comparator is connected to the input terminal of the comparison module, the second input terminal of the comparator is used to input a reference signal, and the output terminal of the comparator is connected to the output terminal of the comparison module. If the output current of the power supply obtained by sampling is greater than the third preset current, then the comparison signal is the second level; otherwise, the comparison signal is the first level.

5. The anti-reverse current circuit as described in any one of claims 1 to 4, characterized in that, The duty cycle of the preset PWM signal is the maximum duty cycle allowed by the power supply.

6. The anti-reverse current circuit as described in any one of claims 1 to 4, characterized in that, The power supply includes a synchronous rectification circuit.

7. The anti-reverse current circuit as described in claim 6, characterized in that, The power supply's drive signals include: a first drive signal and a second drive signal; the synchronous rectification circuit includes: a first rectifier bridge, a second rectifier bridge, and a transformer; The input terminal of the first rectifier bridge is used to connect to a DC power supply, and the output terminal of the first rectifier bridge is connected to the primary side of the transformer. The input terminal of the second rectifier bridge is connected to the secondary side of the transformer, and the output terminal of the second rectifier bridge is connected to the load. Wherein, the first driving signal is used to drive the first rectifier bridge, the second driving signal is used to drive the second rectifier bridge, and the first driving signal and the second driving signal have the same duty cycle.

8. The anti-reverse current circuit as described in any one of claims 1 to 4, characterized in that, The circuit also includes: a current sampling module; The current sampling module is used to sample the output current of the power supply and send the sampled output current of the power supply to the input terminal of the comparison module.

9. A power supply system, characterized in that, include: The power supply and the anti-reverse current circuit as described in any one of claims 1 to 8.

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