A bandgap reference source for MEMS magnetoresistive sensor interface circuit

Abstract

The present invention discloses a bandgap reference source applied to a MEMS magnetoresistive sensor interface circuit, comprising: a startup circuit module, a PTAT current generating circuit module, a V-curve compensation structure module, a bias circuit module and an operational amplifier module; the startup circuit module is used to connect with the PTAT current generating circuit module to provide current; the PTAT current generating circuit module is used to generate a circuit for the PTAT current required in the bandgap reference source and is connected with the V-curve compensation circuit module; the V-curve compensation structure module is used to perform temperature compensation by adjusting the width-to-length ratio of the relevant transistor in the current mirror; the bias circuit module is used to provide tail current to the operational amplifier module; the operational amplifier module is used to adjust the output terminal voltage of the V-curve compensation structure module and the bias circuit module. The reference voltage output by the present invention has low noise and low temperature coefficient.

Description

Technical Field

[0001] The invention belongs to the technical field of bandgap reference design in a sensor interface circuit, and in particular relates to a bandgap reference source applied to a MEMS magnetoresistive sensor interface circuit. Background Art

[0002] In the data acquisition system, whether the output signal of the magnetoresistive sensor can be amplified normally by the interface circuit and the subsequent data processing will directly affect the measurement results of the system. Therefore, it is necessary to separate and amplify the output signal of the sensor from the noise and offset voltage, and finally obtain the amplified signal. The output noise of the sensor is generally in the low-frequency band. At present, the self-zeroing technology is basically used to store and release the offset and noise through the capacitor at different phases, and finally eliminate the offset and low-frequency noise. However, since the self-zeroing technology is a sampling technology, since the bandwidth of thermal noise is often greater than the sampling frequency, noise aliasing is inevitable. At the same time, since this technology involves sampling and holding, it will increase the complexity of circuit design. Summary of the invention

[0003] In order to solve the above technical problems, the present invention proposes a bandgap reference source applied to a MEMS magnetoresistive sensor interface circuit. The bandgap reference uses a chopper stabilization technology and a V-curve compensation technology, so that the output reference voltage has low noise and a low temperature coefficient, which can meet the requirements of the MEMS magnetoresistive sensor interface circuit.

[0004] To achieve the above object, the present invention provides a bandgap reference source applied to a sensor interface circuit, comprising:

[0005] A startup circuit module, a PTAT current generating circuit module, a V curve compensation structure module, a bias circuit module and an operational amplifier module;

[0006] The startup circuit module is used to connect with the PTAT current generating circuit module to provide current;

[0007] The PTAT current generating circuit module is a circuit for generating the PTAT current required in the bandgap reference source and is connected to the V-curve compensation circuit module;

[0008] The V curve compensation structure module is used to perform temperature compensation by adjusting the width-to-length ratio of the relevant transistors in the current mirror;

[0009] The bias circuit module is used to provide tail current to the operational amplifier module;

[0010] The operational amplifier module is used to adjust the output terminal voltages of the V-curve compensation structure module and the bias circuit module.

[0011] Optionally, the startup circuit includes a capacitor C S , transistor M S1 , transistor M S2 , transistor M S3 , transistor M S4 and transistor M S5 ;

[0012] The capacitor C S With the transistor M S1 series, further with the transistor M S3 in parallel;

[0013] The transistor M S1 and the transistor M S2 Series connection;

[0014] The transistor M S2 With the transistor M S5 series, further with the transistor M S4 Series connection.

[0015] Optionally, the PTAT current generating circuit module includes: a transistor M P1 , transistor M P2 , chopper op amp structure, resistor R2, junction voltage V EB1 , junction voltage V EB2 , transistor Q1 and transistor Q2;

[0016] The transistor M P1 , the resistor R2, the transistor Q1 and the junction voltage V EB1 Connect in series to obtain a first circuit;

[0017] The transistor M P2 , the transistor Q1 is connected in series with the junction voltage V EB2 Connect in series to obtain a second circuit;

[0018] The transistor Q1 and the transistor Q2 are connected in series;

[0019] The first circuit and the second circuit are connected in parallel via the chopper operational amplifier structure;

[0020] Optionally, the V curve compensation structure module includes: a transistor M P3 , transistor M P4 , transistor M P5 , transistor M P6 , transistor M P7 , transistor M N3 , transistor M N4 and transistor M N5 ;

[0021] The transistor M P4 and the transistor M P5 Connect in series to obtain the third circuit;

[0022] The transistor M N3 , the transistor M N4 and the transistor M P6 Connect in series to obtain the fourth circuit;

[0023] The transistor M P3 and the transistor M N5 and the transistor M P7 Connect in series to obtain the fifth circuit;

[0024] The third circuit and the fifth circuit are respectively connected in parallel with the fourth circuit, wherein the transistor M N4 and the transistor M N5 in series, the transistor M P5 , the transistor M P6 and the transistor M P7 Connect in series.

[0025] Optionally, the bias circuit module includes: a transistor M1, a transistor M2, a transistor M3 and a transistor M4;

[0026] The transistor M1 and the transistor M3 are connected in series to obtain a sixth circuit;

[0027] The transistor M2 and the transistor M4 are connected in series to obtain a seventh circuit;

[0028] The sixth circuit and the seventh circuit are connected in parallel, wherein the transistor M1 and the transistor M2 are connected in series, and the transistor M3 and the transistor M4 are connected in series.

[0029] Optionally, the operational amplifier module includes: a transistor M5, a transistor M6, a transistor M7, a transistor M8, a transistor M9, a transistor M 10 , transistor M 11 , resistor R2, junction voltage V EB1 and capacitor C c ;

[0030] The transistor M5, the transistor M7 and the transistor M9 are connected in series in sequence;

[0031] The transistor M6, the transistor M8, the junction voltage V EB1 and the resistor R2 are connected in series in sequence;

[0032] The transistor M 10 , the capacitor C c and the transistor M 11Connect in series;

[0033] The transistor M5 and the transistor M6 are connected in series;

[0034] The transistor M7 and the transistor M8 are connected in series;

[0035] The transistor M6 and the transistor M 10 Series connection.

[0036] Optionally, the bandgap reference source design system further includes:

[0037] Transistor M N2 and resistor R ref Series connection;

[0038] Transistor M N1 The drain terminal is connected in parallel with the resistor R2, and the gate terminal is connected to the transistor M 10 and transistor M 11 in parallel.

[0039] Technical effect of the invention: The invention discloses a bandgap reference source applied to a MEMS magnetoresistive sensor interface circuit. The bandgap reference uses a chopper stabilization technology and a V-curve compensation technology, so that the output reference voltage has low noise and a low temperature coefficient, which can meet the requirements of the MEMS magnetoresistive sensor interface circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0041] Figure 1 Schematic diagram of a chopper structure and a chopper switch structure according to an embodiment of the present invention, wherein (a) is a chopper structure diagram, and (b) is a chopper switch structure diagram;

[0042] Figure 2 It is a structural diagram of a chopper operational amplifier according to an embodiment of the present invention;

[0043] Figure 3 It is a V-curve compensation core circuit of an embodiment of the present invention;

[0044] Figure 4 Outputting a noise curve for an embodiment of the present invention;

[0045] Figure 5 is a temperature coefficient curve of an embodiment of the present invention;

[0046] Figure 6 is a system block diagram of an embodiment of the present invention;

[0047] Figure 7is an overall circuit diagram of an embodiment of the present invention;

[0048] Figure 8 It is a schematic diagram of the structure of the interface module according to an embodiment of the present invention. DETAILED DESCRIPTION

[0049] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0050] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0051] like Figure 1 As shown, the structure diagram of the chopper is as follows Figure 1 As shown in (a), it consists of four clock-controlled switches sw1, sw2, sw3, and sw4, of which sw1 and sw4 are controlled by the clock signal clk, and sw2 and sw3 are controlled by the clock signal ~clk. The clk and ~clk signals do not overlap, so that the positive and negative ends of the differential signal alternate. The switch structure is shown in Figure 1 (b) where M 12 、M 14 、M 15 and M 17 Represents a virtual switch, the source and drain of the virtual switch tube are connected, respectively located at the switch tube M 13 , M 16 At both ends of the source and drain, the width-to-length ratio of the virtual switch tube is 1 / 2 of that of the switch tube.

[0052] like Figure 2 As shown in the figure, the structure of the chopper operational amplifier, where M C1 、M C4 、M C5 、M C8 -M C11 Both are current sources, which generate specific bias current through specific bias voltage. C2 、M C3 、M C6 、M C7 Then a folded common source and common gate circuit is formed, M C2 and M C3 As a common source, the voltage V in Converted into current and flows through the common gate M C6 、M C7 And load. M C1 ,M C10 ,M C11 The source of M is connected to the power supply.C1 The drain and M C2 and M C3 The input signal is connected to the source of M after passing through the chopper CH1. C2 and M C3 The gate, M C2 and M C3 The drain of M C4 and M C5 The drain of the C6 and M C7 The source of M C4 and M C5 The source of M is grounded. C6 The drain and M C8 The drain and M C10 and M C11 The output signal is connected to the gate of M C7 and M C9 Between the drain, M C8 and M C9 The source of the C10 and M C11 The folded cascode structure meets the high gain requirement of the bandgap reference for the operational amplifier. In addition, since the folding point N1 (N2) is a low output impedance point, placing the chopper at this position has little effect on the bandwidth and can have a larger output swing. Therefore, placing the modulator at this position can meet the high bandwidth requirement of the chopper operational amplifier. The second modulator is placed in the middle of the low-voltage cascade current mirror to reduce the offset caused by the current mirror mismatch and the noise of the current mirror.

[0053] like Figure 3 As shown, the core circuit of V-type compensation, where I PTAT and I CTAT They represent the current proportional to the absolute temperature and the current inversely proportional to the absolute temperature respectively. P4 or M N3 The mirror image is a / b, and c is also the proportional coefficient of the current mirror. PTAT Less than b×I CTAT When the transistor M3 works in the linear region, a×I PTAT It is through M N3 、M N4 and M P6 However, when a×I PTAT Greater than b×I CTAT When transistor M P6 The working area changes from the saturation area to the triode area, b×I CTAT becomes the dominant current, and the magnitude of the compensation current is determined by c.P4 and M N3 The source of M is connected to the power supply. P4 and M N3 The gates of M are connected to the current mirror structures that generate PTAT and CTAT currents respectively. P4 The drain and M P5 The drain and gate and M P6 and M P7 The gate of M N3 The drain and M N4 The drain and gate and M N5 The gate of M N4 and M N5 The source of M P6 and M P7 The drain of M P5 ,M P6 ,M P7 The source is grounded.

[0054] The present invention achieves lower output noise and smaller temperature coefficient, such as Figure 4 As shown, using spectre in candence to perform pnoise simulation, it can be seen that at 1Hz and 100Hz, the output noise is 616nV / sqrt(Hz) and 245nV / sqrt(Hz) respectively, as shown in Figure 5 As shown, the temperature coefficient of DC simulation is only 2.31ppm / ℃, which can be applied in sensor interface circuits.

[0055] like Figure 6 As shown, the present invention can be applied to a MEMS sensor interface circuit, connected to the upper end of the magnetoresistive sensor to provide a reference voltage for the magnetoresistive sensor, an instrument amplifier is connected to the middle resistance position of the magnetoresistive sensor to read the relevant voltage signal therefrom and amplify it, a modem is connected to the output end of the instrument amplifier to convert the sensor signal amplified by the instrument amplifier into a digital signal.

[0056] like Figure 7 As shown, the overall circuit structure of the present invention, the bandgap reference is composed of a startup circuit, a PTAT current generating circuit, a bias circuit, an operational amplifier and a V-curve compensation structure. Among them, the startup circuit provides current to the PTAT current generating circuit when powered on, so that the entire circuit can work normally. The PTAT current generating circuit is a circuit that generates the PTAT current required in the bandgap reference source and enters the V-curve compensation circuit. The bias circuit provides tail current to the operational amplifier, so that the operational amplifier can work normally. The operational amplifier can keep the voltages of the two input terminals equal, that is, the emitter-base junction voltage V of the transistor Q1. EB1, whose temperature coefficient is negative. CTAT current is generated by R2, and the current mirror structure copies the current into the V-curve compensation circuit. The V-curve compensation circuit achieves further temperature compensation by adjusting the width-to-length ratio of the relevant transistors in the current mirror. The principle of the startup circuit is that after the circuit is turned on, C S The charging process of the capacitor is from low level to high level, that is, charging starts from low level, resulting in M S4 conduction, thereby pulling down M P1 and M P2 The gate voltage finally turns it on. P1 When it is turned on, a current will flow through Q2 and resistor R1, generating a voltage, thereby turning on M S5 When M S5 When conducting, M S4 At the same time, as the capacitor C S Charging, M S1 and M S2 The gate voltage of M continues to rise and eventually turns off. S5 The transistors work in the linear region, and the other transistors are in the cut-off region. S3 conduction, so that the capacitor C S The PTAT circuit is based on the principle of using the virtual short characteristic of the amplifier when it is deeply negatively fed back, so that the voltages at both ends of the input are equal, and then the two junction voltages (V EB1 and V EB2 ) difference (ΔV EB ). The V-curve compensation structure is achieved by N1 and M N2 The current mirror structure is composed of B as the weight to copy I CTAT current, then I CTAT and ΔV with weight A EB / R1I PTAT Add together and get I ref , I ref Flow to R REF resistor to obtain a first-order bandgap reference. Then, the above current I COMP It flows into the V curve compensation structure to achieve second-order compensation, thereby achieving a lower temperature coefficient. Since the circuit uses chopping technology and only has a simple current mirror structure to copy the corresponding current, the noise is relatively small.

[0057] The system includes a startup circuit module, a PTAT current generating circuit module, a V-curve compensation structure module, a bias circuit module and an operational amplifier module; wherein the startup circuit module is used to connect with the PTAT current generating circuit module to provide current; the PTAT current generating circuit module is used to generate a circuit for the PTAT current required in a bandgap reference source and is connected to the V-curve compensation circuit module; the V-curve compensation structure module is used to perform temperature compensation by adjusting the width-to-length ratio of related transistors in a current mirror; the bias circuit module is used to provide tail current to the operational amplifier module; and the operational amplifier module is used to adjust the output terminal voltage of the V-curve compensation structure module and the bias circuit module.

[0058] The starting circuit includes capacitor C S , transistor M S1 , transistor M S2 , transistor M S3 , transistor M S4 and transistor M S5 ; Capacitor C S With transistor M S1 series, further with transistor M S3 Parallel connection; transistor M S1 and transistor M S2 Series connection; transistor M S2 With transistor M S5 series, further with transistor M S4 Series connection.

[0059] The PTAT current generating circuit module includes: a transistor M P1 , transistor M P2 , chopper op amp structure, resistor R2, junction voltage V EB1 , junction voltage V EB2 , transistor Q1 and transistor Q2; transistor M P1 , resistor R2, transistor Q1 and junction voltage V EB1 Connect in series to obtain the first circuit; transistor M P2 , transistor Q1 in series and junction voltage V EB2 Connect in series to obtain a second circuit; transistor Q1 and transistor Q2 are connected in series; the first circuit and the second circuit are connected in parallel through a chopper operational amplifier structure;

[0060] The V curve compensation structure module includes: transistor M P3 , transistor M P4 , transistor M P5 , transistor M P6 , transistor M P7 , transistor M N3 , transistor M N4 and transistor M N5 ; Transistor MP4 and transistor M P5 Connect in series to obtain the third circuit; transistor M N3 , transistor M N4 and transistor M P6 Connect in series to obtain the fourth circuit; transistor M P3 and transistor M N5 and transistor M P7 The third circuit and the fifth circuit are connected in parallel with the fourth circuit respectively, wherein the transistor M N4 and transistor M N5 Series, transistor M P5 , transistor M P6 and transistor M P7 Connect in series.

[0061] The bias circuit module includes: a transistor M1, a transistor M2, a transistor M3 and a transistor M4; the transistor M1 and the transistor M3 are connected in series to obtain a sixth circuit; the transistor M2 and the transistor M4 are connected in series to obtain a seventh circuit; the sixth circuit and the seventh circuit are connected in parallel, wherein the transistor M1 and the transistor M2 are connected in series, and the transistor M3 and the transistor M4 are connected in series.

[0062] The operational amplifier module includes: transistor M5, transistor M6, transistor M7, transistor M8, transistor M9, transistor M 10 , transistor M 11 , resistor R2, junction voltage V EB1 and capacitor C c ; Transistor M5, transistor M7 and transistor M9 are connected in series in sequence; transistor M6, transistor M8, junction voltage V EB1 and resistor R2 in series; transistor M 10 , capacitor C c and transistor M 11 The transistors M5 and M6 are connected in series; the transistors M7 and M8 are connected in series; the transistors M6 and M 10 Series connection.

[0063] The system also includes: transistor M N2 and resistor R ref Series connection; transistor M N1 The drain terminal is connected in parallel with the resistor R2, and the gate terminal is connected to the transistor M 10 and transistor M 11 in parallel.

[0064] like Figure 8As shown, the interface module of the present invention uses an oscillator OSC as a bandgap reference source to provide CLK and ~CLK two-phase non-overlapping clock signals, the power supply voltage VDD of the bandgap reference source is 1.8V, GND represents grounding, and the output voltage VREF provides a constant voltage for the magnetoresistive sensor. The sensor AMP+ and AMP- are respectively connected to the positive feedback and negative feedback terminals of the instrument amplifier, and the output signal of the sensor is amplified by the instrument amplifier.

[0065] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A bandgap reference source applied to a MEMS magnetoresistive sensor interface circuit, characterized in that: include: A startup circuit module, a PTAT current generating circuit module, a V-curve compensation structure module, a bias circuit module and an operational amplifier module; The startup circuit module is used to connect with the PTAT current generating circuit module to provide current; The PTAT current generating circuit module is a circuit for generating the PTAT current required in the bandgap reference source and is connected to the V-curve compensation structure module; The PTAT current generating circuit module includes: a transistor M P1 , transistor M P2 , chopper amplifier structure, resistor R1, junction voltage V EB1 , junction voltage V EB2 , transistor Q1 and transistor Q2; The transistor M P1 The gate of the transistor M is connected to P2 The gate and the output end of the chopper op amp structure, the transistor M P1 The source of the transistor M P2 The source of the transistor M is connected to the power supply. P1 The drain of is connected to the resistor R1 and the non-inverting input terminal of the chopper amplifier structure, and the voltages of the transistor Q1 and the transistor Q2 are the junction voltage V EB1 , junction voltage V EB2 The emitter of the transistor Q2 is connected to the resistor R1, and the transistor M P2 The drain is connected to the inverting input terminal of the chopper operational amplifier structure, the emitter of the transistor Q1 and an input terminal of the operational amplifier module, and the base and collector of the transistor Q1 and the base and collector of the transistor Q2 are all connected to the ground; The V-curve compensation structure module is used to perform temperature compensation by adjusting the width-to-length ratio of the related transistors in the current mirror; the V-curve compensation structure module includes: a transistor M P3 , transistor M P4 , transistor M P5 , transistor M P6 , transistor M P7 , transistor M N3 , transistor M N4 , transistor M N5 The bandgap reference source also includes a transistor M N1 , transistor M N2 and resistor R ref The transistor M N1 The gate of the transistor M is connected to the output terminal of the operational amplifier module. N1 The drain of the transistor M is connected to the other input terminal of the operational amplifier module. N1 and the transistor M N2 The source of the transistor M is connected to the power supply. N1 and the transistor M N2 The gate of the transistor M N3 The gate of the transistor M is connected N2 The drain and the transistor M N5 The drain and the resistor R ref The upper end of the resistor R ref The lower end is grounded; The transistor M P3 The gate of the transistor M is connected to P4 The gate of the transistor M P2 The gate of the transistor M P3 The drain of transistor M N2 The drain of the transistor M P3 The source of the transistor M P4 The source of the transistor M N3 The sources of the transistors M are connected to the power supply. P4 The drain of the transistor M is connected to P5 The gate and drain of the transistor M P6 The gate of the transistor M P7 The gate of the transistor M P5 The source of the transistor M P6 The source of the transistor M P7 The sources of the transistors M are grounded. P6 The drain of the transistor M is connected to N4 The source of the transistor M N3 The drain of the transistor M is connected to N4 The gate of the transistor M N5 The gate of the transistor M N4 The drain of the transistor M N5 The source of the transistor M P7 The drain; The resistor R ref The generated current I ref1 Supply the V-curve compensation structure module, the transistor M N2 The drain voltage is the reference voltage V ref ; The bias circuit module is used to provide tail current to the operational amplifier module; The operational amplifier module is used to adjust the output terminal voltages of the V-curve compensation structure module and the bias circuit module.

2. The bandgap reference source for use in a MEMS magnetoresistive sensor interface circuit according to claim 1, characterized in that: The startup circuit includes a capacitor C S , transistor M S1 , transistor M S2 , transistor M S3 , transistor M S4 and transistor M S5 ; The capacitor C S The upper plate of the transistor M S1 The drain and gate of the transistor M S3 The source of the transistor M S2 The gate of the transistor M is connected S2 The drain of the transistor M S4 The gate of the transistor M S5 The drain of the transistor M S1 The source of the transistor M S3 The gate of the transistor M S2 The sources of the transistors M are connected to the power supply. S4 The drain of the transistor M P1 , the transistor M P2 , the transistor M P3 The gate of the transistor M is connected S4 The source is grounded, the capacitor C S The lower plate of the transistor M S3 The drain of the transistor M S5 The sources of the transistors M are connected to ground. S5 The gate is connected to the non-inverting input of the chopper op amp structure in the PTAT current generating circuit.

3. The bandgap reference source for use in a MEMS magnetoresistive sensor interface circuit according to claim 1, characterized in that: The bias circuit module includes: a transistor M1, a transistor M2, a transistor M3 and a transistor M4; The source of the transistor M1 and the source of the transistor M2 are connected to a power supply, the gate of the transistor M1 is connected to the gate and drain of the transistor M2, the drain of the transistor M2 is connected to the drain of the transistor M4, the drain of the transistor M1 is connected to the drain and gate of the transistor M3 and the gate of the transistor M4, and the source of the transistor M4 is connected to the resistor R bias Upper end, resistor R bias The lower end and the source of the transistor M3 are grounded.

4. The bandgap reference source for use in a MEMS magnetoresistive sensor interface circuit as claimed in claim 3, characterized in that: The operational amplifier module includes: a transistor M5, a transistor M6, a transistor M7, a transistor M8, a transistor M9, a transistor M 10 , transistor M 11 , resistor R2, junction voltage V EB1 and capacitor C c The source of the transistor M5, the source of the transistor M6 and the transistor M 10 The source of the transistor M6 is connected to the power supply, the gate of the transistor M6 is connected to the gate and drain of the transistor M5, the drain of the transistor M5 is connected to the drain of the transistor M7, the source of the transistor M7 is connected to the source of the transistor M8 and the drain of the transistor M9, the source of the transistor M9, the lower end of the resistor R2 and the transistor M 11 The sources of the transistors M6 and M7 are connected to the ground. 10 The gate of the transistor M8, the drain of the transistor M8 and the capacitor C c The left plate of the transistor M8 is connected to the upper end of the resistor R2. 10 The drain is connected to the capacitor C c The right plate and the transistor M 11 The drain of the transistor M7 is connected to the inverting input terminal of the chopper amplifier structure, and the gate of the transistor M8 is connected to the gate of the transistor M N1 The drain of the transistor M 10 The drain of the transistor M is connected to N1 The gate of the transistor M 11 The gate of the transistor M9 is connected to the gate of the transistor M4.

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