A process compensation method for a semiconductor process apparatus and a semiconductor process apparatus

Abstract

Embodiments of the present application provide a process compensation method for a semiconductor process equipment and the semiconductor process equipment, the method comprising: obtaining a set process time of a current process; obtaining a target life of a target material used by the current process and a wafer quantity of processes completed in a cleaning period, in a case that a process compensation function is turned on; determining a compensated process time according to the set process time, the target life and the wafer quantity of processes completed in the cleaning period, and performing the process according to the compensated process time. The present application introduces a dimension of the wafer quantity of processes completed in the cleaning period, which can effectively cover the case that the wafer coating condition changes after the periodical cleaning of the process chamber, and through the process time compensation based on the target life and the wafer quantity of processes completed in the cleaning period, the physical vapor deposition system can keep a high uniformity of the wafer coating in the continuous process.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a process compensation method for semiconductor process equipment and a semiconductor process equipment. Background Technology

[0002] Physical vapor deposition (PVD) is a crucial coating technology in semiconductor manufacturing. It involves vaporizing or ionizing a target material in a vacuum environment and depositing it onto the surface of a substrate to form a thin film. It is now widely used in numerous industries, including flat panel displays, semiconductors, solar cells, and optical components.

[0003] Because the target material needs to be continuously bombarded during the process, causing some of its material to vaporize or ionize, the target material's state will change as the process progresses. In existing technologies, to ensure consistent coating results on each wafer, process time is typically compensated for by adjusting the target material's lifetime. However, this approach only addresses some of the coating effect variations caused by target material changes and does not consider the impact of other process factors on the coating effect. This results in insufficiently precise compensation, and the coating uniformity across wafers still needs improvement. Summary of the Invention

[0004] In view of the above problems, embodiments of the present invention are proposed to provide a process compensation method for semiconductor process equipment and a corresponding semiconductor process equipment apparatus to overcome or at least partially solve the above problems.

[0005] To address the above problems, embodiments of the present invention disclose a process compensation method for semiconductor process equipment, comprising:

[0006] Obtain the set process time for the current process;

[0007] With the process compensation function enabled, the target life information of the target material used in the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment are obtained.

[0008] Based on the set process time, the target life information, and the number of wafers whose processes have been completed within the cleaning cycle, the compensated process time is determined, and the process is performed according to the compensated process time.

[0009] Optionally, determining the compensated process time based on the set process time, the target life information, and the number of wafers whose processes have been completed within the cleaning cycle includes:

[0010] The first compensation coefficient is determined based on the target life information;

[0011] The second compensation coefficient is determined based on the number of wafers whose processes have been completed within the cleaning cycle;

[0012] The compensated process time is determined based on the set process time, the first compensation coefficient, and the second compensation coefficient.

[0013] Optionally, determining the first compensation coefficient based on the target life information includes:

[0014] Obtain the first relationship for the target lifetime; wherein, the first relationship is: T1=(1+A*T+B*T) 2 +C*T 3 T1 is the first compensation coefficient, T is the target life, and A, B, and C are coefficients of the target life T.

[0015] The first compensation coefficient is determined based on the target life information and the first relationship.

[0016] Optionally, determining the second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle includes:

[0017] Obtain the second relational expression for the cleaning cycle; wherein, the second relational expression is: T2=(1+D*W+E*W) 2 +F*W 3 T2 is the second compensation coefficient, W is the number of wafers whose process has been completed within the cleaning cycle, and D, E, and F are coefficients of the number of wafers whose process has been completed within the cleaning cycle.

[0018] The second compensation information is determined based on the number of wafers whose processes have been completed within the cleaning cycle and the second relationship.

[0019] Optionally, determining the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient includes:

[0020] According to the compensation calculation formula, the compensated process time is determined based on the set process time, the first compensation coefficient, and the second compensation coefficient; the compensation calculation formula is as follows:

[0021] T A =T S *T1*T2

[0022] Among them, T A T is the compensated process time; S The set process time is specified.

[0023] Optionally, it also includes:

[0024] Obtain the thin film deposition rate and preset wafer coating thickness for wafers under different target lifetimes;

[0025] Based on the thin film deposition rate of the wafer under different target lifetimes and the preset wafer coating thickness, the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes is obtained.

[0026] By fitting the different target lifespans and the process time for the wafer to reach the preset wafer coating thickness under different target lifespans, the first relationship for the target lifespan is obtained.

[0027] Optionally, it also includes:

[0028] Obtain the thin film deposition rate and the preset wafer coating thickness for each wafer during the cleaning cycle;

[0029] Based on the thin film deposition rate of each wafer during the cleaning cycle and the preset wafer coating thickness, the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle is obtained.

[0030] The process time for each wafer to reach the preset wafer coating thickness within the cleaning cycle is fitted with the number of wafers whose processes have been completed within the cleaning cycle to obtain the second relationship for the cleaning cycle.

[0031] Optionally, it also includes:

[0032] When preset conditions are met and it is necessary to correct the first compensation coefficient and / or the second compensation coefficient, the compensation function is turned off; wherein, the preset conditions include target material replacement and process chamber adjustment.

[0033] This invention also discloses a semiconductor process apparatus, the semiconductor process apparatus comprising:

[0034] The controller is used to acquire the set process time of the current process; when the process compensation function is enabled, it acquires the target life information of the target material used in the current process and the number of wafers that have completed the process within the cleaning cycle of the semiconductor process equipment; based on the set process time, the target life information and the number of wafers that have completed the process within the cleaning cycle, it determines the compensated process time and performs the process according to the compensated process time.

[0035] Optionally, the controller is configured to determine a first compensation coefficient based on the target life information; determine a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle; and determine the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient.

[0036] Optionally, the controller is configured to obtain a first relationship for the lifetime of the target material; wherein the first relationship is: T1=(1+A*T+B*T) 2 +C*T 3 T1 is the first compensation coefficient, T is the target life, and A, B, and C are coefficients of the target life T. The first compensation coefficient is determined based on the target life information and the first relationship.

[0037] Optionally, the controller is configured to obtain a second relational expression for the cleaning cycle; wherein the second relational expression is: T2=(1+D*W+E*W) 2 +F*W 3 T2 is the second compensation coefficient, W is the number of wafers whose processes have been completed within the cleaning cycle, and D, E, and F are coefficients of the number of wafers whose processes have been completed within the cleaning cycle. The second compensation information is determined based on the information of the number of wafers whose processes have been completed within the cleaning cycle and the second relationship.

[0038] Optionally, the controller is configured to determine the compensated process time according to the set process time, the first compensation coefficient, and the second compensation coefficient, based on a compensation calculation formula; the compensation calculation formula is:

[0039] T A =T S *T1*T2

[0040] Among them, T A T is the compensated process time; S The set process time is specified.

[0041] Optionally, the controller is further configured to acquire the thin film deposition rate and preset wafer coating thickness of the wafer under different target lifetimes; based on the thin film deposition rate and preset wafer coating thickness of the wafer under different target lifetimes, obtain the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes; and fit the different target lifetimes and the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes to obtain the first relationship for the target lifetime.

[0042] Optionally, the controller is further configured to acquire the thin film deposition rate of each wafer and the preset wafer coating thickness within the cleaning cycle; based on the thin film deposition rate of each wafer and the preset wafer coating thickness within the cleaning cycle, obtain the process time for each wafer to reach the preset wafer coating thickness within the cleaning cycle; and fit the process time for each wafer to reach the preset wafer coating thickness within the cleaning cycle with the number of wafers that have completed the process within the cleaning cycle to obtain the second relationship for the cleaning cycle.

[0043] Optionally, the controller is further configured to disable the compensation function when preset conditions are met and it is necessary to correct the first compensation coefficient and / or the second compensation coefficient; wherein the preset conditions include target material replacement and process chamber adjustment.

[0044] The embodiments of the present invention have the following advantages:

[0045] In this embodiment of the invention, the set process time for the current process is obtained; with the process compensation function enabled, the target lifetime information of the target material used in the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment are obtained; based on the set process time, the target lifetime information, and the number of wafers whose processes have been completed within the cleaning cycle, the compensated process time is determined, and the process is performed according to the compensated process time. This invention introduces a dimension based on the number of wafers whose processes have been completed within the cleaning cycle, which can effectively cover situations where the wafer coating condition changes after the periodic cleaning of the process chamber. Through process time compensation based on both target lifetime and the number of wafers whose processes have been completed within the cleaning cycle, the physical vapor deposition system achieves the effect of maintaining high uniformity of coating on each wafer during continuous processing. Attached Figure Description

[0046] Figure 1 This is a flowchart of the steps of a process compensation method for semiconductor process equipment provided in an embodiment of the present invention;

[0047] Figure 2 This is a flowchart of a process time compensation method provided in an embodiment of the present invention;

[0048] Figure 3 This is a structural block diagram of a semiconductor process equipment provided in an embodiment of the present invention. Detailed Implementation

[0049] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0050] During physical vapor deposition (PVD), the target material is continuously attacked, causing some of its components to vaporize or ionize. Therefore, the state of the target material changes as the process progresses. Simultaneously, the environment within the process chamber also changes. Both of these factors can affect the deposition effect on the wafer (substrate) surface within the same process time.

[0051] Existing compensation methods adjust the preset process time based on changes in target life. Target life is primarily represented by the cumulative electrical energy consumed during the physical vapor deposition process by bombarding the target, measured in kilowatt-hours (kWh). During the commissioning phase, engineers collect and record the wafer deposition data during the physical vapor deposition process. For different wafer deposition data under varying target life conditions, they calculate the increase or decrease in process time required to achieve the preset deposition thickness.

[0052] However, existing process compensation methods only consider that different target lifespans will lead to changes in the coating effect, but do not take into account the impact of changes in the chamber environment and the periodic cleaning of the process chamber (periodic cleaning of the process chamber environment and target surface) on the wafer coating effect. This will result in the compensation effect still not being accurate enough, and there is still room for improvement in the coating uniformity of each wafer.

[0053] Based on data on wafer coating thickness collected from different physical vapor deposition processes, similar to the impact of target life on coating effect, changes in the chamber environment can also significantly affect the coating effect of some processes.

[0054] One of the core concepts of this invention is that by introducing a dimension based on the number of wafers whose processes have been completed during the cleaning cycle, the situation where the wafer coating condition changes after the periodic cleaning of the process chamber can be effectively covered. By compensating for process time based on both the target lifetime and the number of wafers whose processes have been completed within the cleaning cycle, the physical vapor deposition system can maintain a high uniformity of coating on each wafer during the continuous process.

[0055] Reference Figure 1 The diagram illustrates a process compensation method for semiconductor process equipment according to an embodiment of the present invention. The method may specifically include the following steps:

[0056] Step 101: Obtain the set process time for the current process.

[0057] This invention can be applied to situations where changes in the target material condition and chamber environment during process execution lead to deterioration of the wafer coating. When the target material condition and chamber environment change, and the process is performed according to the set process time, there are problems such as uneven coating thickness on different wafers or the coating thickness not reaching the target coating thickness.

[0058] As an example, changes in the target state can include changes in target lifetime. For instance, as the physical vapor deposition process proceeds, the thickness of the target decreases due to sputtering consumption. As the target thickness decreases, the magnetic field strength applied to the target decreases, and the voltage also decreases, resulting in a reduction in the deposition rate of the wafer during the physical vapor deposition process.

[0059] As an example, changes in the chamber environment can include the target surface being covered by other substances (such as oxides or nitrides). For instance, during physical vapor deposition (PVD) processes, a dense aluminum oxide film can easily form on the surface of an aluminum target, preventing it from being sputtered and thus affecting the coating process.

[0060] Step 102: With the process compensation function enabled, obtain the target life information of the target material used in the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment.

[0061] As an example, if the wafer coating thickness is uneven or fails to reach the target coating thickness, a compensation process is required. When performing a compensation process, it is essential to first determine whether the current process has the process compensation function enabled.

[0062] For example, when the process compensation function is enabled, the current target life information and the number of wafers whose processes have been completed in the current single cleaning cycle can be obtained.

[0063] As an example, in physical vapor deposition (PVD) processes, to ensure process quality, the chamber environment and target surface can be periodically cleaned to restore the chamber environment. Within a single cleaning cycle, the chamber environment can continuously change as the process progresses.

[0064] As an example, after a cycle cleaning is performed, the process chamber environment and the target material condition are improved, thereby improving the coating effect. However, during the physical vapor deposition process of the next cleaning cycle, the wafer coating condition will continue to deteriorate as the process progresses. Therefore, multiple cleaning cycles can be set in the physical vapor deposition process, and the number of wafers that have completed the process in each cleaning cycle can be set to be the same.

[0065] As an example, cleaning cycles can be divided according to the number of wafers. For instance, a cleaning cycle can be based on 5 wafers. When 5 wafers have completed the physical deposition process, cleaning of the chamber and the target surface can be performed.

[0066] Step 103: Determine the compensated process time based on the set process time, the target life information, and the number of wafers whose processes have been completed within the cleaning cycle, and perform the process according to the compensated process time.

[0067] In one embodiment of the present invention, determining the compensated process time based on the set process time, the target life information, and the number of wafers whose processes have been completed within the cleaning cycle includes: determining a first compensation coefficient based on the target life information; determining a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle; and determining the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient.

[0068] For example, a first compensation coefficient based on the target life dimension can be determined based on the target life information; a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle can be determined based on the number of wafers whose processes have been completed within the cleaning cycle.

[0069] For example, the compensated process time can be determined based on the set process time, a first compensation coefficient based on the target life dimension, and a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle.

[0070] In one embodiment of the present invention, determining the first compensation coefficient based on the target life information includes: obtaining a first relational expression for the target life; wherein the first relational expression is: T1=(1+A*T+B*T) 2 +C*T 3 T1 is the first compensation coefficient, T is the target life, and A, B, and C are coefficients of the target life T. The first compensation coefficient is determined based on the target life information and the first relationship.

[0071] For example, the relationship between the target lifetime and the first compensation coefficient can be obtained, and the target lifetime of the target used in the current physical vapor deposition process can be input into the relationship to obtain the first compensation coefficient of the current physical vapor deposition process.

[0072] Where T is the target lifespan in kWh, and A, B, and C are coefficients of parameter T, all of which are configurable. The default value can be 0, and the precision can be 10. -9 .

[0073] As an example, A*T and B*T in the first relation 2 and C*T 3This option can satisfy various curve compensation requirements. For example, when the lifetime of different target materials and the coating thickness of the current wafer under the same process time are close to a linear relationship, the coefficient C can be set to 0, or the coefficients B and C can be set to 0.

[0074] For example, the compensation requirements of the current physical vapor deposition process are not high, with coefficient A being 0.5, coefficient B being 0, and coefficient C being 0. Then, based on the first relationship for the target lifetime, T1 = (1 + 0.5 * T), and the current target lifetime being 2 kWh, the first compensation coefficient for the current physical vapor deposition process is T1, which has a value of 2.

[0075] In one embodiment of the present invention, the thin film deposition rate of the wafer and the preset wafer coating thickness under different target lifespans are obtained; based on the thin film deposition rate of the wafer under different target lifespans and the preset wafer coating thickness, the process time for the wafer to reach the preset wafer coating thickness under different target lifespans is obtained; the different target lifespans and the process time for the wafer to reach the preset wafer coating thickness under different target lifespans are fitted to obtain the first relationship for the target lifespan.

[0076] As an example, the thin film deposition rate and preset wafer coating thickness of the wafer can be pre-tested and collected under different target lifetimes. Based on the thin film deposition rate and preset wafer coating thickness of the wafer under different target lifetimes, the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes can be calculated. By fitting the different target lifetimes and the process time to reach the preset wafer coating thickness, the first relationship between the target lifetime time T and the first compensation coefficient T1 based on the target lifetime dimension can be obtained.

[0077] It should be noted that, in this embodiment of the invention, during the single-wafer coating process, the thin film deposition rate can be approximately equal to a constant value. Therefore, the coating thickness of a single wafer is approximately proportional to the process time. Thus, when determining the thin film deposition rate and the preset wafer coating thickness for different target lifetimes, the process time required for the wafer to reach the preset wafer coating thickness under different target lifetimes can be calculated. Furthermore, the consistency of coating conditions between wafers can be achieved by adjusting the process time.

[0078] In one embodiment of the present invention, determining the second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle includes: obtaining a second relational expression for the cleaning cycle; wherein the second relational expression is: T2=(1+D*W+E*W) 2 +F*W 3T2 is the second compensation coefficient, W is the number of wafers whose processes have been completed within the cleaning cycle, and D, E, and F are coefficients of the number of wafers whose processes have been completed within the cleaning cycle. The second compensation information is determined based on the information of the number of wafers whose processes have been completed within the cleaning cycle and the second relationship.

[0079] For example, a second relationship between the second compensation coefficient and the number of wafers whose processes have been completed within the cleaning cycle can be obtained. By inputting the number of wafers whose processes have been completed within the current cleaning cycle into the second relationship, the second compensation coefficient for the current physical vapor deposition process can be obtained.

[0080] Wherein, D, E, and F are coefficients for the number of wafers W completed in a single cleaning cycle, all of which are configurable items, with a default value of 0 and a precision of 10. -9 After the system performs its cycle cleaning, parameter W will be automatically reset to zero, and the T2 coefficient can be recalculated in the new cleaning cycle.

[0081] As an example, D*T and E*T in the second relation 2 and F*T 3 This option can meet various curve compensation requirements. For example, when the coating thickness and the number of wafers completed are nearly linear within the same process time during the cleaning cycle, the coefficient F can be set to 0, or the coefficients E and F can be set to 0.

[0082] For example, if the compensation requirement of the current physical vapor deposition process is not high, with coefficient D being 0.2, coefficient E being 0, and coefficient F being 0, then for the second relationship of the target life T2 = (1 + 0.2 * W), if the number of wafers that have completed the process in the current cleaning cycle is 5, then the value of the second compensation coefficient T2 for the current physical vapor deposition process is 2.

[0083] In one embodiment of the present invention, the thin film deposition rate of each wafer and the preset wafer coating thickness are obtained during the cleaning cycle; based on the thin film deposition rate of each wafer and the preset wafer coating thickness during the cleaning cycle, the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle is obtained; the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle is fitted with the number of wafers that have completed the process during the cleaning cycle to obtain the second relationship for the cleaning cycle.

[0084] As an example, after a period of processing, the target material may develop a significant amount of oxide deposits on its surface. At this point, due to the oxides obstructing the target, the wafer's thin film deposition rate decreases, resulting in a significantly worse coating effect than in the initial stage. Therefore, cleaning of the target surface is necessary. For instance, in physical deposition processes using aluminum targets, a dense aluminum oxide film gradually forms on the aluminum target surface as the process progresses, causing the wafer's thin film deposition rate to gradually decrease. Consequently, within the same cleaning cycle, the coating thickness of each wafer after completing the set process time varies as the process continues.

[0085] As an example, the film deposition rate and preset wafer coating thickness of different wafers during the physical vapor deposition process can be tested and collected in advance within the same cleaning cycle. Based on the film deposition rate and preset wafer coating thickness of different wafers within the same cleaning cycle, the process time required for different wafers to reach the preset wafer coating thickness within the same cleaning cycle can be obtained. For example, by testing and collecting the film deposition rate of wafers undergoing physical vapor deposition as the number of wafers completing the process increases within the same cleaning cycle, users can calculate the actual process time required for the current stage of the process to achieve the required film thickness.

[0086] For example, the process time for different wafers to reach the preset wafer coating thickness within the same cleaning cycle can be fitted with the number of wafers that have completed the process within the cleaning cycle, thereby obtaining the relationship between the number of wafers that have completed the process within the cleaning cycle and the second compensation coefficient based on the number of wafers completed within the cleaning cycle.

[0087] As an example, in this embodiment of the invention, to adapt to processes where the environment of the process chamber is not sensitive to changes within a single cleaning cycle, coefficients D, E, and F can all be set to 0. In this case, the actual process time will only be related to the target life. Therefore, this compensated process time has strong versatility.

[0088] As will be known to those skilled in the art, the above-described setting of the coefficients of the second relation is merely an example of the present invention. Those skilled in the art can set coefficients D and / or E and / or F to 0 according to the sensitivity of the current process to changes in the process chamber environment within a single cleaning cycle. The embodiments of the present invention are not limited in this regard.

[0089] In one embodiment of the present invention, determining the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient includes: determining the compensated process time according to a compensation calculation formula based on the set process time, the first compensation coefficient, and the second compensation coefficient; the compensation calculation formula is:

[0090] T A =T S*T1*T2

[0091] Among them, T A The compensated process time; T S To set the process time.

[0092] For example, the compensated process time can be determined by inputting the set process time, the first compensation coefficient, and the second compensation coefficient into the compensation calculation formula. For instance, if the set process time is 2 hours, the first compensation coefficient is 2, and the second compensation coefficient is 2, then the compensated process time T can be calculated according to the compensation calculation formula. A It lasts for 8 hours.

[0093] In one embodiment of the present invention, when preset conditions are met and it is necessary to correct the first compensation coefficient and / or the second compensation coefficient, the compensation function is turned off; wherein, the preset conditions include target material replacement and process chamber adjustment.

[0094] For example, when changing the target type, adjusting the process chamber, or updating the system, the current compensation coefficient needs to be corrected.

[0095] As an example, users can disable the compensation function through the host computer interface and fill in and modify relevant coefficients in the configuration interface. Furthermore, they can adjust various coefficients in real time according to changes in actual process conditions during use to achieve the optimal process time compensation effect. After determining the coefficients, the system can automatically calculate and execute a new compensation process time based on the set process time, the target lifetime information of the target used in the current physical vapor deposition process, and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment.

[0096] like Figure 2 The diagram shown is a flowchart of a process time compensation method provided in an embodiment of the present invention.

[0097] S21, debug and determine the compensation coefficients T1 and T2 in the compensation calculation formula;

[0098] For example, by collecting actual process time data for achieving the required thin film thickness under different target lifetimes, and fitting the different target lifetime data with the corresponding actual process time data, the relationship between target lifetime and actual required process time can be obtained as T1 = (1 + A*T + B*T) / (1 + A*T + B*T). 2 +C*T 3 By doing so, the values ​​of coefficients A, B, and C can be obtained, and the compensation coefficient T1 can be determined.

[0099] For example, by collecting actual process time data of different wafers reaching the required thin film thickness within the same cleaning cycle, and fitting the number of wafers reaching the required thin film thickness within the same cleaning cycle with the corresponding actual process time, the relationship between the number of wafers completing the process within the same cleaning cycle and the actual required process time can be obtained as T2 = (1 + D*W + E*W). 2 +F*W 3 By doing so, the values ​​of the coefficients D, E, and F can be obtained, and the compensation coefficient T2 can be determined.

[0100] S22, process begins;

[0101] S23, Obtain the process setting time;

[0102] S24, Determine whether to enable the compensation function;

[0103] S25, with the compensation function enabled, obtain the current target life and the number of wafers whose processes have been completed in the current cleaning cycle;

[0104] S26, Input the current target life and the number of wafers whose processes have been completed in the current cleaning cycle into the current compensation calculation formula to calculate the compensated process time;

[0105] S27, the process with the compensated process time;

[0106] S28, process complete.

[0107] In this embodiment of the invention, the set process time for the current process is obtained; with the process compensation function enabled, the target lifetime information of the target material used in the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment are obtained; based on the set process time, the target lifetime information, and the number of wafers whose processes have been completed within the cleaning cycle, the compensated process time is determined, and the process is performed according to the compensated process time. This invention introduces a dimension based on the number of wafers whose processes have been completed within the cleaning cycle, which can effectively cover situations where the wafer coating condition changes after the periodic cleaning of the process chamber. Through process time compensation based on both target lifetime and the number of wafers whose processes have been completed within the cleaning cycle, the physical vapor deposition system achieves the effect of maintaining high uniformity of coating on each wafer during continuous processing.

[0108] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0109] Reference Figure 3 The diagram illustrates a structural block diagram of a semiconductor process apparatus according to an embodiment of the present invention. The semiconductor process apparatus 301 may include:

[0110] The controller 3011 is used to acquire the set process time of the current process; when the process compensation function is enabled, it acquires the target life information of the target material used in the current process and the number of wafers that have completed the process within the cleaning cycle of the semiconductor process equipment; based on the set process time, the target life information and the number of wafers that have completed the process within the cleaning cycle, it determines the compensated process time and performs the process according to the compensated process time.

[0111] In one optional embodiment, the controller is configured to determine a first compensation coefficient based on the target life information; determine a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle; and determine the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient.

[0112] In one optional embodiment, the controller is configured to obtain a first relationship for the lifetime of the target material; wherein the first relationship is: T1=(1+A*T+B*T) 2 +C*T 3 T1 is the first compensation coefficient, T is the target life, and A, B, and C are coefficients of the target life T. The first compensation coefficient is determined based on the target life information and the first relationship.

[0113] In one optional embodiment, the controller is configured to obtain a second relation for the cleaning cycle; wherein the second relation is: T2=(1+D*W+E*W) 2 +F*W 3 T2 is the second compensation coefficient, W is the number of wafers whose processes have been completed within the cleaning cycle, and D, E, and F are coefficients of the number of wafers whose processes have been completed within the cleaning cycle. The second compensation information is determined based on the information of the number of wafers whose processes have been completed within the cleaning cycle and the second relationship.

[0114] In one optional embodiment, the controller is configured to determine the compensated process time according to the set process time, the first compensation coefficient, and the second compensation coefficient, based on a compensation calculation formula; the compensation calculation formula is:

[0115] T A =T S *T1*T2

[0116] Among them, T A T is the compensated process time; S The set process time is specified.

[0117] In an optional embodiment, the controller is further configured to acquire the thin film deposition rate and preset wafer coating thickness of the wafer under different target lifetimes; based on the thin film deposition rate and preset wafer coating thickness of the wafer under different target lifetimes, obtain the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes; and fit the different target lifetimes and the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes to obtain the first relationship for the target lifetime.

[0118] In an optional embodiment, the controller is further configured to acquire the thin film deposition rate of each wafer and the preset wafer coating thickness during the cleaning cycle; based on the thin film deposition rate of each wafer and the preset wafer coating thickness during the cleaning cycle, obtain the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle; and fit the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle with the number of wafers that have completed the process during the cleaning cycle to obtain the second relationship for the cleaning cycle.

[0119] In an optional embodiment, the controller is further configured to disable the compensation function when preset conditions are met and it is necessary to correct the first compensation coefficient and / or the second compensation coefficient; wherein the preset conditions include target material replacement and process chamber adjustment.

[0120] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0121] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0122] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0123] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0124] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0125] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0126] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0127] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0128] The above provides a detailed description of the process compensation method and semiconductor process equipment provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A process compensation method for semiconductor process equipment, characterized in that, include: Obtain the set process time for the current process; With the process compensation function enabled, the lifetime information of the target material used in the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment are obtained. The first compensation coefficient is determined based on the target life information; The second compensation coefficient is determined based on the number of wafers whose processes have been completed within the cleaning cycle; Based on the set process time, the first compensation coefficient, and the second compensation coefficient, the compensated process time is determined, and the process is performed according to the compensated process time.

2. The method according to claim 1, characterized in that, Determining the first compensation coefficient based on the target life information includes: Obtain the first relationship for the target lifetime; wherein, the first relationship is: T1 is the first compensation coefficient, T is the target life, and A, B, and C are coefficients of the target life T. The first compensation coefficient is determined based on the target life information and the first relationship.

3. The method according to claim 1, characterized in that, The step of determining the second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle includes: Obtain the second relational expression for the cleaning cycle; wherein the second relational expression is: T2 is the second compensation coefficient, W is the number of wafers whose process has been completed within the cleaning cycle, and D, E, and F are coefficients of the number of wafers whose process has been completed within the cleaning cycle. The second compensation information is determined based on the number of wafers whose processes have been completed within the cleaning cycle and the second relationship.

4. The method according to claim 1, characterized in that, The step of determining the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient includes: According to the compensation calculation formula, the compensated process time is determined based on the set process time, the first compensation coefficient, and the second compensation coefficient; the compensation calculation formula is: Where TA is the compensated process time; TS is the set process time.

5. The method according to claim 2, characterized in that, Also includes: Obtain the thin film deposition rate and preset wafer coating thickness for wafers under different target lifetimes; Based on the thin film deposition rate of the wafer under different target lifetimes and the preset wafer coating thickness, the process time for the wafer to reach the preset wafer coating thickness under different target lifetimes is obtained. By fitting the different target lifespans and the process time for the wafer to reach the preset wafer coating thickness under different target lifespans, the first relationship for the target lifespan is obtained.

6. The method according to claim 3, characterized in that, Also includes: Obtain the thin film deposition rate and preset wafer coating thickness for each wafer during the cleaning cycle; Based on the thin film deposition rate of each wafer during the cleaning cycle and the preset wafer coating thickness, the process time for each wafer to reach the preset wafer coating thickness during the cleaning cycle is obtained. The process time for each wafer to reach the preset wafer coating thickness within the cleaning cycle is fitted with the number of wafers whose processes have been completed within the cleaning cycle to obtain the second relationship for the cleaning cycle.

7. The method according to claim 1, characterized in that, Also includes: When preset conditions are met and it is necessary to correct the first compensation coefficient and / or the second compensation coefficient, the compensation function is turned off; wherein, the preset conditions include target material replacement and process chamber adjustment.

8. A semiconductor process apparatus, characterized in that, The semiconductor process equipment includes: The controller is used to acquire the set process time for the current process; when the process compensation function is enabled, it acquires the target lifetime information used for the current process and the number of wafers whose processes have been completed within the cleaning cycle of the semiconductor process equipment; determines a first compensation coefficient based on the target lifetime information; determines a second compensation coefficient based on the number of wafers whose processes have been completed within the cleaning cycle; determines the compensated process time based on the set process time, the first compensation coefficient, and the second compensation coefficient, and performs the deposition process according to the compensated process time.

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