Processing Method of Through-Silicon Via Structure with Large Thickness

Abstract

The present disclosure provides a processing method for a large-thickness through-silicon via structure, comprising: providing a silicon substrate, forming a plurality of first support region grooves arranged at intervals in a first support region of the silicon substrate; growing silicon oxide in the first support region grooves and oxidizing the silicon material in the first support region into silicon oxide to form a first support structure; forming a first deep trench in a first non-support region; removing a part of the silicon material under the first support structure to make the first support structure suspended, forming a first through-channel structure; forming a silicon oxide layer on the inner wall of the first through-channel structure; depositing polysilicon in the first through-channel structure, and the polysilicon at least covers the bottom surface of the first through-channel structure. The present invention can realize a through-silicon via structure on a silicon wafer with a larger thickness, reduce the process difficulty, and provide technical support for chip device-level packaging.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a method for processing a large-thickness through-silicon via structure. Background Art

[0002] Through Silicon Via (TSV) technology is a high-density packaging technology that is gradually replacing the currently well-developed wire bonding technology. Through the filling of conductive substances such as copper, tungsten, and polysilicon, TSV technology realizes the vertical electrical interconnection of through-silicon vias. TSV technology can reduce the interconnection length, reduce signal delay, and reduce parasitic capacitance / inductance through vertical interconnection, thereby achieving low-power, high-speed communication between chips, increasing bandwidth, and realizing the miniaturization of device integration. The three-dimensional integration technology realized by means of TSV technology provides a practical solution for the integration of MEMS and CMOS. Three-dimensional integration means distributing functional modules on different chips (which can be chips of different processes), bonding these chips to form a three-dimensional stacked structure, and using three-dimensional vertical interconnections penetrating the substrate to achieve electrical connections between devices on different chip layers. In the field of MEMS, three-dimensional integration makes it possible to realize a generalized SoC system with multiple functions and can improve the performance of MEMS integrated systems. By using three-dimensional integration, each functional module can occupy one layer of the chip and be integrated through high-density TSV technology, thereby integrating hybrid chips manufactured by different processes in one system to realize an SoC system including multiple modules such as a processor, a memory, a digital-analog mixed-signal chip, an RF system, and a MEMS sensor, and an SoC can be realized without changing their respective processes.

[0003] However, the existing TSV technology is difficult to achieve a through-hole structure with a large thickness, resulting in poor performance of the final device. Summary of the Invention

[0004] Embodiments of the present invention provide a method for processing a large-thickness through-silicon via structure to optimize the performance of a semiconductor structure.

[0005] To achieve the above object, an embodiment of the present invention provides a processing method for a large-thickness through-silicon via structure, including: providing a silicon substrate, the silicon substrate including a first surface and a second surface opposite to the first surface, wherein the first surface includes a first support region and a first non-support region arranged at intervals, forming a plurality of first support region grooves arranged at intervals in the first support region; growing silicon oxide in the first support region grooves, and oxidizing the silicon material in the first support region into silicon oxide, so as to form a first support structure in the first support region; etching the first non-support region to form a first deep trench in the first non-support region; removing a part of the silicon material under the first support structure to make the first support structure suspended, forming a channel under the first support structure, and the channel and the first deep trench form a first through-channel structure; forming a silicon oxide layer on the inner wall of the first through-channel structure as an insulating protection structure; depositing polysilicon in the first through-channel structure, and the polysilicon covers at least the bottom surface of the first through-channel structure.

[0006] Optionally, after the step of depositing polysilicon in the first through-channel structure and the polysilicon covers at least the bottom surface of the first through-channel structure, it further includes: the second surface includes a second support region and a second non-support region arranged at intervals, forming a plurality of second support region grooves arranged at intervals in the second support region; growing silicon oxide in the second support region grooves, and oxidizing the silicon material in the second support region into silicon oxide, so as to form a second support structure in the second support region; etching the second non-support region to form a second deep trench in the second non-support region; removing a part of the silicon material under the second support structure to make the second support structure suspended, forming a channel under the second support structure, and the channel and the second deep trench form a second through-channel structure; forming a silicon oxide layer on the inner wall of the second through-channel structure as an insulating protection structure; depositing polysilicon in the second through-channel structure, and the polysilicon covers at least the bottom surface of the second through-channel structure.

[0007] Optionally, in the step of etching the second non-support region to form a second deep trench in the second non-support region, the second support structure is used as an etching stop layer, and the oxide layer deposited on the bottom surface of the first through-channel structure is used as an etching stop layer to remove the silicon material in the second non-support region.

[0008] Optionally, the first support region and the second support region are arranged opposite to each other, and the first non-support region and the second non-support region are arranged opposite to each other.

[0009] Optionally, in the step of providing the silicon substrate, the silicon substrate is a cylindrical silicon wafer, and the first support regions and the first non-support regions are alternately arranged along the edge of the cylindrical silicon wafer; in the step of removing part of the silicon material under the support structure to make the first support structure suspended and forming a channel under the first support structure, and the channel and the first deep trench form a first through-channel structure, the bottom surface of the channel and the bottom surface of the first deep trench have the same depth.

[0010] Optionally, the number of the first support region grooves in each of the first support regions is 2 to 6, and the first support region grooves are arranged in parallel to form a blade array-like silicon structure.

[0011] Optionally, the depth range of the first support region grooves is 30 μm to 40 μm, the width range of the first support region grooves is 1 μm to 2 μm, and the interval between two adjacent first support region grooves is 1 μm to 2 μm.

[0012] Optionally, in the step of growing silicon oxide in the first support region grooves and oxidizing the silicon material in the first support regions into silicon oxide to form a support structure in the first support regions, thermal oxidation process is used to grow silicon oxide in the first support region grooves, and the first support structure is a seamless monolithic silicon oxide.

[0013] Optionally, in the step of etching the first non-support regions to form first deep trenches in the first non-support regions, using the first support structure as an etching stop layer to remove the silicon material in the first non-support regions, and the depth of the first deep trenches is greater than or equal to 200 μm.

[0014] Optionally, in the step of removing part of the silicon material under the first support structure to make the first support structure suspended and forming a channel under the first support structure, XeF2 gaseous corrosion process is used to remove part of the silicon material under the first support structure.

[0015] Compared with the prior art, the technical solutions of the embodiments of the present invention have the following advantages:

[0016] The processing method of the large-thickness through-silicon via structure provided by the embodiments of the present invention can implement a through-silicon via structure on a silicon wafer with a greater thickness. The thickness of the formed through-silicon via structure can be greater than or equal to 400 μm, which greatly increases the thickness of the through-silicon via structure and reduces the process difficulty, providing technical support for chip device-level packaging. And in the present invention, a new process is adopted to complete the support and insulation structure of the conductive silicon pillars. The support structure for supporting the conductive silicon pillars adopts a suspension method, which can reduce the processing difficulty caused by the excessive thickness of the silicon wafer. Description of the Drawings

[0017] Figure 1 It is a schematic diagram of a silicon through - via structure formed based on the existing TSV process;

[0018] Figures 2 to 10 It is a schematic diagram corresponding to each step in an embodiment of the processing method of the silicon through - via structure provided by the present invention. Detailed implementation manners

[0019] As can be seen from the background art, currently formed semiconductor devices still have problems with poor performance. Now, in combination with an existing silicon through - via structure and its forming method, the reasons for the poor performance of the device are analyzed.

[0020] Reference Figure 1 , which shows a silicon through - via structure formed based on the existing TSV process, including a conductive structure 10, a support structure 20, and an isolation structure 30. Among them, the conductive structure 10 is usually formed of a low - resistivity bulk silicon material, used to connect the upper and lower electrical signals of the structure, and is electrically isolated and mechanically connected to other structures; the support structure 20 is usually formed of a polysilicon material, used for mechanical connection; the isolation structure 30 is usually formed of a silicon dioxide material, used for electrical isolation, and can also be used for mechanical connection. The preparation method of the above - mentioned structure is usually to first form a hole structure on the bulk silicon, and then fill the hole structure formed in the previous step with polysilicon.

[0021] Existing integrated circuit chips usually adopt Figure 1 The TSV process shown. The thickness that the TSV process can achieve is usually relatively low, generally below 300 μm. This is mainly because the through - holes or isolation grooves of the existing TSV structure are generally processed by a dry etching process. A typical one is the deep silicon etching process (Deep Reactive Ion Etching, DRIE). The DRIE process has its own technical limitations, resulting in the inability to etch structures with a large aspect ratio. Usually, the aspect ratio is less than 30:1. If the opening width used for etching is large, although a deeper structure can be etched, a lot of chip area will be wasted. The main purpose of the TSV process is to make the device more integrated and reduce the chip area. If the opening width is increased to etch a deeper structure, it will go against the original intention of reducing the chip area, and increasing the opening width will also pose new challenges to the subsequent filling. Specifically, if copper is used for subsequent filling, environmental pollution and other problems will occur. If polysilicon is used for subsequent filling, the filling thickness will be restricted. If the opening area used for etching is small, it is difficult to achieve a deeper structure, resulting in a thin TSV process thickness.

[0022] However, with the continuous improvement of the performance requirements for semiconductor devices, especially in the field of MEMS, in order to improve the packaging strength, isolate the packaging stress of the sensor chip, improve the accuracy and stability of the sensor, and improve the adaptability of the sensor in harsh environments, the through-hole substrate needs to use a silicon wafer substrate with a relatively large thickness, such as a thickness greater than 300 μm. However, the thickness that can be achieved by the traditional TSV process is generally below 300 μm, which cannot meet the above requirements.

[0023] To solve the above technical problems, an embodiment of the present invention provides a processing method for a large-thickness silicon through-hole structure, including: providing a silicon substrate, the silicon substrate including a first surface and a second surface opposite to the first surface, wherein the first surface includes a first support area and a first non-support area arranged at intervals, and forming a plurality of first support area grooves arranged at intervals in the first support area; growing silicon oxide in the first support area grooves, and oxidizing the silicon material in the first support area into silicon oxide, so as to form a first support structure in the first support area; etching the first non-support area to form a first deep trench in the first non-support area; removing a part of the silicon material under the first support structure to make the first support structure suspended, forming a channel under the first support structure, and the channel and the first deep trench form a first through-channel structure; forming a silicon oxide layer on the inner wall of the first through-channel structure as an insulating protection structure; depositing polysilicon in the first through-channel structure, and the polysilicon at least covers the bottom surface of the first through-channel structure.

[0024] The processing method for the large-thickness silicon through-hole structure provided by the embodiment of the present invention can realize the silicon through-hole structure on a silicon wafer with a larger thickness. The thickness of the formed silicon through-hole structure can be greater than or equal to 400 μm, which greatly improves the thickness of the silicon through-hole structure and reduces the process difficulty, providing technical support for chip device-level packaging. And in the present invention, a new process is adopted to complete the support and insulation structure of the conductive silicon column. The support structure for supporting the conductive silicon column adopts a suspension method, which can reduce the process difficulty caused by the excessive thickness of the silicon wafer.

[0025] To make the above objects, features, and advantages of the embodiments of the present invention more obvious and understandable, the following detailed description will be given to the specific embodiments of the embodiments of the present invention with reference to the accompanying drawings.

[0026] Figures 2 to 10 FIG. is a schematic structural diagram corresponding to each step in an embodiment of the processing method for the silicon through-hole structure provided by the present invention.

[0027] Reference Figure 2 and Figure 3 , Figure 2 is a partial structural diagram of the TSV on the silicon wafer, that is, the effective area of the TSV. Figure 3 is Figure 2Partial schematic view of the first support region 110 in [the figure]. A silicon substrate 100 is provided, and the silicon substrate 100 includes a first surface 101 and a second surface 102 opposite to the first surface 101. Among them, the first surface 101 includes a first support region 110 and a first non-support region 120 arranged at intervals. A plurality of first support region grooves 111 arranged at intervals are formed in the first support region 110.

[0028] The silicon substrate 100 can be a silicon wafer, including a first surface 101 and a second surface 102 arranged opposite to each other. Among them, the first surface 101 further includes a first support region 110 and a first non-support region 120 arranged at intervals. The first support region 110 is subsequently used to form a support structure. The number of the first support regions 110 and the first non-support regions 120 can be multiple. In some embodiments, a plurality of first support regions 110 and a plurality of first non-support regions 120 are alternately arranged along the edge of a preset structure on the silicon wafer. As a specific example, Figure 2 and Figure 3 in [the figure], the preset structure on the silicon wafer is a cylindrical protrusion, and a plurality of first support regions 110 and a plurality of first non-support regions 120 are alternately arranged in a ring along the edge of the cylindrical protrusion. It can be understood that the shape of the preset structure on the silicon wafer is not limited to a cylindrical shape. For example, it can also be a rectangular protrusion or other graphic protrusions. In some actual processes, the above preset structures (such as columnar structures) will be distributed on the silicon wafer in an array form.

[0029] In some embodiments, a plurality of first support region grooves 111 are arranged in parallel and at intervals to form a silicon structure such as a blade array type or a rectangular block array type. As an example, the first support region grooves 111 can be etched by DRIE process.

[0030] In some embodiments, the first support region grooves 111 can be formed by a method of small opening deep silicon etching. In some embodiments, the number of the first support region grooves 111 formed in each first support region 110 can be 2 to 6, the depth h range of the first support region grooves 111 can be 30 μm to 40 μm, the width w range of the first support region grooves 111 can be 1 μm to 2 μm, and the interval d (i.e., the thickness of the remaining blade array type silicon) between two adjacent first support region grooves 111 can be 1 μm to 2 μm. In specific embodiments, the width w and the interval d need to be accurately calculated according to the actual situation. Refer to Figure 3 and Figure 4 , silicon oxide is grown in the first support region grooves 111, and the silicon material in the first support region 110 is oxidized to silicon oxide, so as to form a first support structure 130 in the first support region 110. The first support structure 130 is an integral structure.

[0031] In some embodiments, thermal oxidation can be used to grow silicon oxide in the first support region groove 111, and by controlling the parameters of the thermal oxidation process, the generated silicon oxide can fill the first support region groove 111. During the thermal oxidation process, the silicon material in the first support region 110 can also be oxidized into silicon oxide. In the thermal oxidation process, a part of the silicon is consumed to oxidize it into silicon oxide.

[0032] Specifically, the thermal oxidation process combines silicon and oxygen to oxidize silicon into silicon oxide. Therefore, while silicon oxide is generated, a part of the silicon is also consumed. For example, if originally 1 μm of silicon is oxidized, the finally generated silicon oxide has a thickness of 1 μm, but about 0.46 μm of silicon is consumed in this process, that is, the total thickness after oxidation will be 1.54 μm (including 0.54 μm of the remaining silicon and 1 μm of silicon oxide).

[0033] According to the above process principle, the support structure can be divided into many small thicknesses, that is, a plurality of first support region grooves 111 arranged at intervals are formed in the first support region 110, and through calculation, all the silicon can be oxidized into silicon oxide. At the same time, the grown-out silicon oxide can also fill the previously etched gap (the first support region groove 111), thus forming an integral silicon oxide structure.

[0034] In some embodiments, the oxidation process exactly oxidizes all the silicon materials in the first support region 110 completely into silicon oxide, and is in complete contact with the silicon oxide grown on both sides of the silicon material, just forming an integral body. In a specific example, a plurality of grooves 111 with the same interval are formed in the first support region 110, the width w of the groove 111 is 1.08 μm, and the interval d between two adjacent grooves 11 (that is, the thickness of the remaining blade-array silicon) is 0.92 μm. By using the thermal oxidation process to grow silicon oxide with a thickness of 1 μm, at this time, the silicon materials in the first support region 110 can be completely oxidized into silicon oxide, and are in complete contact with the silicon oxide grown on both sides of the silicon material, just forming an integral body.

[0035] In some embodiments, it is also possible that part of the silicon materials in the first support region 110 are not oxidized, as long as it is ensured that silicon oxide with sufficient thickness grows on both sides of the silicon material, insulation can be achieved. However, in order to achieve good mechanical structure support, the newly grown silicon oxide on both sides of the silicon material needs to be in close contact with the silicon material, and there should be no gap between the silicon material and the grown-out silicon oxide.

[0036] Through the above steps, the entire first support region 110 can be finally oxidized into silicon dioxide, that is, a first support structure 130 is formed in the first support region 110. In some embodiments, the first support structure 130 is a seamless monolithic structure. The first support structure 130 can support the conductive silicon pillars in the through-silicon via structure and insulate from the external structure, achieving the dual tasks of mechanical connection support and electrical isolation. Refer to Figure 5 , etch the first non-support region 120 to form a first deep trench 121 in the first non-support region 120.

[0037] In some embodiments, a deep silicon etching process can be used to perform deep silicon etching on the first non-support region 120, thereby forming a first deep trench 121 in the first non-support region 120. During the etching process, the first support structure 130 can be used as an etching stop layer to remove the silicon material below the first non-support region 120 while protecting the silicon below the first support structure 130 from being etched. The depth of the formed first deep trench 121 can be set according to the thickness of the silicon wafer. For example, a first deep trench 121 with a depth of 200 μm or deeper is formed.

[0038] Refer to Figure 6 , remove a part of the silicon material under the first support structure 130 to make the first support structure 130 suspended, forming a first channel 122 below the first support structure 130. The first channel 122 and the first deep trench 121 form a first through-channel structure 123.

[0039] In some embodiments, a corrosion process can be used to remove a part of the silicon material under the first support structure 130 to form a first channel 122 below the first support structure 130. The corrosion process can be an XeF2 gaseous corrosion process, a wet corrosion process, etc.

[0040] After removing a part of the silicon material under the first support structure 130, the first support structure 130 is suspended, forming a first channel 122 located under the first support structure 130. The first channel 122 communicates with the adjacent first deep trench 121, further forming a first through-channel structure 123 that connects all the first deep trenches 121, and at the same time completing the isolation of the TSV conduction structure from the surrounding silicon structure. Up to this step, the TSV structure on the first surface 101 side, that is, half of the TSV structure, has been completed. Subsequently, the silicon wafer needs to be turned over and the above process needs to be repeated from the second surface 102 side to complete the TSV structure on the second surface 102 side. In some embodiments, the bottom surface of the first channel 122 formed after removing a part of the silicon material under the first support structure 130 is substantially equal in depth to the bottom surface of the first deep trench 121, that is, the bottom surface of the first through-channel structure 123 formed by the first channel 122 and the first deep trench 121 is a plane. In some embodiments, the first channel 122 and the first deep trench 121 are alternately arranged along the circumferential direction of the cylindrical silicon substrate 100, and the bottom surface of the first through-channel structure 123 formed by the first channel 122 and the first deep trench 121 is an annular surface.

[0041] In some embodiments, after forming the first through-channel structure 123, a silicon oxide layer is further formed on the inner wall of the first through-channel structure 123 as an insulating protection structure.

[0042] In some embodiments, after forming the first through-channel structure 123, polysilicon is further deposited in the first through-channel structure 123 as a reinforcement support structure. The polysilicon covers at least the bottom surface of the first through-channel structure 123 to achieve the reinforcement of the bottom surface of the first through-channel structure 123. It can be understood that if the overall width of the first through-channel structure 123 is not very large, the entire first through-channel structure 123 can also be filled to further increase the support strength.

[0043] The first support structure 130 can not only achieve insulation but also support the middle cylindrical structure of the TSV. During the process of depositing polysilicon in the first through-channel structure 123, without the first support structure 130, if the quality of polysilicon filling is not good, the middle cylindrical structure of the TSV is likely to fall due to the loss of support. Therefore, it is required that the quality of polysilicon filling is very good, and it is still relatively difficult to fill polysilicon with very good structure quality in the actual process. By providing the first support structure 130 in this application, the filling quality of polysilicon can be reduced.

[0044] Further, similar steps can be used to process the second surface 102 of the silicon substrate 100.

[0045] Reference Figure 7, the second surface 102 includes a second support region 160 and a second non-support region 170 which are arranged at intervals, and a plurality of second support region grooves 161 arranged at intervals are formed in the second support region 160.

[0046] The second surface 102 of the silicon substrate 100 further includes a second support region 160 and a second non-support region 170 which are arranged at intervals, wherein the second support region 160 is subsequently used to form a support structure. The number of the second support regions 160 and the second non-support regions 170 can be multiple. In some embodiments, the multiple second support regions 160 and the second non-support regions 170 are arranged alternately in a ring along the edge of the cylindrical silicon wafer.

[0047] In some embodiments, the first support region 110 is arranged opposite to the second support region 160, and the first non-support region 120 is arranged opposite to the second non-support region 170.

[0048] In some embodiments, the multiple second support region grooves 161 are arranged in parallel and at intervals to form a blade array type silicon structure.

[0049] In some embodiments, the second support region grooves 161 can be formed by a method of deep silicon etching with small openings. In some embodiments, the number of the second support region grooves 161 formed in each second support region 160 can be 2 to 6, the depth h range of the second support region grooves 161 can be 30 μm to 40 μm, the width w range of the second support region grooves 161 can be 1 μm to 2 μm, and the interval d (i.e., the thickness of the remaining blade array type silicon) between two adjacent second support region grooves 161 can be 1 μm to 2 μm.

[0050] Reference Figure 8 , silicon oxide is grown in the support region grooves 161, and the silicon material in the second support region 160 is oxidized into silicon oxide, so as to form a second support structure 180 in the second support region 160.

[0051] In some embodiments, silicon oxide can be grown in the support region grooves 161 by a way of growing silicon oxide by a thermal oxidation process, and by controlling the parameters of the thermal oxidation process, the generated silicon oxide fills the second support region grooves 161. During the thermal oxidation process, the silicon material in the second support region 160 can also be oxidized into silicon oxide. In the thermal oxidation process, a part of silicon is consumed to oxidize silicon into silicon oxide.

[0052] Through the above steps, the entire second support region 160 can finally be oxidized into silicon oxide, that is, a second support structure 180 is formed in the second support region 160. In some embodiments, the second support structure 180 is a seamless monolithic silicon oxide. The second support structure 180 can support the conductive silicon pillars in the through-silicon via structure and insulate from the external structure, achieving the dual tasks of mechanical connection support and electrical isolation.

[0053] Reference Figure 9 , etch the second non-support region 170 to form a second deep trench 171 in the second non-support region 170.

[0054] In some embodiments, a deep silicon etching process can be used to perform deep silicon etching on the second non-support region 170, thereby forming a second deep trench 171 in the second non-support region 170. During the etching process, the second support structure 180 can be used as an etching stop layer, and the oxide layer deposited on the bottom surface of the first through-channel structure 123 can be used as an etching stop layer to remove the silicon material in the second non-support region 170. The polysilicon deposited on the bottom surface of the first through-channel structure 123 can further reinforce the bottom surface, enhance the thickness of the silicon oxide film on the bottom surface of the first through-channel structure 123, and prevent it from cracking. The depth of the second deep trench 171 formed by etching can be set according to the thickness of the silicon wafer. For example, a second deep trench 171 with a depth of 200 μm or deeper is formed. Adopting a structure with silicon oxide and polysilicon in the intermediate layer can make the deep silicon etching on the second surface self-stop, reducing the process difficulty while ensuring device sealing and preventing particle contamination.

[0055] Reference Figure 10 , remove part of the silicon material under the second support structure 180 to make the second support structure 180 suspended, forming a second channel below the second support structure 180. The second channel and the second deep trench 171 form a second through-channel structure 173.

[0056] In some embodiments, a corrosion process can be used to remove part of the silicon material under the second support structure 180 to form a second channel below the second support structure 180. The corrosion process can be an XeF2 gas corrosion process, a wet corrosion process, etc.

[0057] After removing a part of the silicon material under the second support structure 180, the second support structure 180 is suspended, forming a second channel located under the second support structure 180. The second channel communicates with the adjacent second deep trench 171, further forming a second through-channel structure 173 that connects all the second deep trenches 171, and at the same time completing the isolation of the TSV conduction structure from the surrounding silicon structures. In some embodiments, the bottom surface of the second channel formed after removing a part of the silicon material under the second support structure 180 is substantially equal in depth to the bottom surface of the second deep trench 171, that is, the bottom surface of the second through-channel structure 173 formed by the second channel and the second deep trench 171 is a plane. In some embodiments, the second channel and the second deep trench 171 are alternately arranged along the circumferential direction of the cylindrical silicon substrate 100, and the bottom surface of the second through-channel structure 173 formed by the second channel and the second deep trench 171 is an annular surface.

[0058] In some embodiments, after forming the second through-channel structure 173, a silicon oxide layer is further formed on the inner wall of the second through-channel structure 173 as an insulating protection structure.

[0059] In some embodiments, after forming the second through-channel structure 173, polysilicon is further deposited on the second through-channel structure 173 as a reinforcement support structure. The polysilicon covers at least the bottom surface of the second through-channel structure 173 to achieve the reinforcement of the bottom surface of the second through-channel structure 173. It can be understood that if the overall width of the second through-channel structure 173 is not very large, the entire second through-channel structure 173 can also be filled to further increase the support strength.

[0060] It can be seen that the processing method of the large-thickness TSV structure provided by the embodiments of the present invention can realize the TSV structure on a silicon wafer with a larger thickness. The thickness of the formed TSV structure can be greater than or equal to 400 μm, greatly increasing the thickness of the TSV structure and reducing the process difficulty, providing technical support for chip device-level packaging.

[0061] And in the present invention, a new process is adopted to complete the support and insulation structure of the conductive silicon pillar. The support structure for supporting the conductive silicon pillar adopts a suspension method, which can reduce the processing difficulty caused by the excessive thickness of the silicon wafer.

[0062] And in some embodiments, the deep silicon etching process and the etching process are combined to etch the redundant structures in order to release the support structure and form isolation grooves.

[0063] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A processing method for a large-thickness through-silicon via structure, characterized in that Comprising: Providing a silicon substrate, the silicon substrate including a first surface and a second surface opposite to the first surface, wherein the first surface includes a first support region and a first non-support region arranged at intervals, and a plurality of first support region grooves arranged at intervals are formed in the first support region; Growing silicon oxide in the first support region grooves and oxidizing the silicon material in the first support region into silicon oxide, thereby forming a first support structure in the first support region; Etching the first non-support region to form a first deep trench in the first non-support region; Removing a part of the silicon material under the first support structure to make the first support structure suspended, forming a first channel below the first support structure, and the first channel and the first deep trench form a first through-channel structure; Forming a silicon oxide layer on the inner wall of the first through-channel structure as an insulating protection structure; Depositing polysilicon in the first through-channel structure, and the polysilicon covers at least the bottom surface of the first through-channel structure.

2. The processing method of the large-thickness through-silicon via structure according to claim 1, wherein, After the step of depositing polysilicon in the first through-channel structure, and the polysilicon covers at least the bottom surface of the first through-channel structure, further comprising: The second surface includes a second support region and a second non-support region arranged at intervals, and a plurality of second support region grooves arranged at intervals are formed in the second support region; Growing silicon oxide in the second support region grooves and oxidizing the silicon material in the second support region into silicon oxide, thereby forming a second support structure in the second support region; Etching the second non-support region to form a second deep trench in the second non-support region; Removing a part of the silicon material under the second support structure to make the second support structure suspended, forming a second channel below the second support structure, and the second channel and the second deep trench form a second through-channel structure; Forming a silicon oxide layer on the inner wall of the second through-channel structure as an insulating protection structure; Depositing polysilicon in the second through-channel structure, and the polysilicon covers at least the bottom surface of the second through-channel structure.

3. The processing method of the large-thickness through-silicon via structure according to claim 2, wherein, In the step of etching the second non-support region to form a second deep trench in the second non-support region, using the second support structure as an etching stop layer and the oxide layer deposited on the bottom surface of the first through-channel structure as an etching stop layer to remove the silicon material in the second non-support region.

4. The processing method of the large-thickness through-silicon via structure according to claim 2, characterized in that, The first support region and the second support region are arranged opposite to each other, and the first non-support region and the second non-support region are arranged opposite to each other.

5. The processing method of the large-thickness through-silicon via structure according to claim 1, characterized in that In the step of providing the silicon substrate, the silicon substrate is a cylindrical silicon wafer, and the first support region and the first non-support region are alternately arranged along the edge of the cylindrical silicon wafer; In the step of removing a part of the silicon material under the first support structure to make the first support structure suspended, forming a first channel below the first support structure, and the first channel and the first deep trench form a first through-channel structure, the bottom surface of the first channel and the bottom surface of the first deep trench have the same depth.

6. The processing method of the large-thickness through-silicon via structure according to claim 1, characterized in that, The number of the first support region grooves in each first support region is 2 to 6, and the first support region grooves are arranged in parallel to form a blade array-like silicon structure.

7. The processing method of the large-thickness through-silicon via structure according to claim 6, characterized in that, The depth range of the first support area groove is 30 μm to 40 μm, the width range of the first support area groove is 1 μm to 2 μm, and the interval between two adjacent first support area grooves is 1 μm to 2 μm.

8. The processing method of the large-thickness through-silicon via structure according to claim 1, characterized in that, In the steps of growing silicon oxide in the first support area groove and oxidizing the silicon material in the first support area into silicon oxide to form a first support structure in the first support area, thermal oxidation process is used to grow silicon oxide in the first support area groove, and the first support structure is a seamless monolithic silicon oxide.

9. The processing method of the large-thickness through-silicon via structure according to claim 1, characterized in that, In the step of etching the first non-support area to form a first deep trench in the first non-support area, with the first support structure as an etching stop layer, the silicon material in the first non-support area is removed, and the depth of the first deep trench is greater than or equal to 200 μm.

10. The processing method of the large-thickness through-silicon via structure according to claim 1, characterized in that, In the step of removing part of the silicon material under the first support structure to make the first support structure suspended and form a first channel under the first support structure, XeF2 gas etching process is used to remove part of the silicon material under the first support structure.

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