Chip Detection Method, System, Device and Computer Readable Storage Medium

Abstract

The present invention discloses a chip detection method, system, device and computer-readable storage medium. By calculating the number of acquisitions and acquisition positions required for the chip global image acquisition by the calculation camera module, controlling the relative movement of the camera module and the adsorption module, multiple local three-dimensional images and two-dimensional images of the chip are obtained by shooting at each acquisition position. Furthermore, optical imaging distortion correction is performed on the two-dimensional images and three-dimensional images to compensate for the errors caused by optical imaging distortion. On this basis, pose correction is performed on the three-dimensional images to eliminate the geometric errors and perspective errors caused by chip tilt and rotation. Then, perspective distortion correction is performed on the two-dimensional images using the corrected three-dimensional images, and the corrected two-dimensional images are stitched and fused to obtain a complete image of the chip, and thus chip defect and size detection can be performed according to the complete image of the chip. The detection of the chip appearance is realized by using a camera module with a field of view smaller than the chip size.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a chip detection method, system, device and computer-readable storage medium. Background Art

[0002] In traditional chip appearance detection, the size of a single chip is less than or equal to the maximum field of view of the camera module, and the image of a single or multiple chips can be obtained by single-shot. With the development of semiconductor technology, chips play a more extensive role in various fields. In some fields, large-size chips (such as high-speed computing chips) are required. However, the size of these large-size chips has exceeded the maximum field of view of the camera module (such as 120mm×120mm). Therefore, the existing chip detection methods can no longer meet the requirements. Summary of the Invention

[0003] Aiming at the deficiencies of the existing technology, the purpose of the present invention is to provide a chip detection method, system, device and computer-readable storage medium. By taking multiple partial images of the chip at different positions with the camera module, and finally stitching and combining all the partial images into a large-size chip image, and then completing the chip appearance detection based on the large-size chip image.

[0004] A chip detection method, which is applied to a chip detection system. The chip detection system includes a camera module, an adsorption module and a controller. The adsorption module is used to carry at least one chip to be detected. The size of the chip to be detected is larger than the field of view of the camera module. The camera module is used to collect two-dimensional and three-dimensional images of the chip to be detected. The controller is used to move the camera module and the adsorption module relative to each other. The method includes:

[0005] Obtain the chip size and the field of view of the camera module, and determine the image acquisition position information according to the chip size and the field of view of the camera module. The image acquisition position information includes at least two image acquisition positions and the acquisition sequence identifier corresponding to the image acquisition position;

[0006] Transmit the image acquisition position information to the controller, so that the controller controls the relative movement of the adsorption module and the camera module, and receives the two-dimensional and three-dimensional images of the local part of the chip collected by the camera module at each image acquisition position;

[0007] Perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image respectively;

[0008] Perform pose correction on each three-dimensional image;

[0009] Perform perspective distortion correction on the two-dimensional image according to the three-dimensional image after pose correction;

[0010] Stitch and fuse multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip;

[0011] Perform an appearance inspection on the chip based on the complete image of the chip to obtain an inspection result.

[0012] Optionally, the optical imaging distortion correction for the two-dimensional image and the three-dimensional image respectively includes:

[0013] Obtain a correction coefficient;

[0014] Calculate the distortion amounts of the two-dimensional image and the three-dimensional image according to the correction coefficient, and perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image according to the distortion amounts.

[0015] Optionally, the pose correction for each three-dimensional image includes:

[0016] Determine the chip substrate surface area in the three-dimensional image;

[0017] Fit a substrate plane based on the three-dimensional point cloud data of the chip substrate surface area, and obtain the pose information of the substrate plane, where the pose information includes the angular difference between the substrate plane and the space coordinate system where the three-dimensional point cloud is located;

[0018] Correct the three-dimensional image and the two-dimensional image according to the pose information.

[0019] Optionally, the determination of the chip substrate surface area in the three-dimensional image includes:

[0020] Determine the chip substrate surface area in the three-dimensional image according to the distribution of the three-dimensional point cloud on the three-dimensional image; or,

[0021] Obtain the two-dimensional image corresponding to the three-dimensional image, and use the chip substrate surface area on the two-dimensional image as the chip substrate surface area of the three-dimensional image.

[0022] Optionally, the angular difference includes a first angular difference between the substrate plane and the X-axis in the space coordinate system, a second angular difference between the substrate plane and the Y-axis, and a third angular difference between the substrate plane and the Z-axis;

[0023] The correction of the three-dimensional image and the two-dimensional image according to the pose information includes:

[0024] Calculate a first deflection direction and a first deflection angle of the substrate plane relative to the X-axis according to the first angle difference; calculate a second deflection direction and a second deflection angle of the substrate plane relative to the Y-axis according to the second angle difference, and calculate a third deflection direction and a third deflection angle of the substrate plane relative to the Z-axis according to the third angle difference;

[0025] Adjust the positional relationship between the three-dimensional image and the X-axis according to the first deflection direction and the first deflection angle, adjust the positional relationship between the three-dimensional image and the Y-axis according to the second deflection direction and the second deflection angle, and adjust the positional relationship between the three-dimensional image and the Z-axis according to the third deflection direction and the third deflection angle.

[0026] Optionally, the perspective distortion correction of the two-dimensional image according to the three-dimensional image after pose correction includes:

[0027] Perform perspective distortion correction on the two-dimensional image according to the mapping relationship between the feature points on the three-dimensional image and the feature points on the two-dimensional image.

[0028] Optionally, the stitching and fusion of multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip includes:

[0029] Match the feature points on multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to determine the overlapping area between adjacent two-dimensional images;

[0030] Stitch and fuse multiple two-dimensional images according to the mapping relationship of the feature points in the overlapping area to obtain a complete image of the chip.

[0031] A chip detection system includes a camera module, an adsorption module, a controller, and a chip detection device. The adsorption module is used to carry at least one chip to be detected, the size of the chip to be detected is larger than the field of view of the camera module, the camera module is used to collect two-dimensional images and three-dimensional images of the chip to be detected, and the controller is used to move the camera module and the adsorption module relative to each other;

[0032] The chip detection device includes:

[0033] A position information determination module, configured to obtain the chip size and the field of view of the camera module, and determine image acquisition position information according to the chip size and the field of view of the camera module. The image acquisition position information includes at least two image acquisition positions and acquisition sequence identifiers corresponding to the image acquisition positions;

[0034] An image acquisition module, configured to transmit the image acquisition position information to the controller, so that the controller controls the relative movement of the adsorption module and the camera module, and receive the two-dimensional image and three-dimensional image of the local part of the chip acquired by the camera module at each image acquisition position;

[0035] An optical imaging distortion correction module, configured to perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image respectively;

[0036] A pose correction module, configured to perform pose correction on each three-dimensional image;

[0037] A perspective distortion correction module, configured to perform perspective distortion correction on the two-dimensional image according to the three-dimensional image after pose correction;

[0038] An image stitching module, configured to stitch and fuse multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip;

[0039] A detection module, configured to perform appearance detection on the chip according to the complete image of the chip to obtain a detection result.

[0040] A computer device, comprising: a memory and a processor;

[0041] The memory, in which a computer program is stored;

[0042] The processor, configured to load the computer program to implement the above chip detection method.

[0043] A computer-readable storage medium, which stores a computer program, and the computer program is adapted to be loaded and executed by the processor to perform the chip detection method as described above.

[0044] Implementing the above solution has the following beneficial effects:

[0045] The chip detection method provided by this solution calculates the number of acquisitions and acquisition positions required for the camera module to complete the acquisition of the global image of the chip, controls the relative movement of the camera module and the adsorption module, and takes multiple local three-dimensional images and two-dimensional images of the chip at each acquisition position. Furthermore, optical imaging distortion correction is performed on the two-dimensional image and the three-dimensional image to compensate for the errors caused by optical imaging distortion. On this basis, pose correction is performed on the three-dimensional image to eliminate the geometric error and perspective error caused by the tilt and rotation of the chip. Then, perspective distortion correction is performed on the two-dimensional image using the corrected three-dimensional image, and the corrected two-dimensional images are stitched and fused to obtain a complete image of the chip, and the appearance detection can be performed according to the complete image of the chip.

[0046] This solution uses a camera module with a field of view smaller than the chip size to achieve the detection of the chip appearance. Moreover, by performing optical imaging distortion correction, pose correction, and perspective distortion correction on the image, the errors caused by the incorrect positions of the camera module and the chip, as well as the relative movement between the camera module and the adsorption module, are eliminated, and the accuracy of the image is improved. In addition, by correcting the three-dimensional image, then using the corrected three-dimensional image to correct the two-dimensional image, and finally completing the image stitching according to the two-dimensional image, it not only takes into account the influence of the pose of the chip in the three-dimensional space on imaging, but also reduces the difficulty and computational amount of image stitching. Description of the Drawings

[0047] Figure 1 is a schematic structural diagram of the chip detection system provided by an embodiment of the present invention;

[0048] Figure 2 is a schematic structural diagram of the cooperation between the camera module and the adsorption module provided by an embodiment of the present invention;

[0049] Figure 3 is a schematic flowchart of the chip detection method provided by an embodiment of the present invention;

[0050] Figure 4 is a schematic flowchart of the method for performing optical imaging distortion correction on the two-dimensional image and the three-dimensional image provided by an embodiment of the present invention;

[0051] Figure 5 is a schematic flowchart of the method for performing pose correction on the three-dimensional image provided by an embodiment of the present invention;

[0052] Figure 6 is a schematic structural diagram of the chip detection device provided by an embodiment of the present invention;

[0053] Figure 7 is a schematic structural diagram of the computer device provided by an embodiment of the present invention.

[0054] In the figure:

[0055] 101 guiding bracket, 102 linear slide rail, 103 driving motor, 104 adsorption module, 105 chip, 106 optical component, 107 camera module. Detailed Embodiments

[0056] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components of the embodiments of the present invention described and illustrated in the drawings here can be arranged and designed in various different configurations.

[0057] Accordingly, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0058] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not require further definition and explanation in subsequent drawings.

[0059] Figure 1 An application environment of the chip detection method of the present invention is shown. The chip detection method is applied to a chip detection system. The chip detection system includes a camera module, an adsorption module, a controller, and a chip detection device. The adsorption module is used to carry at least one chip to be detected. The size of the chip to be detected is larger than the field of view of the camera module. The camera module is used to collect two-dimensional and three-dimensional images of the chip to be detected. The controller is used to move the camera module and the adsorption module relative to each other. The chip detection device is used to: calculate the number of image acquisitions and image acquisition positions required for the camera module to complete the global image acquisition of the chip according to the size of the chip to be detected and the field of view of the camera module, sequentially number each image acquisition position, and mark the acquisition sequence identifier of each image acquisition position; then send the acquisition position and its corresponding acquisition sequence identifier to the controller, and the controller controls the relative movement of the camera module and the adsorption module to make the camera module capture two-dimensional and three-dimensional images of the chip at each acquisition position, then perform optical imaging distortion correction on the two-dimensional and three-dimensional images, then perform pose correction on the three-dimensional image, then perform perspective distortion correction on the two-dimensional image according to the pose-corrected three-dimensional image, and further splice and fuse the two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip, and finally perform appearance detection on the chip based on the complete image of the chip and output the detection result.

[0060] Figure 2 A schematic structure of the cooperation between the camera module and the adsorption module is provided. Please refer to Figure 2, the adsorption module 104 is disposed above the camera module 107, and an optical component 106 is provided around the camera module 107. The optical component 106 is used to illuminate the chips carried by the adsorption module 104. The adsorption module includes at least one column of vacuum nozzles, and each column of vacuum nozzles includes a plurality of nozzles. Thus, the adsorption module can adsorb multiple chips at a time, which can improve the efficiency of chip handling and detection. At the same time, when the chip size is relatively large, multiple nozzles can adsorb different regions on the chip surface, that is, multiple nozzles cooperate to jointly adsorb a chip, which can make the adsorption firm and reliable and reduce chip skew. A guiding bracket 101, a linear slide rail 102, and a driving motor 103 are provided on the upper part of the adsorption module 104. The adsorption module 104 is slidably connected to the linear slide rail 102. The driving motor 103 is used to drive the adsorption module 104 to translate along the linear slide rail 102. The guiding bracket 101 is used to support the air duct connected to the vacuum nozzles. During the movement of the adsorption module 104 along the linear slide rail 102, the chips carried by the adsorption module 104 can sequentially enter the field of view of the camera module 107, so that the camera module 107 can capture images of all the chips carried by the adsorption module 104.

[0061] Please refer to Figure 3 , this embodiment provides a chip detection method based on the above chip detection system. The method includes the following steps S310 - step S370.

[0062] S310: Obtain the chip size and the field of view of the camera module. According to the chip size and the field of view of the camera module, determine the image acquisition position information. The image acquisition position information includes at least two image acquisition positions and the acquisition sequence identifiers corresponding to the image acquisition positions.

[0063] Among them, the field of view of the camera module and the chip size can be manually set by the user, and the chip size needs to be reset when performing appearance detection on chips of different sizes. The chip detection device will calculate the number of times the camera module needs to take pictures to capture a complete chip image according to the field of view of the camera module and the chip size, and then divide the chip into several regions with the same number as the number of times of taking pictures. There is an overlap part allowed between adjacent regions. Take the center point of each region as the shooting target, and combine the spatial position coordinates of the chip to determine the image acquisition position (i.e., the spatial coordinates) corresponding to each shooting target. Then, according to the proximity relationship of these regions, assign the acquisition sequence identifier to each image acquisition position.

[0064] Exemplarily, if the field of view of the camera module is 60mm x 60mm and the chip size is 120mm x 120mm, then the camera module needs to take pictures 2 x 2 times to capture a complete chip image. Then, locate the spatial coordinates of the 4 image acquisition positions on the chip, and sequentially mark the acquisition sequence identifiers for each image acquisition position.

[0065] S320: Transmit the image acquisition position information to the controller so that the controller controls the relative movement of the adsorption module and the camera module, and receive the two-dimensional and three-dimensional images of the local part of the chip acquired by the camera module at each image acquisition position.

[0066] Specifically, after receiving the image acquisition position information, the controller can, according to the acquisition sequence identifier of each image acquisition position, control the adsorption module to move to each image acquisition position in sequence, and then control the camera module to acquire images, including taking three-dimensional and two-dimensional images of the same area. The taken three-dimensional image corresponds to the two-dimensional image, and there is a mapping relationship between the feature points on the three-dimensional image and the feature points on the two-dimensional image.

[0067] S330: Perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image respectively.

[0068] Please refer to Figure 4 , step S330 may specifically include:

[0069] S331. Obtain the correction coefficient.

[0070] Among them, the correction coefficient may include the correction coefficient corresponding to the two-dimensional image and the correction coefficient corresponding to the three-dimensional image. The correction coefficient is preset in advance in combination with the parameters of the camera module. In a possible implementation manner, the correction coefficient is obtained by obtaining multiple distortion variables for multiple punctuation marks on the calibration board, then determining multiple correction coefficients based on the multiple distortion variables, and then obtaining the optimal solution.

[0071] S332. Calculate the distortion variables of the two-dimensional image and the three-dimensional image according to the correction coefficient, and perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image according to the distortion variables.

[0072] The optical imaging distortion correction of the two-dimensional image includes: obtaining the distortion variables of each feature point on the two-dimensional image according to the correction coefficient corresponding to the two-dimensional image, and then adjusting the two-dimensional image according to the distortion variables. The optical imaging distortion correction of the three-dimensional image includes: obtaining the distortion variables of each feature point on the three-dimensional image according to the correction coefficient corresponding to the three-dimensional image, and then adjusting the three-dimensional image according to the distortion variables.

[0073] S340: Perform pose correction on each three-dimensional image.

[0074] The three-dimensional image position correction refers to correcting the spatial position of the three-dimensional image. Please refer to Figure 5 , the pose correction of the three-dimensional image includes:

[0075] S341. Determine the chip substrate surface area in the three-dimensional image.

[0076] Determine the chip substrate surface area in the three-dimensional image according to the distribution of the three-dimensional point cloud on the three-dimensional image; or, obtain the two-dimensional image corresponding to the three-dimensional image, and use the chip substrate surface area on the two-dimensional image as the chip substrate surface area of the three-dimensional image.

[0077] S343. Fit a substrate plane based on the three-dimensional point cloud data of the chip substrate surface area, and obtain the pose information of the substrate plane, where the pose information includes the angle difference between the substrate plane and the spatial coordinate system where the three-dimensional point cloud is located.

[0078] Among them, the angle difference includes a first angle difference between the substrate plane and the X-axis in the spatial coordinate system, a second angle difference between the substrate plane and the Y-axis, and a third angle difference between the substrate plane and the Z-axis.

[0079] S345. Correct the three-dimensional image and the two-dimensional image according to the pose information.

[0080] Specifically, it includes: calculating the first deflection direction and the first deflection angle of the substrate plane relative to the X-axis according to the first angle difference, and adjusting the positional relationship between the three-dimensional image and the X-axis according to the first deflection direction and the first deflection angle. Calculate the second deflection direction and the second deflection angle of the substrate plane relative to the Y-axis according to the second angle difference, and adjust the positional relationship between the three-dimensional image and the Y-axis according to the second deflection direction and the second deflection angle. Calculate the third deflection direction and the third deflection angle of the substrate plane relative to the Z-axis according to the third angle difference, and adjust the positional relationship between the three-dimensional image and the Z-axis according to the third deflection direction and the third deflection angle.

[0081] Exemplarily, if the first angle difference between the substrate plane and the X-axis in the spatial coordinate system is +1°, the second angle difference between the substrate plane and the Y-axis is -2°, and the third angle difference between the substrate plane and the Z-axis is +3°, then the first deflection direction of the substrate plane relative to the X-axis is the negative direction of the X-axis, the first deflection angle is 1°, and the adjustment operation of the three-dimensional image relative to the X-axis is to rotate the substrate plane 1° in the negative direction of the X-axis. Similarly, the adjustment operation of the three-dimensional image relative to the Y-axis is to rotate the substrate plane 2° in the positive direction of the Y-axis, and the adjustment operation of the three-dimensional image relative to the Z-axis is to rotate the substrate plane 3° in the negative direction of the Z-axis.

[0082] S350: Perform perspective distortion correction on the two-dimensional image according to the three-dimensional image after pose correction.

[0083] Specifically, according to the mapping relationship between the feature points on the three-dimensional image and the feature points on the two-dimensional image, the plane coordinates of the feature points on the two-dimensional image can be adjusted to be consistent with the plane coordinates of the corresponding feature points on the three-dimensional image to complete the perspective distortion correction of the two-dimensional image.

[0084] S360: Stitch and fuse multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip.

[0085] Specifically, it may include: matching feature points on multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to determine the overlapping area between adjacent two-dimensional images; and stitching and fusing multiple two-dimensional images according to the mapping relationship of feature points within the overlapping area to obtain a complete image of the chip.

[0086] Among them, the mapping relationship between feature points on different two-dimensional images can be obtained by matching the feature points on the two-dimensional images; then, according to the mapping relationship and the acquisition sequence identifier of the two-dimensional images, the overlapping area between adjacent two-dimensional images is determined.

[0087] S370: Perform an appearance inspection on the chip according to the complete image of the chip to obtain a detection result.

[0088] In the chip detection method provided in this embodiment, by calculating the number of acquisitions and acquisition positions required for the camera module to complete the acquisition of the global image of the chip, controlling the relative movement of the camera module and the adsorption module, multiple local three-dimensional images and two-dimensional images of the chip are captured at each acquisition position. Then, optical imaging distortion correction is performed on the two-dimensional images and three-dimensional images to compensate for the errors caused by optical imaging distortion. On this basis, pose correction is performed on the three-dimensional images to eliminate the geometric errors and perspective errors caused by the tilt and rotation of the chip. Then, perspective distortion correction is performed on the two-dimensional images using the corrected three-dimensional images, and the corrected two-dimensional images are stitched and fused to obtain a complete image of the chip. Thus, defect and size detection can be performed according to the complete image of the chip.

[0089] This embodiment uses a camera module with a field of view smaller than the size of the chip to detect the appearance of the chip. And by performing optical imaging distortion correction, pose correction, and perspective distortion correction on the images, the errors caused by the incorrect positions of the camera module and the chip and the relative movement between the camera module and the adsorption module are eliminated, improving the accuracy of the images. In addition, by correcting the three-dimensional images, then using the corrected three-dimensional images to correct the two-dimensional images, and finally completing image stitching according to the two-dimensional images, both the influence of the pose of the chip in the three-dimensional space on imaging is considered, and the difficulty and computational complexity of image stitching are reduced.

[0090] According to an embodiment of the present application, Figure 3 Some steps involved in the chip detection method shown can be executed by each module in the chip detection device shown in FIG. 6. For example, step S310 shown in FIG. 3 can be executed by the position information determination module 610 shown in FIG. 6, and step S320 can be executed by Figure 6The image acquisition module 620 shown performs; step S330 can be performed by Figure 6 the optical imaging distortion correction module 630 shown, step S340 can be performed by Figure 6 the pose correction module 640 shown, step S350 can be performed by Figure 6 the perspective distortion correction module 650 shown, step S360 can be performed by Figure 6 the image stitching module 660 shown, step S370 can be performed by Figure 6 the detection module 670 shown. Figure 6 Each module in the chip detection device shown can be separately or all combined into one or several other modules to form, or a certain (some) module can also be further split into multiple smaller modules in terms of function to form, which can achieve the same operation without affecting the realization of the technical effects of the embodiments of the present application. The above modules are divided based on logical functions. In practical applications, the function of one module can also be realized by multiple modules, or the functions of multiple modules can be realized by one module. In other embodiments of the present application, the chip detection device can also include other units. In practical applications, these functions can also be assisted by other units and can be realized by the cooperation of multiple units.

[0091] According to another embodiment of the present application, it can be achieved by running a computer program (including program code) capable of executing the respective steps involved in the corresponding method shown in Figure 3 on a general computing device such as a computer device including processing elements and storage elements such as a central processing unit (CPU), a random access storage medium (RAM), and a read-only storage medium (ROM), to construct the chip detection device shown in Figure 6 and to implement the chip detection method of the embodiments of the present application. The computer program can be recorded on, for example, a computer-readable recording medium, and be loaded into the above computing device through the computer-readable recording medium and run therein.

[0092] Based on the same inventive concept, the principle of solving problems and the beneficial effects of the chip detection device provided in the embodiments of the present application are similar to the principle of solving problems and the beneficial effects of the chip detection method in the method embodiments of the present application. The principle and beneficial effects of the method implementation can be referred to. For the sake of brevity, they will not be elaborated here.

[0093] Please refer to FIG. 7, Figure 7 which is a schematic structural diagram of a computer device provided by an embodiment of the present application. The computer device can be a terminal device or a server. As Figure 7As shown in the figure, the computer device at least includes a processor 601, a communication interface 602, and a memory 603. Among them, the processor 601, the communication interface 602, and the memory 603 can be connected through a bus or other means. Among them, the processor 601 (or the Central Processing Unit (CPU)) is the computing core and control core of the computer device. It can parse various instructions in the computer device and process various data of the computer device. For example, the CPU can be used to parse the power-on and power-off instructions sent by an object to the computer device and control the computer device to perform power-on and power-off operations. Another example is that the CPU can transmit various interactive data between the internal structures of the computer device, and so on. The communication interface 602 can optionally include a standard wired interface, a wireless interface (such as WI-FI, a mobile communication interface, etc.), and can be controlled by the processor 601 to send and receive data; the communication interface 602 can also be used for the transmission and interaction of internal data of the computer device. The memory 603 (Memory) is the memory device in the computer device and is used to store programs and data. It can be understood that the memory 603 here can include both the built-in memory of the computer device and, of course, the extended memory supported by the computer device. The memory 603 provides a storage space, and this storage space stores the operating system of the computer device, which can include but is not limited to: Android system, Internetworking Operating System (IOS), etc., and this application does not make any limitations in this regard.

[0094] The embodiment of the present application also provides a computer-readable storage medium (Memory). The computer-readable storage medium is the memory device in the computer device and is used to store programs and data. It can be understood that the computer-readable storage medium here can include both the built-in storage medium in the computer device and, of course, the extended storage medium supported by the computer device. The computer-readable storage medium provides a storage space, and this storage space stores the processing system of the computer device. And, in this storage space, there is also stored a computer program suitable for being loaded and executed by the processor 601. The processor of the computer device reads this computer instruction from the computer-readable storage medium, and the processor executes this computer instruction, so that the computer device executes the above-mentioned chip detection method. It should be noted that the computer-readable storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory; optionally, it can also be at least one computer-readable storage medium located far from the aforementioned processor.

[0095] The steps in the method of the embodiment of the present application can be adjusted, combined, and deleted according to actual needs.

[0096] The modules in the device of the embodiments of the present application can be combined, divided, and deleted according to actual needs.

[0097] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing relevant hardware through a program, and the program can be stored in a computer-readable storage medium. The readable storage medium can include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disc, etc.

[0098] Note that the above is only the preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A chip detection method, characterized in that, The method is applied to a chip detection system, which includes a camera module, an adsorption module, and a controller. The adsorption module is used to carry at least one chip to be detected, and the size of the chip to be detected is larger than the field of view of the camera module. The camera module is used to collect two-dimensional and three-dimensional images of the chip to be detected, and the controller is used to move the camera module and the adsorption module relative to each other. The method includes: Obtain the size of the chip and the field of view of the camera module, and determine the image acquisition position information according to the size of the chip and the field of view of the camera module. The image acquisition position information includes at least two image acquisition positions and acquisition sequence identifiers corresponding to the image acquisition positions; Transmit the image acquisition position information to the controller so that the controller can control the relative movement of the adsorption module and the camera module, and receive the two-dimensional and three-dimensional images of the local part of the chip acquired by the camera module at each image acquisition position; Perform optical imaging distortion correction on the two-dimensional and three-dimensional images respectively; Perform pose correction on each three-dimensional image; According to the mapping relationship between the feature points on the three-dimensional image after pose correction and the feature points on the two-dimensional image, adjust the plane coordinates of the feature points on the two-dimensional image to be consistent with the plane coordinates of the corresponding feature points on the three-dimensional image, so as to perform perspective distortion correction on the two-dimensional image; Stitch and fuse multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip; Perform appearance detection on the chip according to the complete image of the chip to obtain a detection result.

2. The method according to claim 1, characterized in that The performing optical imaging distortion correction on the two-dimensional and three-dimensional images respectively includes: Obtain correction coefficients; Calculate the distortion amounts of the two-dimensional and three-dimensional images according to the correction coefficients, and perform optical imaging distortion correction on the two-dimensional and three-dimensional images according to the distortion amounts.

3. The method according to claim 1, wherein, The performing pose correction on each three-dimensional image includes: Determine the chip substrate surface area in the three-dimensional image; Fit a substrate plane according to the three-dimensional point cloud data of the chip substrate surface area, and obtain the pose information of the substrate plane. The pose information includes the angle difference between the substrate plane and the space coordinate system where the three-dimensional point cloud is located; Correct the three-dimensional image and the two-dimensional image according to the pose information.

4. The method according to claim 3, characterized in that, The determining the chip substrate surface area in the three-dimensional image includes: Determine the chip substrate surface area in the three-dimensional image according to the distribution of the three-dimensional point cloud on the three-dimensional image; or, Obtain the two-dimensional image corresponding to the three-dimensional image, and use the chip substrate surface area on the two-dimensional image as the chip substrate surface area of the three-dimensional image.

5. The method according to claim 3, characterized in that, The angle difference includes a first angle difference between the substrate plane and the X axis in the space coordinate system, a second angle difference with the Y axis, and a third angle difference with the Z axis; The correcting the three-dimensional image and the two-dimensional image according to the pose information includes: Calculate a first deflection direction and a first deflection angle of the substrate plane relative to the X-axis according to the first angle difference; calculate a second deflection direction and a second deflection angle of the substrate plane relative to the Y-axis according to the second angle difference, and calculate a third deflection direction and a third deflection angle of the substrate plane relative to the Z-axis according to the third angle difference; Adjust the positional relationship between the three-dimensional image and the X-axis according to the first deflection direction and the first deflection angle, adjust the positional relationship between the three-dimensional image and the Y-axis according to the second deflection direction and the second deflection angle, and adjust the positional relationship between the three-dimensional image and the Z-axis according to the third deflection direction and the third deflection angle.

6. The method according to claim 1, wherein The step of splicing and fusing multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip includes: Match the feature points on multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to determine the overlapping area between adjacent two-dimensional images; Splice and fuse multiple two-dimensional images according to the mapping relationship of the feature points in the overlapping area to obtain a complete image of the chip.

7. A chip detection system, characterized in that, It includes a camera module, an adsorption module, a controller and a chip detection device. The adsorption module is used to carry at least one chip to be tested, the size of the chip to be tested is larger than the field of view of the camera module, the camera module is used to collect two-dimensional images and three-dimensional images of the chip to be tested, and the controller is used to move the camera module and the adsorption module relatively; The chip detection device includes: A position information determination module, configured to obtain the chip size and the field of view of the camera module, and determine image acquisition position information according to the chip size and the field of view of the camera module, where the image acquisition position information includes at least two image acquisition positions and an acquisition sequence identifier corresponding to the image acquisition position; An image acquisition module, configured to transmit the image acquisition position information to the controller so that the controller controls the relative movement of the adsorption module and the camera module, and receive the two-dimensional image and the three-dimensional image of the local part of the chip acquired by the camera module at each image acquisition position; An optical imaging distortion correction module, configured to perform optical imaging distortion correction on the two-dimensional image and the three-dimensional image respectively; A pose correction module, configured to perform pose correction on each three-dimensional image; A perspective distortion correction module, configured to adjust the plane coordinates of the feature points on the two-dimensional image to be consistent with the plane coordinates of the corresponding feature points on the three-dimensional image according to the mapping relationship between the feature points on the three-dimensional image after pose correction and the feature points on the two-dimensional image, so as to perform perspective distortion correction on the two-dimensional image; An image splicing module, configured to splice and fuse multiple two-dimensional images according to the acquisition sequence identifier of the two-dimensional images to obtain a complete image of the chip; A detection module, configured to perform an appearance detection on the chip according to the complete image of the chip to obtain a detection result.

8. A computer device, characterized in that, It includes: A memory and a processor; A memory, in which a computer program is stored; A processor for loading the computer program to implement the chip detection method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and the computer program is adapted to be loaded and executed by a processor to implement the chip detection method according to any one of claims 1-6.

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