A device and method for programming and managing Flash memory

Abstract

The embodiment of the present application provides a device and method for programming and managing Flash memory, the device comprising: a kernel attribute parameter configuration module, including a general flash memory interface FlashApi partial layer configuration file, which is configured to complete the configuration of the general flash memory interface FlashApi partial layer configuration file through the received configuration information during transplantation; a basic operation code module, which is configured to implement multiple types of basic functions and provide interfaces corresponding to the corresponding functions; a tool code module, which is used to implement CPU performance configuration and provide corresponding interfaces; and a framework interface module, which is configured to downwardly call the interfaces provided by the basic operation code module and the tool code module to provide users with a variety of operation interfaces for flash memory. The embodiment of the present application can be used to freely erase and freely program Flash, and at the same time, the characteristics of each Flash are abstracted into a common interface, simplifying the implementation and transplantation of upper-level applications.

Description

Technical Field

[0001] The present application relates to the field of Flash memory, and specifically, embodiments of the present application relate to a device and method for programming and managing Flash memory. Background Art

[0002] In modern electronic devices, Flash memory is the most commonly used non-volatile memory. Since chips of different series and architectures may require Flash memory with different parameters and specifications, in order to simplify Flash programming and management, developers need a common API framework to perform Flash memory operations, such as erasing, programming, and verification. However, existing solutions may be designed for specific Flash IP characteristics (for example, the shortest programming length for one-time programming, whether the Flash needs to be erased before programming, and the registers required for programming operations, etc.), and different methods need to be used for programming according to different Flash IP characteristics, which lacks sufficient versatility and flexibility. Summary of the invention

[0003] The purpose of the embodiments of the present application is to provide a device and method for programming and managing a Flash memory. The embodiments of the present application emphasize the general processing of Flash, provide a basic interface, and can freely erase and freely program Flash. At the same time, the characteristics of verification, encryption (dual-zone code encryption module) status and password area are taken into account. The framework abstracts the characteristics of each Flash into a general interface, simplifying the implementation and transplantation of upper-level applications.

[0004] In a first aspect, an embodiment of the present application provides a device for programming and managing a Flash memory, the device comprising: a kernel attribute parameter configuration module, including a general flash interface FlashApi partial layer configuration file, which is configured to complete the configuration of the general flash interface FlashApi partial layer configuration file through the received configuration information during transplantation; a basic operation code module, configured to implement multiple types of basic functions and provide interfaces corresponding to the corresponding functions, wherein the multiple types of basic functions include: maximum unit erasure, minimum unit erasure or minimum unit programming; a tool code module, used to implement CPU performance configuration of Flash design features and provide corresponding interfaces; and a framework interface module, configured to downward call the interfaces provided by the basic operation code module and the tool code module to provide users with multiple operation interfaces for flash memory, wherein the multiple operation interfaces for flash memory include: single-bit programming interface, free programming interface, free erasure interface and initialization interface.

[0005] In some embodiments, the free programming interface allows the user to program at any position and with any length, and the single-bit programming interface is used to provide the user with the function of performing single-bit programming at any position.

[0006] In some embodiments, the framework interface module is further configured to call down a verification interface to verify whether the written content is correct according to the encryption and decryption status of the chip and whether the password lock is opened.

[0007] In some embodiments, the verification interface may provide a comprehensive judgment of the correctness of the data based on different regional characteristics, DCSM status, and whether it is a password area.

[0008] In some embodiments, the interface of the tool code module is used to provide chip status information, wherein the chip status information includes the encryption and decryption status of the chip, whether the password lock is open, whether the "non-reprogrammable" operation has been performed, and whether the key of the cryptographic message authentication module CMAC is opened.

[0009] In some embodiments, the general FlashApi partial layer configuration file includes FlashInit, Flash0Base, Flash related registers, DCSM related information and registers.

[0010] In some embodiments, the minimum area erasing is for erasing the user's one-time programming area UserOtp, the system's one-time programming area SysOtp, and the MassSector area (ie, the area where the Flash stores engineering codes and constants).

[0011] In some embodiments, the minimum unit programming includes single-bit programming for the Mass area and the one-time programming area (otp area); the free programming interface is used to provide free programming including for the Mass area and the otp area, wherein the Mass area (or MassSector area) is the area where the Flash places engineering codes and constants.

[0012] In a second aspect, some embodiments of the present application provide a method for managing programming of a Flash memory, which is applied to a device for managing programming of a Flash memory as described above, the method comprising: determining a programming method, wherein the programming method includes at least minimum unit programming or free programming; completing programming according to the confirmed programming method; and verifying the programming result.

[0013] In some embodiments, the programming is completed according to the confirmed programming method, including: confirming the programming area; decomposing data according to the confirmed programming area; calling the erase function to erase data in the programming area; calling the corresponding minimum programming function to program the programming area. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 A block diagram of a device for programming and managing a Flash memory provided in an embodiment of the present application;

[0016] Figure 2 A diagram of the Flash programming related function architecture provided in the embodiment of the present application;

[0017] Figure 3 A flowchart of a programming method based on a device for programming and managing Flash memory provided in an embodiment of the present application. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0019] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0020] Different from the related art, the embodiment of the present application provides a device for programming and managing Flash memory, which is a universal FlashApi framework, which can realize erasing, free programming, single-bit programming and verification of the maximum and minimum areas of FLASH memory, and the framework is divided into four parts: FlashPortingCfg layer (that is, the layer where the kernel attribute parameter configuration module is located, that is, the kernel attribute parameter configuration module layer), Flash ip configuration layer (that is, the layer where the basic operation code module is located, that is, the basic operation code module layer), Cpu ip configuration layer (that is, the layer where the tool code module is located, that is, the tool code module layer) and interface layer (that is, the layer where the framework interface module is located, that is, the framework interface module layer).

[0021] It can be understood that compared with previous technologies, the device for programming and managing Flash memory in the embodiment of the present application provides higher versatility and flexibility, can ignore the underlying Flash IP characteristics, and can perform arbitrary length programming, erasure, and full-function verification without regional differences. In addition, by providing a simplified interface and a clear code structure (a clear code structure is a clear level of code. In this project, the structure can be divided into: kernel attribute parameter configuration module, basic operation code module, tool code module, framework interface module), it greatly simplifies the process of transplanting and adapting to different Flash memories (i.e. flash memory).

[0022] Please see Figure 1 , Figure 1 Some embodiments of the present application provide a device for programming and managing a Flash memory, the device comprising: a kernel attribute parameter configuration module 140, a basic operation code module 120, a tool code module 130 and a framework interface module 110.

[0023] The kernel attribute parameter configuration module includes a general flash interface FlashApi partial layer configuration file (for example, the underlying configuration file of the general flash interface FlashApi, used to configure the Flash initialization function, Flash base address, Flash related registers, DCSM related information and other registers), which is configured to complete the configuration of the general flash interface FlashApi partial layer configuration file through the received configuration information during porting.

[0024] For example, the FlashApi kernel attribute parameter configuration module contains the bottom-level configuration-related file of the general FlashApi. When porting, you only need to configure this file, which contains FlashInit, Flash base address, Flash-related registers, DCSM-related information and registers. In other words, the bottom-level configuration file of the general flash memory interface FlashApi is used to configure Flash initialization, Flash base address, Flash-related registers, DCSM-related information and other registers. When porting, developers only need to configure this file.

[0025] The basic operation code module is configured to implement multiple types of basic functions and provide interfaces corresponding to the corresponding functions, wherein the multiple types of basic functions include: maximum unit erasure, minimum unit erasure or minimum unit programming.

[0026] For example, the layer where the FlashApi basic operation code module is located implements the most basic functions and provides interfaces. For example: erasing of the maximum unit and the minimum unit, programming of the minimum unit. These interfaces are invisible to users and are called by the framework layer. This layer does not include programming verification, encryption module verification, address validity verification, and does not include any processing for special cases.

[0027] Tool code module, used to implement CPU performance configuration and provide corresponding interfaces.

[0028] It should be noted that in order to ensure the security of the code and prevent hackers from stealing or tampering with the program, the chip will have a protection mechanism for the chip, such as DCSM (dual-zone code encryption module). The tool code module provides a mechanism to determine whether the xth sector or a certain address belonging to the Flash is encrypted according to the characteristics of the CPU, and determines whether operations such as reading, changing or erasing are allowed. Usually, the physical level sector of the Flash and the logical level sector processed by the CPU to the Flash are not one-to-one corresponding. In some embodiments of the present application, the tool code module provides an interface for converting the logical sector to the physical sector. Since the passwords or keys of the dual-zone code encryption module (Dcsm), the cryptographic message authentication code (CMAC) module, etc. will be stored in the password area of ​​UserOtp, the positions of these password areas cannot be read after the password lock on the chip. In some embodiments of the present application, the tool code module provides a mechanism to determine whether it is a password area. In some embodiments of the present application, the tool code module provides a mechanism to detect whether the chip has been executed by the LastErase (last programming or non-reprogrammable) operation; after execution, the Otp area of ​​the chip Flash will not be erased.

[0029] For example, the FlashApi tool code module layer includes configurations related to CPU features, such as encryption and decryption judgment of the dual-zone code encryption module.

[0030] The framework interface module is configured to downwardly call the interfaces provided by the basic operation code module and the tool code module to provide users with a variety of operation interfaces for flash memory, wherein the multiple operation interfaces for flash memory include: single-bit programming interface, free programming interface, free erase interface and initialization interface.

[0031] For example, the layer (Framework) where the framework interface module is located calls the interfaces provided in the basic operation code module layer and the tool code module layer downward to realize free programming (arbitrary length, arbitrary position, and even single bit). This layer also calls down interfaces such as DCSM verification to verify whether the written content is correct based on factors such as the encryption and decryption status of the chip and whether the password lock is opened. Ultimately, only four interfaces are provided to the user (single-bit programming, free programming, free erasure, and initialization). In other words, the framework interface module calls the interfaces provided by the basic operation code module and the tool code module to realize functions such as free programming and single-bit programming. At the same time, it calls the CSM verification interface to realize functions such as DCSM and password area verification. Ultimately, four interfaces are provided to the user: FapiProgram, FapiBitProgram, FapiErase, and FapiInit, so that the user can implement various flash memory operations.

[0032] Combination Figure 1 It can be seen that the kernel attribute parameter configuration module 140, the basic operation code module 120, the tool code module 130 and the framework interface module 110 are located in the software part. Figure 1 The hardware part also exemplarily includes: a CPU processor, an encryption module and a flash memory, and Figure 1 The flash memory exemplarily includes a Mass area, a UserOtp area, and a SysOtp area. It should be noted that: Figure 1 The layer where the kernel attribute parameter configuration module is located is related to the processor. Therefore, when transplanting, the relevant parameters of the module need to be configured according to the target processor. Figure 1 The basic operation code module 120, the tool code module 130 and the framework interface module 110 are all independent of the processor, so there is no need to adjust the codes related to these modules when transplantation occurs.

[0033] For example, in some embodiments of the present application, the free programming interface allows the user to program at any position and with any length, and the single-bit programming interface is used to provide the user with the function of performing single-bit programming at any position.

[0034] For example, in some embodiments of the present application, the framework interface module is further configured to call down a verification interface to verify whether the written content is correct according to the encryption and decryption status of the chip and whether the password lock is opened.

[0035] For example, in some embodiments of the present application, the verification interface may provide a comprehensive judgment of the correctness of the data based on different regional characteristics, DCSM status, and whether it is a password area.

[0036] For example, in some embodiments of the present application, the interface of the tool code module is used to provide encryption attribute information of the chip, and the chip encryption and decryption attribute information includes the encryption and decryption status of the chip and whether the password lock is opened.

[0037] For example, in some embodiments of the present application, the general FlashApi partial layer configuration file includes FlashInit, Flash0Base, Flash related registers, DCSM related information and registers.

[0038] For example, in some embodiments of the present application, the minimum area erasure is for erasing the user's one-time programming area UserOtp, the system's one-time programming area SysOtp, and the MassSector area.

[0039] For example, in some embodiments of the present application, the minimum unit programming includes single-bit programming for the Mass area and the one-time programming area otp (one time program) area; the free programming interface is used to provide free programming including the Mass area and the otp area, and the Mass area (or MassSector area) is the area where the Flash stores engineering codes and constants.

[0040] It should be noted that the maximum area erase and minimum area erase of some embodiments of the present application implement the ChipErase and ChipLastErase functions of the entire Bank through the general FlashApi, which includes the erase operation of the entire Flash chip, supports the minimum area erase of UserOtp, SysOtp and MassSector, and ensures that the area to be erased is correctly identified and erased. Some embodiments of the present application support free programming: programming is allowed at any position and any length, regardless of whether it is restricted by the characteristics of Flash, including programming in the Mass area and the OTP area. Some embodiments of the present application support single-bit programming, which provides the ability to perform single-bit programming at any position, regardless of the characteristics of Flash, including programming in the Mass area and the OTP area. The verification function provided by some embodiments of the present application comprehensively judges the correctness of the data based on factors such as different regional characteristics, DCSM status, and whether it is a password area, which helps to ensure that the data is correctly written and stored in the flash memory.

[0041] It is not difficult to understand that some embodiments of the present application Figure 1 The framework corresponding to the device provides an extensible and easily configurable interface that supports flash memory erasing, programming and verification functions, while adapting to different application scenarios through hardware configuration and CPU feature configuration, which helps to simplify the development and maintenance of flash memory operations in embedded systems.

[0042] Some embodiments of the present application provide a programming method, which is based on the device for programming and managing the Flash memory as described above, and the method includes: determining a programming method, wherein the programming method includes at least minimum unit programming or free programming; completing programming according to the confirmed programming method; and verifying the programming result.

[0043] In some embodiments of the present application, the programming is completed according to the confirmed programming method, including: confirming the programming area; decomposing data according to the confirmed programming area; calling the erase function to erase data in the area to be programmed; calling the corresponding minimum programming function to program the programming area. It should be noted that for the physical IP characteristics of Flash, the programming of the shortest area that can be programmed at one time (the length of each programming should be at least a multiple of the shortest programming length). For example, the Mass area of ​​the Flash of some chips is programmed at least 256 bits at a time, and some are 32 bits. The minimum programming function of some embodiments of the present application is a function that can program the shortest programming length at one time. This function is located in the folder of the basic operation code module, and the upper-level free programming function implements the free programming function by calling this function.

[0044] Combine the following Figure 2 and Figure 3 Exemplary description based on Figure 1 Methods of programming.

[0045] like Figure 2 As shown, the programming process of some embodiments of the present application includes: a single-bit programming function calls a free programming function; the free programming function calls a programming tool to implement; the programming tool calls a basic programming function, which also includes a verification code module; the basic programming function includes a Flash area minimum unit programming function, a UserOtp area minimum programming function, and a SysOtp area minimum programming function. Figure 2 The function names of the corresponding functions are also provided in , and each function name will not be cited and explained one by one here.

[0046] like Figure 3 As shown, the programming method of some embodiments of the present application includes:

[0047] The first step is programming.

[0048] The second step is to determine the programming mode. If it is confirmed to be a single-bit mode, the single-bit programming interface is called, and then the interface calls the free programming interface and then calls the free programming function; if it is confirmed to be a flexible-length programming mode, the free programming interface is directly called for free programming.

[0049] The third step is to determine the programming area. If it belongs to the Mass area, the data is decomposed according to the characteristics of the Mass area; if it belongs to the UsserOtp area, the data is decomposed according to the UserOtp silent characteristics; if it belongs to the SysOtp area, the data is decomposed according to the SysOtp silent characteristics.

[0050] The fourth step is to determine whether erasure is required. If necessary, the corresponding erase function is called to perform the erase operation. Otherwise, the corresponding minimum programming function is directly called to perform programming.

[0051] Step 5: Verification.

[0052] For example, 1 reads the original data (OriginalData) of the address; 2 writes the data to be written (WriteData); 3 reads the current address data after writing (CurData); 4 performs AND operation on WriteData and OriginalData (expectData=WriteData&OriginalData); 5 determines whether expectData is equal to CurData.

[0053] Step 6, determine whether the data is written correctly. If it is data written to the UserOtp area, execute step 7. If it is data written to the Mass area, execute step 8. If it is data written to the SysOtp area, confirm the programming error and return an error code.

[0054] Step 7. Determine whether it is a password area. If so, confirm that the programming is correct and proceed to step 9 (this is because once the chip is locked, the password area address in the Flash will be invisible and unprogrammable. Therefore, if the programming area is found to be a password area, it is assumed that no error has occurred in this project). Otherwise, proceed to step 8.

[0055] Step 8: Determine whether the chip is decrypted. If so, the programming is determined to be correct and continue to step 9. Otherwise, the programming is determined to be wrong and an error code is returned.

[0056] The ninth step is to determine whether the programming is completed. If not, return to the third step. If yes, the programming is completed.

[0057] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0058] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0059] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0060] The above description is only an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0061] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0062] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

Claims

1. A device for programming and managing a Flash memory, characterized in that: The device comprises: A kernel attribute parameter configuration module, including a general flash memory interface FlashApi partial layer configuration file, is configured to complete the configuration of the general flash memory interface FlashApi partial layer configuration file through the received configuration information during transplantation; A basic operation code module is configured to implement multiple basic functions and provide interfaces corresponding to the corresponding functions, wherein the multiple basic functions include: maximum unit erase, minimum unit erase and minimum unit program; A tool code module for implementing the CPU performance configuration of the Flash design features and providing corresponding interfaces; and A framework interface module is configured to downwardly call the interfaces provided by the basic operation code module and the tool code module to provide a user with a variety of operation interfaces for the flash memory, wherein the multiple operation interfaces for the flash memory include: a single-bit programming interface, a free programming interface, a free erasing interface, and an initialization interface; The minimum unit programming includes single-bit programming for the Mass area and the one-time programming area (otp), wherein the Mass area is the area where the Flash stores engineering codes and constants; The free programming interface is used to provide free programming for the Mass area and the one-time programming area (otp area); The single-bit programming interface is used to provide the user with a function of performing single-bit programming at any location.

2. The device according to claim 1, characterized in that The free programming interface allows the user to program at any position and at any length.

3. The device according to claim 1, characterized in that The framework interface module is also configured to call the verification interface downward to verify whether the written content is correct according to the encryption and decryption status of the chip and whether the password lock is opened.

4. The device according to claim 3, characterized in that The verification interface can provide comprehensive judgment on the correctness of data based on different regional characteristics, DCSM status and whether it is a password area.

5. The device according to claim 1, characterized in that The interface of the tool code module is used to provide chip status information, wherein the chip status information includes the encryption and decryption status of the chip, whether the password lock is opened, whether the "non-reprogrammable" operation has been performed, and whether the key of the cryptographic message authentication module CMAC is opened.

6. The device according to claim 1, characterized in that The general flash memory interface FlashApi partial layer configuration file includes a Flash initialization file FlashInit, a base address FlashXBase of the configuration register of the xth Flash, Flash related registers, dual-zone code encryption module DCSM related information and registers.

7. The device according to claim 1, characterized in that The minimum unit erasing is for erasing the user's one-time programming area UserOtp, the system's one-time programming area SysOtp, and the Flash area MassSector for storing engineering codes and constants.

8. A programming method, based on the apparatus for managing programming of a Flash memory according to any one of claims 1 to 7, the method comprising: Determining a programming mode, wherein the programming mode at least includes minimum unit programming or free programming; Complete programming according to the confirmed programming method; Verify the programming results.

9. The method according to claim 8, characterized in that The programming is completed according to the confirmed programming method, including: Confirm the programming area; Decomposing data according to the identified programming areas; Call the erase function to erase the data in the area to be programmed; The corresponding minimum programming function is called to program the programming area.

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