A shared page table management method that meets multi-core SMP operation requirements

By introducing a shared page table management method in multi-core processors, the space waste and complexity caused by independent storage management of multi-core processors is solved, and more efficient storage management performance and resource conservation are achieved.

CN118132467BActive Publication Date: 2025-08-19XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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Patent Information

Application Number
CN202311847465.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-12-28
Publication Date
2025-08-19
Estimated Expiration
2043-12-28

AI Technical Summary

Technical Problem

In the prior art, multi-core processors independently implement storage management, resulting in wasting operating system space and complex storage management processes.

Method used

The shared page table management method is adopted, and the shared page table is created by the operating system and jointly managed by all cores in the multi-core processor, including the core state address space, the user state address space, the correspondence between virtual addresses and physical addresses and access rights. The shared page table is performed through the shared page table to ensure the unified storage management capabilities of the multi-core processor.

Benefits of technology

Improves the storage management performance of multi-core processor operating systems, saves space resources, and simplifies the storage management process.

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Abstract

The present invention relates to the technical field of operating systems, and provides a shared page table management method that meets the requirements of multi-core SMP operation. The method comprises: creating a shared page table by an operating system, the operating system running on a multi-core processor, the shared page table being created by a boot core in the multi-core processor and jointly managed by all cores in the multi-core processor; and the multi-core processor performing software paging or hardware paging based on the shared page table. This application solves the technical problem in the prior art that independent storage management by multi-core processors leads to waste of operating system space and complicates the storage management process. The application achieves the technical effect of using shared page tables to improve the storage management performance of the multi-core processor operating system and save space resources.
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Description

Technical Field

[0001] The present invention relates to the technical field of operating systems, and in particular to a shared page table management method that meets the requirements of multi-core SMP operation. Background Art

[0002] As aviation applications become more scenario-based and complex, multi-core operating systems are increasingly being integrated into high-speed computers. SMP operating mode is a common mode for multi-core operating systems, characterized by the operating system controlling all processors and sharing memory across all processors. Operating systems using SMP operating mode offer advantages such as shared memory, high performance to power efficiency, and load balancing, further leveraging the hardware advantages of multi-core processors.

[0003] MMU memory management is a key feature of processor hardware. Each processor core has its own independent memory management. In existing technologies, if each processor core implements memory management independently, it will cause a certain amount of waste in the operating system space and complicate the memory management process. Summary of the Invention

[0004] In view of this, an embodiment of the present invention provides a shared page table management method and method that meets the requirements of multi-core SMP operation, so as to solve the technical problem that the independent storage management of multi-core processors in the prior art leads to waste of operating system space and complicates the storage management process. The present invention provides a shared page table management method that meets the requirements of multi-core SMP operation, and the method includes:

[0005] A shared page table is created by an operating system, the operating system running on a multi-core processor, the shared page table is created by a boot core in the multi-core processor and is jointly managed by all cores in the multi-core processor;

[0006] If the multi-core processor performs software paging, after the multi-core processor triggers a page fault exception entry, the operating system accesses the corresponding page table entry in the shared page table to confirm whether the current page is accessible. If the current page is accessible, the operating system controls the hardware storage management unit of the multi-core processor to perform paging according to the page table entry. If the current page is not accessible, the operating system outputs a space access exception.

[0007] If the multi-core processor performs hardware paging, the multi-core processor performs paging according to the shared page table, and directly reports a space access exception to the operating system if a page is missing.

[0008] Furthermore, the page table attributes of the shared page table are configured according to user needs, and the configuration items include kernel state address space, user state address space, correspondence between virtual address and physical address and access rights. The configuration items are shared by multiple cores in the multi-core processor.

[0009] Furthermore, all cores in the multi-core processor jointly manage the shared page table, including that all cores in the multi-core processor can create page mappings, modify page mappings, delete page mappings, and use software or hardware to query the page table space to perform paging operations on the shared page table.

[0010] Furthermore, based on the kernel locking capability of the operating system, when modifying the same page table entry of the shared page table, only a single core of the multi-core processor can modify it.

[0011] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above-mentioned technical solutions adopted in the embodiments of this specification include at least the following: the present invention provides a shared page table management method that meets the requirements of multi-core SMP operation. Based on the characteristics of the SMP operating system, the storage management capabilities of each core of the multi-core processor are utilized, and the shared page table is used to improve the storage management performance of the multi-core processor operating system and save space resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 This is a flow chart of a shared page table management method for multi-core SMP operation provided by an embodiment of the present invention;

[0014] Figure 2 This is a schematic diagram of a method for using a shared page table provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0015] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0016] The following describes the embodiments of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the features in the following embodiments and embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative work are within the scope of protection of this application.

[0017] The present invention provides a shared page table management method that meets the requirements of multi-core SMP operation. Based on the characteristics of the SMP operating system, the storage management capability of each core of the multi-core processor is utilized and the storage management performance of the multi-core processor operating system is improved by using a shared page table.

[0018] The present invention provides a shared page table management method that meets the requirements of multi-core SMP operation, the method comprising:

[0019] Step S100: creating a shared page table by an operating system, the operating system running on a multi-core processor, the shared page table being created by a boot core in the multi-core processor and being jointly managed by all cores in the multi-core processor;

[0020] Furthermore, the page table attributes of the shared page table are configured according to user needs, and the configuration items include kernel state address space, user state address space, correspondence between virtual address and physical address and access rights. The configuration items are shared by multiple cores in the multi-core processor.

[0021] Specifically, according to Figure 1 and Figure 2 As shown, in step S100, the operating system first initializes the MMU (memory management unit). The boot core (core 0) of the multi-core processor creates a shared page table. All cores in the multi-core processor access the unified shared page table for memory management. The shared page table contains page tables for all accessible address spaces, primarily including page directories and page table entries. The operating system allocates space for the created shared page table and, based on processor characteristics, can store the created shared page table in special registers or other locations to accelerate access. The shared page table constructed during the MMU initialization process is configured based on all space configurations required by the application and system. The configuration includes the correspondence between virtual addresses (va) and physical addresses (pa), access permissions (user mode or system mode), and permissions (read, write, execute (R, W, X)). The shared page table is shared by multiple cores, ensuring the atomicity of operations.

[0022] Furthermore, all cores in the multi-core processor jointly manage the shared page table, including that all cores in the multi-core processor can create page mappings, modify page mappings, delete page mappings, and use software or hardware to query the page table space to perform paging operations on the shared page table.

[0023] Step S200: If the multi-core processor performs software paging, after the multi-core processor triggers a page fault exception entry, the operating system accesses the corresponding page table entry in the shared page table to confirm whether the current page is accessible. If the current page is accessible, the operating system controls the hardware memory management unit of the multi-core processor to perform paging according to the page table entry. If the current page is inaccessible, the operating system outputs a space access exception.

[0024] Step S300: If the multi-core processor performs hardware paging, the multi-core processor performs paging according to the shared page table, and directly reports a space access exception to the operating system if a page is missing.

[0025] Specifically, if Figure 1 and Figure 2 As shown, during the design process of the operating system, based on the characteristics of the SMP mode, for processors that implement software paging, the page fault exception entries of each processor are unified. After the operating system MMU is initialized, each core triggers a page fault exception to access the unified entry. The operating system confirms whether the current page is accessible by accessing the corresponding page table entry in the shared page table. If it is accessible, the hardware storage unit is controlled according to the page table entry to ensure that the space of the page fault can be accessed after the exception is returned and the program continues to execute. If it is not accessible, the operating system reports a space access exception. For processors with hardware paging, the operating system sets the prepared shared page table to the registers specified by each processor core. When paging, the hardware directly switches pages according to the shared page table. If a page fault occurs, a space access exception is directly reported to the operating system.

[0026] Furthermore, based on the kernel locking capability of the operating system, when modifying the same page table entry of the shared page table, only a single core of the multi-core processor can modify it.

[0027] Specifically, while a program is running, each core can modify the contents of the shared page table, but atomicity must be guaranteed. This means that only one core can modify the same page table entry at a time. Although multi-core processors manage memory independently for multiple cores, the SMP multi-core system operating mode, where all space is shared by multiple cores, allows independent page tables to be shared, saving space and improving performance.

[0028] The embodiments of the present invention achieve the following technical effects:

[0029] The present invention provides a shared page table management method that meets the requirements of multi-core SMP operation. Based on the characteristics of the SMP operating system, the shared page table between the cores is defined by utilizing the storage management capabilities of each core of the multi-core processor. The page table directory contains the page table base addresses of all domain spaces, and the shared page table is recorded in a memory global variable or register. For a multi-core operating system in SMP mode, when the storage management unit is enabled, the storage management capability can be realized by accessing the shared page table. Since the SMP mode requires multiple cores to share the kernel address space, the shared page table address space management method provided by this application improves the storage management performance of the multi-core processor operating system and saves space resources.

[0030] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A shared page table management method that meets multi-core SMP operation, characterized in that: The method comprises: A shared page table is created by an operating system, the operating system running on a multi-core processor, the shared page table is created by a boot core in the multi-core processor and is jointly managed by all cores in the multi-core processor; If the multi-core processor performs software paging, after the multi-core processor triggers a page fault exception entry, the operating system accesses the corresponding page table entry in the shared page table to confirm whether the current page is accessible. If the current page is accessible, the operating system controls the hardware storage management unit of the multi-core processor to perform paging according to the page table entry. If the current page is not accessible, the operating system outputs a space access exception. If the multi-core processor performs hardware paging, the multi-core processor performs paging according to the shared page table, and directly reports a space access exception to the operating system if a page is missing.

2. A shared page table management method that meets multi-core SMP operation requirements according to claim 1, characterized in that: The page table attributes of the shared page table are configured according to user needs. The configuration items include kernel state address space, user state address space, correspondence between virtual address and physical address, and access rights. The configuration items are shared by multiple cores in the multi-core processor.

3. The shared page table management method for multi-core SMP operation according to claim 1, characterized in that: All cores in the multi-core processor jointly manage the shared page table, including that all cores in the multi-core processor can create page mappings, modify page mappings, delete page mappings, and query page table space using software or hardware to perform paging operations on the shared page table.

4. The method for managing a shared page table that satisfies multi-core SMP operation according to claim 1, wherein: Based on the kernel locking capability of the operating system, the multi-core processor can only modify the same page table entry of the shared page table by a single core.

Citation Information

Patent Citations

  • Virtual machine shared memory allocation method and device and electronic equipment

    CN112363796A

  • Method and device for determining global page directory, electronic equipment and storage medium

    CN114327777A