A wafer detection method, device and electronic device

By generating the test parameter feature map of the wafer and calculating its similarity, the problem of abnormal identification of uniformity parameters in the wafer is solved, and the accuracy and yield of wafer detection are improved.

CN118136536BActive Publication Date: 2025-07-22CHENGDU HAIGUANG MICROELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202410266194.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-03-07
Publication Date
2025-07-22
Estimated Expiration
2044-03-07

AI Technical Summary

Technical Problem

The prior art cannot identify abnormal uniformity of electrical parameters in wafers in a timely manner, resulting in yield and performance problems.

Method used

By generating the test parameter feature maps of the wafer to be detected and the reference wafer, calculating their similarity, and setting a similarity threshold. If it is lower than the threshold, it is determined that the uniformity within the wafer is abnormal, and the feature map similarity comparison is performed using hashing algorithm and grayscale image processing technology.

Benefits of technology

It realizes timely identification of risk wafers, improves the yield of wafer products, and reduces additional yield and profit losses caused by failure to detect problems in a timely manner.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present invention disclose a wafer detection method, device, and electronic device, which relate to the technical field of chip testing and are invented to facilitate timely determination of risky wafers. The wafer detection method includes: generating a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected during testing; determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of a reference wafer; and if the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, determining that the intra-wafer uniformity of the wafer to be detected is abnormal. Embodiments of the present invention are applicable to intra-wafer uniformity detection.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular, to a wafer detection method, device, and electronic device. Background Art

[0002] In the semiconductor manufacturing process, chip testing is a key link to ensure product quality and performance. It involves meticulous detection of each manufactured chip to ensure that it meets the design and performance specifications. Chip testing generally includes three main stages: Wafer Accept Test (WAT), Chip Probe (CP), and Final Test (FT).

[0003] Among them, the test object of WAT is the test structure on the wafer scribe line. By testing the electrical parameters of the test structure, it is determined whether the wafer meets the shipping quality requirements. CP is between wafer manufacturing and packaging in the entire chip manufacturing process. The test object is each Die in the whole wafer, and the purpose is to ensure that each Die in the whole wafer can basically meet the device design specifications.

[0004] In the process of implementing the present invention, the inventors found that the uniformity of the electrical parameters within the wafer is one of the indicators to measure whether the manufacturing process has changed. The uniformity of the electrical parameters within the wafer refers to the difference in electrical parameter indicators between different positions on a single wafer. When the manufacturing process changes, it may lead to the deterioration of the uniformity of the electrical parameters within the wafer, thereby affecting the yield and performance. Summary of the Invention

[0005] In view of this, the embodiments of the present invention provide a wafer detection method, device, electronic device, and storage medium, which are convenient for timely determining risky wafers and are beneficial to improving the yield of wafer products.

[0006] In a first aspect, an embodiment of the present invention provides a wafer detection method, including: generating a test parameter feature map of the to-be-detected wafer based on the test parameters of the acceptance test of the to-be-detected wafer; determining the similarity between the test parameter feature map of the to-be-detected wafer and the test parameter feature map of a reference wafer; if the similarity between the test parameter feature map of the to-be-detected wafer and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, determining that the uniformity within the to-be-detected wafer is abnormal.

[0007] According to a specific embodiment of the present invention, generating a test parameter feature map of the wafer to be detected based on the test parameters of the acceptance test of the wafer to be detected includes: obtaining the coordinate information of the acceptance test position of the wafer to be detected in the wafer to be detected and the corresponding test parameter values; generating the test parameter feature map of the wafer to be detected based on the coordinate information of the acceptance test position in the wafer to be detected and the corresponding test parameter values.

[0008] According to a specific embodiment of the present invention, determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer includes: calculating the hash value of the test parameter feature map of the wafer to be detected; comparing the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

[0009] According to a specific embodiment of the present invention, calculating the hash value of the test parameter feature map of the wafer to be detected includes: converting the test parameter feature map of the wafer to be detected into a grayscale image; calculating the pixel mean value of the grayscale image; traversing the pixel points of the grayscale image, if the pixel value of a pixel point of the grayscale image is greater than or equal to the pixel mean value, setting the pixel point to a first flag bit, otherwise setting the pixel point to a second flag bit; wherein, the second flag bit is different from the first flag bit; obtaining the hash value of the test parameter feature map of the wafer to be detected based on the flag bits corresponding to the pixel points of the grayscale image; wherein, each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag bit of each pixel point corresponds to the numerical value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

[0010] According to a specific embodiment of the present invention, before converting the test parameter feature map of the wafer to be detected into a grayscale image, the method further includes: scaling the size of the test parameter feature map of the wafer to be detected to a target size; wherein, converting the test parameter feature map of the wafer to be detected into a grayscale image includes: converting the test parameter feature map scaled to the target size into a grayscale image.

[0011] According to a specific embodiment of the present invention, after determining the intra-wafer uniformity abnormality of the wafer to be detected, the method further includes: determining the magnitude of the intra-wafer uniformity difference of the wafer to be detected.

[0012] According to a specific embodiment of the present invention, determining the in-wafer uniformity difference of the wafer to be detected includes: based on the distribution diagram of the test parameters of the wafer to be detected relative to the wafer center, extracting the median of the test parameters at each distance node along the radial direction from the wafer center of the wafer to be detected; based on the distribution diagram of the test parameters of the reference wafer relative to the wafer center, extracting the median of the test parameters at each distance node along the radial direction from the wafer center of the reference wafer; wherein, the distance segmentation method along the radial direction from the wafer center of the reference wafer is consistent with that of the wafer to be detected along the radial direction from the wafer center; based on the median of the test parameters at each distance node of the wafer to be detected and the reference wafer, determining the magnitude difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance segment.

[0013] and / or,

[0014] Based on the median of the test parameters at each distance node of the wafer to be detected and the reference wafer, determining the gradient difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance segment; wherein, the gradient difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance segment is the magnitude difference between the difference of the median of the test parameters of the nth distance node and the (n - 1)th distance node of the wafer to be detected and the difference of the median of the test parameters of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1.

[0015] In a second aspect, an embodiment of the present invention provides a wafer detection device, including: a feature map generation unit, configured to generate a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected under test; a similarity comparison unit, configured to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer; a uniformity determination unit, if the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, determining that the in-wafer uniformity of the wafer to be detected is abnormal.

[0016] According to a specific embodiment of the present invention, the feature map generation unit includes: a test information acquisition module, configured to acquire the coordinate information of the test position of the wafer to be detected in the wafer to be detected and the corresponding test parameter values; a feature map generation module, configured to generate a test parameter feature map of the wafer to be detected based on the coordinate information of the test position in the wafer to be detected and the corresponding test parameter values.

[0017] According to a specific embodiment of the present invention, the similarity comparison unit includes: a hash calculation module for calculating the hash value of the test parameter feature map of the wafer to be detected; a similarity comparison module for comparing the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

[0018] According to a specific embodiment of the present invention, the hash calculation module includes: an image conversion sub-module for converting the test parameter feature map of the wafer to be detected into a grayscale image; a pixel mean calculation sub-module for calculating the pixel mean of the grayscale image; a flag setting sub-module for traversing the pixel points of the grayscale image, and if the pixel value of a pixel point of the grayscale image is greater than or equal to the pixel mean, setting the pixel point to the first flag, otherwise setting the pixel point to the second flag; wherein the second flag is different from the first flag; a hash value acquisition sub-module for obtaining the hash value of the test parameter feature map of the wafer to be detected based on the flags corresponding to the pixel points of the grayscale image; wherein each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag of each pixel point corresponds to the numerical value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

[0019] According to a specific embodiment of the present invention, the hash calculation module further includes: an image scaling sub-module for scaling the size of the test parameter feature map of the wafer to be detected to a target size before the image conversion sub-module converts the test parameter feature map of the wafer to be detected into a grayscale image.

[0020] According to a specific embodiment of the present invention, the wafer detection device further includes: a uniformity quantification unit for determining the size of the intra-wafer uniformity difference of the wafer to be detected.

[0021] According to a specific embodiment of the present invention, the uniformity quantification unit includes: a median extraction module for extracting the median of the test parameters of each distance node along the radial direction from the wafer center of the wafer to be detected based on the distribution map of the test parameters of the wafer to be detected relative to the wafer center; and extracting the median of the test parameters of each distance node along the radial direction from the wafer center of the reference wafer based on the distribution map of the test parameters of the reference wafer relative to the wafer center; wherein the distance segmentation method of the reference wafer along the radial direction from the wafer center is the same as that of the wafer to be detected along the radial direction from the wafer center; a median size difference determination module for determining the size difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance segment based on the medians of the test parameters of each distance node of the wafer to be detected and the reference wafer.

[0022] and / or,

[0023] A median gradient difference determination module, configured to determine a gradient difference between the test parameter medians of the to-be-detected wafer and the reference wafer for each distance node based on the test parameter medians of each distance node of the to-be-detected wafer and the reference wafer; wherein, the gradient difference between the test parameter medians of the to-be-detected wafer and the reference wafer for each distance is the magnitude difference between the difference between the test parameter medians of the nth distance node and the (n - 1)th distance node of the to-be-detected wafer and the difference between the test parameter medians of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1.

[0024] In a third aspect, an embodiment of the present invention further provides an electronic device, which includes: a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and the processor and the memory are disposed on the circuit board; the power supply circuit is configured to supply power to each circuit or device of the above-mentioned electronic device; the memory is used to store executable program codes; the processor runs a program corresponding to the executable program codes by reading the executable program codes stored in the memory, and is configured to execute the wafer detection method described in any of the foregoing embodiments.

[0025] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores one or more programs, and the one or more programs can be executed by one or more processors to implement the wafer detection method described in any of the foregoing embodiments.

[0026] The wafer detection method, device, electronic device, and storage medium provided by the embodiments of the present invention can generate a test parameter feature map of the to-be-detected wafer based on the test parameters of the to-be-detected wafer undergoing testing. By comparing the similarity between the test parameter feature map of the to-be-detected wafer and the test parameter feature map of the reference wafer with a similarity threshold, if the similarity between the two is lower than the similarity threshold, it can be determined that the intra-wafer uniformity of the to-be-detected wafer is abnormal. In this way, according to the WAT test parameters of the to-be-detected wafer, it is convenient to timely identify risky wafers, which is beneficial to improving the yield of wafer products. Description of the Drawings

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can obtain other drawings without creative efforts based on these drawings.

[0028] Figure 1 Schematic diagram of the wafer detection method in an embodiment of the present invention;

[0029] Figure 2 In an embodiment of the present invention, a reference wafer and test parameter characteristic diagrams of four wafers to be detected at different time points are generated along the time axis of the wafer manufacturing process;

[0030] Figure 3 Schematic diagram of the similarity comparison between the test parameter characteristic diagrams of the wafer to be detected and the reference wafer in an embodiment of the present invention;

[0031] Figure 4 Schematic diagram of the similarity comparison between the test parameter characteristic diagrams of the wafer to be detected and the reference wafer in another embodiment of the present invention;

[0032] Figure 5 Schematic diagram of the wafer detection method in another embodiment of the present invention;

[0033] Figure 6 Distribution diagram of the test parameters of the wafer to be detected relative to the wafer center in an embodiment of the present invention;

[0034] Figure 7 Block diagram of the structure of an embodiment of the wafer detection device of the present invention;

[0035] Figure 8 Block diagram of the structure of another embodiment of the wafer detection device of the present invention;

[0036] Figure 9 Schematic diagram of the structure of an embodiment of the electronic device of the present invention. Detailed implementation manners

[0037] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0038] It should be clear that the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without any creative work fall within the protection scope of the present invention.

[0039] The products of chip design companies are prototyped and produced in chip wafer fabs. The design companies need to monitor and manage the chip manufacturing process. The uniformity of electrical parameters within the wafer during the chip manufacturing process (which can be simply referred to as wafer uniformity) is one of the indicators to measure whether the process has changed.

[0040] Uniformity can also be referred to as homogeneity. For example, the thickness of the thin film in the thin film deposition process, the width and angle of the material to be etched in the etching process, etc., can all consider their uniformity. When the manufacturing process changes, it may lead to the deterioration of the uniformity of the electrical parameters of the wafer, thereby affecting the yield and performance.

[0041] Intra-die uniformity refers to the index difference between different positions on a single wafer. When measuring intra-die uniformity, several representative points are usually selected, and these points cover the main areas of the wafer, such as the center, edge, and between the edge and the center of the wafer.

[0042] WAT test parameters generally occur during or after the wafer manufacturing process. The WAT shipment quality management link in the chip wafer fab will check whether the WAT parameter test results meet the upper and lower limit requirements of the parameters. When the test results meet the upper and lower limit requirements, that is, meet the shipment quality standard, the WAT test parameters of the chip wafer fab will be sent to the chip design company for inspection. Among them, the uniformity control of WAT is not set in the shipment quality management link (that is, there is no numerical requirement for the uniformity of WAT test parameters, and the uniformity of WAT test parameters can reflect the intra-die uniformity of the wafer). Therefore, it is impossible to locate the risky wafers in a timely manner based on the WAT test parameters, which may cause additional yield and profit losses.

[0043] The embodiments of the present invention provide a wafer detection method, device and electronic device, which can determine whether the intra-die uniformity of the wafer is abnormal according to the wafer WAT test parameters, facilitate timely determination (for example, before the CP test) of the risky wafers, and is beneficial to improving the yield of the wafer products.

[0044] See Figure 1 , the embodiments of the present invention provide a wafer detection method, including steps S10 - S16:

[0045] S10. Generate a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected that are subject to testing.

[0046] The test parameter feature map of the wafer to be detected can also be referred to as the WAT test parameter feature map.

[0047] In some embodiments, a contour map can be used to generate a feature map of WAT test parameters for the wafer to be detected (which can also be called a WAT Contour Map, abbreviated as WCM). A contour map can visualize three-dimensional data using a two-dimensional method. For example, it uses color visual features to represent the third-dimensional data, such as contour lines on a map, isobars and isotherms in weather forecasts, etc. In some embodiments of the present invention, two-dimensional coordinates can be used to represent the WAT test positions, and color visual features can be used to represent the parameter values of the WAT test parameters (which can be abbreviated as WAT test parameter values) to generate a feature map of WAT test parameters. In such a map, the same color indicates the same WAT test parameter value. On the contrary, different colors indicate different WAT test parameter values, and the magnitude of the color difference can reflect the magnitude of the difference in WAT test parameter values.

[0048] In other embodiments, two-dimensional coordinates can also be used to represent the WAT test positions, and contour lines can be used to represent the third-dimensional data, that is, the WAT test parameter values, to generate a feature map of WAT test parameters. The WAT test parameter values on the same contour line are the same.

[0049] For the wafer to be detected, random sampling or continuous sampling can be performed in the order of the time axis of the wafer manufacturing process.

[0050] The WAT test of the wafer is usually carried out by the wafer fab during or after the wafer manufacturing process. Therefore, the WAT test parameters of the wafer can be provided by the wafer fab.

[0051] S12. Determine the similarity between the feature map of the test parameters of the wafer to be detected and the feature map of the test parameters of the reference wafer.

[0052] The feature map of the WAT test parameters of the TT (Typical N Typical P) split of the early process corner lot can be used as the feature map of the test parameters of the reference wafer for the subsequent mass-produced products (which can be called Ref WCM). It should be understood that the generation method of the feature map of the test parameters of the reference wafer is the same as that of the feature map of the test parameters of the wafer to be detected.

[0053] In some embodiments, a hash algorithm, such as the hash algorithm in the OpenCV image recognition library, can be used to calculate the similarity between the feature map of the test parameters of the wafer to be detected and the feature map of the test parameters of the reference wafer.

[0054] S14. Compare the similarity between the feature map of the test parameters of the wafer to be detected and the feature map of the test parameters of the reference wafer with a similarity threshold.

[0055] The similarity threshold can be set manually. In some embodiments, the similarity threshold can be determined based on known similar pictures of Ref WCM under the same process. For example, a training set composed of known similar pictures of Ref WCM under the same process can be trained to obtain a similarity distribution, and the lowest similarity in the similarity distribution can be used as the similarity threshold. In practical applications, the threshold can also be determined and continuously adjusted in combination with the feedback of the CV algorithm.

[0056] If the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than the similarity threshold, then step S16 is executed.

[0057] S16. Determine the in-wafer uniformity anomaly of the wafer to be detected.

[0058] If it is determined that there is an in-wafer uniformity anomaly in the wafer to be detected, then the wafer to be detected can be determined as a risky wafer.

[0059] The wafer detection method provided by the embodiment of the present invention can generate a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected in the acceptance test. By comparing the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer with the similarity threshold, if the similarity between the two is lower than the similarity threshold, it can be determined that there is an in-wafer uniformity anomaly in the wafer to be detected. In this way, according to the WAT test parameters of the wafer to be detected, it is convenient to timely (for example, before the CP test) determine the risky wafers and feedback them to the chip foundry to check the wafer process, which is beneficial to improving the yield of wafer products.

[0060] In some embodiments, the generating of the test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected in the acceptance test (step S10) may include steps S101 - S102:

[0061] S101. Obtain the coordinate information of the acceptance test positions of the wafer to be detected in the wafer to be detected and the corresponding test parameter values.

[0062] The test parameter value is the electrical test parameter value obtained when performing an electrical test on the acceptance test position of the wafer to be detected.

[0063] The acceptance test positions on the wafer to be detected are the test structures for WAT on the scribe lines of the wafer to be detected. The coordinate information of the acceptance test positions of the wafer to be detected in the wafer to be detected is also the coordinate information of the test structures on the scribe lines of the wafer to be detected in the wafer to be detected.

[0064] The WAT raw data provided by the foundry can be converted into a database format convenient for image judgment and then stored in the database.

[0065] When detecting a wafer, coordinate information of the acceptance test positions of the wafer to be detected in the wafer to be detected, as well as corresponding test parameter values and other information can be obtained from the above database.

[0066] S102. Generate a test parameter feature map of the wafer to be detected based on the coordinate information of the acceptance test positions in the wafer to be detected and the corresponding test parameter values.

[0067] In this embodiment, a contour map is used to generate the test parameter feature map of the wafer to be detected. Specifically, two-dimensional coordinates are used to represent the WAT test positions, and color visual features are used to represent the WAT test parameter values to generate the WAT test parameter feature map of the wafer to be detected.

[0068] Figure 2 It shows in one embodiment, along the time axis of the wafer manufacturing process, the WAT test parameters of several different wafers are selected, and a reference wafer and the test parameter feature maps (WCM) of the wafers to be detected at four different time points are generated.

[0069] In some embodiments, determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer (step S12) may include steps S121 - S122:

[0070] S121. Calculate the hash value of the test parameter feature map of the wafer to be detected.

[0071] In some examples, the average hash algorithm can be used to calculate the hash value of the test parameter feature map of the wafer to be detected, which may specifically include steps S1211 - S1214:

[0072] S1211. Convert the test parameter feature map of the wafer to be detected into a grayscale image.

[0073] The test parameter feature map of the wafer to be detected can be directly converted into a grayscale image. In some embodiments, to improve the calculation speed, before converting the test parameter feature map of the wafer to be detected into a grayscale image, the test parameter feature map of the wafer to be detected can be scaled down (such as using the resize function to scale down) to the target size, that is, scaled down to an image with a specified length * width (such as 8 * 8), then anti-aliasing processing is performed, such as using the ANTIALIAS method for anti-aliasing processing, and then converted into a grayscale image.

[0074] S1212. Calculate the pixel mean of the grayscale image.

[0075] Calculate the pixel mean of the grayscale image through the total number of pixel points of the grayscale image and the pixel values of each pixel point. Then use this pixel mean as the pixel threshold.

[0076] S1213. Traverse the pixel points of the grayscale image and set flag bits for each pixel point.

[0077] If the pixel value of a pixel point in the grayscale image is greater than or equal to the pixel mean value (i.e., the pixel threshold), then set the first flag bit (such as 0) for this pixel point, otherwise set the second flag bit (such as 1) for this pixel point, and so on, to set flag bits for each pixel point of the grayscale image.

[0078] S1214. Based on the flag bits corresponding to each pixel point of the grayscale image, obtain the hash value of the test parameter feature map of the wafer to be detected.

[0079] Each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag bit of each pixel point corresponds to the value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

[0080] In some examples, in a specified order, arrange the flag bits corresponding to each pixel point of the grayscale image in sequence to obtain a string as the hash value of the test parameter feature map of the wafer to be detected.

[0081] In other examples, the distribution pattern of the flag bits corresponding to each pixel point of the grayscale image on the grayscale image can be used as the hash value of the test parameter feature map of the wafer to be detected.

[0082] In this embodiment, the average hash algorithm is used to calculate the hash value of the test parameter feature map of the wafer to be detected. The embodiments of the present invention are not limited to this. In other embodiments, other hash algorithms such as the perceptual hash algorithm (Phash) can also be used to calculate the hash value of the test parameter feature map of the wafer to be detected.

[0083] The perceptual hash algorithm uses the method of discrete cosine transform to reduce frequency, which precisely corresponds to the vectorized graph. The general steps are as follows: The first step is to shrink the graph, for example, shrink it to a size of 32 * 32 pixels. The second step is to convert it into a grayscale image. The third step is to calculate the DCT (Discrete Cosine Transform). The DCT separates the graph into a set of frequency components. The fourth step is to shrink the DCT. The matrix calculated by the DCT is 32 * 32. Keep the upper left 8 * 8 small block, which represents the lowest frequency of the graph. The fifth step is to calculate the average value. Calculate the grayscale average value of each pixel point and the grayscale value of each pixel point after shrinking the DCT. If the grayscale value of a pixel point is greater than the grayscale average value, record it as 1, otherwise record it as 0, and combine them into 64 information bits. Compare the information bits of the two graphs to obtain the Hamming distance (the Hamming distance between two equal-length strings is the number of different characters at the corresponding positions of the two strings. If it is greater than 10, they are not very similar; if it is less than 5, they are very similar).

[0084] S122. Compare the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

[0085] The calculation methods of the hash value of the test parameter feature map of the wafer to be detected and the hash value of the test parameter feature map of the reference wafer are the same.

[0086] In an example where a string obtained by arranging the flag bits corresponding to the pixel points of the grayscale image in a specified order is used as the hash value of the test parameter feature map of the wafer to be detected, the strings representing the hash value of the test parameter feature map of the wafer to be detected and the hash value of the test parameter feature map of the reference wafer can be divided into M equal parts respectively. If the number of parts with the same character segments in the M equal parts is P, then the similarity S between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is S=(P / M)*100 / 100.

[0087] Figure 3 An exemplary schematic diagram of the similarity comparison between the test parameter feature maps of the wafer to be detected and the reference wafer in an embodiment is given. Figure 3 In this case, the string lengths of the hash values of the test parameter feature maps of the wafer to be detected and the reference wafer are both 32 bits, and each is divided into 8 equal parts, with 4-bit characters in each part. Through comparison, the similarity S between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is S=(7 / 8)

[0088] *100 / 100 = 87.5%.

[0089] In an example where the distribution pattern of the flag bits corresponding to the pixel points of the grayscale image on the grayscale image is used as the hash value of the test parameter feature map of the wafer to be detected, the test parameter feature maps of the wafer to be detected and the reference wafer can be divided into M' corresponding blocks respectively. If the number of blocks with the same flag bits in the M' corresponding blocks is P', then the similarity S' between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is S'=(P' / M')*100 / 100.

[0090] Figure 4 An exemplary schematic diagram of the similarity comparison between the test parameter feature maps of the wafer to be detected and the reference wafer in another embodiment is given. Figure 4Among them, on the grayscale image of the test parameter feature map of the wafer to be detected and the reference wafer, it is divided into a total of 8 comparison regions M1'-M8'. Through comparison, among the test parameter feature maps of the wafer to be detected and the reference wafer, the flag bits in 7 comparison regions are the same, and the flag bits in one comparison region are different. Therefore, the similarity S' between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is (7 / 8)*100 / 100 = 87.5%.

[0091] Continue to refer to Figure 2 , in an embodiment, wafers can be continuously or randomly sampled according to different time periods on the time axis for WAT test parameter processing to draw a WCM map. The Hash algorithm of the OpenCV library is imported to compare the WCM similarity between the sampled wafer and the WCM of the reference wafer (Ref wafer). Based on the comparison results, the deterioration of the WCM similarity in different time periods is sorted out. When in stage3 (phase 3), the similarity of the WCM of the sampled wafer deteriorates to 82.81%. Taking the product similarity threshold of 85% as an example, at this time, the WCM similarity in stage3 is lower than the threshold, triggering an alarm, and this wafer is screened as a risky wafer.

[0092] Refer to Figure 5 , in some embodiments, after determining that the wafer to be detected is a risky wafer, in order to be able to quantitatively evaluate the in-wafer uniformity of the wafer to be detected, after determining that the in-wafer uniformity of the wafer to be detected is abnormal (step S16), the method further includes step S18:

[0093] S18. Determine the size of the in-wafer uniformity difference of the wafer to be detected.

[0094] In this embodiment, after determining the size of the in-wafer uniformity difference of the wafer to be detected, it is convenient to qualitatively and quantitatively describe the in-wafer uniformity of the detected wafer.

[0095] In some embodiments, the determining the size of the in-wafer uniformity difference of the wafer to be detected (step S18) includes steps S181-S184:

[0096] S181. Based on the distribution map of the test parameters of the wafer to be detected relative to the wafer center, extract the median value of the test parameters at each distance node along the radial direction from the wafer center of the wafer to be detected.

[0097] The distribution map of the test parameters of the wafer to be detected relative to the wafer center can also be called the Radius Profile of the test parameters of the wafer to be detected.

[0098] Figure 6 An exemplary embodiment of the distribution map of the test parameters of the wafer to be detected relative to the wafer center is given. Figure 6The vertical coordinate LVTP_IEFF in it represents the drive current of P-type CMOS transistors of the low Vtsat type, and the horizontal coordinate represents the radius of the wafer to be detected. Figure 6 In the illustrated embodiment, the radius of the wafer to be detected is 140 mm. The distance from the center of the wafer to the outer edge along the radius direction of the wafer to be detected is evenly divided into 10 parts, and correspondingly there are 10 + 1 distance nodes (including the wafer center node). Among them, "Newly imported Radius Profile" is the Radius Profile of the test parameters of the wafer to be detected.

[0099] The test parameters of the wafer to be detected on the distribution map can be fitted to obtain a fitting curve of the test parameters of the wafer to be detected, as shown by the curve in the lower middle part in Figure 6 the following.

[0100] The median value of the test parameters of each distance node is the fitting value of the test parameters on the fitting curve of the test parameters corresponding to each distance node. For example, the median value of the test parameters of the 14 mm node along the radius direction from the center of the wafer to the outer edge of the wafer to be detected is 380, the median value of the test parameters of the 28 mm node along the radius direction from the center of the wafer to the outer edge is 378, the median value of the test parameters of the 42 mm node along the radius direction from the center of the wafer to the outer edge is 382, ……, the median value of the test parameters of the 140 mm node along the radius direction from the center of the wafer to the outer edge is 365.

[0101] S182. Based on the distribution map of the test parameters of the reference wafer relative to the wafer center, extract the median values of the test parameters of each distance node along the radius direction from the center of the reference wafer to the outer edge.

[0102] The distance segmentation method of the reference wafer along the radius direction from the center of the wafer to the outer edge is the same as that of the wafer to be detected along the radius direction from the center of the wafer to the outer edge.

[0103] The distribution map of the test parameters of the reference wafer relative to the wafer center can also be called the Radius Profile of the test parameters of the reference wafer.

[0104] Figure 6 An exemplary distribution map of the test parameters of the reference wafer relative to the wafer center in an embodiment is also given in the following. Among them, "Reference Radius Profile" is the Radius Profile of the reference wafer.

[0105] Based on the distribution map of the test parameters of the reference wafer relative to the wafer center, the median values of the test parameters of each distance node along the radius direction from the center of the reference wafer to the outer edge can be extracted. The test parameters of the reference wafer on the distribution map can be fitted to obtain a fitting curve of the test parameters of the reference wafer, as shown by the curve in the upper middle part in Figure 6 the following.

[0106] Figure 6 Among them, for the reference wafer, the median value of the test parameters at the 14 mm node along the radial direction outward from the wafer center is 418, the median value of the test parameters at the 28 mm node along the radial direction outward from the wafer center is 419, the median value of the test parameters at the 42 mm node along the radial direction outward from the wafer center is 419, ……, the median value of the test parameters at the 140 mm node along the radial direction outward from the wafer center is 390.

[0107] S183. Based on the median values of the test parameters at each distance node of the wafer to be detected and the reference wafer, determine the magnitude difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment.

[0108] In some embodiments, according to the magnitude of the absolute value of the difference between the median value of the test parameters at each distance node of the wafer to be detected and the median value of the test parameters at the corresponding distance node of the reference wafer, the magnitude difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment can be determined. This method can also be called the Radius Profile median comparison method.

[0109] The magnitude difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment can be output in the form of a table, as shown in Table 1.

[0110] Table 1:

[0111] Distance (mm) Reference Profile Median Newly Imported Profile Median Reference Median Difference 0 <![CDATA[M1]]> <![CDATA[M X1 > <![CDATA[|M X1 -M1|]]> 14 <![CDATA[M2]]> <![CDATA[M X2 > <![CDATA[|M X2 -M2|]]> 28 <![CDATA[M3]]> <![CDATA[M X3 > <![CDATA[|M X3 -M3|]]> 42 <![CDATA[M4]]> <![CDATA[M X4 > <![CDATA[|M X4 -M4|]]> 56 <![CDATA[M5]]> <![CDATA[M X5 > <![CDATA[|M X5 -M5|]]> 70 <![CDATA[M6]]> <![CDATA[M X6 > <![CDATA[|M X6 -M6|]]> 84 <![CDATA[M7]]> <![CDATA[M X7 > <![CDATA[|M X7 -M7|]]> 98 <![CDATA[M8]]> <![CDATA[M X8 > <![CDATA[|M X8 -M8|]]> 112 <![CDATA[M9]]> <![CDATA[M X9 > <![CDATA[|M X9 -M9|]]> 126 <![CDATA[M 10 > <![CDATA[M X10 > <![CDATA[|M X10 -M 10 |]]> 140 <![CDATA[M 11 > <![CDATA[M X11 > <![CDATA[|M X11 -M 11 |]]>

[0112] Table 1 exemplarily shows the magnitude difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment in an embodiment. In Table 1, "Distance" is the distance from the distance node to the wafer center, "Reference Profile Median" is the median value of the test parameters at each distance node of the reference wafer, "Newly Imported Profile Median" is the median value of the test parameters at each distance node of the wafer to be detected, and "Reference Median Difference" is the magnitude difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment.

[0113] S184. Based on the median values of the test parameters at each distance node of the wafer to be detected and the reference wafer, determine the gradient difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment.

[0114] Among them, the gradient difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment is the magnitude of the absolute value of the difference between the difference of the median values of the test parameters of the nth distance node and the (n - 1)th distance node of the wafer to be detected and the difference of the median values of the test parameters of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1. This method can also be called the Radius Profile gradient comparison method.

[0115] The gradient difference of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment can also be output in tabular form, as shown in Table 2.

[0116] Table 2:

[0117] Range (mm) Reference Profile Gradient Newly Imported Profile Gradient Reference Gradient Difference 0-14 <![CDATA[G1]]> <![CDATA[G X1 > <![CDATA[|G X1 -G1|]]> 14-28 <![CDATA[G2]]> <![CDATA[G X2 > <![CDATA[|G X2 -G2|]]> 28-42 <![CDATA[G3]]> <![CDATA[G X3 > <![CDATA[|G X3 -G3|]]> 42-56 <![CDATA[G4]]> <![CDATA[G X4 > <![CDATA[|G X4 -G4|]]> 56-70 <![CDATA[G5]]> <![CDATA[G X5 > <![CDATA[|G X5 -G5|]]> 70-84 <![CDATA[G6]]> <![CDATA[G X6 > <![CDATA[|G X6 -G6|]]> 84-98 <![CDATA[G7]]> <![CDATA[G X7 > <![CDATA[|G X7 -G7|]]> 98-112 <![CDATA[G8]]> <![CDATA[G X8 > <![CDATA[|G X8 -G8|]]> 112-126 <![CDATA[G9]]> <![CDATA[G X9 > <![CDATA[|G X9 -G9|]]> 126-140 <![CDATA[G 10 > <![CDATA[G X10 > <![CDATA[|G X10 -G 10 |]]>

[0118] Table 2 exemplarily shows the gradient differences of the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment in an embodiment. In Table 2, "Range" is the distance between two adjacent distance nodes, "Reference Profile Gradient" is the gradient difference of the median values of the test parameters of two adjacent distance nodes on the reference wafer, "Newly Introduced Profile Gradient" is the gradient difference of the median values of the test parameters of two adjacent distance nodes on the wafer to be detected, and "Reference Gradient Difference" is the gradient difference of the median values of the test parameters of the corresponding distance segments of the wafer to be detected and the reference wafer.

[0119] The Radius Profile gradient comparison method can be used in combination with the Radius Profile median comparison method to quantitatively evaluate the in-wafer uniformity of the wafer to be measured from more dimensions. The embodiments of the present invention are not limited thereto. In other embodiments, the Radius Profile gradient comparison method and the Radius Profile median comparison method can also be used separately to quantitatively evaluate the in-wafer uniformity of the wafer to be measured.

[0120] See Figure 7 , the embodiment of the present invention also provides a wafer detection device, including: a feature map generation unit 10, a similarity comparison unit 12, and a uniformity determination unit 14. Among them, the feature map generation unit 10 is configured to generate a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected that are subjected to testing; the similarity comparison unit 12 is configured to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer; the uniformity determination unit 14, if the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, determines that the in-wafer uniformity of the wafer to be detected is abnormal.

[0121] The wafer detection device of this embodiment can be used to execute Figure 1 the technical solutions of the wafer detection method embodiments shown, and its implementation principles and technical effects are similar, and will not be elaborated here.

[0122] See Figure 8, in some embodiments, the feature map generation unit 10 includes: a test information acquisition module 100 and a feature map generation module 102. Among them, the test information acquisition module 100 is used to acquire the coordinate information of the acceptance test position of the wafer to be detected in the wafer to be detected, as well as the corresponding test parameter values. The test parameter values are the electrical test parameter values obtained when performing an electrical test on the acceptance test position of the wafer to be detected.

[0123] The acceptance test position on the wafer to be detected is the test structure for WAT on the scribe line of the wafer to be detected. The coordinate information of the acceptance test position of the wafer to be detected in the wafer to be detected is also the coordinate information of the test structure on the scribe line of the wafer to be detected in the wafer to be detected.

[0124] The original WAT data provided by the foundry can be converted into a database format convenient for image judgment and then stored in the database.

[0125] When detecting the wafer, the coordinate information of the acceptance test position of the wafer to be detected in the wafer to be detected, as well as corresponding information such as test parameter values, can be obtained from the above database.

[0126] The feature map generation module 102 is used to generate a test parameter feature map of the wafer to be detected based on the coordinate information of the acceptance test position in the wafer to be detected and the corresponding test parameter values.

[0127] In this embodiment, a contour map can be used to generate the test parameter feature map of the wafer to be detected. For specific details, reference can be made to the relevant descriptions in the foregoing embodiments of the wafer detection method, which will not be elaborated here.

[0128] See Figure 8 , in some embodiments, the similarity comparison unit 12 includes: a hash calculation module 120 and a similarity comparison module 122; among them, the hash calculation module 120 is used to calculate the hash value of the test parameter feature map of the wafer to be detected; the similarity comparison module 122 is used to compare the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

[0129] In this embodiment, the process of the hash calculation module 120 calculating the hash value of the test parameter feature map of the wafer to be detected and the similarity comparison module 122 determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer can be referred to the relevant descriptions in the foregoing embodiments of the wafer detection method, which will not be elaborated here.

[0130] In some embodiments, the hash calculation module 120 includes: an image conversion sub-module, a pixel mean calculation sub-module, a flag setting sub-module, and a hash value obtaining sub-module. Among them, the image conversion sub-module is used to convert the test parameter feature map of the wafer to be detected into a grayscale image; the pixel mean calculation sub-module is used to calculate the pixel mean of the grayscale image; the flag setting sub-module is used to traverse the pixel points of the grayscale image. If the pixel value of a pixel point in the grayscale image is greater than or equal to the pixel mean, the pixel point is set to the first flag bit, otherwise the pixel point is set to the second flag bit; wherein, the second flag bit is different from the first flag bit; the hash value obtaining sub-module is based on the flag bits corresponding to the pixel points of the grayscale image to obtain the hash value of the test parameter feature map of the wafer to be detected; wherein, each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag bit of each pixel point corresponds to the value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

[0131] In this embodiment, the process of the hash calculation module 120 calculating the hash value of the test parameter feature map of the wafer to be detected and the similarity comparison module 122 determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer can refer to the relevant descriptions in the foregoing embodiments of the wafer detection method, which will not be elaborated here.

[0132] In some embodiments, the hash calculation module 120 further includes: an image scaling sub-module, which is used to scale the size of the test parameter feature map of the wafer to be detected to a target size before the image conversion sub-module converts the test parameter feature map of the wafer to be detected into a grayscale image, so as to improve the calculation speed. Before converting the test parameter feature map of the wafer to be detected into a grayscale image, the test parameter feature map of the wafer to be detected can be reduced (such as using the resize function to reduce) to the target size, that is, reduced to an image with a specified length * width (such as 8 * 8), and then anti-aliasing processing is performed, such as using the ANTIALIAS method for anti-aliasing processing, and then converted into a grayscale image.

[0133] In some embodiments, after determining that the wafer to be detected is a risk wafer, in order to quantitatively evaluate the in-wafer uniformity of the wafer to be detected, the wafer detection device may further include: a uniformity quantification unit 16, which is used to determine the magnitude of the in-wafer uniformity difference of the wafer to be detected.

[0134] See Figure 8 , in some embodiments, the uniformity quantification unit 16 includes: a median extraction module 160, and a median size difference determination module 162 and / or a median gradient difference determination module 164; wherein,

[0135] A median extraction module 160 is configured to extract the median of the test parameters of each distance node along the radial direction from the wafer center to the outside of the wafer to be detected based on the distribution diagram of the test parameters of the wafer to be detected relative to the wafer center; and extract the median of the test parameters of each distance node along the radial direction from the wafer center to the outside of the reference wafer based on the distribution diagram of the test parameters of the reference wafer relative to the wafer center; wherein, the distance segmentation method of the reference wafer along the radial direction from the wafer center to the outside is consistent with the distance segmentation method of the wafer to be detected along the radial direction from the wafer center to the outside.

[0136] A median size difference determination module 162 is configured to determine the size difference between the median of the test parameters of the wafer to be detected and the reference wafer at each distance based on the median of the test parameters of each distance node of the wafer to be detected and the reference wafer; and / or, a median gradient difference determination module 164 is configured to determine the gradient difference between the median of the test parameters of the wafer to be detected and the reference wafer at each distance based on the median of the test parameters of each distance node of the wafer to be detected and the reference wafer.

[0137] Wherein, the gradient difference between the median of the test parameters of the wafer to be detected and the reference wafer at each distance is the size difference between the difference between the median of the test parameters of the nth distance node and the (n - 1)th distance node of the wafer to be detected and the difference between the median of the test parameters of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1.

[0138] In this embodiment, for the determination process of the size difference between the median of the test parameters of the wafer to be detected and the reference wafer at each distance, and the gradient difference between the median of the test parameters of the wafer to be detected and the reference wafer at each distance, reference can be made to the relevant descriptions in the foregoing embodiments of the wafer detection method, and details are not described herein again.

[0139] An embodiment of the present invention further provides an electronic device, and the electronic device includes the device described in any of the foregoing embodiments.

[0140] Figure 9 It is a schematic structural diagram of an embodiment of the electronic device of the present invention, which can implement the Figure 1 process of the embodiment shown, as Figure 9As shown in the figure, the above-mentioned electronic device may include: a housing 41, a processor 42, a memory 43, a circuit board 44, and a power supply circuit 45. Among them, the circuit board 44 is disposed inside the space enclosed by the housing 41, and the processor 42 and the memory 43 are provided on the circuit board 44; the power supply circuit 45 is used to supply power to each circuit or device of the above-mentioned electronic device; the memory 43 is used to store executable program codes; the processor 42 runs a program corresponding to the executable program code by reading the executable program codes stored in the memory 43, and is used to execute the wafer detection method described in any one of the foregoing embodiments.

[0141] For the specific execution process of the above steps by the processor 42 and the steps further executed by the processor 42 by running the executable program code, reference may be made to the description of the embodiments shown in the present invention Figure 1 and Figure 5 which will not be elaborated herein.

[0142] The electronic device exists in various forms, including but not limited to:

[0143] (1) Personal computer devices: Such devices belong to the category of personal computers, have computing and processing functions, and generally also have the characteristic of mobile Internet access.

[0144] (2) Servers: Devices that provide computing services. The composition of a server includes a processor, a hard disk, a memory, a system bus, etc. A server is similar to a general computer architecture, but due to the need to provide highly reliable services, it has higher requirements in terms of processing power, stability, reliability, security, scalability, manageability, etc.

[0145] (3) Other electronic devices with data interaction functions.

[0146] An embodiment of the present invention also provides a computer-readable storage medium, which stores one or more programs, and the one or more programs can be executed by one or more processors to implement the wafer detection method described in any one of the foregoing embodiments.

[0147] It should be noted that in this text, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including said element.

[0148] Each embodiment in this specification is described in a related manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments.

[0149] In particular, for the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple. For the relevant parts, reference can be made to the partial description of the method embodiments.

[0150] For the convenience of description, the above device is described by dividing it into various units / modules according to functions. Of course, when implementing the present invention, the functions of each unit / module can be realized in the same or multiple software and / or hardware.

[0151] Those of ordinary skill in the art can understand that all or part of the processes of the above method embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the above method embodiments. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0152] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A wafer detection method, characterized in that, Including: Generating a test parameter feature map of the wafer to be detected based on test parameters of an acceptance test of the wafer to be detected; Determining a similarity between the test parameter feature map of the wafer to be detected and a test parameter feature map of a reference wafer; If the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, determining that the intra-wafer uniformity of the wafer to be detected is abnormal; Wherein, the determining the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer includes: Calculating a hash value of the test parameter feature map of the wafer to be detected; Comparing the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

2. The wafer inspection method according to claim 1, wherein The generating the test parameter feature map of the wafer to be detected based on test parameters of an acceptance test of the wafer to be detected includes: Obtaining coordinate information of an acceptance test position of the wafer to be detected in the wafer to be detected and corresponding test parameter values; Generating the test parameter feature map of the wafer to be detected based on the coordinate information of the acceptance test position in the wafer to be detected and the corresponding test parameter values.

3. The wafer inspection method according to claim 1, wherein The calculating the hash value of the test parameter feature map of the wafer to be detected includes: Converting the test parameter feature map of the wafer to be detected into a grayscale image; Calculating a pixel mean value of the grayscale image; Traversing pixel points of the grayscale image, if a pixel value of a pixel point of the grayscale image is greater than or equal to the pixel mean value, setting the pixel point to a first flag bit, otherwise setting the pixel point to a second flag bit; wherein, the second flag bit is different from the first flag bit; Obtaining the hash value of the test parameter feature map of the wafer to be detected based on flag bits corresponding to respective pixel points of the grayscale image; wherein, each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag bit of each pixel point corresponds to a numerical value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

4. The wafer inspection method according to claim 3, wherein Before converting the test parameter feature map of the wafer to be detected into a grayscale image, the method further includes: Scaling the size of the test parameter feature map of the wafer to be detected to a target size; Wherein, the converting the test parameter feature map of the wafer to be detected into a grayscale image includes: converting the test parameter feature map scaled to the target size into a grayscale image.

5. The wafer detection method according to claim 1, wherein After determining that the intra-wafer uniformity of the wafer to be detected is abnormal, the method further includes: Determining the magnitude of the intra-wafer uniformity difference of the wafer to be detected.

6. The wafer detection method according to claim 5, wherein The determining the magnitude of the intra-wafer uniformity difference of the wafer to be detected includes: Based on a distribution map of test parameters of the wafer to be detected relative to the wafer center, extracting median values of test parameters of respective distance nodes along a radial direction outward from the wafer center of the wafer to be detected; Based on the distribution map of the test parameters of the reference wafer relative to the wafer center, extract the median value of the test parameters at each distance node along the radial direction from the wafer center of the reference wafer; wherein, the distance segmentation method of the reference wafer along the radial direction from the wafer center is consistent with the distance segmentation method of the wafer to be detected along the radial direction from the wafer center; Based on the median values of the test parameters at each distance node of the wafer to be detected and the reference wafer, determine the magnitude difference between the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment; and / or, Based on the median values of the test parameters at each distance node of the wafer to be detected and the reference wafer, determine the gradient difference between the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment; wherein, the gradient difference between the median values of the test parameters of the wafer to be detected and the reference wafer at each distance segment is the magnitude difference between the difference of the median values of the test parameters of the nth distance node and the (n - 1)th distance node of the wafer to be detected and the difference of the median values of the test parameters of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1.

7. A wafer inspection device, characterized in that, Including: A feature map generation unit, configured to generate a test parameter feature map of the wafer to be detected based on the test parameters of the wafer to be detected under test; A similarity comparison unit, configured to determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer; A uniformity determination unit, if the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer is lower than a preset similarity threshold, then determine that the intra-wafer uniformity of the wafer to be detected is abnormal; wherein, the similarity comparison unit includes: A hash calculation module, configured to calculate the hash value of the test parameter feature map of the wafer to be detected; A similarity comparison module, configured to compare the hash value of the test parameter feature map of the wafer to be detected with the hash value of the test parameter feature map of the reference wafer, and determine the similarity between the test parameter feature map of the wafer to be detected and the test parameter feature map of the reference wafer.

8. The wafer inspection apparatus according to claim 7, wherein The feature map generation unit includes: A test information acquisition module, configured to acquire the coordinate information of the test position of the wafer to be detected in the wafer to be detected, and the corresponding test parameter values; A feature map generation module, configured to generate a test parameter feature map of the wafer to be detected based on the coordinate information of the test position in the wafer to be detected and the corresponding test parameter values.

9. The wafer inspection device according to claim 7, characterized in that, The hash calculation module includes: An image conversion sub-module, configured to convert the test parameter feature map of the wafer to be detected into a grayscale image; A pixel mean value calculation sub-module, configured to calculate the pixel mean value of the grayscale image; A flag setting sub-module, configured to traverse the pixel points of the grayscale image, if the pixel value of a pixel point of the grayscale image is greater than or equal to the pixel mean value, then set the pixel point to the first flag bit, otherwise set the pixel point to the second flag bit; wherein, the second flag bit is different from the first flag bit; A hash value obtaining sub-module, which obtains the hash value of the test parameter feature map of the wafer to be detected based on the flag bits corresponding to each pixel point of the grayscale image; wherein, each pixel point of the grayscale image corresponds to a numerical bit of the hash value of the test parameter feature map of the wafer to be detected, and the flag bit of each pixel point corresponds to the value of a numerical bit of the hash value of the test parameter feature map of the wafer to be detected.

10. The wafer inspection device according to claim 9, characterized in that, The hash calculation module further includes: An image scaling sub-module, which is used to scale the size of the test parameter feature map of the wafer to be detected to a target size before the image conversion sub-module converts the test parameter feature map of the wafer to be detected into a grayscale image.

11. The wafer inspection device according to claim 7, wherein It further includes: A uniformity quantification unit, which is used to determine the size of the intra-wafer uniformity difference of the wafer to be detected.

12. The wafer inspection device according to claim 11, wherein, The uniformity quantification unit includes: A median extraction module, which is used to extract the median of the test parameters of each distance node along the radial direction from the wafer center of the wafer to be detected based on the distribution map of the test parameters of the wafer to be detected relative to the wafer center; and extract the median of the test parameters of each distance node along the radial direction from the wafer center of the reference wafer based on the distribution map of the test parameters of the reference wafer relative to the wafer center; wherein, the distance segmentation method of the reference wafer along the radial direction from the wafer center is the same as that of the wafer to be detected along the radial direction from the wafer center. A median size difference determination module, which is used to determine the size difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance based on the median of the test parameters of each distance node of the wafer to be detected and the reference wafer. And / or A median gradient difference determination module, which is used to determine the gradient difference of the median of the test parameters of the wafer to be detected and the reference wafer at each distance based on the median of the test parameters of each distance node of the wafer to be detected and the reference wafer. Wherein, the gradient difference of the test parameters of the wafer to be detected and the reference wafer at each distance is the size difference between the difference between the median of the test parameters of the nth distance node and the (n - 1)th distance node of the wafer to be detected and the difference between the median of the test parameters of the nth distance node and the (n - 1)th distance node of the reference wafer; n is a natural number greater than or equal to 1.

13. An electronic device, characterized in that, The electronic device includes: a housing, a processor, a memory, a circuit board and a power supply circuit, wherein the circuit board is arranged inside the space surrounded by the housing, and the processor and the memory are arranged on the circuit board; the power supply circuit is used to supply power to each circuit or device of the above-mentioned electronic device; the memory is used to store executable program codes; the processor runs the program corresponding to the executable program codes by reading the executable program codes stored in the memory, and is used to execute the wafer detection method according to any one of the preceding claims 1-6.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the wafer detection method according to any one of the preceding claims 1-6.

Citation Information

Patent Citations

  • Automatic analysis method and system of failed core particles

    CN110146798A

  • Wafer detection method, device and equipment

    CN111239152A