Protection Circuit of Radio Frequency Power Amplifier

Abstract

The present application provides a protection circuit for a radio frequency power amplifier. The protection circuit is composed of an output swing detection circuit, an N-type current mirror circuit 1, a P-type current mirror circuit, a configurable resistor network, an amplifier, and an N-type current mirror circuit 2. Among them, the output swing detection circuit is connected to the output end of the radio frequency power amplifier. When the voltage swing at the output end of the radio frequency power amplifier exceeds the threshold voltage of the detection circuit, a current will be generated in the mirror current circuit 1. The current in the mirror current circuit 1 is mirrored into the configurable resistor network, and a control voltage V1 is generated at node 1. The control voltage V1 serves as the voltage at the positive input terminal of the feedback amplifier and is copied to the output end of the feedback amplifier. The voltage at the output end of the feedback amplifier generates a current in the mirror current circuit 2 and is finally copied into the bias circuit of the radio frequency power amplifier as a pull-down current to turn off the bias circuit of the radio frequency amplifier and avoid burnout.

Description

Technical Field

[0001] This invention patent application generally relates to radio frequency power amplifiers, and particularly relates to a protection circuit for a radio frequency power amplifier with configurable critical power protection value. Background Art

[0002] In existing radio frequency power amplifiers, multiple diodes are usually connected in series to the ground at the power output stage. When the voltage swing of the output stage exceeds the sum of the threshold voltages of the series-connected diodes, the voltage swing of the output stage is fixed to the sum of the threshold voltages of the series-connected diodes. That is, the protection function is achieved through the clamping action of the diodes to avoid burning out.

[0003] Radio frequency power amplifiers are usually used in different power supply voltage scenarios, such as 3V, 4V, 5V, etc. The power supply voltage directly determines the voltage swing of the output stage of the radio frequency power amplifier. Therefore, by using the method of connecting diodes in series to the ground, the critical value of its output swing is the sum of the threshold voltages of the series-connected diodes, which is a fixed value and is difficult to adapt to different power supply voltage application scenarios. In addition, the threshold voltage of a single diode is usually 0.7V - 1V. By increasing or decreasing the number of series-connected diodes, the change step of its critical value is relatively large, and it is difficult to achieve precise adjustment. Summary of the Invention

[0004] The present invention aims to solve the problems that the existing power protection circuit is difficult to precisely adjust its critical output voltage swing, i.e., critical output power, when it shuts down, and is difficult to adapt to different power supply voltage application scenarios.

[0005] This application proposes a protection circuit for a radio frequency power amplifier with configurable critical power protection value, so as to achieve precise adjustment of the critical power protection value and be able to adapt to application scenarios of multiple power supply voltages at the same time.

[0006] One aspect of the present invention proposes a protection circuit for a radio frequency power amplifier, including: an output swing detection circuit, which is connected to the output stage of the radio frequency power amplifier to detect the voltage swing of the output stage of the radio frequency power amplifier, and includes M D diodes, M R resistors and M NMOSNMOS transistors, each of which is connected in diode form; an N-type current mirror circuit 1 for mirroring the current generated by the output swing detection circuit and supplying the mirrored current to the P-type current mirror circuit; the P-type current mirror circuit for mirroring the current generated by the N-type current mirror circuit 1 and generating a control voltage V1 at node 1 between the P-type current mirror circuit and the configurable resistor network; the configurable resistor network which is connected to the P-type current mirror circuit via node 1 to receive the current generated by the P-type current mirror circuit and includes a plurality of resistors and a plurality of switches for respectively controlling the plurality of resistors, an amplifier, whose positive input terminal is connected to node 1 and uses the control voltage V1 as the input voltage, whose output terminal is directly connected to the negative input terminal and is configured in the form of unity-gain negative feedback to copy the control voltage V1 at its positive input terminal to its output terminal, an N-type current mirror circuit 2 which is connected to the output terminal of the amplifier for mirroring the current generated at the output terminal of the amplifier, and the mirrored current is used as a pull-down current to be connected to the bias circuit of the RF power amplifier to turn off the bias circuit of the RF power amplifier.

[0007] wherein, M D , M R and M NMOS are all integers greater than or equal to 1.

[0008] wherein, the amplifier includes an operational amplifier with an output buffer stage.

[0009] wherein, the N-type current mirror circuit 1, the N-type current mirror circuit 2 and the P-type current mirror circuit include a cascode current mirror or a low-voltage cascode current mirror.

[0010] wherein, when the voltage swing at the output terminal of the RF power amplifier exceeds the threshold voltage of the output swing detection circuit, a current is generated in the N-type current mirror circuit 1.

[0011] wherein, the N-type current mirror circuit 1 includes NMOS transistors N1 and N2, the P-type current mirror circuit includes PMOS transistors P1 and P2, the N-type current mirror circuit 2 includes NMOS transistors N5 and N6, wherein the ratio of the sizes of NMOS transistors N2 and N1 is K N1 , the ratio of the sizes of PMOS transistors P2 and P1 is K P , the ratio of the sizes of NMOS transistors N6 and N5 is K N2; wherein, the source electrodes of the NMOS transistor N1 and the NMOS transistor N2 of the N-type current mirror circuit 1 are both connected to the ground GND. The N-type current mirror circuit 1 mirrors the current on the NMOS transistor N1 to the NMOS transistor N2, and supplies the mirrored current to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the drain of the NMOS transistor N2. The source electrodes of the PMOS transistors P1 and P2 of the P-type current mirror circuit are both connected to the power supply voltage VDD. The drain of the PMOS transistor P2 is connected to the configurable resistor network. The P-type current mirror circuit mirrors the current on the PMOS transistor P1 to the PMOS transistor P2 and generates a control voltage V1 at the node 1 between the drain of the PMOS transistor P2 and the configurable resistor network; the NMOS transistor N5 of the N-type current mirror circuit 2 is connected to the output terminal of the amplifier via the resistor R2. The N-type current mirror circuit 2 is configured to mirror the current generated at the output terminal of the amplifier on the NMOS transistor N5 to the NMOS transistor N6, and the mirrored current is fed as a pull-down current into the bias circuit of the power amplifier.

[0012] Wherein, the output swing detection circuit includes a diode D1, a resistor R1, and NMOS transistors N1 and N3 connected in series between the output stage of the RF power amplifier and the ground GND. The drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3. The drain and gate of the NMOS transistor 3 are commonly connected to one end of the resistor R1. The other end of the resistor R1 is connected to the negative electrode of the diode D1. The positive electrode of the diode D1 is connected to the output stage of the RF power amplifier; the N-type current mirror circuit 1 further includes an NMOS transistor N4. The current mirrored by the N-type current mirror circuit 1 is supplied to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistor N4. The source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2. The gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3. The drain of the NMOS transistor N4 is connected to the drain and gate of the PMOS transistor P1.

[0013] Among them, the output swing detection circuit includes a diode D1, a diode D2, a resistor R1, and NMOS transistors N1, N3, and N7 connected in series between the output stage of the radio frequency power amplifier and the ground GND. The drain and gate of the NMOS transistor N1 are commonly connected to the source of the NMOS transistor N3. The drain and gate of the NMOS transistor N3 are commonly connected to the source of the NMOS transistor N7. The drain and gate of the NMOS transistor 7 are commonly connected to one end of the resistor R1. The other end of the resistor R1 is connected to the negative electrode of the diode D2. The positive electrode of the diode D2 is connected to the negative electrode of the diode D1. The positive electrode of the diode D1 is connected to the output stage of the radio frequency power amplifier. The N-type current mirror circuit 1 further includes NMOS transistors N4 and N8. The current mirrored by the N-type current mirror circuit 1 is supplied to the drain and gate of the PMOS transistor P1 of the P-type current mirror circuit via the NMOS transistors N4 and N8. The source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2. The gate of the NMOS transistor N4 is connected to the gate of the NMOS transistor N3. The drain of the NMOS transistor N4 is connected to the source of the NMOS transistor N8. The gate of the NMOS transistor N8 is connected to the gate of the NMOS transistor N7. The drain of the NMOS transistor N8 is connected to the drain and gate of the PMOS transistor P1.

[0014] Among them, the configurable resistor network includes resistors R3, R4 to Rn, and switches 3, 4 to n. Among them, the switch 3, the resistors R3, R4 to Rn are sequentially connected in series between the node 1 and the ground. Among them, the first end of each of the switches 3, 4 to n is connected to the node 1. The second end of the switch 3 is connected to the first end of the resistor R3. The second end of the switch 4 is connected to the second end of the resistor R3 and the first end of the resistor R4. And the second end of the switch n is connected to the second end of the resistor Rn-1 and the first end of the resistor Rn. The second end of the resistor Rn is connected to the ground.

[0015] Among them, the configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between the node 1 and the ground. Among them, the third resistor unit includes a resistor R3 and a switch 3 connected in series. The fourth resistor unit includes an R4 and a switch 4 connected in series. And the nth resistor unit includes a resistor Rn and a switch n connected in series. Description of the Drawings

[0016] Figure 1 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the inventive concept.

[0017] Figure 2 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the first embodiment of the present invention.

[0018] Figure 3It is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a second embodiment of the present invention. Detailed implementation manners

[0019] Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled", "connected", and their derivatives refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with each other. The terms "transmit", "receive", and "communicate", and their derivatives, cover both direct and indirect communication. The terms "comprise" and "include", and their derivatives, mean including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with", and its derivatives, mean including, included within, interconnected, containing, contained within, connected or coupled with, communicating with, cooperating with, interlacing, juxtaposed, proximate, bound or bound to, having, having an attribute, having a relationship or being related to, etc. The term "controller" refers to any device, system, or part thereof that controls at least one operation. Such a controller can be implemented in hardware, or in a combination of hardware and software and / or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one", when used in conjunction with a list of items, means that different combinations of one or more of the listed items can be used, and it may only be necessary to have one item from the list. For example, "at least one of A, B, C" includes any one of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0020] Throughout the text, an N-type transistor refers to an NMOS transistor, and a P-type transistor refers to a PMOS transistor.

[0021] Throughout this patent document, definitions of other specific words and phrases are provided. Those of ordinary skill in the art should understand that in many cases, if not most cases, such definitions apply to the previous and future use of the words and phrases so defined.

[0022] In this patent document, the application combinations of modules and the hierarchical division of sub-modules are only for illustration purposes. Without departing from the scope of the present disclosure, the application combinations of modules and the hierarchical division of sub-modules can have different forms.

[0023] Figure 1 It is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the concept of the present invention.

[0024] The protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the inventive concept is composed of an output swing detection circuit, an N-type current mirror circuit 1, a P-type current mirror circuit, a configurable resistor network, an amplifier, and an N-type current mirror circuit 2. Among them, the output swing detection circuit is connected to the output terminal of the radio frequency power amplifier and includes M D diodes, M R resistors, and M NMOS NMOS transistors. Each NMOS transistor is connected in diode form. Among them, M D , M R , and M NMOS are all integers greater than or equal to 1. When the voltage swing at the output terminal of the radio frequency power amplifier exceeds the threshold voltage of the output swing detection circuit, a current will be generated in the mirror current circuit 1. The current in the mirror current circuit 1 is mirrored into a configurable resistor network including multiple resistors and multiple switches for respectively controlling the multiple resistors, and a control voltage V1 is generated at node 1. The control voltage V1 serves as the voltage at the positive input terminal of the feedback amplifier and is replicated to the output terminal of the feedback amplifier. The voltage at the output terminal of the feedback amplifier generates a current in the mirror current circuit 2 and is finally replicated into the bias circuit of the radio frequency power amplifier as a pull-down current to turn off the bias circuit of the radio frequency amplifier and avoid burnout.

[0025] Compared with the existing method, the critical power protection value of the present invention is adjustable. In this regard, reference will be specifically made to Figure 2 and Figure 3 to describe the first embodiment and the second embodiment of the present invention.

[0026] Figure 2 is a schematic diagram showing the protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to the first embodiment of the present invention.

[0027] Hereinafter, with reference to Figure 2 , each part of the protection circuit and its functions will be described.

[0028] The output swing detection circuit includes diode D1, resistor R1, and N-type transistors N1 and N3 connected in diode form, and is used to detect the voltage swing of the output stage. When the output swing exceeds its threshold voltage, a current is generated.

[0029] The N-type current mirror circuit 1 includes N-type transistors N1 and N2 and mirrors the current generated by the output swing detection circuit.

[0030] The P-type current mirror circuit includes P-type transistors P1 and P2, mirrors the current generated by the N-type current mirror circuit 1, and injects it into the configurable resistor network.

[0031] The configurable resistor network includes resistors R3, R4... Rn and switches 3, 4... n. By selecting different switches to conduct, different resistance values can be configured. The current generated by the P-type current mirror circuit flows through the configurable resistor network to generate a control voltage V1, which serves as the input voltage of the feedback amplifier.

[0032] The positive input terminal of the amplifier is connected to node 1. With the control voltage V1 as the input, its output terminal is directly connected to the negative input terminal, configured in the form of unity-gain negative feedback, copying the voltage V1 at its positive input terminal to the output terminal.

[0033] The N-type current mirror circuit 2 mirrors the current generated at the output terminal of the amplifier on the N-type transistor N5 to the N-type transistor N6, and accesses it as a pull-down current to the bias circuit of the power amplifier.

[0034] Among them, the amplifier includes an operational amplifier with an output buffer stage, and the output buffer stage is configured as a 1:1 amplifier for output impedance matching.

[0035] Among them, the number of diodes, the number of resistors, and the number of N-type transistors connected in the form of diodes in the output swing detection circuit are adjustable.

[0036] Among them, the N-type current mirror circuit and the P-type current mirror circuit include a cascode current mirror and a low-voltage cascode current mirror.

[0037] The following references Figure 2 , to describe the connection relationships of the various parts of the protection circuit.

[0038] The output swing detection circuit includes diode D1, resistor R1, and NMOS transistors N1 and N3 connected in the form of diodes. Among them, the drain and gate of NMOS transistor N1 are commonly connected to the source of NMOS transistor N3, the drain and gate of NMOS transistor 3 are commonly connected to one end of resistor R1, the other end of resistor R1 is connected to the negative electrode of diode D1, and the positive electrode of diode D1 is connected to the output stage of the RF power amplifier.

[0039] The N-type current mirror circuit 1 includes NMOS transistors N1, N2, and N4. NMOS transistors N1 and N2 are used to mirror the current generated on N-type transistor N1 to N-type transistor N2, and NMOS transistor N4 is used to reduce the channel length modulation effect, making the current replication of the N-type current mirror circuit 1 more accurate. The P-type current mirror circuit includes PMOS transistors P1 and P2. The current mirrored by the N-type current mirror circuit 1 is supplied to the drain and gate of PMOS transistor P1 of the P-type current mirror circuit via NMOS transistor N4, where the source of NMOS transistor N4 is connected to the drain of NMOS transistor N2, the gate of NMOS transistor N4 is connected to the gate of NMOS transistor N3, and the drain of NMOS transistor N4 is connected to the drain and gate of PMOS transistor P1.

[0040] The configurable resistor network includes resistors R3, R4... Rn connected in series and switches 3, 4... n connected in series with resistors R3, R4... Rn respectively; where, switch 3 and resistors R3, R4 to Rn are connected in series between node 1 and ground in sequence; the first end of each of switches 3, 4 to n is connected to node 1, the second end of switch 3 is connected to the first end of resistor R3, the second end of switch 4 is connected to the second end of resistor R3 and the first end of resistor R4, and the second end of switch n is connected to the second end of resistor Rn-1 and the first end of resistor Rn, and the second end of resistor Rn is connected to ground.

[0041] The positive input terminal of the amplifier is connected to node 1 to control voltage V1 as the input, and its output terminal is directly connected to the negative input terminal, configured in the form of unity-gain negative feedback to copy the voltage V1 at its positive input terminal to the output terminal.

[0042] The N-type current mirror circuit 2 mirrors the current generated on NMOS transistor N5 at the output terminal of the amplifier to NMOS transistor N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

[0043] In the first embodiment, the pull-down current generated on N-type transistor N6 is:

[0044]

[0045] where, Vout is the output voltage of the RF power amplifier, V T.D1 is the threshold voltage of diode D1, V T.N1 is the threshold voltage of N-type transistor N1, V T.N3 is the threshold voltage of N-type transistor N3, V T.N5 is the threshold voltage of N-type transistor N5, N2 / N1 is the ratio K of the sizes of N-type transistors N2 and N1 N1 , P2 / P1 is the ratio K of the sizes of P-type transistors P2 and P1 P, N6 / N5 is the ratio K of the sizes of NMOS transistors N6 and N5 N2 , R is the resistance value of the configurable resistor network, R1 is the resistance value of resistor R1, and R2 is the resistance value of resistor R2.

[0046] Figure 3 is a schematic diagram showing a protection circuit of a radio frequency power amplifier with a configurable critical power protection value according to a second embodiment of the present invention.

[0047] Figure 3 The functions of the various parts of the protection circuit shown are the same as those of the Figure 2 protection circuit shown, and will not be described in detail here.

[0048] The following refers to Figure 3 to describe the various parts of the protection circuit of the second embodiment and their connection relationships.

[0049] As Figure 3 shown, the output swing detection circuit includes diodes D1 and D2, resistors R1, and NMOS transistors N1, N3, and N7 connected in diode form, where the drain and gate of NMOS transistor N1 are commonly connected to the source of NMOS transistor N3, the drain and gate of NMOS transistor N3 are commonly connected to the source of NMOS transistor N7, the drain and gate of NMOS transistor 7 are commonly connected to one end of resistor R1, the other end of resistor R1 is connected to the negative electrode of diode D2, the positive electrode of diode D2 is connected to the negative electrode of diode D1, and the positive electrode of diode D1 is connected to the output stage of the radio frequency power amplifier.

[0050] The N-type current mirror circuit 1 includes NMOS transistors N1 and N2 and NMOS transistors N4 and N8. NMOS transistors N1 and N2 are used to mirror the current generated on N-type transistor N1 to N-type transistor N2. NMOS transistors N4 and N8 are used to reduce the channel length modulation effect and make the current replication of the N-type current mirror circuit 1 more accurate. The P-type current mirror circuit includes PMOS transistors P1 and P2. The current mirrored by the N-type current mirror circuit 1 is supplied to the drain and gate of PMOS transistor P1 of the P-type current mirror circuit via NMOS transistors N4 and N8, where the source of NMOS transistor N4 is connected to the drain of NMOS transistor N2, the gate of NMOS transistor N4 is connected to the gate of NMOS transistor N3, the drain of NMOS transistor N4 is connected to the source of NMOS transistor N8, the gate of NMOS transistor N8 is connected to the gate of NMOS transistor N7, and the drain of NMOS transistor N8 is connected to the drain and gate of PMOS transistor P1.

[0051] The configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between node 1 and ground. Among them, the third resistor unit includes a resistor R3 and a switch 3 connected in series, the fourth resistor unit includes an R4 and a switch 4 connected in series, and the nth resistor unit includes a resistor Rn and a switch n connected in series.

[0052] The positive input terminal of the amplifier is connected to node 1 to control the voltage V1 as the input. Its output terminal is directly connected to the negative input terminal and is configured in the form of unity-gain negative feedback to copy the voltage V1 at its positive input terminal to the output terminal.

[0053] The N-type current mirror circuit 2 mirrors the current generated at the output terminal of the amplifier on the NMOS transistor N5 to the NMOS transistor N6, and the mirrored current is connected as a pull-down current to the bias circuit of the power amplifier.

[0054] In the second embodiment, the pull-down current generated on the N-type transistor N6 is:

[0055]

[0056] Among them, Vout is the output voltage of the RF power amplifier, V T.D1 is the threshold voltage of diode D1, V T.D2 is the threshold voltage of diode D2, V T.N1 is the threshold voltage of N-type transistor N1, V T.N3 is the threshold voltage of N-type transistor N3, V T.N7 is the threshold voltage of N-type transistor N7, V T.N5 is the threshold voltage of N-type transistor N5, N2 / N1 is the ratio K of the sizes of N-type transistors N2 and N1 N1 , P2 / P1 is the ratio K of the sizes of P-type transistors P2 and P1 P , N6 / N5 is the ratio K of the sizes of NMOS transistors N6 and N5 N2 , R is the resistance value of the configurable resistor network, R1 is the resistance value of resistor R1, and R2 is the resistance value of resistor R2.

[0057] It can be seen from the formulas (1) and (2) of the first embodiment and the second embodiment that the pull-down current of the N-type transistor N6 can be adjusted through multiple variables:

[0058] 1. By selecting different switches to conduct, the resistance value R of the configurable resistor network can be adjusted, thereby generating different pull-down currents;

[0059] 2. By adjusting the ratios of N2 / N1, P2 / P1, and N6 / N5 in each current mirror circuit, different pull-down currents can be generated;

[0060] 3. By adjusting the number of diodes, resistors, and N-type transistors in the output swing detection circuit, different pull-down currents can be generated.

[0061] The power amplifier bias circuit is pulled down by pull-down currents of different intensities, and an adjustable critical power protection value can be achieved.

[0062] The protection circuit of the RF power amplifier according to the present invention has a configurable critical power protection value, thereby achieving precise adjustment of the critical power protection value and being able to adapt to application scenarios with various power supply voltages.

[0063] Although the present disclosure has been described with exemplary embodiments, various changes and modifications can be suggested to those skilled in the art. The present disclosure is intended to cover such changes and modifications that fall within the scope of the appended claims.

[0064] Any description in the present invention should not be construed as implying that any particular element, step, or function is an essential element that must be included within the scope of the claims. The scope of the patent subject matter is defined only by the claims.

Claims

1. A protection circuit for a radio frequency power amplifier, comprising: The output swing detection circuit is connected to the output stage of the radio frequency power amplifier for detecting the voltage swing of the output stage of the radio frequency power amplifier, and includes an M connected in series between the output stage of the radio frequency power amplifier and the ground GND. D diodes, M R resistor and M NMOS NMOS tubes, each of which is connected in the form of a diode; An N-type current mirror circuit 1, for mirroring the current generated by the output swing detection circuit, and providing the mirrored current to the P-type current mirror circuit; The P-type current mirror circuit is used to mirror the current generated by the N-type current mirror circuit 1 and generate a control voltage V1 at a node 1 between the P-type current mirror circuit and the configurable resistor network; The configurable resistor network is connected to the P-type current mirror circuit via node 1 to receive the current generated by the P-type current mirror circuit, and includes a plurality of resistors and a plurality of switches for respectively controlling the plurality of resistors. The amplifier has its positive input connected to node 1 and has a control voltage V1 as input voltage, its output directly connected to its negative input and is configured in the form of unity gain negative feedback to copy the control voltage V1 at its positive input to its output, The N-type current mirror circuit 2 is connected to the output end of the amplifier and is used to mirror the current generated at the output end of the amplifier, and the mirrored current is connected to the bias circuit of the RF power amplifier as a pull-down current to shut down the bias circuit of the RF power amplifier.

2. The protection circuit according to claim 1, in, M D 、M R and M NMOS are integers greater than or equal to 1.

3. The protection circuit according to claim 1, in, The amplifier comprises an operational amplifier with an output buffer stage.

4. The protection circuit according to claim 1, wherein: The N-type current mirror circuit 1, the N-type current mirror circuit 2 and the P-type current mirror circuit include cascode current mirrors or low-voltage cascode current mirrors.

5. The protection circuit according to claim 1, wherein: When the voltage swing at the output end of the RF power amplifier exceeds the threshold voltage of the output swing detection circuit, a current is generated in the N-type current mirror circuit 1 .

6. The protection circuit according to claim 1, in, The N-type current mirror circuit 1 includes NMOS transistors N1 and N2, the P-type current mirror circuit includes PMOS transistors P1 and P2, and the N-type current mirror circuit 2 includes NMOS transistors N5 and N6, wherein the ratio of the sizes of the NMOS transistors N2 and N1 is K N1 , the size ratio of PMOS tube P2 and P1 is K P , the size ratio of NMOS tubes N6 and N5 is K N2 ; The sources of the NMOS tube N1 and the NMOS tube N2 of the N-type current mirror circuit 1 are both connected to the ground GND, and the N-type current mirror circuit 1 mirrors the current on the NMOS tube N1 to the NMOS tube N2, and provides the mirrored current to the drain and gate of the PMOS tube P1 of the P-type current mirror circuit via the drain of the NMOS tube N2; The sources of the PMOS transistors P1 and P2 of the P-type current mirror circuit are both connected to the power supply voltage VDD, the drain of the PMOS transistor P2 is connected to the configurable resistor network, and the P-type current mirror circuit mirrors the current on the PMOS transistor P1 to the PMOS transistor P2 and generates a control voltage V1 at a node 1 between the drain of the PMOS transistor P2 and the configurable resistor network; The NMOS tube N5 of the N-type current mirror circuit 2 is connected to the output end of the amplifier via the resistor R2. The N-type current mirror circuit 2 is used to mirror the current generated on the NMOS tube N5 at the output end of the amplifier to the NMOS tube N6, and the mirrored current is connected to the bias circuit of the power amplifier as a pull-down current.

7. The protection circuit according to claim 6, wherein: The output swing detection circuit includes a diode D1, a resistor R1, and NMOS tubes N1 and N3 connected in series between the output stage of the RF power amplifier and the ground GND, wherein the drain and gate of the NMOS tube N1 are commonly connected to the source of the NMOS tube N3, the drain and gate of the NMOS tube 3 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the RF power amplifier; The N-type current mirror circuit 1 also includes an NMOS tube N4, and the current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS tube P1 of the P-type current mirror circuit via the NMOS tube N4, wherein the source of the NMOS tube N4 is connected to the drain of the NMOS tube N2, the gate of the NMOS tube N4 is connected to the gate of the NMOS tube N3, and the drain of the NMOS tube N4 is connected to the drain and gate of the PMOS tube P1.

8. The protection circuit according to claim 6, wherein: The output swing detection circuit includes diodes D1 and D2, a resistor R1, and NMOS tubes N1, N3, and N7 connected in series between the output stage of the radio frequency power amplifier and the ground GND, wherein the drain and gate of the NMOS tube N1 are commonly connected to the source of the NMOS tube N3, the drain and gate of the NMOS tube N3 are commonly connected to the source of the NMOS tube N7, the drain and gate of the NMOS tube N7 are commonly connected to one end of the resistor R1, the other end of the resistor R1 is connected to the cathode of the diode D2, the anode of the diode D2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the output stage of the radio frequency power amplifier; The N-type current mirror circuit 1 also includes NMOS tubes N4 and N8. The current mirrored by the N-type current mirror circuit 1 is provided to the drain and gate of the PMOS tube P1 of the P-type current mirror circuit via the NMOS tubes N4 and N8, wherein the source of the NMOS tube N4 is connected to the drain of the NMOS tube N2, the gate of the NMOS tube N4 is connected to the gate of the NMOS tube N3, the drain of the NMOS tube N4 is connected to the source of the NMOS tube N8, the gate of the NMOS tube N8 is connected to the gate of the NMOS tube N7, and the drain of the NMOS tube N8 is connected to the drain and gate of the PMOS tube P1.

9. The protection circuit according to any one of claims 6 to 8, in, The configurable resistor network includes resistors R3, R4 to Rn and switches 3, 4 to n. The switch 3 and the resistors R3, R4 to Rn are connected in series between the node 1 and the ground. Among them, the first end of each of switches 3, 4 to n is connected to node 1, the second end of switch 3 is connected to the first end of resistor R3, the second end of switch 4 is connected to the second end of resistor R3 and the first end of resistor R4, and the second end of switch n is connected to the second end of resistor Rn-1 and the first end of resistor Rn, and the second end of resistor Rn is connected to ground.

10. The protection circuit according to any one of claims 6 to 8, in, The configurable resistor network includes a third resistor unit to an nth resistor unit connected in parallel between the node 1 and the ground, The third resistor unit includes a resistor R3 and a switch 3 connected in series, the fourth resistor unit includes a resistor R4 and a switch 4 connected in series, and the nth resistor unit includes a resistor Rn and a switch n connected in series.

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