Display panel and display device

Abstract

This invention discloses a display panel and a display device, relating to the field of display technology. The display panel includes a display area, comprising a far-end pixel area and a near-end pixel area. The distance between the far-end pixel area and the gate driving circuit is greater than the distance between the near-end pixel area and the gate driving circuit. Scan lines and data lines divide the far-end pixel area into multiple arrayed far-end pixel units, each connected to one scan line and one data line. Similarly, the scan lines and data lines divide the near-end pixel area into multiple arrayed near-end pixel units, each connected to two scan lines and one data line. By dividing the display area into far-end and near-end pixel areas, the far-end pixel area adopts a Stripe driving architecture, which improves the charging effect at the far end, thereby improving image quality issues such as color shift or bright / dark lines during display. The near-end pixel area adopts a Dual Gate driving architecture, which reduces the number of source driving circuits and saves costs.

Description

Technical Field

[0001] This invention relates to the field of liquid crystal display technology, and more particularly to a display panel and display device. Background Technology

[0002] Typically, the number of source integrated circuits (S-ICs) is determined by the panel architecture. Large-size and high-resolution (UHD and higher) MiniLED products require more data traces, leading to increased manufacturing costs. Therefore, finding an effective solution to reduce panel manufacturing costs is particularly important. Taking UHD models as an example, the traditional Stripe architecture requires 12 S-ICs. To save on the number of S-ICs, Dual Gate architecture technology has been applied to products larger than 50 inches. However, large-size panels with Dual Gate architecture often sacrifice the hold-on time of one row of TFTs to maintain a certain refresh rate. Furthermore, insufficient charging at the far end of the GOA (Gate on array) makes the image more prone to bright and dark lines or color shifts. Summary of the Invention

[0003] The main objective of this invention is to provide a display panel and display device that addresses the technical problems of high cost of S-IC when using Stripe architecture and image quality issues when using Dual Gate architecture in the prior art.

[0004] To achieve the above objectives, the present invention proposes a display panel, comprising a display area, a gate driving circuit being disposed around the display area, the display area having multiple parallel scan lines extending in the row direction and multiple parallel data lines extending in the column direction, the scan lines being connected to the gate driving circuit, the display area comprising a far-end pixel area and a near-end pixel area, the distance between the far-end pixel area and the gate driving circuit being greater than the distance between the near-end pixel area and the gate driving circuit, the scan lines and the data lines dividing the far-end pixel area into multiple arrayed far-end pixel units, each far-end pixel unit comprising a far-end terminal pixel, the far-end terminal pixel being connected to a scan line and a data line, the scan lines and the data lines dividing the near-end pixel area into multiple arrayed near-end pixel units, each near-end pixel unit comprising a first near-end terminal pixel and a second near-end terminal pixel, the first near-end terminal pixel and the second near-end terminal pixel being respectively connected to a scan line, and the first near-end terminal pixel and the second near-end terminal pixel being connected to the same data line.

[0005] Optionally, first near-end pixels in the same row are connected to the same scan line, second near-end pixels in the same row are connected to the same scan line, far-end pixels in the same row are connected to the same scan line, first near-end pixels in the same column are connected to the same data line, second near-end pixels in the same column are connected to the same data line, and far-end pixels in the same column are connected to the same data line.

[0006] Optionally, each row of near-end pixel units has a scan line above and below it, and each row of far-end pixel units has a scan line above and below it. Near-end pixel units and far-end pixel units in the same row correspond to the same two scan lines. Each column of near-end pixel units and each column of far-end pixel units has a data line on the left side.

[0007] Optionally, the far-end sub-pixels are respectively connected to the upper scan line and the left data line, and the far-end sub-pixels are any one of red sub-pixels, green sub-pixels and blue sub-pixels.

[0008] Optionally, the first near-terminal pixel is located to the left of the second near-terminal pixel, the first near-terminal pixel is connected to the upper scan line, the second near-terminal pixel is connected to the lower scan line, and the first near-terminal pixel and the second near-terminal pixel are connected to the data line on the left.

[0009] Optionally, when the first near-terminal pixel is a red sub-pixel, the second near-terminal pixel is a green sub-pixel; when the first near-terminal pixel is a blue sub-pixel, the second near-terminal pixel is a red sub-pixel; and when the first near-terminal pixel is a green sub-pixel, the second near-terminal pixel is a blue sub-pixel.

[0010] Optionally, the proximal pixel region includes a first proximal pixel region and a second proximal pixel region, wherein the first proximal pixel region and the second proximal pixel region are located on both sides of the distal pixel region.

[0011] Optionally, a plurality of source driving circuits are further provided around the display area. The source driving circuits are connected to the data lines. The number of source driving circuits connected to the data lines in the first near-end pixel area is less than the number of source driving circuits connected to the data lines in the far-end pixel area. The number of source driving circuits connected to the data lines in the second near-end pixel area is less than the number of source driving circuits connected to the data lines in the far-end pixel area.

[0012] Optionally, the display area is composed of multiple pixel regions in the row direction, with a first preset number of pixel regions forming the first near-end pixel region and the second near-end pixel region, and a second preset number of pixel regions forming the far-end pixel region.

[0013] To achieve the above objectives, the present invention also proposes a display device, the display device comprising a backlight module and a display panel as described above, wherein the backlight module is disposed correspondingly to the display panel, and the backlight module is used to provide a backlight source to the display panel.

[0014] In this invention, the display panel includes a display area, and a gate driving circuit is provided around the display area. The display area has multiple parallel scan lines extending in the row direction and multiple parallel data lines extending in the column direction. The scan lines are connected to the gate driving circuit. The display area includes a far-end pixel area and a near-end pixel area. The distance between the far-end pixel area and the gate driving circuit is greater than the distance between the near-end pixel area and the gate driving circuit. The scan lines and data lines divide the far-end pixel area into multiple arrayed far-end pixel units. Each far-end pixel unit includes a far-end terminal pixel. The far-end terminal pixel is connected to a scan line and a data line. The scan lines and the data lines divide the near-end pixel area into multiple arrayed near-end pixel units. Each near-end pixel unit includes a first near-end terminal pixel and a second near-end terminal pixel. The first near-end terminal pixel and the second near-end terminal pixel are each connected to a scan line and the first near-end terminal pixel and the second near-end terminal pixel are connected to the same data line. Compared to the higher cost of S-ICs when using the Stripe architecture and the potential for image quality issues when using the Dual Gate architecture, this invention divides the display area into a far-end pixel area and a near-end pixel area, each employing a different driving architecture. The far-end pixel area uses the Stripe driving architecture, which improves the charging effect at the far end, thereby improving image quality issues such as color shift or bright / dark lines during display. The near-end pixel area uses the Dual Gate driving architecture, which reduces the number of S-ICs required, saving costs. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the structure of the first embodiment of the display panel of the present invention;

[0017] Figure 2 This is a schematic diagram of the Stripe driver architecture according to one embodiment of the display panel of the present invention;

[0018] Figure 3 This is a schematic diagram of the Dual Gate architecture of one embodiment of the display panel of the present invention;

[0019] Figure 4 This is a schematic diagram of the structure of the second embodiment of the display panel of the present invention;

[0020] Figure 5 This is a schematic diagram of the structure of the third embodiment of the display panel of the present invention;

[0021] Figure 6 This is a schematic diagram of the pixel area of ​​a display panel according to an embodiment of the present invention;

[0022] Figure 7 This is a schematic diagram of the overall architecture of a display panel according to one embodiment of the present invention;

[0023] Figure 8 This is a schematic diagram of the structure of one embodiment of the display device of the present invention.

[0024] Explanation of icon numbers:

[0025] label name label name 10 Far-end pixel area 2012 Second near-terminal pixel 20 Near-end pixel area R Red subpixel 30 Gate drive circuit G Green subpixel 40 Source drive circuit B Blue subpixel 50 pixel area Gate 1~Gate N scan lines 101 Far-end pixel unit Date 1~Date M Data cable 201 Near-end pixel unit 60 Backlight module 1011 Far-end pixel 70 Display panel 2011 First near-terminal pixel

[0026] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0027] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0029] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0030] Furthermore, the use of terms such as "first" and "second" in this invention is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. Additionally, the technical solutions of the various embodiments can be combined with each other, but only on the basis of being achievable by those skilled in the art. When the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed by this invention.

[0031] Example 1

[0032] Reference Figure 1 , Figure 1 This is a schematic diagram of one embodiment of the display panel of the present invention. The present invention proposes an embodiment of the display panel.

[0033] like Figure 1 As shown, in this embodiment, the display panel includes a display area, and a gate driving circuit 30 is provided around the display area. The display area has multiple parallel scan lines extending in the row direction and multiple parallel data lines extending in the column direction. The scan lines are connected to the gate driving circuit. The display area includes a far-end pixel area 10 and a near-end pixel area 20. The distance between the far-end pixel area 10 and the gate driving circuit 30 is greater than the distance between the near-end pixel area 20 and the gate driving circuit 30. The scan lines and the data lines divide the far-end pixel area 10 into multiple array-distributed... Each far-end pixel unit 101 includes a far-end pixel 1011. The far-end pixel 1011 is connected to a scan line and a data line. The scan line and the data line divide the near-end pixel region 20 into a plurality of near-end pixel units 201 arranged in an array. Each near-end pixel unit 201 includes a first near-end pixel 2011 and a second near-end pixel 2012. The first near-end pixel 2011 and the second near-end pixel 2012 are each connected to a scan line. The first near-end pixel 2011 and the second near-end pixel 2012 are connected to the same data line.

[0034] It should be noted that there can be multiple gate driving circuits (GDL circuits) 30. Therefore, in this embodiment, the distance between the far-end pixel region 10 and the gate driving circuit 30 refers to the shortest distance between them. Correspondingly, the distance between the far-end pixel region 10 and the gate driving circuit 30 refers to the shortest distance between them. Generally, the far-end pixel region 10 is the area in the display area that is relatively far from the gate driving circuit 30, and the near-end pixel region is the area in the display area that is relatively short from the gate driving circuit 30. For example, if the gate driving circuit 30 is located on the left and right sides of the outer perimeter of the display area, the areas on the left and right sides of the display area are closer to the gate driving circuit 30 and can be considered as near-end pixel regions 20. The area in the middle of the display area is farther from the gate driving circuit 30 and can be considered as far-end pixel regions 10. The division between the far-end pixel region 10 and the near-end pixel region 20 can be determined according to the actual situation, and this embodiment does not impose any restrictions on this.

[0035] It is understood that the scan lines (Gate lines) are arranged in the row direction, and the data lines (Date lines) are arranged in the column direction. The scan lines are connected to the gate driving circuit 30, and the data lines are connected to the source driving circuit 40 on the periphery of the display area. Gate 1 to Gate N are the first to Nth scan lines arranged in the display area, respectively, and Date 1 to Date M are the first to Mth scan lines arranged in the display area, respectively. The scan lines intersect with the insulating lines insulated from each other, which can define sub-regions in the far-end pixel area 10 and the near-end pixel area 20, namely the far-end pixel unit 101 and the near-end pixel unit 201. Both the far-end pixel unit 101 and the near-end pixel unit 201 are arranged in an array.

[0036] It should be understood that each far-end pixel unit 101 includes a far-end pixel 1011, and each far-end pixel 1011 is connected to a scan line and a data line. Each near-end pixel unit 201 includes a first near-end pixel 2011 and a second near-end pixel 2012. Each first near-end pixel 2011 is connected to a scan line and a data line, and each second near-end pixel 2012 is connected to a scan line and a data line. The first near-end pixel 2011 and the second near-end pixel 2012 in each near-end pixel unit 201 are connected to two different scan lines, and the first near-end pixel 2011 and the second near-end pixel 2012 in each near-end pixel unit 201 are connected to the same data line.

[0037] It should be noted that, as Figure 2 As shown, in the Stripe driving architecture, each subpixel requires one scan line and one data line for driving, and the number of source driving circuits 40 required is also relatively large. Due to the high cost of the data lines and source driving circuits 40, the cost of adopting the Stripe driving architecture is high. Figure 3 As shown, although the cost problem is improved in the Dual Gate architecture by reducing the number of data lines and source drive circuit 40, the large number of data lines results in a shorter data line opening time at the same refresh rate, which affects the charging of sub-pixels. Since the charging effect at the far end is inherently poor, the charging effect at the far end in the Dual Gate architecture is even worse.

[0038] Furthermore, the first near-end pixel 2011 located in the same row is connected to the same scan line, the second near-end pixel 2012 located in the same row is connected to the same scan line, the far-end pixel 1011 located in the same row is connected to the same scan line, the first near-end pixel 2011 located in the same column is connected to the same data line, the second near-end pixel 2012 located in the same column is connected to the same data line, and the far-end pixel 1011 located in the same column is connected to the same data line.

[0039] It is understood that in this embodiment, a Stripe driving architecture is adopted in the far-end pixel area 10. Each far-end pixel unit 101 is connected to one scan line and one data line. The far-end sub-pixels 1011 in each far-end pixel unit 101 are driven by one scan line and one data line, which can ensure that the scan line has sufficient opening time and ensure the charging effect of the far-end sub-pixels 1011, thereby improving image quality problems such as color shift or bright and dark lines and improving the display effect. In the near-end pixel area 20, a Dual Gate architecture is adopted. Each near-end pixel unit 201 is connected to two scan lines and one data line. The two near-end sub-pixels 2011 in each near-end pixel unit 201 are driven by two scan lines and one data line. Each near-end pixel unit 201 can reduce the use of one data line, thereby reducing the source driving circuit 40 required in the near-end pixel area 20 and reducing costs.

[0040] In this embodiment, the display panel includes a display area, and a gate driving circuit 30 is provided around the display area. The display area has multiple parallel scan lines extending in the row direction and multiple parallel data lines extending in the column direction. The scan lines are connected to the gate driving circuit. The display area includes a far-end pixel area 10 and a near-end pixel area 20. The distance between the far-end pixel area 10 and the gate driving circuit 30 is greater than the distance between the near-end pixel area 20 and the gate driving circuit 30. The scan lines and data lines divide the far-end pixel area 10 into multiple far-end pixels arranged in an array. The pixel unit 101 includes a far-end pixel unit 1011, which is connected to a scan line and a data line. The scan line and data line divide the near-end pixel area 20 into multiple near-end pixel units 201 arranged in an array. Each near-end pixel unit 201 includes a first near-end pixel 2011 and a second near-end pixel 2012. The first near-end pixel 2011 and the second near-end pixel 2012 are each connected to a scan line, and the first near-end pixel 2011 and the second near-end pixel 2012 are connected to the same data line. In this embodiment, the display area is divided into a far-end pixel area and a near-end pixel area, which adopt different driving architectures. The far-end pixel area adopts a Stripe driving architecture, which can improve the charging effect at the far end, thereby improving image quality problems such as color shift or bright and dark lines during display and improving the display effect. The near-end pixel area adopts a Dual Gate driving architecture, which can reduce the number of S-ICs used and save costs.

[0041] Example 2

[0042] Reference Figure 4 , Figure 4 This is a schematic diagram of the structure of a second embodiment of the display panel of the present invention. Based on the first embodiment described above, the present invention proposes a second embodiment of the display panel.

[0043] In this embodiment, each row of near-end pixel units 201 has a scan line above and below it, and each row of far-end pixel units 101 has a scan line above and below it. Near-end pixel units 201 and far-end pixel units 101 in the same row correspond to the same two scan lines. Each column of near-end pixel units 201 and each column of far-end pixel units 101 has a data line on the left side.

[0044] It should be noted that in this embodiment, since the near-end pixel area 20 adopts a Dual Gate architecture, two scan lines need to be set between every two rows of near-end pixel units 201. Correspondingly, there are also two scan lines between every two rows of far-end pixel units 101. Each row of near-end pixel units 201 has one upper data line and one lower data line. That is, near-end pixel units 201 in the same row have the same two scan lines, and near-end pixel units 201 in different rows correspond to different two scan lines. Correspondingly, each row of far-end pixel units 101 has one upper data line and one lower data line. Far-end pixel units 101 in the same row have the same two scan lines, and far-end pixel units 101 in different rows correspond to different two scan lines. If far-end pixel units 101 and near-end pixel units 201 are located in the same row, they correspond to the same two scan lines. Since the far-end pixel area 10 adopts a Stripe driving architecture, each far-end pixel unit 101 only needs to be connected to one scan line. Therefore, the far-end pixel unit 101 can choose to connect to one of the upper or lower scan lines.

[0045] It is understandable that in the near-end pixel area 20, the data line is set to the left of each column of near-end pixel unit 201, and in the far-end pixel area 10, the data line is set to the left of each column of far-end pixel unit 101. That is to say, the same column of near-end pixel unit 201 is connected to the same data line, and the same column of far-end pixel unit 101 is connected to the same data line.

[0046] Furthermore, the far-end sub-pixel 1011 is connected to the upper scan line and the left data line respectively, and the far-end sub-pixel 1011 is any one of the red sub-pixel R, the green sub-pixel G, and the blue sub-pixel B.

[0047] It should be understood that in this embodiment, each far-end pixel 1011 is connected to the scan line above and to the data line on the left. In the far-end pixel area 10, each row of far-end pixels 1011 is arranged in the order of R, G, B. Each data line connects far-end pixels 1011 of the same color.

[0048] Furthermore, the first near-end pixel 2011 is located to the left of the second near-end pixel 2012. The first near-end pixel 2011 is connected to the upper scan line, and the second near-end pixel 2012 is connected to the lower scan line. The first near-end pixel 2011 and the second near-end pixel 2012 are connected to the data line on the left.

[0049] It should be noted that the first near-field pixel 2011 on the left is connected to the upper scan line, and the second near-field pixel 2012 on the right is connected to the lower scan line. Both the first near-field pixel 2011 and the second near-field pixel 2012 are connected to the data line on the left.

[0050] It is understandable that when the first near-terminal pixel 2011 is a red sub-pixel R, the second near-terminal pixel 2012 is a green sub-pixel G; when the first near-terminal pixel 2011 is a blue sub-pixel B, the second near-terminal pixel 2012 is a red sub-pixel R; and when the first near-terminal pixel 2011 is a green sub-pixel G, the second near-terminal pixel 2012 is a blue sub-pixel B.

[0051] It should be understood that in the near-end pixel area 20, each row of near-end pixel units 201 is arranged in the order of RG, BR, GB. Each data line connects the first near-end pixel 2011 / second near-end pixel 2012 of the same color.

[0052] In this embodiment, the near-end pixel unit 201 has a scan line above and below it, and the far-end pixel unit 101 has a scan line above and below it. Near-end pixel units 201 and far-end pixel units 101 located in the same row correspond to the same two scan lines. The near-end pixel unit 201 and far-end pixel unit 101 each have a data line to their left. Near-end pixel units 201 located in the same column correspond to the same data line, and far-end pixel units 101 located in the same column correspond to the same data line. The far-end pixel 1011 is connected to the upper scan line and the left data line, respectively. The first near-end pixel 2011 is located to the left of the second near-end pixel 2012. The first near-end pixel 2011 is connected to the upper scan line, and the second near-end pixel 2012 is connected to the lower scan line. The first near-end pixel 2011 and the second near-end pixel 2012 are connected to the left data line. In this embodiment, the display area is divided into a far-end pixel area and a near-end pixel area. The far-end pixel area and the near-end pixel area adopt different driving architectures. The far-end pixel area adopts the Stripe driving architecture, which can improve the charging effect at the far end, thereby improving the image quality problems such as color shift or bright and dark lines during display and improving the display effect. The near-end pixel area adopts the DualGate driving architecture, which can reduce the number of S-ICs used and save costs.

[0053] Example 3

[0054] Reference Figure 5 , Figure 5 This is a schematic diagram of the structure of a third embodiment of the display panel of the present invention. Based on the above embodiments one and two, the present invention proposes a third embodiment of the display panel.

[0055] In this embodiment, the proximal pixel region 20 includes a first proximal pixel region and a second proximal pixel region, which are located on both sides of the distal pixel region 10.

[0056] It should be noted that the gate driving circuit 30 is usually located on both sides of the periphery of the display area. Therefore, in this embodiment, the area near the two sides of the display area is divided into the near-end pixel area 20, and the middle area is divided into the far-end pixel area 10.

[0057] It is understood that the display area is composed of multiple pixel regions 50 in the row direction. A first preset number of pixel regions 50 form a first near-end pixel region and a second near-end pixel region, and a second preset number of pixel regions 50 form a far-end pixel region 10.

[0058] It should be understood that the first preset quantity and the second preset quantity are two pre-set quantities, used to divide the near-end pixel area 20 and the far-end pixel area 10, respectively, for example: Reference Figure 6 There are a total of 12 pixel regions 50. The first preset number and the second preset number are both 4. The leftmost 4 pixel regions 50 form the first near-end pixel region, the rightmost 4 pixel regions 50 form the second near-end pixel region, and the middle 4 pixel regions 50 form the far-end pixel region 10. The division can be made according to actual needs. This embodiment does not limit this.

[0059] It should be noted that the division of pixel area 50 needs to be determined according to the actual situation. For example, for UHD (Ultra High Definition) panels, the display area usually has 3840*2160 sub-pixels. In this case, the display area is divided into 12 pixel areas 50 with 320 sub-pixels in the row direction.

[0060] Furthermore, a plurality of source drive circuits 40 are provided around the display area, and the source drive circuits 40 are connected to the data line.

[0061] It is understandable that both the first and second proximal pixel regions adopt a Dual Gate driving architecture. Therefore, both the first and second proximal pixel regions can reduce the number of source driving circuits 40 used. If the first, second, and far-end pixel regions 10 are all composed of the same number of pixel regions 50, then the number of source driving circuits 40 used in the far-end pixel region 10 is twice the number used in the first proximal pixel region. Correspondingly, the number of source driving circuits 40 used in the far-end pixel region 10 is twice the number used in the second proximal pixel region. Generally speaking, the number of source driving circuits 40 used in the far-end pixel region 10 will be greater than the number of source driving circuits 40 used in the first / second proximal pixel region.

[0062] like Figure 7 As shown, in a UHD panel, if the leftmost four pixel regions 50 form the first near-end pixel region, the rightmost four pixel regions 50 form the second near-end pixel region, and the middle four pixel regions 50 form the far-end pixel region 10, then only eight source driver circuits 40 are needed, which is less than the twelve source driver circuits 40 required using the traditional Stripe driver architecture (see reference). Figure 2 ).

[0063] In this embodiment, a Dual Gate-Stripe-Dual Gate driving architecture is adopted, dividing the display area into a far-end pixel area and a near-end pixel area. The far-end pixel area and the near-end pixel area adopt different driving architectures. The far-end pixel area adopts a Stripe driving architecture, which can improve the charging effect at the far end, thereby improving image quality problems such as color shift or bright and dark lines during display and improving the display effect. The near-end pixel area adopts a Dual Gate driving architecture, which can reduce the number of S-ICs used and save costs.

[0064] Reference Figure 8 , Figure 8 This is a schematic diagram of one embodiment of the display device of the present invention. To achieve the above objectives, the present invention also proposes a display device, which includes a backlight module 60 and the aforementioned display panel 70. The backlight module 60 is correspondingly disposed with the display panel 70, and the backlight module 60 is used to provide a backlight source to the display panel 70. The specific structure of the display panel 70 is as described in the above embodiments. Since this display device can adopt the technical solutions of all the above embodiments, it at least has the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here.

[0065] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.

Claims

1. A display panel, the display panel including a display area, a gate driving circuit being disposed around the display area, the display area having a plurality of parallel scan lines extending in a row direction and a plurality of parallel data lines extending in a column direction, the scan lines being connected to the gate driving circuit, characterized in that, The display area includes a far-end pixel area and a near-end pixel area. The distance between the far-end pixel area and the gate driving circuit is greater than the distance between the near-end pixel area and the gate driving circuit. The scan line and the data line divide the far-end pixel area into multiple arrayed far-end pixel units. Each far-end pixel unit includes a far-end terminal pixel. Each far-end terminal pixel is connected to a scan line and a data line. The scan line and the data line divide the near-end pixel area into multiple arrayed near-end pixel units. Each near-end pixel unit includes a first near-end terminal pixel and a second near-end terminal pixel. The first near-end terminal pixel and the second near-end terminal pixel are each connected to a scan line. The first near-end terminal pixel and the second near-end terminal pixel are connected to the same data line.

2. The display panel as described in claim 1, characterized in that, The first near-end pixels in the same row are connected to the same scan line, the second near-end pixels in the same row are connected to the same scan line, the far-end pixels in the same row are connected to the same scan line, the first near-end pixels in the same column are connected to the same data line, the second near-end pixels in the same column are connected to the same data line, and the far-end pixels in the same column are connected to the same data line.

3. The display panel as described in claim 2, characterized in that, Each row of near-end pixel units has a scan line above and below it, and each row of far-end pixel units has a scan line above and below it. Near-end pixel units and far-end pixel units in the same row correspond to the same two scan lines. Each column of near-end pixel units and each column of far-end pixel units has a data line on the left side.

4. The display panel as described in claim 3, characterized in that, The far-end sub-pixels are respectively connected to the upper scan line and the left data line, and the far-end sub-pixels are any one of the red sub-pixels, green sub-pixels and blue sub-pixels.

5. The display panel as described in claim 3, characterized in that, The first near-terminal pixel is located to the left of the second near-terminal pixel. The first near-terminal pixel is connected to the upper scan line, and the second near-terminal pixel is connected to the lower scan line. The first near-terminal pixel and the second near-terminal pixel are connected to the data line on the left.

6. The display panel as described in claim 5, characterized in that, When the first near-terminal pixel is a red sub-pixel, the second near-terminal pixel is a green sub-pixel; when the first near-terminal pixel is a blue sub-pixel, the second near-terminal pixel is a red sub-pixel; when the first near-terminal pixel is a green sub-pixel, the second near-terminal pixel is a blue sub-pixel.

7. The display panel as described in any one of claims 1 to 6, characterized in that, The proximal pixel region includes a first proximal pixel region and a second proximal pixel region, which are located on both sides of the distal pixel region.

8. The display panel as described in claim 7, characterized in that, The display area is composed of multiple pixel regions in the row direction. A first preset number of pixel regions form the first near-end pixel region and the second near-end pixel region, and a second preset number of pixel regions form the far-end pixel region.

9. The display panel as described in claim 8, characterized in that, The display area is also surrounded by multiple source drive circuits, which are connected to the data line.

10. A display device, characterized in that, The display device includes a backlight module and a display panel as described in any one of claims 1 to 9, wherein the backlight module is disposed correspondingly to the display panel, and the backlight module is used to provide a backlight source to the display panel.

Images