Fully differential two-stage drive amplifier circuit, Internet of Things chip and electronic equipment

Abstract

The present application provides a fully differential two-stage drive amplifier circuit, an Internet of Things chip, and an electronic device, wherein the fully differential two-stage drive amplifier circuit specifically comprises: a positive LC resonant circuit, a positive first-stage amplifier circuit, a positive second-stage amplifier circuit, a negative first-stage amplifier circuit, a negative second-stage amplifier circuit, and a negative LC resonant circuit. The technical solution of the present application has the advantages of large gain and low noise.

Description

Technical Field

[0001] The present invention relates to the fields of communication and the Internet of Things, and in particular to a fully differential two-stage drive amplifier circuit, an Internet of Things chip and electronic equipment. Background Art

[0002] In recent years, with the rapid development of RF integrated circuit technology, many wireless communication products are used in daily life. Low cost and portability requirements have put forward higher standards for the design of these wireless communication products. With the development of the Internet of Things, more and more IoT devices need to be connected to the Internet, so the demand for IoT chips is increasing.

[0003] The IoT chip needs to amplify the power of the radio frequency signal, so a driving amplifier circuit needs to be set up. The power amplification gain of the existing driving amplifier circuit is not high and has a high noise coefficient. Summary of the invention

[0004] The embodiments of the present invention provide a fully differential two-stage drive amplifier circuit, an Internet of Things chip, and an electronic device, which can improve the amplification gain of the drive amplifier circuit and effectively achieve a low noise coefficient.

[0005] In a first aspect, an embodiment of the present invention provides a fully differential two-stage drive amplifier circuit, wherein the fully differential two-stage drive amplifier circuit specifically comprises: a positive LC resonant circuit, a positive first-stage amplifier circuit, a positive second-stage amplifier circuit, a negative first-stage amplifier circuit, a negative second-stage amplifier circuit and a negative LC resonant circuit; wherein,

[0006] The input end of the forward LC resonant circuit inputs a forward input signal Vin+, the output end of the forward LC resonant circuit is connected to the input end of the forward first-stage amplifier circuit, the output end of the forward first-stage amplifier circuit is connected to the input end of the forward second-stage amplifier circuit, and the output end of the forward second-stage amplifier circuit outputs a forward output signal Vout+;

[0007] The input end of the negative LC resonant circuit inputs a negative input signal Vin-, the output end of the negative LC resonant circuit is connected to the input end of the negative first-stage amplifier circuit, the output end of the negative first-stage amplifier circuit is connected to the input end of the negative second-stage amplifier circuit, and the output end of the negative second-stage amplifier circuit outputs a negative output signal Vout-;

[0008] The common ends of the positive first-stage amplifier circuit, the positive second-stage amplifier circuit, the negative first-stage amplifier circuit, and the negative second-stage amplifier circuit are all connected to a power supply voltage VDD;

[0009] The forward first-stage amplifier circuit is used to perform a first amplification on the output signal of the forward LC resonant circuit to obtain a first forward amplified signal, and send the first forward amplified signal to the forward second-stage amplifier circuit;

[0010] The forward second-stage amplifier circuit is used to amplify the first forward amplified signal again to form a forward output signal Vout+;

[0011] The negative first-stage amplifier circuit is used to perform a first amplification on the output signal of the negative LC resonant circuit to obtain a first negative amplified signal, and send the first negative amplified signal to the negative second-stage amplifier circuit;

[0012] The negative second stage amplifier circuit is used to amplify the first negative amplified signal again to form a negative output signal Vout+.

[0013] In a second aspect, an Internet of Things chip is provided, wherein the Internet of Things chip includes the fully differential two-stage drive amplifier circuit provided in the first aspect.

[0014] According to a third aspect, an electronic device is provided, wherein the electronic device comprises the Internet of Things chip provided according to the second aspect.

[0015] Implementing the embodiments of the present invention has the following beneficial effects:

[0016] The input end of the positive LC resonant circuit of the technical solution of the present application inputs a positive input signal Vin+, the output end of the positive LC resonant circuit is connected to the input end of the positive first-stage amplifier circuit, the output end of the positive first-stage amplifier circuit is connected to the input end of the positive second-stage amplifier circuit, and the output end of the positive second-stage amplifier circuit outputs a positive output signal Vout+; the input end of the negative LC resonant circuit inputs a negative input signal Vin-, the output end of the negative LC resonant circuit is connected to the input end of the negative first-stage amplifier circuit, the output end of the negative first-stage amplifier circuit is connected to the input end of the negative second-stage amplifier circuit, and the output end of the negative second-stage amplifier circuit outputs a negative output signal Vout-; the positive first-stage amplifier circuit, the positive second-stage amplifier circuit, and the negative first-stage amplifier circuit are connected to the input end of the negative second-stage amplifier circuit. The common ends of the positive first stage amplifier circuit and the negative second stage amplifier circuit are connected to the power supply voltage VDD; the positive first stage amplifier circuit is used to perform the first amplification on the output signal of the positive LC resonant circuit to obtain the first positive amplified signal, and send the first positive amplified signal to the positive second stage amplifier circuit; the positive second stage amplifier circuit is used to amplify the first positive amplified signal again to form a positive output signal Vout+; the negative first stage amplifier circuit is used to perform the first amplification on the output signal of the negative LC resonant circuit 106 to obtain the first negative amplified signal, and send the first negative amplified signal to the negative second stage amplifier circuit; the negative second stage amplifier circuit is used to amplify the first negative amplified signal again to form a negative output signal Vout+. The signal pre-amplified by the first stage common gate circuit is amplified twice by the second stage common gate circuit to improve the amplification gain of the fully differential two-stage drive amplifier circuit. Since the common ends of the four amplifier circuits are connected, it is a common source circuit. The gain of the common source stage can be obtained by using the common source stage method, and the noise signal can be effectively reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0018] Figure 1 It is a structural block diagram of a fully differential two-stage drive amplifier circuit provided by the present application;

[0019] Figure 2 A schematic diagram of the structure of a forward LC resonant circuit provided in this application;

[0020] Figure 3 A schematic diagram of the structure of the forward first-stage amplifier circuit provided in this application;

[0021] Figure 4A schematic diagram of the structure of the forward second-stage amplifier circuit provided in this application;

[0022] Figure 5 A schematic diagram of the structure of the negative first-stage amplifier circuit provided by the present application;

[0023] Figure 6 A schematic diagram of the structure of the positive and negative second-stage amplifier circuit provided by the present application;

[0024] Figure 7 A schematic diagram of the structure of the negative LC resonant circuit provided in this application;

[0025] Figure 8 A schematic diagram of the structure of a fully differential two-stage drive amplifier circuit provided in Example 1 of the present application. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] The terms "first", "second", "third" and "fourth" etc. in the specification and claims of the present invention and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or devices.

[0028] Reference to "embodiments" herein means that a particular feature, result, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] The concepts involved in this application are introduced below.

[0030] VGA (Variable Gain Amplifier) ​​has the property of adjustable gain, which can change the gain level of the amplifier as needed. This flexibility makes variable gain amplifiers very useful in many applications. Here are some common uses of variable gain amplifiers: Communication Systems: Variable gain amplifiers are widely used in wireless communication systems. At the receiving end, it can automatically adjust the gain according to the strength of the received signal to adapt to different signal strengths and distances. At the transmitting end, it can adjust the gain of the amplifier to match different transmission distances and signal requirements.

[0031] The polyphase filter (PPF) at the subsequent stage suppresses the image frequency interference, and at the output end of the polyphase filter network, the I and Q orthogonal signals are combined to generate a differential signal.

[0032] The automatic gain control loop (AGC) adjusts the gain of the differential IF signal, and then the analog RF signal is quantized into a digital IF through the analog-to-digital converter (ADC).

[0033] In the transmitting part of the IoT equipment chip, the modulated digital intermediate frequency signal processed by the baseband circuit is converted into an analog intermediate frequency through the DAC. After filtering out-of-band harmonics, the up-converter moves the intermediate frequency signal to the radio frequency. The radio frequency signal is then amplified and gain adjusted through the variable gain amplifier (VGA) and power amplifier (PPA) and output to the antenna port.

[0034] Miller effect is a phenomenon in electronics where the distributed capacitance or parasitic capacitance between the input and output of an inverting amplifier circuit is magnified by the amplifier, and its equivalent capacitance value to the input end is expanded by 1+K times, where K is the voltage magnification factor of the amplifier circuit. Although the Miller effect generally refers to the amplification of capacitance, the impedance between any input and other high-amplification nodes can also change the input impedance of the amplifier through the Miller effect.

[0035] A mixer is a circuit that outputs a signal whose frequency is equal to the sum, difference, or other combination of the two input signal frequencies. A mixer is usually composed of nonlinear elements and a frequency selection circuit; the mixer is located after the low noise amplifier (LNA) and directly processes the RF signal amplified by the LNA.

[0036] See also Figure 1 , Figure 1 1 is a structural block diagram of a fully differential two-stage drive amplifier circuit, wherein the fully differential two-stage drive amplifier circuit may specifically include: a positive LC resonant circuit 105, a positive first-stage amplifier circuit 101, a positive second-stage amplifier circuit 102, a negative first-stage amplifier circuit 103, a negative second-stage amplifier circuit 104 and a negative LC resonant circuit 106; wherein,

[0037] The input end of the forward LC resonant circuit 105 inputs a forward input signal Vin+, the output end of the forward LC resonant circuit 105 is connected to the input end of the forward first stage amplifier circuit 101, the output end of the forward first stage amplifier circuit 101 is connected to the input end of the forward second stage amplifier circuit 102, and the output end of the forward second stage amplifier circuit 102 outputs a forward output signal Vout+;

[0038] The input end of the negative LC resonant circuit 106 inputs a negative input signal Vin-, the output end of the negative LC resonant circuit 106 is connected to the input end of the negative first-stage amplifier circuit 103, the output end of the negative first-stage amplifier circuit 103 is connected to the input end of the negative second-stage amplifier circuit 104, and the output end of the negative second-stage amplifier circuit 104 outputs a negative output signal Vout-; the common ends of the positive first-stage amplifier circuit 101, the positive second-stage amplifier circuit 102, the negative first-stage amplifier circuit 103, and the negative second-stage amplifier circuit 104 are all connected to the power supply voltage VDD;

[0039] The forward first stage amplifier circuit 101 is used to perform a first amplification on the output signal of the forward LC resonant circuit 105 to obtain a first forward amplified signal, and send the first forward amplified signal to the forward second stage amplifier circuit 102;

[0040] The first-stage positive amplifier circuit, the second-stage positive amplifier circuit, the first-stage negative amplifier circuit, and the second-stage negative amplifier circuit are all amplifier circuits of fully differential structures;

[0041] The forward second stage amplifier circuit 102 is used to amplify the first forward amplified signal again to form a forward output signal Vout+;

[0042] The negative first stage amplifier circuit 103 is used to perform a first amplification on the output signal of the negative LC resonant circuit 106 to obtain a first negative amplified signal, and send the first negative amplified signal to the negative second stage amplifier circuit 104;

[0043] The negative second stage amplifier circuit 104 is used to further amplify the first negative amplified signal to form a negative output signal Vout+.

[0044] The fully differential two-stage drive amplifier circuit may specifically include: a positive LC resonant circuit 105, a positive first-stage amplifier circuit 101, a positive second-stage amplifier circuit 102, a negative first-stage amplifier circuit 103, a negative second-stage amplifier circuit 104, and a negative LC resonant circuit 106; wherein,

[0045] The input end of the positive LC resonant circuit of the technical solution of the present application inputs a positive input signal Vin+, the output end of the positive LC resonant circuit is connected to the input end of the positive first-stage amplifier circuit, the output end of the positive first-stage amplifier circuit is connected to the input end of the positive second-stage amplifier circuit, and the output end of the positive second-stage amplifier circuit outputs a positive output signal Vout+; the input end of the negative LC resonant circuit inputs a negative input signal Vin-, the output end of the negative LC resonant circuit is connected to the input end of the negative first-stage amplifier circuit, the output end of the negative first-stage amplifier circuit is connected to the input end of the negative second-stage amplifier circuit, and the output end of the negative second-stage amplifier circuit outputs a negative output signal Vout-; the positive first-stage amplifier circuit, the positive second-stage amplifier circuit, and the negative first-stage amplifier circuit are connected to the input end of the negative second-stage amplifier circuit. The common ends of the positive first stage amplifier circuit and the negative second stage amplifier circuit are connected to the power supply voltage VDD; the positive first stage amplifier circuit is used to perform the first amplification on the output signal of the positive LC resonant circuit to obtain the first positive amplified signal, and send the first positive amplified signal to the positive second stage amplifier circuit; the positive second stage amplifier circuit is used to amplify the first positive amplified signal again to form a positive output signal Vout+; the negative first stage amplifier circuit is used to perform the first amplification on the output signal of the negative LC resonant circuit 106 to obtain the first negative amplified signal, and send the first negative amplified signal to the negative second stage amplifier circuit; the negative second stage amplifier circuit is used to amplify the first negative amplified signal again to form a negative output signal Vout+. The signal pre-amplified by the first stage common gate circuit is amplified twice by the second stage common gate circuit to improve the amplification gain of the fully differential two-stage drive amplifier circuit. Since the common ends of the four amplifier circuits are connected, it is a common source circuit. The gain of the common source stage can be obtained by using the common source stage method, and the noise signal can be effectively reduced.

[0046] See also Figure 2 , Figure 2 A structural schematic diagram of a forward LC resonant circuit 105 provided in the present application, the above-mentioned forward LC resonant circuit may include: a forward inductor Lg+ and a first capacitor C1, wherein one end of the forward inductor Lg+ is the input end of the forward LC resonant circuit 105, the other end of the forward inductor Lg+ is an end connected to the first capacitor C1, and the other end of the first capacitor C1 is the output end of the forward LC resonant circuit 105.

[0047] See also Figure 3 , Figure 3 The schematic diagram of the structure of a forward first-stage amplifier circuit 101 provided in the present application, the forward first-stage amplifier circuit 101 may include: a MOS tube, a capacitor, a resistor, and an inductor, wherein:

[0048] The gate of the first MOS tube M1 is the input end of the forward first stage amplifier circuit, the source of the first MOS tube M1 is connected to one end of the leakage inductor LS1, the other end of the leakage inductor LS1 is grounded, the drain of the first MOS tube M1 is connected to the source of the second MOS tube M2, the gate of the second MOS tube M2 is connected to the common end, the drain of the second MOS tube M2 is connected to one end of the first inductor L1, the other end of the first inductor L1 is connected to the common end, the drain of the second MOS tube M2 is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is the output end of the forward first stage amplifier circuit;

[0049] One end of the feedback capacitor Cex is connected to the input end, and the other end is connected to the source of the first MOS transistor M1;

[0050] One end of the first resistor R1 is connected to the input end, and the other end is connected to the voltage Vb1.

[0051] See also Figure 4 , Figure 4 The schematic diagram of the structure of a forward second-stage amplifier circuit 102 provided in the present application, the forward second-stage amplifier circuit 102 may include: a MOS tube, a capacitor, a resistor, and an inductor, wherein:

[0052] The gate of the third MOS tube M3 is the input end of the forward second stage amplifier circuit, the source of the third MOS tube M3 is connected to one end of the leakage inductor LS2, the other end of the leakage inductor LS2 is grounded, the drain of the third MOS tube M3 is connected to the source of the fourth MOS tube M4, the gate of the fourth MOS tube M4 is connected to the common end, the drain of the fourth MOS tube M4 is connected to one end of the second inductor L2, the other end of the second inductor L2 is connected to the common end, the drain of the fourth MOS tube M4 is connected to one end of the third capacitor C3, and the other end of the third capacitor C3 is the output end of the forward second stage amplifier circuit;

[0053] One end of the second resistor R2 is connected to the input end, and the other end is connected to the voltage Vb2.

[0054] See also Figure 5 , Figure 5 The structure diagram of a negative first-stage amplifier circuit 103 provided in the present application, the negative first-stage amplifier circuit 103 may include: a MOS tube, a capacitor, a resistor, and an inductor, wherein:

[0055] The gate of the fifth MOS tube M5 is the input end of the negative first-stage amplifier circuit, the source of the fifth MOS tube M5 is connected to one end of the leakage inductor LS3, the other end of the leakage inductor LS3 is grounded, the drain of the fifth MOS tube M5 is connected to the source of the sixth MOS tube M6, the gate of the sixth MOS tube M6 is connected to the common end, the drain of the sixth MOS tube M6 is connected to one end of the third inductor L3, the other end of the third inductor L3 is connected to the common end, the drain of the sixth MOS tube M6 is connected to one end of the fifth capacitor C5, and the other end of the fifth capacitor C5 is the output end of the negative first-stage amplifier circuit;

[0056] One end of the feedback capacitor Cex is connected to the input end, and the other end is connected to the source of the fifth MOS transistor M5;

[0057] One end of the third resistor R3 is connected to the input end, and the other end is connected to the voltage Vb4.

[0058] See also Figure 6 , Figure 6 The present application provides a schematic diagram of a positive and negative second-stage amplifier circuit 104. The negative second-stage amplifier circuit 104 may include: a MOS tube, a capacitor, a resistor, and an inductor.

[0059] The gate of the seventh MOS tube M7 is the input end of the positive second-stage amplifier circuit, the source of the seventh MOS tube M7 is connected to one end of the leakage inductor LS4, the other end of the leakage inductor LS4 is grounded, the drain of the seventh MOS tube M7 is connected to the source of the eighth MOS tube M8, the gate of the eighth MOS tube M8 is connected to the common end, the drain of the eighth MOS tube M8 is connected to one end of the fourth inductor L4, the other end of the fourth inductor L4 is connected to the common end, the drain of the eighth MOS tube M8 is connected to one end of the sixth capacitor C6, and the other end of the sixth capacitor C6 is the output end (Vout-) of the negative second-stage amplifier circuit;

[0060] One end of the fourth resistor R4 is connected to the input end, and the other end is connected to the voltage Vb3.

[0061] See also Figure 7 , Figure 7 A structural schematic diagram of a negative LC resonant circuit 106 provided in the present application, the above-mentioned negative LC resonant circuit may include: a negative inductor Lg- and a fourth capacitor C4, wherein one end of the negative inductor Lg- is the input end of the negative LC resonant circuit 106, the other end of the negative inductor Lg- is connected to one end of the fourth capacitor C4, and the other end of the fourth capacitor C4 is the output end of the negative LC resonant circuit 106.

[0062] Embodiment 1

[0063] The first embodiment of the present application provides a fully differential two-stage drive amplifier circuit, referring to Figure 8 , Figure 8A structural diagram of a fully differential two-stage drive amplifier circuit provided in the first embodiment of the present application, wherein the fully differential two-stage drive amplifier circuit specifically includes: an inductor, a capacitor, a MOS tube, and a resistor; wherein,

[0064] A forward inductor Lg+ and a first capacitor C1, wherein one end of the forward inductor Lg+ is connected to the forward input signal Vin+, the other end of the forward inductor Lg+ is connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is connected to the gate of the first MOS tube M1;

[0065] The source of the first MOS tube M1 is connected to one end of the leakage inductor LS1, and the other end of the leakage inductor LS1 is grounded. The drain of the first MOS tube M1 is connected to the source of the second MOS tube M2, and the gate of the second MOS tube M2 is connected to the common end. The drain of the second MOS tube M2 is connected to one end of the first inductor L1, and the other end of the first inductor L1 is connected to the common end. The drain of the second MOS tube M2 is connected to one end of the second capacitor C2, and the other end of the second capacitor C2 is connected to the gate of the third MOS tube M3; one end of the feedback capacitor Cex is connected to the input end, and the other end is connected to the source of the first MOS tube M1; one end of the first resistor R1 is connected to the input end, and the other end is connected to the voltage Vb1;

[0066] The source of the third MOS tube M3 is connected to one end of the leakage inductor LS2, the other end of the leakage inductor LS2 is grounded, the drain of the third MOS tube M3 is connected to the source of the fourth MOS tube M4, the gate of the fourth MOS tube M4 is connected to the common end, the drain of the fourth MOS tube M4 is connected to one end of the second inductor L2, the other end of the second inductor L2 is connected to the common end, the drain of the fourth MOS tube M4 is connected to one end of the third capacitor C3, and the other end of the third capacitor C3 outputs the forward amplification signal Vout+; one end of the second resistor R2 is connected to the input end, and the other end is connected to the voltage Vb2;

[0067] A negative inductor Lg- and a fourth capacitor C4, wherein one end of the negative inductor Lg- is connected to the negative input signal Vin-, the other end of the negative inductor Lg- is connected to one end of the fourth capacitor C4, and the other end of the fourth capacitor C4 is connected to the gate of the fifth MOS tube M5;

[0068] The source of the fifth MOS tube M5 is connected to one end of the leakage inductor LS3, the other end of the leakage inductor LS3 is grounded, the drain of the fifth MOS tube M5 is connected to the source of the sixth MOS tube M6, the gate of the sixth MOS tube M6 is connected to the common end, the drain of the sixth MOS tube M6 is connected to one end of the third inductor L3, the other end of the third inductor L3 is connected to the common end, the drain of the sixth MOS tube M6 is connected to one end of the fifth capacitor C5, the other end of the fifth capacitor C5 is connected to the gate of the seventh MOS tube M7; one end of the feedback capacitor Cex is connected to the input end, and the other end is connected to the source of the fifth MOS tube M5; one end of the third resistor R3 is connected to the input end, and the other end is connected to the voltage Vb4;

[0069] The source of the seventh MOS tube M7 is connected to one end of the leakage inductor LS4, the other end of the leakage inductor LS4 is grounded, the drain of the seventh MOS tube M7 is connected to the source of the eighth MOS tube M8, the gate of the eighth MOS tube M8 is connected to the common end, the drain of the eighth MOS tube M8 is connected to one end of the fourth inductor L4, the other end of the fourth inductor L4 is connected to the common end, the drain of the eighth MOS tube M8 is connected to one end of the sixth capacitor C6, and the other end of the sixth capacitor C6 outputs the negative amplified signal Vout-; one end of the fourth resistor R4 is connected to the input end, and the other end is connected to the voltage Vb3.

[0070] A fully differential structure is used for two-stage amplification. Each stage adopts a Cascode structure, which can expand its output impedance and obtain better isolation on the one hand; on the other hand, it can eliminate the Miller effect. The first stage completes the pre-amplification of the circuit, and Lg, Ls1, C1, and Cex complete the input impedance matching; the second stage completes the output impedance matching, which is achieved through the resonance of L2, C3, and parasitic capacitance.

[0071] The fully differential circuit structure is conducive to the stability of the circuit and better overall performance, and because the circuit adopts a fully differential structure, the circuits on the left and right sides are exactly the same. Take the circuit branch on the left as an example:

[0072] The driver amplifier includes the following circuit modules:

[0073] Input impedance matching module: The input matching inductor Lg, the input matching capacitor (ie, the first capacitor C1 ), and the bias resistor R1 together constitute the input impedance matching of the driving amplifier.

[0074] The first forward amplifier circuit: M1 and M2 are the first-stage cascode amplifier tubes. M2 is a cascode device that converts the current gain across the tube into a voltage gain to obtain power gain.

[0075] The function of the first - stage cascode amplifier tube is to amplify the input signal to a sufficient level. Usually, it increases the amplitude of the signal while minimizing noise and distortion as much as possible. This ensures that the signal has sufficient amplitude in the subsequent amplification stages and maintains the clarity and accuracy of the signal as much as possible.

[0076] Cex is the feedback capacitor, and its function is to achieve better matching at the input end and higher linearity requirements when the power gain is variable. However, the capacitance value should not be too large to prevent excessive noise. Ls1 is the source - negative feedback inductor.

[0077] If the circuit can conduct, M2, as a diode - connected device, unconditionally operates in the saturation region. For M1 to operate in the saturation region, the following conditions need to be met:

[0078] Vin > VTH1, where VTH1 is the threshold voltage of M1;

[0079] Vin - VTH1 < Vout < VDD - VTH2, where VTH2 is the threshold voltage of M2;

[0080] Regarding the gain, there is a potential difference between the substrate and the source of M2, and the body - bias effect (body effect) needs to be considered. Using the method of deriving the gain of a common - source stage with a resistive load, the gain of a common - source stage with a diode - connected device as the load can be obtained:

[0081] Av = - gm1[1 / (gm2 + gmb2)||ro1]

[0082] The resistance ro1 is relatively large, and it can be simplified and ignored when in parallel:

[0083] Av = - gm1 / (gm2 + gmb2)

[0084] This gain is generally very small. The ratio of the transconductances of the two MOSs is also the ratio of the sizes of the two MOSs. If gains of 100 - fold, 1000 - fold or even larger are to be achieved, the ratio of the sizes of the two MOSs will be very large.

[0085] The first LC resonance circuit module:

[0086] L1 is the load inductor, C2 is the output matching capacitor. The output end of the first - stage amplifier circuit adopts an LC resonance network to obtain high gain while achieving good output matching.

[0087] The forward second - stage amplifier circuit:

[0088] R2 is the bias resistor, M4 and M3 form the second - stage cascode amplifier tube, and Ls2 is the source - negative feedback inductor; for second - stage amplification.

[0089] The second LC resonance circuit module:

[0090] L2 is the load inductor, C3 is the output matching capacitor, and the output end of the second stage amplifier circuit adopts an LC resonant network to achieve high gain and good output matching.

[0091] The present application also provides an Internet of Things chip, the Internet of Things chip includes: Figure 1 or Figure 7 The fully differential two-stage drive amplifier circuit shown.

[0092] For example, the fully differential two-stage drive amplifier circuit can be arranged in the transmitting part of the Internet of Things chip.

[0093] An embodiment of the present application also provides an electronic device, which includes the above-mentioned Internet of Things chip.

[0094] It should be noted that, for the above-mentioned method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the described order of actions, because according to the present invention, certain steps can be received in other orders or performed simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0095] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0096] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the device or unit can be electrical or other forms.

[0097] A person skilled in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, and the memory can include: a flash drive, a read-only memory (English: Read-Only Memory, abbreviated as: ROM), a random access memory (English: Random Access Memory, abbreviated as: RAM), a magnetic disk or an optical disk, etc.

[0098] The embodiments of the present invention are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A fully differential two-stage drive amplifier circuit, characterized in that: The fully differential two-stage drive amplifier circuit specifically includes: a positive LC resonant circuit, a positive first-stage amplifier circuit, a positive second-stage amplifier circuit, a negative first-stage amplifier circuit, a negative second-stage amplifier circuit and a negative LC resonant circuit; wherein, The input end of the forward LC resonant circuit inputs a forward input signal Vin+, the output end of the forward LC resonant circuit is connected to the input end of the forward first-stage amplifier circuit, the output end of the forward first-stage amplifier circuit is connected to the input end of the forward second-stage amplifier circuit, and the output end of the forward second-stage amplifier circuit outputs a forward output signal Vout+; The input end of the negative LC resonant circuit inputs a negative input signal Vin-, the output end of the negative LC resonant circuit is connected to the input end of the negative first-stage amplifier circuit, the output end of the negative first-stage amplifier circuit is connected to the input end of the negative second-stage amplifier circuit, and the output end of the negative second-stage amplifier circuit outputs a negative output signal Vout-; The common ends of the positive first-stage amplifier circuit, the positive second-stage amplifier circuit, the negative first-stage amplifier circuit, and the negative second-stage amplifier circuit are all connected to a power supply voltage VDD; The forward first-stage amplifier circuit is used to perform a first amplification on the output signal of the forward LC resonant circuit to obtain a first forward amplified signal, and send the first forward amplified signal to the forward second-stage amplifier circuit; The forward second-stage amplifier circuit is used to amplify the first forward amplified signal again to form a forward output signal Vout+; The negative first-stage amplifier circuit is used to perform a first amplification on the output signal of the negative LC resonant circuit to obtain a first negative amplified signal, and send the first negative amplified signal to the negative second-stage amplifier circuit; The negative second stage amplifier circuit is used to amplify the first negative amplified signal again to form a negative output signal Vout+.

2. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The positive first-stage amplifier circuit, the positive second-stage amplifier circuit, the negative first-stage amplifier circuit, and the negative second-stage amplifier circuit are all amplifier circuits with fully differential structures.

3. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The forward LC resonant circuit includes: a forward inductor Lg+ and a first capacitor, wherein: One end of the forward inductor is the input end of the forward LC resonant circuit, the other end of the forward inductor is connected to one end of the first capacitor, and the other end of the first capacitor is the output end of the forward LC resonant circuit.

4. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The first-stage forward amplifier circuit includes: a MOS tube, a capacitor, a resistor, and an inductor, wherein: The gate of the first MOS tube is the input end of the first-stage forward amplifier circuit, the source of the first MOS tube is connected to one end of the leakage inductor, the other end of the leakage inductor is grounded, the drain of the first MOS tube is connected to the source of the second MOS tube, the gate of the second MOS tube is connected to the common end, the drain of the second MOS tube is connected to one end of the first inductor, the other end of the first inductor is connected to the common end, the drain of the second MOS tube is connected to one end of the second capacitor, and the other end of the second capacitor is the output end of the first-stage forward amplifier circuit; One end of the feedback capacitor is connected to the input end, and the other end is connected to the source of the first MOS tube; One end of the first resistor is connected to the input end, and the other end is connected to the voltage Vb1.

5. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The forward second-stage amplifier circuit includes: a MOS tube, a capacitor, a resistor, and an inductor, wherein: The gate of the third MOS tube is the input end of the forward second-stage amplifier circuit, the source of the third MOS tube is connected to one end of the leakage inductor, the other end of the leakage inductor is grounded, the drain of the third MOS tube is connected to the source of the fourth MOS tube, the gate of the fourth MOS tube is connected to the common end, the drain of the fourth MOS tube is connected to one end of the second inductor, the other end of the second inductor is connected to the common end, the drain of the fourth MOS tube is connected to one end of the third capacitor, and the other end of the third capacitor is the output end of the forward second-stage amplifier circuit; One end of the second resistor is connected to the input end, and the other end is connected to the voltage Vb2.

6. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The negative first-stage amplifier circuit includes: a MOS tube, a capacitor, a resistor, and an inductor, wherein: The gate of the fifth MOS tube is the input end of the negative first-stage amplifier circuit, the source of the fifth MOS tube is connected to one end of the leakage inductor, the other end of the leakage inductor is grounded, the drain of the fifth MOS tube is connected to the source of the sixth MOS tube, the gate of the sixth MOS tube is connected to the common end, the drain of the sixth MOS tube is connected to one end of the third inductor, the other end of the third inductor is connected to the common end, the drain of the sixth MOS tube is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is the output end of the negative first-stage amplifier circuit; One end of the feedback capacitor is connected to the input end, and the other end is connected to the source of the fifth MOS tube; One end of the third resistor is connected to the input end, and the other end is connected to the voltage Vb4.

7. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The negative second-stage amplifier circuit includes: a MOS tube, a capacitor, a resistor, and an inductor, wherein: The gate of the seventh MOS tube is the input end of the negative second-stage amplifier circuit, the source of the seventh MOS tube is connected to one end of the leakage inductor, the other end of the leakage inductor is grounded, the drain of the seventh MOS tube is connected to the source of the eighth MOS tube, the gate of the eighth MOS tube is connected to the common end, the drain of the eighth MOS tube is connected to one end of the fourth inductor, the other end of the fourth inductor is connected to the common end, the drain of the eighth MOS tube is connected to one end of the sixth capacitor, and the other end of the sixth capacitor is the output end of the negative second-stage amplifier circuit; One end of the fourth resistor is connected to the input end, and the other end is connected to the voltage Vb3.

8. The fully differential two-stage drive amplifier circuit according to claim 1, characterized in that: The negative LC resonant circuit comprises: a negative inductor and a fourth capacitor, wherein: One end of the negative inductor is the input end of the negative LC resonant circuit, the other end of the negative inductor is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is the output end of the negative LC resonant circuit.

9. An Internet of Things chip, characterized in that: The Internet of Things chip includes the fully differential two-stage drive amplifier circuit as described in any one of claims 1-8.

10. An electronic device, characterized in that: The electronic device comprises the Internet of Things chip as claimed in claim 9.

Images