A method and device for balancing the DC bus of a three-phase three-level inverter
By injecting zero-sequence voltage into a three-phase three-level inverter to regulate the DC bus midpoint balance, the DC bus imbalance problem under SPWM modulation technology is solved, and midpoint balance control under different power factor conditions is realized. It is applicable to LCL/L type filter systems and reduces switching losses and current distortion rate.
Patent Information
- Application Number
- CN202211545337.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-05
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2042-12-05
AI Technical Summary
Existing three-phase three-level inverters based on SPWM modulation technology suffer from DC bus midpoint imbalance. Existing control algorithms perform poorly under different power factor conditions and are not suitable for L-type filter systems.
By calculating the voltage difference between the positive and negative DC bus of the inverter and the output current component, a zero-sequence voltage is injected to adjust the midpoint balance, including the DC zero-sequence voltage and the sixth zero-sequence voltage. The final modulation voltage is calculated in combination with the grid voltage phase, which is applicable to different power factor conditions and LCL/L type filter systems.
It achieves effective adjustment of DC bus midpoint balance without reducing inverter performance, is suitable for different power factor conditions, reduces switching losses and current distortion rate, and is compatible with LCL/L type filter systems.
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Figure CN118199425B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of three-phase three-level inverter neutral point voltage balancing, in particular to a three-phase three-level inverter DC bus balancing method and device based on SPWM modulation technology. BACKGROUND
[0002] The diode clamped three-phase three-level inverter has the inherent problem of DC bus neutral point imbalance. The topology structure of the three-phase three-level inverter is shown in Figure 1 、 Figure 2 、 Figure 3 When the three-phase three-level inverter is working, the positive and negative bus capacitors will be charged and discharged. Due to the differences in drive dead zone, capacitor individual capacitance value, etc. in actual manufacturing, the average value of the current flowing into the bus capacitor neutral point is not zero, which further causes the voltage imbalance between the positive and negative capacitors. The methods to solve the neutral point voltage balancing problem are generally divided into two categories: one is to add a balancing circuit in hardware, and the other is to add a neutral point voltage balancing control algorithm in software. Obviously, software processing is a low-cost and low-power processing method.
[0003] The current neutral point voltage balancing control algorithm mainly includes the small vector adjustment method of space vector modulation, the injection of zero sequence voltage method, the three-level / two-level switching method, and the injection of even harmonic method. The small vector adjustment method is well known to industry technical personnel and is mainly applicable to the SVPWM modulation method, which is not applicable to the inverter based on the SPWM modulation method; the injection of zero sequence voltage method, taking CN112421979A as an example, mainly injects a zero sequence voltage with a DC component, and the adjustment effect of the DC zero sequence voltage on the neutral point balancing depends on the output or input active current of the inverter, therefore, the existing technology is not applicable to low power factor, especially static var generator type inverters; the three-level / two-level switching method, taking CN108540005A as an example, is applicable to various working conditions, but increases the current ripple and switching loss in the two-level modulation period; the injection of even harmonic method, taking CN108880308A as an example, has the disadvantage of increasing the distortion rate of the output current, and the zero sequence current described in CN201010523885.5 essentially injects a DC current component, which does not affect the output current, but it depends on the filter capacitor in the filter, and the neutral point of the capacitor needs to be connected to the DC bus neutral point, which is not applicable to the system with L-type filter. SUMMARY
[0004] To solve the problems raised in the background art, the present application discloses a three-phase three-level inverter DC bus balancing method and device, which can effectively adjust the DC bus neutral point balance without sacrificing the performance of the inverter.
[0005] The present application provides the following technical solutions:
[0006] The first step is to calculate the deviation between the positive and negative DC bus voltages of the inverter;
[0007] The second step is to calculate the active component and the reactive component of the current output or the reference current of the inverter;
[0008] The third step is to calculate the DC zero sequence voltage to be injected according to the deviation between the positive and negative DC bus voltages and the active component and the reactive component of the output current of the inverter;
[0009] The fourth step is to calculate the 6th order zero sequence voltage to be injected according to the amplitude of the active component and the deviation between the positive and negative DC bus voltages when the active component is greater than or equal to the reactive component and is far greater than 0;
[0010] The fifth step is to calculate the 6th order zero sequence voltage to be injected according to the amplitude of the reactive component and the deviation between the positive and negative DC bus voltages when the reactive component is greater than the active component and is far greater than 0;
[0011] The sixth step is to calculate the DC zero sequence voltage to be injected according to the positive and negative signs of the active component and the 6th order zero sequence voltage to be injected according to the positive and negative signs of the reactive component when the active component and the reactive component are close to 0,
[0012] The seventh step is to calculate the real-time zero sequence voltage value to be injected according to the real-time phase of the grid voltage extracted from the grid by the inverter;
[0013] The eighth step is to superimpose the modulation voltage required by the current control of the inverter and the above-mentioned zero sequence voltage to be injected as the final modulation voltage to convert into PWM pulses for the control of power devices.
[0014] The present application is suitable for the inverter based on the SPWM modulation technology, simple to realize, and can effectively perform the DC bus midpoint balancing control under different power factors, without reducing the performance of the inverter, including the loss, the ripple, the current distortion rate, etc. BRIEF DESCRIPTION OF DRAWINGS
[0015] Figure 1 It is one of the schematic diagrams of the three-phase three-level inverter topology structure;
[0016] Figure 2 It is the second schematic diagram of the three-phase three-level inverter topology structure;
[0017] Figure 3 It is the third schematic diagram of the three-phase three-level inverter topology structure;
[0018] Figure 4 The DC bus midpoint balance control block diagram of the application.
[0019] In the figure: Figure 4 The DC bus midpoint balance control method of the application is applied to Figures 1-3 . DETAILED DESCRIPTION
[0020] The technical solutions in the embodiments of the application are described in combination with the drawings:
[0021]
Embodiment 1
[0022] S1: Calculate the difference between the positive and negative DC bus voltages of the inverter, ΔU = Vp-Vn;
[0023] S2: Calculate the reactive component Iq of the current output by the inverter or the reference current;
[0024] S3: When Iq is far greater than 0 or far less than 0, calculate the 6th order voltage injection amplitude, Uamp = Kp*(1+Ki / s)*ΔU / Iq; when Iq is close to 0, calculate the 6th order voltage injection amplitude, Uamp = sgn(Iq)*Kp*(1+Ki / s)*ΔU / Imin; wherein Kp, Ki and Imin are control constants related to the DC bus capacity and other primary circuit hardware parameters of the inverter;
[0025] S4: Extract the phase θ of the grid voltage from the grid voltage, and calculate the current zero sequence voltage injection value Ucom = Uamp*sin6θ at the current time;
[0026] S5: Sum the zero sequence voltage and the three-phase modulation voltage Ua, Ub and Uc calculated by the current control loop, obtain the final three-phase modulation voltage, and then convert it into the PWM duty ratio;
[0027] S6: Control the field effect transistor according to the converted PWM duty ratio, so that the inverter outputs current according to the preset current value and realizes the balance of the DC bus midpoint.
[0028] The inverter in the above embodiment is suitable for static var generators, and the output current of the inverter only contains reactive current components.
[0029]
Embodiment 2
[0030] S1: Calculate the difference between the positive and negative DC bus voltages of the inverter, ΔU = Vp-Vn;
[0031] S2: Calculate the active component Id and the reactive component Iq of the current output by the inverter or the reference current;
[0032] S3: When |Id|≥|Iq| and |Id|>>0, let the 6th order zero sequence voltage amplitude Uamp6 be 0, and calculate the DC zero sequence voltage injection amplitude Uamp0=Kp0*(1+Ki0 / s)*ΔU / Id; wherein Kp0 and Ki0 are control constants related to the DC bus capacitance and other primary circuit hardware parameters of the inverter;
[0033] S4: When |Id|<|Iq| and |Iq|>>0, let the DC zero sequence voltage amplitude Uamp0 be 0, and calculate the 6th order zero sequence voltage injection amplitude Uamp6=Kp6*(1+Ki6 / s)*ΔU / Iq; wherein Kp6 and Ki6 are control constants related to the DC bus capacitance and other primary circuit hardware parameters of the inverter;
[0034] S5: Under other conditions, calculate the DC zero sequence voltage injection amplitude Uamp0=sgn(Id)Kp0*(1+Ki0 / s)*ΔU / Imin, and calculate the 6th order zero sequence voltage injection amplitude Uamp6=sgn(Iq)*Kp6*(1+Ki6 / s)*ΔU / Imin; wherein Kp0, Ki0, Kp6, Ki6 and Imin are control constants related to the DC bus capacitance and other primary circuit hardware parameters of the inverter;
[0035] S6: Extract the phase θ of the grid voltage from the grid voltage, and calculate the current zero sequence voltage injection value Ucom=Uamp0+Uamp6*sin6θ at the current time;
[0036] S7: Sum the zero sequence voltage and the three-phase modulation voltage Ua, Ub and Uc calculated by the current control loop to obtain the final three-phase modulation voltage, and then convert it into a PWM duty cycle;
[0037] S8: Control the field effect transistor according to the converted PWM duty cycle, so that the inverter outputs current according to the preset current value, and realizes the DC bus midpoint balance.
[0038] The embodiment of the present application realizes the DC bus midpoint control under the condition of reactive current by the theory that the three-phase inverter zero sequence voltage does not affect the output current, and the amplitude of the 6th order zero sequence voltage and the DC bus midpoint have a monotonic relationship under the condition of output reactive current.
[0039] The above embodiments are only for illustrating the technical concept and characteristics of the present application, and the purpose is to enable those skilled in the art to understand the content of the present application and implement it, and cannot limit the protection scope of the present application. Any equivalent changes or modifications made according to the spirit and essence of the present application shall be covered within the protection scope of the present application.
Claims
1. A DC bus balancing method of a three-phase three-level inverter, characterized by, The method comprises the following steps: S1, calculate the difference ΔU = V between the positive and negative DC bus voltages of the inverter p - V n ; S2, calculating the reactive component I of the current inverter output current or reference current q ; S3, when I q far greater than 0 or far less than 0, calculate the 6th zero sequence voltage injection amplitude, U amp = K p *(1+K i / s)*ΔU / I q ; When Iq approaches 0, the zero sequence voltage injection amplitude, U is calculated 6 times amp = sgn(I q )*K p *(1+K i / s)*ΔU / I min ; where K p , K i , I min is a control constant related to the DC bus voltage and other primary circuit hardware parameters of the inverter; S4, extracting the phase θ of the grid voltage from the grid voltage, calculating the zero sequence voltage injection value U at the current moment com = U amp *sin 6 θ; S5, the zero sequence voltage and current control loop calculated three-phase modulation voltage U a , b , c After the sum, the final three-phase modulation voltage is obtained, which is then converted into PWM duty ratio; S6, controlling the field effect tube according to the transformed PWM duty cycle, so that the inverter outputs current according to the preset current value, and realizes the DC bus midpoint balance.
2. A DC bus balancing method of a three-phase three-level inverter, characterized by, The method comprises the following steps: S1, calculate the difference ΔU = V p - V n ; S2, calculating the active component I of the current inverter output current or reference current d with the reactive component I q ; S3, when |I d |≥|I q |and |I d |>0, let the 6th order zero sequence voltage amplitude U amp6 =0, and calculate the DC zero sequence voltage injection amplitude, U amp0 =K p0 *(1+K i0 / s)*ΔU / I d ; where K p0 , K i0 are control constants related to the DC bus capacity and other primary circuit hardware parameters of the inverter; S4, when |I d |<|I q | and |I q |>0, let the DC zero sequence voltage amplitude U amp0 =0, and calculate the 6 times zero sequence voltage injection amplitude, U amp6 =K p6 *(1+K i6 / s)*ΔU / I q ; where K p6 , K i6 are control constants related to the DC bus capacity and other primary circuit hardware parameters of the inverter; S5, under other conditions, calculate the DC zero sequence voltage injection amplitude, U amp0 = sgn(I d )K p0 *(1+K i0 / s)*ΔU / I min , calculate the 6th zero sequence voltage injection amplitude, U amp6 = sgn(I q )*K p6 *(1+K i6 / s)*ΔU / I min ; wherein K p0 , K i0 , K p6 , K i6 , I min are control constants related to the DC bus capacity and other primary circuit hardware parameters of the inverter; S6, extract the phase θ of the grid voltage from the grid voltage, calculate the zero sequence voltage injection value U at the current moment com = U amp0 + U amp6 *sin 6 θ; S7, the zero sequence voltage and current control loop calculated three-phase modulation voltage U a 、 b 、 c After the sum, the final three-phase modulation voltage is obtained, which is then converted into PWM duty cycle; S8, controlling the field effect tube according to the transformed PWM duty cycle, so that the inverter outputs current according to the preset current value, and realizes the DC bus midpoint balance.
3. The DC bus balancing method of a three-phase three-level inverter according to any one of claims 1-2, characterized in that: The method is suitable for DC bus midpoint balance control in different power factor scenarios.
4. A three-phase three-level inverter, characterized by: The three-phase three-level inverter is controlled in the DC bus midpoint balance by the method in any one of claims 1-3, and the DC bus midpoint balance can be effectively adjusted without reducing the performance of the inverter.
5. A three-phase three-level inverter according to claim 4, characterized in that: The three-phase three-level inverter is an inverter based on SPWM modulation technology, and is suitable for three-phase three-level inverters with LCL type filters and three-phase three-level inverters with L type filters.
Citation Information
Patent Citations
Method for controlling balance of three-level inverter and direct current busbar voltage
CN101976967B
DC bus voltage balance control method for three-level inverter
CN108540005A
I-type three-level inverter midpoint balancing method based on zero-sequence component injection
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Method for controlling midpoint potential of direct-current bus of three-level inverter
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