Test fixture

By designing a test fixture that includes a support mechanism, circuit board and a pressing mechanism, the problems of complex structure and high manufacturing cost of traditional test fixtures are solved, a more compact and miniaturized design is achieved, and the accuracy of voltage value acquisition is improved.

CN118209761BActive Publication Date: 2025-04-04LEISHEN TECH (SHENZHEN) CO LTD
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Patent Information

Application Number
CN202410371065.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-03-29
Publication Date
2025-04-04
Estimated Expiration
2044-03-29

AI Technical Summary

Technical Problem

The traditional test fixture has a complex structure, resulting in high manufacturing costs and large volume, making it difficult to achieve miniaturized design.

Method used

A test fixture is designed including a support mechanism, a circuit board and a pressing mechanism. The circuit board is electrically connected to multiple semiconductor chips simultaneously through one circuit board, and the pressing mechanism is used to abut the circuit board to ensure contact with the chip.

Benefits of technology

By reducing the number and volume of circuit boards and detection components, the structure of the test fixture is simplified, making it more compact, reducing manufacturing costs, and achieving a miniaturized design, while improving the acquisition accuracy of voltage values ​​in high current and high voltage power-up scenarios.

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Abstract

The present application relates to a test fixture. It is used to perform aging tests on semiconductor chips, and the test fixture includes: a support mechanism, the support mechanism is used to carry multiple semiconductor chips; a circuit board, the circuit board is arranged on the support mechanism and is used to electrically connect with multiple semiconductor chips at the same time; and a pressing mechanism, the pressing mechanism is arranged on the circuit board, and the pressing mechanism is used to abut the circuit board to make the circuit board contact with the semiconductor chip. In view of the fact that a circuit board is electrically connected to multiple semiconductor chips at the same time to power them, the number and volume of circuit boards will be reduced, making the structure of the entire test fixture simpler and more compact, thereby reducing the manufacturing cost of the test fixture and realizing the miniaturized design of the test fixture.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a test fixture. Background Art

[0002] Semiconductor chips are tiny circuits made of semiconductor materials and are an important part of modern electronic devices. They can integrate a large number of electronic components in a very small space to control signals, store data, and perform calculations. As an important part of modern electronic devices, semiconductor chips play an important role in the development of human society. With the continuous advancement and innovation of science and technology, semiconductor chips will continue to contribute to the development of various fields.

[0003] Aging test is an indispensable step in the semiconductor chip manufacturing process. Its purpose is to verify the reliability and performance stability of semiconductor chips after long-term use. In the semiconductor chip manufacturing process, the characteristics of the internal materials of the semiconductor chip determine that its service life is limited. Aging test can simulate the operating state of semiconductor chips in extreme environments such as high temperature, high humidity and voltage fluctuations for a long time to verify the durability and life of the chip. The test fixture is an indispensable and important tool in the aging test process. The test fixture is used to fix the semiconductor chip for aging testing. However, for traditional test fixtures, there are usually defects in complex structure. Summary of the invention

[0004] A technical problem solved by the present application is how to simplify the structure of the test fixture.

[0005] A test fixture for performing an aging test on a semiconductor chip, the test fixture comprising:

[0006] A supporting mechanism, wherein the supporting mechanism is used to carry a plurality of semiconductor chips;

[0007] A circuit board, which is disposed on the supporting mechanism and is used to electrically connect to a plurality of the semiconductor chips at the same time; and

[0008] A pressing mechanism is provided on the circuit board and is used for abutting against the circuit board to make the circuit board contact with the semiconductor chip.

[0009] In one of the embodiments, the support mechanism includes a support plate and a positioning member, the positioning member is arranged on the support plate, there are multiple positioning members, multiple positioning members are arranged on the support plate at intervals, and the positioning member is used to cooperate with the semiconductor chip.

[0010] In one of the embodiments, a positioning hole is formed on the positioning member, and the positioning hole penetrates the positioning member along the thickness direction of the positioning member, and the positioning hole is used to cooperate with the semiconductor chip.

[0011] In one embodiment, the edge of the positioning piece is recessed to form a notch, and the notch is connected to the positioning hole; the inner wall surface of the positioning hole is recessed to form a groove, and the number of the grooves is multiple, and the multiple grooves are arranged at intervals along the circumference of the positioning hole.

[0012] In one of the embodiments, the circuit board includes a main unit and a power-on unit, the main unit is arranged on the supporting mechanism, an end of the power-on unit is connected to the main unit, there are multiple power-on units, and the multiple power-on units are arranged at intervals and used to abut against the semiconductor chip.

[0013] In one embodiment, the power-on unit includes a power-on part, one end of which is connected to the main unit, and the other end of which is a free end and abuts against the semiconductor chip. There are two power-on parts, and the two power-on parts are arranged at intervals from each other.

[0014] In one of the embodiments, the support mechanism includes a limiting protrusion, and a through hole is formed on the main body unit. The through hole penetrates the main body unit along the thickness direction of the main body unit, and the limiting protrusion cooperates with the through hole.

[0015] In one embodiment, the pressing mechanism includes a substrate, a top plate and a pressing member, the substrate is arranged on the circuit board, the top plate is arranged on the substrate, the pressing member is arranged on the top plate, the pressing member is used to apply a pressing force to the circuit board, the number of the pressing members is multiple, and the multiple pressing members are arranged at intervals from each other.

[0016] In one embodiment, the pressing member is elastic and includes a mounting portion and a pressing portion, the mounting portion is connected to the top plate, the pressing portion is connected to the mounting portion and is used to press the circuit board, the number of the pressing portions is two, and the two pressing portions are arranged at intervals.

[0017] In one embodiment, the pressing portion has a pressing surface, the pressing surface is used to abut against the semiconductor chip, the pressing surface is a curved surface with a smooth transition, and the opening formed by the bending of the pressing surface is arranged to face away from the circuit board;

[0018] The substrate includes a first base and a second base, the first base is arranged on the circuit board, the second base is protrudingly arranged on the surface of the first base facing away from the circuit board, and the first base and the second base enclose a first space; the top plate includes a first top and a second top, the second top is protrudingly arranged on the surface of the first top facing the circuit board, the first top and the second top enclose a second space, the second base is superimposed on the first top and cooperates with the second space, the second top is superimposed on the first base and cooperates with the first space; the second top is recessed to form a limiting groove, and the limiting groove cooperates with the pressing member.

[0019] A technical effect of an embodiment of the present application is: in view of the fact that a circuit board is electrically connected to multiple semiconductor chips at the same time to power them, the number and volume of the circuit boards will be reduced, making the structure of the entire test fixture simpler and more compact, thereby reducing the manufacturing cost of the test fixture and realizing the miniaturization design of the test fixture. At the same time, through the special circuit connection relationship in the circuit board, the circuit board can be provided with a detection element, and the detection element collects the voltage values ​​loaded on the multiple semiconductor chips under test, thereby reducing the number and volume of the detection elements, further making the structure of the entire test fixture simpler and more compact, and in the application scenario of high current and high voltage powering, the detection element on the circuit board can also more accurately collect the voltage value loaded on the semiconductor chip, thereby more accurately simulating the aging test environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the three-dimensional structure of a test fixture provided by an embodiment.

[0021] Figure 2 for Figure 1 A first example exploded structural schematic diagram of a test fixture is shown.

[0022] Figure 3 for Figure 1 A second example exploded structural schematic diagram of a test fixture is shown.

[0023] Figure 4 for Figure 1 A first partial exploded structural schematic diagram of the test fixture is shown.

[0024] Figure 5 for Figure 1 The test fixture shown is a schematic diagram of a partial three-dimensional structure including a top plate and a pressing member.

[0025] Figure 6 for Figure 1 A second partial exploded structural schematic diagram of the test fixture is shown.

[0026] Figure numerals: test fixture 10, semiconductor chip 20, supporting mechanism 100, supporting plate 110, limiting protrusion 111, positioning member 120, positioning hole 121, notch 122, groove 123, circuit board 200, main unit 210, through hole 211, power-on unit 220, power-on part 221, pressing mechanism 300, substrate 310, first base 311, second base 312, first space 313, top plate 320, first top 321, second top 322, limiting groove 3221, second space 323, pressing member 330, mounting part 331, pressing part 332, pressing surface 3321. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0028] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0029] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0030] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0031] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0032] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0033] See also Figure 1 , Figure 2 and Figure 3 A test fixture 10 provided in an embodiment of the present application is used to perform an aging test on a semiconductor chip 20. The test fixture 10 includes a support mechanism 100, a circuit board 200, and a pressing mechanism 300. The support mechanism 100 is used to carry a plurality of semiconductor chips 20. The circuit board 200 is arranged on the support mechanism 100. The circuit board 200 is used to be electrically connected to the plurality of semiconductor chips 20 at the same time, so that the circuit board 200 can simultaneously power on the plurality of semiconductor chips 20. The pressing mechanism 300 is arranged on the circuit board 200. The pressing mechanism 300 is used to abut against the circuit board 200, so that the circuit board 200 is in contact with the semiconductor chip 20.

[0034] If a mode of setting a circuit board 200 for each semiconductor chip 20 is adopted, the number of semiconductor chips 20 will be equal to the number of circuit boards 200, which will make the structure of the entire test fixture 10 more complicated, thereby increasing the manufacturing cost of the test fixture 10. At the same time, each circuit board 200 is provided with a detection element to collect the voltage value loaded on the semiconductor chip 20, thereby increasing the number of detection elements, further causing the structure of the test fixture 10 to be complicated, and increasing the manufacturing cost of the test fixture 10. In addition, when a large current and a large voltage are applied, the detection element cannot accurately collect the voltage value loaded on the semiconductor chip 20.

[0035] As for the test fixture 10 in the above embodiment, since multiple semiconductor chips 20 are powered on simultaneously through a circuit board 200, the number and volume of the circuit boards 200 will be reduced, making the structure of the entire test fixture 10 simpler and more compact, thereby reducing the manufacturing cost of the test fixture 10 and realizing the miniaturization design of the test fixture 10. At the same time, through the special circuit connection relationship in the circuit board 200, the circuit board 200 can be provided with a detection element, and the detection element collects the voltage values ​​loaded on the multiple semiconductor chips 20 under test, thereby reducing the number and volume of the detection elements, further making the structure of the entire test fixture 10 simpler and more compact, thereby reducing the manufacturing cost of the test fixture 10 and realizing the miniaturization design of the test fixture 10. Moreover, in the application scenario of high current and high voltage power-on, the detection element on the circuit board 200 can also more accurately collect the voltage value loaded on the semiconductor chip 20, thereby more accurately simulating the aging test environment.

[0036] See also Figure 2 , Figure 3 and Figure 4 In some embodiments, the support mechanism 100 includes a support plate 110 and a positioning member 120. The positioning member 120 is disposed on the support plate 110. The number of the positioning members 120 is multiple, so that the number of the positioning members 120 is equal to the number of the semiconductor chips 20. Therefore, the positioning members 120 and the semiconductor chips 20 form a one-to-one correspondence, that is, each positioning member 120 is used to position different semiconductor chips 20. Multiple positioning members 120 can be arranged at intervals along the length direction of the support plate 110. For example, multiple positioning members 120 can be evenly spaced along the length direction of the support plate 110, so that the spacing between any two adjacent positioning members 120 along the length direction of the support plate 110 can be equal. The positioning member 120 is used to cooperate with the semiconductor chip 20, so as to realize the positioning function of the positioning member 120 on the semiconductor chip 20, thereby improving the positioning accuracy of the semiconductor chip 20, so that the circuit board 200 can power on the semiconductor chip 20 at an accurate position.

[0037] See also Figure 2 , Figure 3 and Figure 4 In some embodiments, a positioning hole 121 is formed on the positioning member 120. The shape of the positioning hole 121 is substantially similar to that of the semiconductor chip 20. The positioning hole 121 can penetrate the entire positioning member 120 along the thickness direction of the positioning member 120. Therefore, the positioning hole 121 is a through hole, and the positioning hole 121 cooperates with the semiconductor chip 20. When the positioning member 120 is stacked on the support plate 110, the support plate 110 will block one end of the positioning hole 121. At this time, the positioning hole 121 with one end blocked will form an open cavity, and the semiconductor chip 20 will be accommodated in the open cavity. The open cavity will limit the free movement of the semiconductor chip 20, and the support plate 110 contacts the semiconductor chip 20 to apply a supporting force to the semiconductor chip 20. Therefore, the support plate 110 supports and bears the semiconductor chip 20, while the positioning member 120 positions the semiconductor chip 20, preventing the semiconductor chip 20 from slipping relative to the support plate 110 during the test, thereby improving the stability and reliability of the test fixture 10 in clamping the semiconductor chip 20.

[0038] See also Figure 2 , Figure 3 and Figure 4 In some embodiments, the edge of the positioning member 120 is recessed to form a notch 122, and the notch 122 will penetrate the inner wall surface of the positioning hole 121 and communicate with the positioning hole 121. For example, the shape of the positioning member 120 can be roughly rectangular, and the notch 122 is provided on the edge where one of the long sides of the positioning member 120 is located. By providing the notch 122, in the process of the semiconductor and the positioning hole 121 being matched, the positioning member 120 can be deformed to a certain extent, so that the positioning hole 121 can be reasonably enlarged, ensuring that the semiconductor chip 20 is smoothly loaded into the positioning hole 121. The inner wall surface of the positioning hole 121 is recessed to form a groove 123, and the cross-sectional shape of the groove 123 can be semicircular, etc., and the number of the grooves 123 is multiple, and the multiple grooves 123 are arranged at intervals along the circumference of the positioning hole 121. In the case where the cross-sectional shape of the groove 123 is semicircular, the diameters of the grooves 123 can be different, so that the diameter of a part of the grooves 123 is relatively large, and the diameter of another part of the grooves 123 is relatively small. By providing the groove 123 and the notch 122, on the one hand, the contact area between the semiconductor chip 20 and the positioning member 120 can be reduced, thereby reducing the friction between the semiconductor chip 20 and the positioning member 120, thereby making it easier to install the semiconductor chip 20 into the positioning hole 121 and to remove the semiconductor chip 20 from the positioning hole 121. On the other hand, the groove 123 can provide a good avoidance space, so that the robot can put the semiconductor chip 20 into or take it out of the positioning hole 121 through the avoidance space, thereby improving the clamping efficiency of the semiconductor chip 20.

[0039] See also Figure 2 , Figure 3 and Figure 4 In some embodiments, the circuit board 200 includes a main body unit 210 and a power-on unit 220, and the main body unit 210 can be arranged on the support plate 110 of the support mechanism 100 in an overlapping manner. The power-on unit 220 is connected to the main body unit 210, for example, the power-on unit 220 is protrudingly arranged on the edge where a long side of the main body unit 210 is located, and the number of the power-on units 220 is multiple, and the multiple power-on units 220 are arranged at intervals and used to abut against the semiconductor chip 20, so that the power-on unit 220 forms an electrical connection relationship with the semiconductor chip 20, ensuring that the circuit board 200 can effectively power the semiconductor chip 20. The power-on units 220 can be evenly spaced along the length direction of the main body unit 210, so that the spacing between any two adjacent power-on units 220 can be equal.

[0040] See also Figure 2 , Figure 3 and Figure 4 In some embodiments, the power-on unit 220 includes a power-on portion 221, one end of which is a fixed end and fixedly connected to the main unit 210, and the other end of which is a free end and abuts against the semiconductor chip 20. There are two power-on portions 221, and the two power-on portions 221 are arranged at intervals from each other so that there is a gap between the two power-on portions 221 to avoid short circuit. By providing two power-on portions 221, during the process of powering the semiconductor chip 20 by the power-on unit 220, the two power-on portions 221 can represent the positive pole and the negative pole respectively. From the fixed end of the power-on portion 221 to the free end of the power-on portion 221, the cross-sectional size of the power-on portion 221 can be gradually reduced, so that the power-on portion 221 is roughly in a cone shape, that is, the free end of the power-on portion 221 constitutes the tip of the power-on portion 221, so that the contact area of ​​the free end of the power-on portion 221 can be reasonably reduced, so that the power-on portion 221 can power the semiconductor chip 20 more accurately at a designated position. At the same time, the cross-sectional size of the fixed end of the power supply unit 221 is relatively large, which can improve the connection strength between the power supply unit 221 and the main unit 210, and can also increase the structural strength of the entire power supply unit 221 to prevent the power supply unit 221 from bending under external impact.

[0041] See also Figure 2 , Figure 3 and Figure 4In some embodiments, the support mechanism 100 may further include a limiting protrusion 111, which is protruding along the thickness direction of the support plate 110 and is disposed on the surface of the support plate 110 disposed toward the circuit board 200. The number of the limiting protrusions 111 may be multiple, and the multiple limiting protrusions 111 are disposed at intervals along the length direction of the support plate 110. A through hole 211 is provided on the main body unit 210 of the circuit board 200, and the through hole 211 penetrates the main body unit 210 along the thickness direction of the main body unit 210. The number of the through holes 211 is also multiple, and the multiple through holes 211 are disposed at intervals along the length direction of the main body unit 210. The number of the limiting protrusions 111 and the through holes 211 may be equal to form a one-to-one correspondence, so that each limiting protrusion 111 corresponds to a different through hole 211. When the main unit 210 is stacked on the support plate 110, the limiting protrusion 111 will cooperate with the through hole 211, which can play a good limiting role in the installation of the circuit board 200, thereby improving the installation accuracy and efficiency of the circuit board 200, so that the power-on part 221 on the circuit board 200 can accurately abut the semiconductor chip 20 at the specified position to form an electrical connection relationship, and finally ensure that the power-on part 221 on the circuit board 200 effectively powers the semiconductor chip 20.

[0042] See also Figure 2 , Figure 3 , Figure 5 and Figure 6 In some embodiments, the pressing mechanism 300 includes a base plate 310, a top plate 320, and a pressing member 330. The base plate 310 is disposed on the circuit board 200. The base plate 310 can be disposed on the circuit board 200 in a stacked manner, so that the circuit board 200 is sandwiched between the support plate 110 and the base plate 310, so that the circuit board 200 can be effectively clamped. The top plate 320 is disposed on the base plate 310. The top plate 320 can be disposed on the base plate 310 in a stacked manner. The pressing member 330 is disposed on the surface of the top plate 320 disposed toward the base plate 310. The pressing member 330 can be sandwiched between the top plate 320 and the base plate 310, so that the pressing member 330 is well positioned. There are a plurality of pressing members 330, and the plurality of pressing members 330 are spaced apart along the length direction of the top plate 320. The number of pressing members 330 is equal to the number of the power-on units 220, so that the pressing members 330 and the power-on units 220 form a one-to-one correspondence. The pressing member 330 is used to apply a pressing force to the power-on portion 221 of the circuit board 200 . Different pressing members 330 respectively generate pressing forces on different power-on units 220 , so that the power-on units 220 come into contact with the semiconductor chip 20 under the pressing force.

[0043] See also Figure 2 , Figure 3 , Figure 5 and Figure 6In some embodiments, the pressing member 330 is elastic and includes a mounting portion 331 and a pressing portion 332. The mounting portion 331 is connected to the top plate 320, and the pressing portion 332 is connected to the mounting portion 331 and is used to press the power-on unit 220. There are two pressing portions 332, and the two pressing portions 332 are arranged at intervals so that there is a distance between the two pressing portions 332. The two pressing portions 332 on the same pressing member 330 press against the two power-on portions 221 on the same power-on unit 220, respectively, so that the two power-on portions 221 are in contact with the semiconductor chip 20 under the action of the pressing portions 332 to form an electrical connection relationship. The pressing portion 332 may be curved, and the pressing portion 332 has a pressing surface 3321, which is used to abut against the power-on portion 221. The pressing surface 3321 is a curved surface with a smooth transition, and the opening formed by the bending of the pressing surface 3321 is arranged away from the circuit board 200. In view of the special structural setting of the pressing surface 3321, on the one hand, the pressing portion 332 will not produce a large wear during the abutment with the power-on portion 221, thereby avoiding damage to the power-on portion 221; on the other hand, the pressing surface 3321 can have a self-adaptive function, ensuring that the pressing surface 3321 can produce a pressure against the power-on portion 221 under different working conditions, thereby ensuring that the circuit board 200 can effectively power on the semiconductor chip 20.

[0044] See also Figure 6 In some embodiments, the substrate 310 includes a first base 311 and a second base 312. The first base 311 can be stacked on the circuit board 200. The second base 312 is protrudingly arranged on the surface of the first base 311 that is disposed away from the circuit board 200, so that the second base 312 protrudes a certain height relative to the surface of the first base 311 that is disposed away from the circuit board 200, so that the first base 311 and the second base 312 enclose a first space 313, thereby making the entire substrate 310 in a stepped shape. The top plate 320 includes a first top 321 and a second top 322. The second top 322 is protrudingly arranged on the surface of the first top 321 that is disposed toward the circuit board 200, so that the second top 322 protrudes a certain height relative to the surface of the first top 321 that is disposed toward the circuit board 200, so that the first top 321 and the second top 322 enclose a second space 323, thereby making the entire top plate 320 in a stepped shape, so the structures of the top plate 320 and the substrate 310 are roughly similar.

[0045] See also Figure 6In the process of assembling the base plate 310 and the top plate 320, the second base 312 and the first top 321 are overlapped with each other, so that the second base 312 cooperates with the second space 323; the second top 322 and the first base 311 are overlapped with each other, so that the second top 322 cooperates with the first space 313. Therefore, the base plate 310 and the top plate 320 can form a mutually interlocking relationship, which can reasonably improve the connection strength between the base plate 310 and the top plate 320 on the one hand, and can also play a good positioning role for the base plate 310 and the top plate 320 during the installation process, thereby improving the assembly accuracy. Further, the second top 322 is recessed along the thickness direction of the bottom plate to form a limiting groove 3221, and the number of the limiting grooves 3221 is equal to the number of the pressing members 330, so that the limiting grooves 3221 and the pressing members 330 form a one-to-one correspondence. During the installation of the pressing member 330, the installation portion 331 of the pressing member 330 is matched with the limiting groove 3221, thereby improving the installation accuracy of the pressing member 330, so that the pressing member 330 is in contact with the power-on portion 221 at an accurate position, ensuring that the power-on portion 221 effectively contacts the semiconductor chip 20 to form an electrical connection. After the pressing member 330 is installed, the pressing member 330 will also be sandwiched between the first base portion 311 and the second top portion 322, thereby improving the stability and reliability of the installation of the pressing member 330.

[0046] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0047] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A test fixture for performing an aging test on a semiconductor chip, characterized in that: The test fixture comprises: A supporting mechanism, wherein the supporting mechanism is used to carry a plurality of semiconductor chips; A circuit board, which is disposed on the supporting mechanism and is used to electrically connect to a plurality of the semiconductor chips at the same time; and A pressing mechanism, the pressing mechanism is arranged on the circuit board, and the pressing mechanism is used to abut against the circuit board to make the circuit board contact with the semiconductor chip; The support mechanism comprises a support plate and a positioning member, wherein the positioning member is arranged on the support plate, the number of the positioning members is multiple, and the multiple positioning members are arranged on the support plate at intervals, and the positioning member is used to cooperate with the semiconductor chip; a positioning hole is opened on the positioning member, and the positioning hole penetrates the positioning member along the thickness direction of the positioning member, and the positioning hole is used to cooperate with the semiconductor chip; the edge of the positioning member is recessed to form a notch, and the notch is connected to the positioning hole; The circuit board includes a main body unit and a power-on unit, wherein the main body unit is arranged on the supporting mechanism, and an end of the power-on unit is connected to the main body unit. There are multiple power-on units, which are arranged at intervals and used to abut against the semiconductor chip. The power-on unit includes a power-on part, one end of which is connected to the main body unit, and the other end of which is a free end and abuts against the semiconductor chip. The cross-sectional size of the power-on part can be gradually reduced along the fixed end of the power-on part pointing to the free end of the power-on part.

2. The test fixture according to claim 1, characterized in that: The positioning piece is in the shape of a rectangle.

3. The test fixture according to claim 1, characterized in that: The inner wall surface of the positioning hole is recessed to form a groove, and the number of the grooves is multiple, and the multiple grooves are arranged at intervals along the circumference of the positioning hole.

4. The test fixture according to claim 3, characterized in that: The cross section of the groove is semicircular.

5. The test fixture according to claim 4, characterized in that: The diameters of the grooves are different.

6. The test fixture according to claim 1, characterized in that: The number of the power-on parts is two, and the two power-on parts are arranged at an interval from each other.

7. The test fixture according to claim 1, characterized in that: The support mechanism comprises a limiting protrusion, a through hole is formed on the main body unit, the through hole penetrates the main body unit along the thickness direction of the main body unit, and the limiting protrusion cooperates with the through hole.

8. The test fixture according to claim 1, characterized in that: The pressing mechanism includes a base plate, a top plate and a pressing member, wherein the base plate is arranged on the circuit board, the top plate is arranged on the base plate, the pressing member is arranged on the top plate, and the pressing member is used to apply a pressing force to the circuit board. There are multiple pressing members, and the multiple pressing members are arranged at intervals from each other.

9. The test fixture according to claim 8, characterized in that: The pressing member is elastic and includes a mounting portion and a pressing portion, wherein the mounting portion is connected to the top plate, and the pressing portion is connected to the mounting portion and is used to press the circuit board. There are two pressing portions, which are spaced apart.

10. The test fixture according to claim 8, characterized in that: Also includes at least one of the following options: The pressing portion has a pressing surface, the pressing surface is used to abut against the semiconductor chip, the pressing surface is a curved surface with a smooth transition, and the opening formed by the bending of the pressing surface is arranged to face away from the circuit board; The substrate includes a first base and a second base, the first base is arranged on the circuit board, the second base is protrudingly arranged on the surface of the first base facing away from the circuit board, and the first base and the second base enclose a first space; the top plate includes a first top and a second top, the second top is protrudingly arranged on the surface of the first top facing the circuit board, the first top and the second top enclose a second space, the second base is superimposed on the first top and cooperates with the second space, the second top is superimposed on the first base and cooperates with the first space; the second top is recessed to form a limiting groove, and the limiting groove cooperates with the pressing member.

Citation Information

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