A transformation circuit layout method and transformation circuit

Abstract

The method comprises the following steps: acquiring a plurality of circuit boards and a plurality of target devices; arranging the plurality of target devices on the same circuit board to form an intermediate-frequency current loop and / or a high-frequency current loop in the transformed circuit; wherein the plurality of target devices comprise a switching tube, a bus capacitor, a filter capacitor and a current sampling element.

Description

Technical Field

[0001] This disclosure relates to the field of circuit technology, and in particular to a method for transforming circuit layout and a transforming circuit. Background Technology

[0002] The development of new power systems has placed higher demands on conversion circuits such as inverter circuits, rectifier circuits, and auxiliary power supply circuits. However, in related technologies, the electromagnetic environment of conversion circuits is very complex, resulting in poor electromagnetic compatibility (EMC). Summary of the Invention

[0003] This disclosure provides a method for layout and a transformation circuit.

[0004] In a first aspect, embodiments of this disclosure provide a method for transforming circuit layout, the method comprising:

[0005] Acquire multiple circuit boards and multiple target devices;

[0006] The multiple target devices are arranged on the same circuit board to form a medium-frequency current loop and / or a high-frequency current loop in the conversion circuit.

[0007] The multiple target devices include switching transistors, bus capacitors, filter capacitors, and current sampling elements.

[0008] In some embodiments, arranging the plurality of target devices on the same circuit board includes:

[0009] The bus capacitor and the switching transistor are arranged adjacent to each other along a preset direction;

[0010] The filter capacitor and the current sampling element are arranged sequentially on one side of the bus capacitor and the switching transistor along the first direction.

[0011] In some embodiments, arranging the bus capacitor and the switching transistor adjacent to each other along the preset direction includes:

[0012] The bus capacitor and the switching transistor are arranged alternately along the second direction; or...

[0013] The bus capacitor is arranged on the other side of the switching transistor along the first direction;

[0014] The first direction and the second direction intersect.

[0015] In some embodiments, the method further includes:

[0016] Determine the shielding area of ​​the intermediate frequency current loop;

[0017] Copper plating is applied to the shielded area;

[0018] The shielded area includes at least the area enclosed by the internal signal loop and / or the area enclosed by the high-frequency signal loop.

[0019] In some embodiments, the method further includes:

[0020] Obtain the voltage change rate of the signal in the conversion circuit;

[0021] Based on the voltage change rate, each circuit board is divided into a static zone, a dynamic zone, and a combined static and dynamic zone; each circuit board comprises a multilayer board;

[0022] Signal lines that transmit only static signals are arranged in the quiet zone, and the projection of the quiet zone onto the multilayer board in the circuit board along a third direction includes only the static signals; and,

[0023] Signal lines that transmit only dynamic signals are arranged in the moving area, and the projection of the moving area onto the multilayer board in the circuit board along the third direction includes only the dynamic signals; and,

[0024] The signal lines that transmit the static signal and the dynamic signal are arranged in the static-dynamic combination area;

[0025] The static signal refers to a signal whose voltage change rate is close to 0, and the dynamic signal refers to a signal whose voltage change rate is much greater than 0.

[0026] In some embodiments, the method further includes:

[0027] In the static-dynamic combination area, the multilayer board in the circuit board is divided into a static layer, a dynamic layer and a shielding layer;

[0028] The signal lines for transmitting the static signals are arranged in the static layer; and...

[0029] The signal lines for transmitting the dynamic signals are arranged in the dynamic layer; and...

[0030] The shielding layer is arranged between the static layer and the dynamic layer.

[0031] In some embodiments, the method further includes:

[0032] Acquire multiple filtering devices;

[0033] The plurality of filter devices are arranged at the DC port, AC port, the rear end of the inductor, and the near-power end of the neutral line in the conversion circuit;

[0034] The plurality of filter components include inductors, magnetic rings, and Y capacitors.

[0035] In some embodiments, the method further includes:

[0036] Acquire AC signal lines and DC signal lines, wherein the DC signal lines include positive and negative lines;

[0037] The AC signal lines and the DC signal lines are arranged at intervals, and the distance between the positive line and the negative line is adjusted to a preset distance;

[0038] The AC signal line is used to transmit AC signals, and the DC signal line is used to transmit DC signals.

[0039] In a second aspect, embodiments of this disclosure provide a conversion circuit, which is prepared according to the method described in any one of the first aspects. The conversion circuit includes multiple circuit boards, switching transistors, bus capacitors, filter capacitors, and current sampling elements.

[0040] The switching transistor, the bus capacitor, the filter capacitor, and the current sampling element are located on the same circuit board, forming the intermediate frequency current loop and / or high frequency current loop in the conversion circuit.

[0041] In some embodiments, the bus capacitor and the switching transistor are distributed adjacent to each other along a preset direction;

[0042] The filter capacitor and the current sampling element are sequentially distributed on one side of the bus capacitor and the switching transistor along the first direction.

[0043] In some embodiments, each of the circuit boards includes a static area, a dynamic area, and a dynamic-static combination area, and each of the circuit boards includes a multilayer board;

[0044] The static zone includes signal lines that transmit only static signals, and the projection of the static zone onto the multilayer board in the circuit board along a third direction includes only the static signals; the dynamic zone includes signal lines that transmit only dynamic signals, and the projection of the dynamic zone onto the multilayer board in the circuit board along a third direction includes only the dynamic signals; the combined static and dynamic zone includes signal lines that transmit both the static signals and the dynamic signals.

[0045] The static signal refers to a signal with a voltage change rate close to 0, while the dynamic signal refers to a signal with a voltage change rate much greater than 0.

[0046] In some embodiments, the conversion circuit further includes AC signal lines and DC signal lines, wherein the DC signal lines include positive lines and negative lines;

[0047] The AC signal lines and the DC signal lines are spaced apart;

[0048] The distance between the positive electrode line and the negative electrode line is a preset distance;

[0049] The DC signal line is used to transmit DC signals, and the AC signal line is used to transmit AC signals.

[0050] This disclosure provides a method for layouting a converter circuit and a converter circuit. The method includes: acquiring multiple circuit boards and multiple target devices; arranging the multiple target devices on the same circuit board to form a medium-frequency current loop and / or a high-frequency current loop in the converter circuit; wherein the multiple target devices include switching transistors, bus capacitors, filter capacitors, and current sampling elements, thereby reducing the area of ​​the medium-frequency current loop and / or the high-frequency current loop. Furthermore, based on the voltage change rate of the signal in the converter circuit, each circuit board is divided into a static area, a dynamic area, and a combined static / dynamic area, thereby achieving separation of dynamic and static signals and reducing the formation of parasitic capacitance. Additionally, multiple filter devices are arranged near the DC port, AC port, the rear end of the inductor, and the near-power end of the neutral line in the converter circuit, thereby forming a shorter common-mode loop within the circuit and optimizing high-frequency radiation and low-frequency conduction. Moreover, AC signal lines and DC signal lines are arranged alternately, and the distance between the positive and negative lines of the DC signal lines is adjusted to a preset distance, thereby reducing the area of ​​the low-frequency current loop. In summary, by optimizing the layout of the conversion circuit, electromagnetic interference was reduced, electromagnetic compatibility was improved, and costs were saved. Attached Figure Description

[0051] Figure 1 A schematic diagram of three types of current loops provided for related technologies;

[0052] Figure 2 A flowchart illustrating a circuit layout method provided in this embodiment of the present disclosure. Figure 1 ;

[0053] Figure 3 A schematic diagram of the composition structure of a conversion circuit provided for related technologies;

[0054] Figure 4 A schematic diagram of the composition structure of a conversion circuit provided in an embodiment of this disclosure. Figure 1 ;

[0055] Figure 5 A schematic diagram of the composition structure of a conversion circuit provided in an embodiment of this disclosure. Figure 2 ;

[0056] Figure 6 A schematic diagram of a Loop3 circuit provided in this embodiment of the present disclosure;

[0057] Figure 7A schematic diagram of a Loop2 circuit provided in this embodiment of the present disclosure;

[0058] Figure 8 A schematic diagram of the composition structure of a shielding region provided in an embodiment of this disclosure. Figure 1 ;

[0059] Figure 9 A schematic diagram of the composition structure of a shielding region provided in an embodiment of this disclosure. Figure 2 ;

[0060] Figure 10 A schematic diagram of stray capacitance provided for related technologies;

[0061] Figure 11 A flowchart illustrating a circuit layout method provided in this embodiment of the present disclosure. Figure 2 ;

[0062] Figure 12 This is a schematic diagram of dynamic and static signal segmentation provided in an embodiment of the present disclosure;

[0063] Figure 13 A flowchart illustrating a circuit layout method provided in this embodiment of the present disclosure. Figure 3 ;

[0064] Figure 14 A schematic diagram of a filtering device provided in an embodiment of this disclosure;

[0065] Figure 15 A schematic diagram of AC / DC paths provided for related technologies;

[0066] Figure 16 A flowchart illustrating a circuit layout method provided in this embodiment of the present disclosure. Figure 4 ;

[0067] Figure 17 A schematic diagram of an AC / DC path provided in an embodiment of this disclosure;

[0068] Figure 18 A schematic diagram of a frequency curve provided for related technologies;

[0069] Figure 19 This is a schematic diagram of a frequency curve provided for an embodiment of the present disclosure. Detailed Implementation

[0070] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining the relevant applications and are not intended to limit the scope of this disclosure. Furthermore, it should be noted that, for ease of description, only the parts relevant to the relevant applications are shown in the accompanying drawings.

[0071] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing embodiments of this disclosure only and is not intended to be limiting of this disclosure.

[0072] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0073] It should be noted that the terms "first, second, third" used in the embodiments of this disclosure are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0074] In inverters formed by conversion circuits, EMC (Electromagnetic Compatibility) must comply with relevant FCC Class A standards. In high-power applications, radiation is often a major test item that exceeds limits. In related technologies, EMC exceedances are frequent, with electromagnetic radiation reaching 70 dB.

[0075] See Figure 1 It illustrates a schematic diagram of three types of current loops provided by related technologies. For example, as shown... Figure 1 As shown, a detailed description of three types of current loops is given using a T-type three-level circuit 10 and a single-phase positive half-cycle with a neutral (N) wire as an example. The DC terminal of the T-type three-level circuit 10 is directly connected to the external battery, and the AC terminal is connected to the load either in parallel or off-grid. When the T-type three-level circuit 10 is working, there are mainly three types of current loops: load current loop, ripple current loop, and tube commutation current loop. Furthermore, this T-type three-level circuit system is a system without a neutral (N) wire. Figure 1 The other two phases during operation are omitted.

[0076] like Figure 1As shown in (a), Loop1 represents the load current loop. Loop1 passes through two DC sources, two bus capacitors (101, 102), a switching module (switching transistors 103, 104, 105, 106), inductor 107, and the load. In the load current loop Loop1, the circuit is formed by the battery DC, the fundamental component of the bus electrolytic capacitor (i.e., the bus capacitor), and the load current. The main waveform component of this current is a sine wave with a frequency of 50 Hz and its harmonics. There are also minor ripples after filtering by the power topology and the parallel inductor LC, as well as radiated signals received by the traces in the internal space. These signals are both input and output signals. The characteristic of this loop is that it is exposed outside the machine and can be directly monitored by the Line Impedance Stabilization Network (LISN) circuit. Among them, the leakage of the switch ripple has a significant impact on the conducted test, with a frequency of 16.2 kHz and its harmonics. Therefore, differential mode filtering is required at the AC output. The transmitted signal and leakage ripple signal received by this circuit in space will be transmitted outside the machine through the circuit trace.

[0077] like Figure 1 As shown in (b), Loop2 represents the ripple current loop. Loop2 passes through two bus capacitors (101, 102), the switching transistor module (switching transistors 103, 104, 105, 106), inductor 107, and filter capacitor 108. In the ripple current loop Loop2, the main waveform component of the current is a triangular wave, flowing through the inductor and the grid-side output capacitor (i.e., the filter capacitor). This signal is the highest power mid-to-high frequency signal in the machine, with a frequency of 16.2kHz and its harmonics. Additionally, as... Figure 1 As shown, the INVA signal is the signal itself in the Loop2 loop.

[0078] like Figure 1 As shown in (c), Loop 3 represents the transistor commutation current loop. Loop 3 passes through two bus capacitors (101, 102) and the switching transistor module (switching transistors 103, 104, 105, 106). In the transistor commutation current loop Loop 3, the main current waveform component is a spike impulse waveform, primarily formed by the switching on and off of the vertical and horizontal transistors, resulting in frequencies of 1-10 MHz and their harmonics, depending on the switching speed of the transistors. This signal is characterized by its high frequency and rich frequency content. Here, the devices passed through Loop 2 include those passed through Loop 3.

[0079] It should be noted that, in Figure 1In this circuit, bus capacitors 101 and 102 and filter capacitor 108 are static devices, meaning the voltage change rate of the signal across them is close to 0; switch 104 is a dynamic device, meaning the voltage change rate of the signal across it is much greater than 0; switch 103, 105, 106 and inductor 107 are combined static and dynamic devices, meaning the voltage change rate at one end is close to 0 and the voltage change rate at the other end is much greater than 0.

[0080] In summary, Figure 1 Among the related technologies shown, the load current loop Loop1 has more interference, while the ripple current loop Loop2 and the tube commutation current loop Loop3 have more signal transmission and propagation paths.

[0081] Based on this, embodiments of this disclosure provide a method for layout of a conversion circuit. The method includes: acquiring multiple circuit boards and multiple target devices; arranging the multiple target devices on the same circuit board to form a mid-frequency current loop and / or a high-frequency current loop in the conversion circuit; wherein the multiple target devices include switching transistors, bus capacitors, filter capacitors, and current sampling elements. By arranging multiple target devices on the same circuit board, the area of ​​the mid-frequency current loop and / or the high-frequency current loop is reduced, thereby reducing electromagnetic interference, optimizing electromagnetic compatibility, and saving costs.

[0082] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0083] In one embodiment of this disclosure, see [link to embodiment]. Figure 2 It illustrates a flowchart of a circuit layout method provided in an embodiment of this disclosure. Figure 1 .like Figure 2 As shown, the method may include:

[0084] S201. Acquire multiple circuit boards and multiple target devices.

[0085] It should be noted that the conversion circuit 30 disclosed herein can be composed of multiple printed circuit boards (PCBs). The conversion circuit 30 may include inverter circuits, rectifier circuits, auxiliary power supply circuits, etc., and can form an inverter, rectifier, auxiliary power supply, and other machines (hereinafter referred to as machines). Among them, the multiple circuit boards may include power amplifier boards, sampling boards, auxiliary power supply boards, filter boards, etc., without specific limitations.

[0086] Here, multiple target devices include switching transistors, bus capacitors, filter capacitors, and current sampling elements. The switching transistors may include insulated-gate bipolar transistors (IGBTs), the bus capacitors may include thin-film capacitors, the filter capacitors may include output capacitors, and the current sampling elements may include Hall elements, but these are not specifically limited.

[0087] S202. Arrange multiple target devices on the same circuit board to form a medium-frequency current loop and / or a high-frequency current loop in the conversion circuit.

[0088] Specifically, multiple target devices are arranged on the same power amplifier board to form an intermediate frequency (IF) current loop and / or a high-frequency current loop in the conversion circuit. The IF current loop generates an IF current signal, and the high-frequency current loop generates a high-frequency current signal.

[0089] It should be noted that high-frequency current loops (i.e. Figure 1 The Loop3 circuit in the middle frequency current loop (i.e.) is located in the middle frequency current loop. Figure 1 Within the Loop2 circuit. When multiple target devices are arranged on the same circuit board to form the intermediate frequency current loop in the conversion circuit, the target devices through which the high frequency current loop passes are also located on the same circuit board.

[0090] It should also be noted that the main influencing factor for intermediate frequency (IF) and high frequency (HF) current loops is the rate of change of current (di / dt). The higher the rate of change of current and the higher the frequency, the easier the transmission. Placing multiple target devices on the same circuit board can reduce the area of ​​the IF and / or HF current loops, thereby reducing the electromagnetic waves emitted in a single transmission.

[0091] See Figure 3 It shows a schematic diagram of the composition structure of a conversion circuit provided by related technology, specifically the layout of the switching transistor a1, bus capacitor a2, filter capacitor a3, and current sampling element a4 in related technology. For example... Figure 3 As shown, the switching transistor a1 and the bus capacitor a2 are located on one circuit board, the filter capacitor a3 is located on another circuit board, and the current sampling element a4 is located on yet another circuit board. In other words, the IGBT, film capacitor, output capacitor, and Hall element are distributed across three separate circuit boards, with a significant geographical span. Furthermore, the bus capacitor a2 is centrally located.

[0092] like Figure 4 or Figure 5As shown, the switching transistor 311, bus capacitor 312, filter capacitor 313, and current sampling element 314 are all distributed on the same power amplifier board, forming the intermediate frequency current loop and / or high frequency current loop in the conversion circuit 30. Additionally, the potted main inductor is located below the current sampling element 314. Figure 4 and Figure 5 (Not shown in the image), connect to the power amplifier board.

[0093] In some embodiments, such as Figure 4 or Figure 5 As shown, arranging multiple target devices on the same circuit board can include:

[0094] The bus capacitor 312 and the switch transistor 311 are arranged adjacent to each other along a preset direction;

[0095] The filter capacitor 313 and the current sampling element 314 are arranged sequentially on one side of the bus capacitor 312 and the switching transistor 311 along the first direction.

[0096] It should be noted that the preset direction can be either the first direction or the second direction. That is, the bus capacitor 312 and the switch transistor 311 can be arranged adjacent to each other along the first direction, or the bus capacitor 312 and the switch transistor 311 can be arranged adjacent to each other along the second direction.

[0097] Here, the first direction and the second direction intersect, meaning they are two non-parallel directions. In this embodiment, the first direction and the second direction can be perpendicular to each other or intersect at other angles; no specific limitation is made in this regard. For example, the specific implementation of this embodiment will be described in detail with the first direction and the second direction being perpendicular as an example. Furthermore, "below" of the current sampling element 314 specifically refers to the direction perpendicular to the plane containing the first and second directions and pointing towards the plane of the paper.

[0098] It should also be noted that, Figure 1 Indicates a single-phase circuit. Figure 4 and Figure 5 This shows the layout of a three-phase circuit. Among them, Figure 4 and Figure 5 The switching transistor 311 in the text refers to the switching transistor module, which includes, for example... Figure 1 The single-phase diagram shows four switching transistors (switching transistors 103, 104, 105, and 106); bus capacitor 312 refers to the bus capacitor module, which includes, for example... Figure 1 The single-phase diagram shows two bus capacitors (101, 102); filter capacitor 313 refers to the filter capacitor module, which includes capacitors for each of the three phases. Figure 1 The filter capacitor shown is 108 for a single phase.

[0099] Specifically, in some embodiments, such as Figure 4As shown, arranging the bus capacitor 312 and the switching transistor 311 adjacent to each other along a predetermined direction can include:

[0100] The bus capacitor 312 and the switching transistor 311 are arranged alternately along the second direction.

[0101] It should be noted that, for example, such as Figure 4 As shown, four bus capacitors 312 and three switching transistors 311 are arranged alternately along the second direction. The four bus capacitors 312 can be specifically represented by the designations 312-1, 312-2, 312-1, and 312-2, where 312-1 represents the positive bus capacitor and 312-2 represents the negative bus capacitor, or vice versa. That is, each switching transistor 311 corresponds to one positive bus capacitor and one negative bus capacitor, and is placed between the positive and negative bus capacitors. The specific number of bus capacitors 312 and switching transistors 311 is not specifically limited and can be set according to actual needs, as long as each switching transistor 311 corresponds to one positive bus capacitor and one negative bus capacitor.

[0102] Or, such as Figure 5 As shown, the bus capacitor 312 is arranged on the other side of the switching transistor 311 along the first direction. That is, the bus capacitor 312, the switching transistor 311, the filter capacitor 313, and the current sampling element 314 are arranged sequentially along the first direction.

[0103] It should be noted that, for example, such as Figure 5 As shown, four bus capacitors 312 are arranged on the other side of the three switching transistors 311 along the first direction. The four bus capacitors 312 can be specifically represented by the labels 312-1, 312-2, 312-1, and 312-2. 312-1 represents the positive bus capacitor and 312-2 represents the negative bus capacitor, or 312-1 represents the negative bus capacitor and 312-2 represents the positive bus capacitor. That is to say, each switching transistor 311 corresponds to one positive bus capacitor and one negative bus capacitor.

[0104] It should also be noted that, Figure 5 The bus capacitors 312 can be reused, or six bus capacitors 312 can be arranged on the other side of three switching transistors 311 along the first direction. Each switching transistor 311 corresponds to two bus capacitors 312 (one positive bus capacitor and one negative bus capacitor). The specific number of bus capacitors 312 and switching transistors 311 is not specifically limited and can be set according to actual needs.

[0105] It should also be noted that, such as Figure 4 and Figure 5As shown, the switching transistors 311 and the bus capacitors 312 have a corresponding relationship. Each switching transistor 311 corresponds to a positive bus capacitor and a negative bus capacitor, and the bus capacitors 312 are placed separately.

[0106] Furthermore, in related technologies, the loop area of ​​the ripple current loop 2 is approximately 180,741 square millimeters (mm²). 2 In this disclosure, by arranging multiple target devices on the same circuit board, the loop area of ​​the Loop2 circuit is reduced to approximately 26796 mm². 2 In other words, different board segmentation strategies can lead to significant differences in the loop area of ​​the intermediate frequency current loop and / or the high frequency current loop. In addition to the power amplifier board, the loops that have a greater impact include the copper busbars connecting the inductors, Hall effect elements, and output capacitors, as well as other three-dimensional loops.

[0107] After forming intermediate frequency and high frequency current loops through device arrangement, it is necessary to control, such as Figure 1 The Loop2 and Loop3 circuits shown are the smallest, but their sizes are contradictory. If the bus capacitors are distributed, each phase of the Loop3 circuit will be relatively small, and the Loop2 circuit will be relatively large. Conversely, if the bus capacitors are concentrated, each phase of the Loop3 circuit will be relatively large, and the Loop2 circuit will be relatively small.

[0108] Specifically, the signal frequency in Loop 2 is 16.2kHz and its harmonics. At this frequency, the inductive reactance of the traces on the circuit board is relatively low. The signal frequency in Loop 3 is approximately 5MHz, which is higher than 16.2kHz, so the inductive reactance of the traces on its circuit board is relatively high. Therefore, for Loop 2, the location of the bus capacitor has a smaller impact; current will flow to the capacitor regardless of its location. However, for Loop 3, current will preferentially flow to the nearest capacitor. If the bus capacitors are concentrated in one area, the current in Loop 2 will be smaller, but the current in Loop 3 will be larger. Figure 4 or Figure 5 As shown, the bus capacitors are distributed. With the bus capacitors distributed, the Loop2 circuit can reduce the electromagnetic waves emitted externally through copper shielding.

[0109] The sizes of Loop2 and Loop3 need to be weighed because this disclosure has high requirements for IGBT stress and is space-constrained, making it difficult to concentrate capacitors. Therefore, the size of Loop3 is prioritized. Figure 6 As shown, the Loop3 circuit is significantly affected by the impedance (location) on the board and has low capacitance requirements. Therefore, the current shunt on the board will be relatively weaker, and the loop will be more concentrated. Figure 7As shown, the Loop2 circuit is less affected by the impedance (location) on the board, but more affected by the capacitance value. Therefore, the circuit will inevitably be relatively dispersed. Additionally, Figure 6 and Figure 7 This is an abstract schematic diagram used to illustrate the relative sizes of Loop2 and Loop3 circuits; some components have been omitted.

[0110] Based on this, in some embodiments, the transformation circuit layout method may further include:

[0111] Determine the shielding area of ​​the intermediate frequency current loop;

[0112] Apply copper plating to the shielded area;

[0113] The shielded area includes at least the area enclosed by the internal signal loop and / or the area enclosed by the high-frequency signal loop.

[0114] It should be noted that copper is a low conductivity material. For intermediate frequency and / or high frequency magnetic fields, it will generate eddy currents, which in turn will generate a reverse magnetic field, canceling out part of the intermediate frequency and / or high frequency magnetic field. Therefore, copper plating on the circuit board can be used to shield the intermediate frequency current loop and further optimize it.

[0115] It should also be noted that the layout layer used for shielding has certain requirements; generally, it uses signals that are not directly exposed to the outside world, and / or the high-frequency signals themselves. See [link / reference] Figure 8 It illustrates a schematic diagram of the composition structure of a shielding region provided in an embodiment of this disclosure. Figure 1 .like Figure 8 As shown, the shielding area is specifically the non-current-carrying N-line area, that is, area 321 enclosed by the internal signal loop. The internal signals are shielded in this area. For example, the conversion circuit system of this disclosure is a battery-free neutral point and mains power-free N system. In this case, N is a completely internal machine signal and has a large number of capacitors to filter the external signals BUS+ / BUS-, which can be used for shielding.

[0116] See Figure 9 It illustrates a schematic diagram of the composition structure of a shielding region provided in an embodiment of this disclosure. Figure 2 .like Figure 9 As shown, the shielding area is specifically region 322 enclosed by the high-frequency signal loop, within which the high-frequency signal itself is shielded. It should be noted that the INVA signal is the signal itself within the Loop 2 loop and can also be used for shielding; furthermore, the INVA signal itself needs to carry current and has a certain width, which can be used to cover the area within the Loop 2 loop. Additionally, Figure 8 and Figure 9 This is an abstract schematic diagram used to illustrate the location of the shielded area; some components have been omitted.

[0117] In some embodiments, the thickness of the copper plating on the circuit board varies depending on the shielding area.

[0118] Specifically, when the shielding area only includes the area enclosed by the internal signal loop, the copper thickness of the circuit board is the first thickness; when the shielding area only includes the area enclosed by the high-frequency signal loop, the copper thickness of the circuit board is the second thickness; when the shielding area includes both the area enclosed by the internal signal loop and the area enclosed by the high-frequency signal loop, the copper thickness of the circuit board is the third thickness.

[0119] For example, the first thickness is less than the second thickness, and the second thickness is less than the third thickness. However, there are no specific limitations on the size relationship and specific values ​​of the first, second, and third thicknesses, which can be set according to actual needs.

[0120] See Figure 10 The diagram illustrates a stray capacitance provided by related technologies. For example... Figure 10 As shown, in practice, the main types of stray capacitances are as follows: one is the stray capacitance C1 between the power device and the ground (Protecting Earthing, PE), specifically including the stray capacitance between the IGBT and the heatsink, the stray capacitance between the PCB and the heatsink, and the stray capacitance between the PCB and the sheet metal; another is the stray capacitance C2 between PCBs, specifically including the stray capacitance between the high voltage change rate (dV / dt) point and the resting point, such as the stray capacitance between the INVA signal and the AC output / input. Additionally, in Figure 10 In the diagram, only a portion of the capacitors are shown for illustrative purposes.

[0121] Here, a high voltage change rate could potentially create an external circuit through the PE (protective earth) and an unexpected circuit between different signals within the machine, which should be avoided.

[0122] Based on this, in some embodiments, see Figure 11 It illustrates a flowchart of a circuit layout method provided in an embodiment of this disclosure. Figure 2 .like Figure 11 As shown, the transformation circuit layout method may further include:

[0123] S401. Obtain the voltage change rate of the signal in the conversion circuit.

[0124] S402. Based on the voltage change rate, each circuit board is divided into a static zone, a dynamic zone, and a combined static and dynamic zone; each circuit board includes a multilayer board.

[0125] S403. Signal lines that transmit only static signals are arranged in a quiet zone, and the projection of the quiet zone onto the multilayer board in the circuit board along a third direction includes only static signals; and signal lines that transmit only dynamic signals are arranged in a dynamic zone, and the projection of the dynamic zone onto the multilayer board in the circuit board along a third direction includes only dynamic signals; and signal lines that transmit both static and dynamic signals are arranged in a combined static and dynamic zone.

[0126] Among them, static signal refers to a signal whose voltage change rate is close to 0, and dynamic signal refers to a signal whose voltage change rate is much greater than 0; the third direction is perpendicular to the plane containing the first direction and the second direction.

[0127] It should be noted that a static signal refers to a signal with a constant or nearly constant voltage, while a dynamic signal refers to a signal with a large voltage change. There is no specific limit to the exact value of the voltage change rate for static and dynamic signals, but the voltage change rate of a dynamic signal is greater than that of a static signal.

[0128] It should also be noted that the dynamic-static combination area includes both static and dynamic signals. For example, in the dynamic-static combination area, some pins of the same device are connected to dynamic signals and some pins are connected to static signals.

[0129] Here, the circuit board is divided into three regions (static region, dynamic region, and combined static / dynamic region) according to the voltage change rate of the signal. This allows for the separation of static and dynamic signals, thereby reducing parasitic capacitance between circuit boards (such as...). Figure 10 The stray capacitance C2 in the circuit is formed, thereby reducing the common-mode loop path.

[0130] See Figure 12 This illustrates a schematic diagram of dynamic and static signal segmentation provided in an embodiment of this disclosure. For example... Figure 12 As shown ( Figure 12 Only one label is shown (51, 52, and 53; the remaining static, dynamic, and combined static / dynamic zones are not labeled). The solid-lined area is the static zone 51, where static signals can include BUS+ and BUS- signals, which are directly connected to the external battery. For example, the PCB has 6 layers, and the static zone has no other signals projected onto the 6th layer of the PCB. The dashed-lined area is the dynamic zone 52, where dynamic signals can include INVA, INVB, and INVC signals before the inductor. The dynamic zone has no other signals projected onto the 6th layer of the PCB. The dotted-lined area is the combined static / dynamic zone 53, which is the area where static and dynamic signals cannot be separated. The signals in the combined static / dynamic zone are mainly various signals connected to the IGBT.

[0131] For example, Figure 1The bus capacitors (101, 102) belonging to static components are located in the static zone 51, while the filter capacitor (108) and switching transistor modules (switching transistors 103, 105, 106 belonging to the static-dynamic combination components, and switching transistor 104 belonging to the dynamic component) are located in the static-dynamic combination zone 53. In other words, there is no specific correspondence between the components classified according to the rate of voltage change (static components, dynamic components, static-dynamic combination components) and the regions classified according to the rate of voltage change (static zone, dynamic zone, static-dynamic combination zone). In addition, the inductor (107) belonging to the static-dynamic combination component is located on another circuit board or around the dynamic zone 52 on that circuit board, and the dynamic zone 52 is used to arrange signal lines; and in order to minimize current loops and avoid the signal lines from winding when routing, the switching transistors that need to be connected to the bus capacitor can be arranged in the area close to the bus capacitor.

[0132] Furthermore, in some embodiments, the transformation circuit layout method may further include:

[0133] In the static-dynamic combination area, the multilayer board in the circuit board is divided into a static layer, a dynamic layer and a shielding layer;

[0134] Arrange the signal lines that transmit static signals in the static layer; and,

[0135] Arrange the signal lines for transmitting dynamic signals in the dynamic layer; and,

[0136] The shielding layer is placed between the static layer and the dynamic layer.

[0137] For example, the circuit board includes a 6-layer board, which is divided into a top 3-layer board, a middle layer, and a bottom 2-layer board in the dynamic-static junction area. The top 3 layers are dynamic layers, transmitting dynamic signals and / or drive signals; the bottom 2 layers are static layers, transmitting static signals such as BUS+ and BUS-; the middle layer is a shielding layer, separated by an internal signal N layer. Specifically, the first layer (Toplayer) can be a dynamic layer and drive layer such as INVA, INVB, and INVC; the second layer (Midlayer1) can be a dynamic layer such as INVA, INVB, and INVC; the third layer (Midlayer2) can be a dynamic layer such as INVA, INVB, and INVC; the fourth layer (Midlayer3) can be an internal virtual N layer; the fifth layer (Midlayer4) can be the main BUS- layer; and the sixth layer (Bottom layer) can be the main BUS+ layer.

[0138] It should be noted that there is no specific limit to the number of multilayer boards included in the circuit board, or the specific number of static layers and dynamic layers, but multiple static layers and multiple dynamic layers can be arranged adjacent to each other.

[0139] It should also be noted that the dynamic layer, shielding layer, and static layer can be arranged on the circuit board from top to bottom along a third direction, or from bottom to top along a third direction. The specific choice can be made according to the actual situation.

[0140] Furthermore, in some embodiments, when the projection of the signal line transmitting static signals onto the multilayer board in the circuit board along a third direction does not overlap with the projection of the signal line transmitting dynamic signals onto the multilayer board in the circuit board along a third direction, the multilayer board in the circuit board is divided into a static layer and a dynamic layer.

[0141] When the projection of the signal line transmitting static signals onto the multilayer board of the circuit board along a third direction overlaps with the projection of the signal line transmitting dynamic signals onto the multilayer board of the circuit board along a third direction, the multilayer board of the circuit board is divided into a static layer, a dynamic layer, and a shielding layer, and the shielding layer is arranged between the static layer and the dynamic layer.

[0142] In other words, in the quiet zone and the dynamic zone, the circuit board is also a multi-layer board, but since they transmit the same signal respectively, no shielding layer is needed in between; while in the dynamic-static combined zone, since both static and dynamic signals need to be transmitted, a shielding layer is needed in between to achieve separation of static and dynamic signals.

[0143] In summary, grouping regions with similar voltage fluctuations together can effectively prevent interference between different regions. Furthermore, in the dynamic-static junction area, separating the dynamic layer with larger voltage fluctuations from the static layer with smaller voltage fluctuations using a shielding layer can effectively reduce the mutual influence between the dynamic and static layers, thereby improving the EMC performance of the circuit board.

[0144] In some embodiments, see Figure 13 It illustrates a flowchart of a circuit layout method provided in an embodiment of this disclosure. Figure 3 .like Figure 13 As shown, the transformation circuit layout method may further include:

[0145] S601, Obtain multiple filtering devices.

[0146] S602. Arrange multiple filtering devices at the DC port, AC port, the rear end of the inductor, and the near-power end of the neutral line in the conversion circuit.

[0147] Among them, several filtering components include inductors, magnetic rings, and Y capacitors.

[0148] Here, the inductor can include common-mode inductors and differential-mode inductors, and the magnetic ring can be a DC magnetic ring.

[0149] Specifically, in Figure 10 Based on the stray capacitance shown, see [reference]. Figure 14 This illustration shows a schematic diagram of a filtering device provided in an embodiment of the present disclosure. Figure 14 As shown, the multiple filtering components include an inductor 71, a magnetic ring 72, and a Y capacitor 73. Figure 14 Only one of the following is marked (71, 72, and 73; the remaining inductors, magnetic rings, and Y capacitors are not marked). The Y capacitor 73 is placed at the rear end of the inductor and near the power end of the N line, so that a shorter common-mode circuit can be formed inside the machine, thus reducing its impact on the outside of the machine.

[0150] In addition, since interference cannot be completely filtered out, filtering measures are reserved at the port, specifically, such as... Figure 14 As shown, the main components are an inductor 71 (AC common-mode inductor and differential-mode / parallel inductor) and a Y capacitor 73 arranged at the AC port, and a magnetic ring 72 and a Y capacitor 73 arranged at the DC port. Port filtering is performed here to prevent secondary signal reception. Common-mode filtering primarily optimizes high-frequency radiation, while differential-mode filtering primarily optimizes low-frequency conduction.

[0151] See Figure 15 It illustrates a schematic diagram of an AC / DC path provided by related technologies. For example... Figure 15 As shown, in the related technology, the DC signal line b1 includes a positive line and a negative line, and the AC signal line b2 includes three signal lines for transmitting three-phase AC power. The distance between the positive and negative lines (positive and negative lines) in the DC signal line b1 is relatively large, and there is overlap between the AC and DC lines (AC signal line b2 and DC signal line b1).

[0152] In addition, AC / DC paths are low-frequency paths, such as... Figure 1 The path traversed by Loop1 in the middle, in related technologies, Figure 15 The AC / DC path distribution shown will cause the Loop1 and Loop2 circuits to overlap. In addition, the AC / DC signal in the Loop1 circuit is a low-frequency quantity that passes to the outside, while the signal in the Loop2 circuit is a high-frequency quantity. When the Loop1 circuit is too large, it may receive high-frequency interference directly from the overlapping part of the Loop1 and Loop2 circuits or from the indirect space, thus causing high-frequency interference to escape to the outside.

[0153] Based on this, in some embodiments, see Figure 16 It illustrates a flowchart of a circuit layout method provided in an embodiment of this disclosure. Figure 4 .like Figure 16 As shown, the transformation circuit layout method may further include:

[0154] S801. Obtain AC signal lines and DC signal lines. DC signal lines include positive lines and negative lines.

[0155] S802. Arrange the AC signal lines and DC signal lines at intervals, and adjust the distance between the positive and negative lines to a preset distance.

[0156] Among them, AC signal lines are used to transmit AC signals, and DC signal lines are used to transmit DC signals.

[0157] It should be noted that the preset distance means the closer the better, provided that the requirements of the device itself and safety regulations are met; no specific value is limited. Furthermore, safety regulations are various rules, regulations, and standards established to ensure personal safety and the safe operation of equipment.

[0158] It should also be noted that the spacing between AC and DC signal lines, and the distance between the positive and negative lines, can be adjusted to a preset distance by changing the input method of AC and DC signal lines and the arrangement of components on the circuit board. Specifically, in related technologies, on the DC path (the path through which the DC signal line passes), an isolating switch, a DC switch, a fuse, and two DC relays are arranged in sequence, with the fuse positioned to the left of the DC relays, followed by the power amplifier board; on the AC path (the path through which the AC signal line passes), three Hall effect sensors, six black relays, a leakage current Hall effect sensor, and three filter capacitors are arranged in sequence. In this disclosure, the types and quantities of components are basically consistent with those in related technologies, but the arrangement of components differs. Specifically, on the DC path, the fuse is positioned to the right of the DC relays, and three magnetic rings are also included; on the AC path, the three Hall effect sensors are closer together. Furthermore, the layout of the power amplifier board is also different in this disclosure, with IGBTs, film capacitors, output capacitors, and Hall effect sensors arranged on the same power amplifier board.

[0159] See Figure 17 This illustrates a schematic diagram of an AC / DC path provided by an embodiment of the present disclosure. Figure 17 As shown, in this disclosure, the DC signal line 91 includes a positive line and a negative line, and the AC signal line 92 includes three signal lines for transmitting three-phase AC power. The AC signal line 92 and the DC signal line 91 do not overlap, and the positive and negative lines are close together, reducing the area. Through optimization, the Loop1 circuit and the Loop2 circuit do not overlap. Furthermore, Figure 15 and Figure 17 This is an abstract schematic diagram used to illustrate the location of AC / DC paths; some components have been omitted.

[0160] In summary, by planning the low-frequency path, the low-frequency current loop can be reduced (i.e., Figure 1 The area of ​​the Loop1 loop in the circuit is reduced to prevent secondary reception of the signal.

[0161] In some embodiments, the circuit type of the conversion circuit can be any of the following:

[0162] T-type three-level, T-type five-level, I-type three-level, I-type five-level, dual buck-boost, two-level.

[0163] See Figure 18 It illustrates a frequency curve diagram provided by related technologies. For example... Figure 18 As shown, the horizontal axis represents frequency, and the vertical axis represents decibels. For example, Figure 18 (a) is a schematic diagram of the frequency curve in the relevant technology under the conditions of DC voltage Vdc being 700 volts (V), AC voltage Vac being 381V, grid discharge being 30 kilovolts (kV), the presence of IGBT modules, and the absence of common-mode inductors, with a margin of -30dB. Figure 18 (b) is a schematic diagram of the frequency curve in the relevant technology under the conditions of Vdc being 700V, Vac being 4001V, grid discharge being 40kV, having a single IGBT transistor, and having a common-mode inductor, with a margin of -9.6dB.

[0164] With the improvement of the transformation circuit layout method disclosed herein, see [link to relevant documentation]. Figure 19 This illustrates a frequency curve diagram provided in an embodiment of the present disclosure. Figure 19 As shown, the horizontal axis represents frequency, and the vertical axis represents decibels. For example, Figure 19 This is a schematic diagram of the frequency curve in this disclosure under the conditions of Vdc being 700V, Vac being 4001V, and grid-connected discharge being 40kV, with a margin of 2-4dB.

[0165] In summary, in the relevant technologies, the data differences are significant before the conversion circuit is improved, with a difference of 20dB including the common-mode inductance. However, after the conversion circuit is improved, it can pass the FCC Class A standard.

[0166] This disclosure provides a method for converting circuit layout. By rationally dividing the board, the intermediate frequency current loop and / or high frequency current loop are limited to a small area within the power amplifier board. The intermediate frequency current loop is shielded using PCB stack-up. Dynamic and static signals are partitioned (i.e., static zone, dynamic zone, and combined dynamic / static zone) and layered (i.e., static layer, dynamic layer, and shielding layer) on the board. The overall layout of the static signal also greatly shortens the loop area, preventing secondary reception. High-frequency filtering measures are reserved in appropriate locations, specifically AC / DC, common-mode inductors, and electromagnetic interference (EMI) capacitors combined with surge protection boards. By optimizing the layout of the converting circuit, electromagnetic radiation is optimized by 15-20 dB, ultimately meeting the relevant IEC C2 standard and significantly reducing EMC measures and costs.

[0167] In another embodiment of this disclosure, such as Figure 4 or Figure 5 As shown, the conversion circuit 30 includes multiple circuit boards ( Figure 4 and Figure 5 (Not shown in the image) Switch 311, bus capacitor 312, filter capacitor 313 and current sampling element 314;

[0168] The switching transistor 311, bus capacitor 312, filter capacitor 313 and current sampling element 314 are located on the same circuit board and form the intermediate frequency current loop and / or high frequency current loop in the conversion circuit 30.

[0169] The conversion circuit 30 can be implemented using the conversion circuit layout method described in the foregoing embodiments. For details not disclosed in this disclosure, please refer to the description of the foregoing embodiments for clarification.

[0170] It should be noted that the conversion circuit 30 disclosed herein can be assembled from multiple circuit boards. The conversion circuit 30 may include inverter circuits, rectifier circuits, auxiliary power supply circuits, etc., and can form an inverter, rectifier, auxiliary power supply, and other machines (hereinafter referred to as machines). Among them, the multiple circuit boards may include power amplifier boards, sampling boards, auxiliary power supply boards, filter boards, etc., without specific limitations.

[0171] Here, the switching transistor may include an insulated gate bipolar transistor, the bus capacitor may include a thin film capacitor, the filter capacitor may include an output capacitor, and the current sampling element may include a Hall element, but no specific limitation is made thereto.

[0172] It should be noted that, Figure 1 Indicates a single-phase circuit. Figure 4 and Figure 5 This shows the layout of a three-phase circuit. Specifically, Figure 4 and Figure 5 The switching transistor 311 in the text refers to the switching transistor module, which includes, for example... Figure 1 The single-phase diagram shows four switching transistors (switching transistors 103, 104, 105, and 106); bus capacitor 312 refers to the bus capacitor module, which includes, for example... Figure 1 The single-phase diagram shows two bus capacitors (101, 102); filter capacitor 313 refers to the filter capacitor module, which includes capacitors for each of the three phases. Figure 1 The filter capacitor shown is 108 for a single phase.

[0173] Specifically, the switching transistor 311, bus capacitor 312, filter capacitor 313, and current sampling element 314 are located on the same power amplifier board and form the intermediate frequency current loop and / or high frequency current loop in the conversion circuit 30, thereby reducing the area of ​​the intermediate frequency current loop and / or high frequency current loop, and thus reducing the electromagnetic waves emitted to the outside.

[0174] In some embodiments, such as Figure 4 or Figure 5 As shown, the bus capacitor 312 and the switching transistor 311 are distributed adjacent to each other along a preset direction;

[0175] The filter capacitor 313 and the current sampling element 314 are sequentially distributed on one side of the bus capacitor 312 and the switching transistor 311 along the first direction.

[0176] It should be noted that the preset direction can be either the first direction or the second direction. That is, the bus capacitor 312 and the switch transistor 311 can be arranged adjacent to each other along the first direction, or the bus capacitor 312 and the switch transistor 311 can be arranged adjacent to each other along the second direction.

[0177] Specifically, in some embodiments, such as Figure 4 As shown, the bus capacitor 312 and the switching transistor 311 are alternately distributed along the second direction. Alternatively,

[0178] like Figure 5 As shown, the bus capacitor 312 is distributed on the other side of the switching transistor 311 along the first direction.

[0179] In some embodiments, such as Figure 8 and Figure 9 As shown, the conversion circuit 30 also includes a copper layer;

[0180] The copper layer covers the shielding area of ​​the intermediate frequency current loop;

[0181] The shielded area includes at least the area 321 enclosed by the internal signal loop and / or the area 322 enclosed by the high-frequency signal loop.

[0182] Here, the intermediate frequency current loop is shielded with copper plating, which can reduce the electromagnetic waves emitted to the outside.

[0183] In some embodiments, different shielding areas correspond to different copper layer thicknesses.

[0184] In other words, the thickness of the copper plating on the circuit board varies depending on the shielding area.

[0185] Specifically, when the shielding area only includes the area 321 enclosed by the internal signal loop, the copper thickness of the circuit board is the first thickness; when the shielding area only includes the area 322 enclosed by the high-frequency signal loop, the copper thickness of the circuit board is the second thickness; when the shielding area includes both the area 321 enclosed by the internal signal loop and the area 322 enclosed by the high-frequency signal loop, the copper thickness of the circuit board is the third thickness.

[0186] For example, the first thickness is less than the second thickness, and the second thickness is less than the third thickness. However, there are no specific limitations on the size relationship and specific values ​​of the first, second, and third thicknesses, which can be set according to actual needs.

[0187] In some embodiments, such as Figure 12 As shown, each circuit board includes a static area 51, a dynamic area 52, and a dynamic-static combination area 53, and each circuit board includes a multilayer board.

[0188] The static zone 51 includes signal lines that transmit only static signals, and the projection of the static zone 51 onto the multilayer board in the circuit board along a third direction includes only static signals; the dynamic zone 52 includes signal lines that transmit only dynamic signals, and the projection of the dynamic zone 52 onto the multilayer board in the circuit board along a third direction includes only dynamic signals; the dynamic-static combined zone 53 includes signal lines that transmit both static and dynamic signals.

[0189] Among them, static signal refers to a signal whose voltage change rate is close to 0, and dynamic signal refers to a signal whose voltage change rate is much greater than 0.

[0190] It should be noted that a static signal refers to a signal with a constant or nearly constant voltage, while a dynamic signal refers to a signal with a large voltage change. There is no specific limit to the exact value of the voltage change rate for static and dynamic signals, but the voltage change rate of a dynamic signal is greater than that of a static signal.

[0191] Here, the circuit board is divided into three regions (static region, dynamic region, and dynamic-static combination region) according to the voltage change rate of the signal. This can achieve separation of dynamic and static signals, reduce the formation of parasitic capacitance between circuit boards, and thus reduce common-mode loop paths.

[0192] In some embodiments, in the static-dynamic bonding area 53, the multilayer board in the circuit board includes a static layer, a dynamic layer, and a shielding layer.

[0193] The static layer includes signal lines that transmit static signals, and the dynamic layer includes signal lines that transmit dynamic signals.

[0194] The shielding layer is located between the static layer and the dynamic layer.

[0195] For example, the circuit board includes a 6-layer board, which is divided into a top 3-layer board, a middle layer, and a bottom 2-layer board in the dynamic-static junction area. The top 3 layers are dynamic layers, transmitting dynamic signals and / or drive signals; the bottom 2 layers are static layers, transmitting static signals such as BUS+ and BUS-; the middle layer is a shielding layer, separated by an internal signal N layer. Specifically, the first layer (Toplayer) can be a dynamic layer and drive layer such as INVA, INVB, and INVC; the second layer (Midlayer1) can be a dynamic layer such as INVA, INVB, and INVC; the third layer (Midlayer2) can be a dynamic layer such as INVA, INVB, and INVC; the fourth layer (Midlayer3) can be an internal virtual N layer; the fifth layer (Midlayer4) can be the main BUS- layer; and the sixth layer (Bottom layer) can be the main BUS+ layer.

[0196] It should be noted that there is no specific limit to the number of multilayer boards included in the circuit board, or the specific number of static layers and dynamic layers, but multiple static layers and multiple dynamic layers can be arranged adjacent to each other.

[0197] It should also be noted that the dynamic layer, shielding layer, and static layer can be arranged on the circuit board from top to bottom along a third direction, or from bottom to top along a third direction. The specific choice can be made according to the actual situation.

[0198] Furthermore, in some embodiments, when the projection of the signal line transmitting static signals onto the multilayer board in the circuit board along a third direction does not overlap with the projection of the signal line transmitting dynamic signals onto the multilayer board in the circuit board along a third direction, the multilayer board in the circuit board includes a static layer and a dynamic layer.

[0199] When the projection of a signal line transmitting a static signal onto the multilayer board of a circuit board along a third direction overlaps with the projection of a signal line transmitting a dynamic signal onto the multilayer board of a circuit board along a third direction, the multilayer board of the circuit board includes a static layer, a dynamic layer, and a shielding layer, and the shielding layer is distributed between the static layer and the dynamic layer.

[0200] In other words, in the quiet zone and the dynamic zone, the circuit board is also a multi-layer board, but since they transmit the same signal respectively, no shielding layer is needed in between; while in the dynamic-static combined zone, since both static and dynamic signals need to be transmitted, a shielding layer is needed in between to achieve separation of static and dynamic signals.

[0201] In summary, grouping regions with similar voltage fluctuations together can effectively prevent interference between different regions. Furthermore, in the dynamic-static junction area, separating the dynamic layer with larger voltage fluctuations from the static layer with smaller voltage fluctuations using a shielding layer can effectively reduce the mutual influence between the dynamic and static layers, thereby improving the EMC performance of the circuit board.

[0202] In some embodiments, such as Figure 14 As shown, the conversion circuit 30 may also include multiple filtering devices; the multiple filtering devices are distributed in the DC port, AC port, the rear end of the inductor and the near power end of the neutral line in the conversion circuit 30;

[0203] Among them, multiple filtering devices include an inductor 71, a magnetic ring 72, and a Y capacitor 73.

[0204] Specifically, placing the Y capacitor 73 at the rear end of the inductor and near the power end of the N line can form a shorter common-mode circuit within the machine, thus reducing its impact on the outside. Placing the inductor 71 (AC common-mode inductor, differential-mode / parallel inductor) and the Y capacitor 73 at the AC port, and the magnetic ring 72 and the Y capacitor 73 at the DC port, can prevent secondary reception of signals. Among these, common-mode filtering mainly optimizes high-frequency radiation, while differential-mode filtering mainly optimizes low-frequency conduction.

[0205] In some embodiments, such as Figure 17 As shown, the conversion circuit 30 may also include an AC signal line 92 and a DC signal line 91, wherein the DC signal line 91 includes a positive line and a negative line;

[0206] AC signal line 92 and DC signal line 91 are spaced apart;

[0207] The distance between the positive and negative electrodes is a preset distance;

[0208] Among them, DC signal line 91 is used to transmit DC signals, and AC signal line 92 is used to transmit AC signals.

[0209] It should be noted that the preset distance means the closer the better, provided that the requirements of the device itself and safety regulations are met; no specific value is limited. Furthermore, safety regulations are various rules, regulations, and standards established to ensure personal safety and the safe operation of equipment.

[0210] By planning the low-frequency path, the low-frequency current loop can be reduced (i.e., Figure 1 The area of ​​the Loop1 loop in the circuit is reduced to prevent secondary reception of the signal.

[0211] This disclosure provides a conversion circuit that, by optimizing the layout of the conversion circuit, can reduce electromagnetic interference, improve electromagnetic compatibility, and save costs.

[0212] The above description is merely a preferred embodiment of this disclosure and is not intended to limit the scope of protection of this disclosure.

[0213] It should be noted that, in this disclosure, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0214] The sequence numbers of the embodiments disclosed above are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0215] The methods disclosed in the several method embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0216] The features disclosed in the several product embodiments provided in this disclosure can be combined arbitrarily without conflict to obtain new product embodiments.

[0217] The features disclosed in the several method or device embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0218] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method of transforming a circuit layout, characterized by, The method comprises: obtaining multiple circuit boards and multiple target devices; arranging the multiple target devices on the same circuit board to form an intermediate frequency current loop and / or a high frequency current loop in a conversion circuit; wherein the multiple target devices comprise a switching tube, a bus capacitor, a filter capacitor and a current sampling element; and the conversion circuit is a three-phase circuit; the method further comprises: obtaining a voltage change rate of a signal in the conversion circuit; dividing each of the circuit boards into a static region, a dynamic region and a dynamic-static combination region according to the voltage change rate; each of the circuit boards comprises multiple layers of boards; arranging signal lines that only transmit static signals in the static region, and the static region only includes the static signals in the projection of the multiple layers of boards in the circuit board along a third direction; and arranging signal lines that only transmit dynamic signals in the dynamic region, and the dynamic region only includes the dynamic signals in the projection of the multiple layers of boards in the circuit board along the third direction; and arranging signal lines that transmit the static signals and the dynamic signals in the dynamic-static combination region; wherein the static signals refer to signals with a voltage change rate close to 0, and the dynamic signals refer to signals with a voltage change rate far greater than 0.

2. The method of claim 1, wherein, arranging the multiple target devices on the same circuit board comprises: arranging the bus capacitor and the switching tube adjacent to each other along a preset direction; arranging the filter capacitor and the current sampling element on one side of the bus capacitor and the switching tube along a first direction.

3. The method of claim 2, wherein, arranging the bus capacitor and the switching tube adjacent to each other along the preset direction comprises: arranging the bus capacitor and the switching tube alternately along a second direction; or arranging the bus capacitor on the other side of the switching tube along the first direction; wherein the first direction and the second direction intersect.

4. The method of claim 1, wherein, The method further comprises: determining a shielding area of the intermediate frequency current loop; copper plating the shielding area; wherein the shielding area at least includes an area surrounded by an internal signal loop and / or an area surrounded by a high frequency signal loop.

5. The method of claim 1, wherein, The method further comprises: dividing the multiple layers of boards in the dynamic-static combination region into static layers, dynamic layers and shielding layers; arranging signal lines that transmit the static signals in the static layers; and arranging signal lines that transmit the dynamic signals in the dynamic layers; and arranging the shielding layers between the static layers and the dynamic layers.

6. The method of claim 1, wherein, The method further comprises: obtaining multiple filter devices; arranging the multiple filter devices at a direct current port, an alternating current port, a back end of an inductor and a near power end of a zero line in the conversion circuit; wherein the multiple filter devices comprise an inductor, a magnetic ring and a Y capacitor.

7. The method of claim 1, wherein, The method further comprises: obtaining alternating current signal lines and direct current signal lines, the direct current signal lines comprising positive lines and negative lines; arranging the alternating current signal lines and the direct current signal lines at intervals, and adjusting the distance between the positive lines and the negative lines to a preset distance; wherein the alternating current signal lines are used to transmit alternating current signals, and the direct current signal lines are used to transmit direct current signals.

8. A conversion circuit, characterized by The method is prepared according to any one of claims 1 to 7, and the conversion circuit comprises multiple circuit boards, switch tubes, bus capacitors, filter capacitors and current sampling elements; The switch tubes, the bus capacitors, the filter capacitors and the current sampling elements are located on the same circuit board and form an intermediate frequency current loop and / or a high frequency current loop in the conversion circuit; and the conversion circuit is a three-phase circuit; Each of the circuit boards comprises a static area, a dynamic area and a dynamic-static combination area, and each of the circuit boards comprises multiple layers of boards; The static area comprises signal lines that only transmit static signals, and the projection of the multiple layers of boards in the circuit board along a third direction only comprises the static signals; the dynamic area comprises signal lines that only transmit dynamic signals, and the projection of the multiple layers of boards in the circuit board along the third direction only comprises the dynamic signals; and the dynamic-static combination area comprises signal lines that transmit the static signals and the dynamic signals; The static signals refer to signals with a voltage change rate close to 0, and the dynamic signals refer to signals with a voltage change rate far greater than 0.

9. The conversion circuit according to claim 8, characterized in that: The bus capacitors and the switch tubes are adjacently distributed along a preset direction; The filter capacitors and the current sampling elements are sequentially distributed on one side of the bus capacitors and the switch tubes along a first direction.

10. The conversion circuit of claim 8, wherein, The conversion circuit further comprises alternating current (AC) signal lines and direct current (DC) signal lines, and the DC signal lines comprise positive lines and negative lines; The AC signal lines and the DC signal lines are spaced apart; The distance between the positive lines and the negative lines is a preset distance; The DC signal lines are used for transmitting DC signals, and the AC signal lines are used for transmitting AC signals.

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