IPM, recovery control method based on power-on reset control, and IPM control system

Abstract

This application provides embodiments belonging to integrated circuit technology, offering an IPM based on power-on reset control, a recovery control method, and an IPM control system. This IPM, by incorporating circuit protection and power-on reset circuits within the high-side driver chip, enables rapid protection against abnormal states of the high-side IGBT. Furthermore, when the high-side IGBT is powered on, it automatically recovers upon power-up, effectively solving the problem of the high-side power switching element failing to recover operation promptly, thus affecting the performance and stability of the entire IPM circuit. In addition, the detection circuit, circuit protection, and power-on reset circuit in this embodiment are integrated into the high-side driver chip, eliminating the need for additional terminals to receive external detection or recovery signals, while also meeting the small-package requirements of the IPM.

Description

Technical Field

[0001] This application relates to integrated circuit technology. More specifically, it relates to an IPM based on power-on reset control, a recovery control method, and an IPM control system. Background Technology

[0002] Intelligent Power Modules (IPMs) are commonly used in three-phase inverter circuits in household appliances, industrial machinery, and automotive products. Because IPMs often operate under high voltage and high current conditions, excessive energy (current) can damage the power switching components in abnormal situations (such as load short circuits). Therefore, it is necessary to provide timely current protection for the power switching components in case of abnormal conditions.

[0003] Considering that when the driver chip (Integrated Circuit Chip) in an IPM is separated on the high side and low side, the detection of abnormal states on the high side usually relies on the external microcomputer control to output corresponding control signals. The delay time from detection to the actual power switching element being powered on and off is relatively long, which can easily lead to damage due to exceeding the damage tolerance range of the power switching element. Related technologies propose to set up a detection circuit on the high side, and use the potential change at the output terminal of the high-side power switching element to cut off the high-side power switching element to achieve protection control of the high-side power switching element.

[0004] However, the aforementioned technologies may cause the high-side power switching elements to remain in a protected state for an extended period, preventing the timely restoration of the high-side power elements of the IPM to normal operation. This would lead to the IPM malfunctioning, thus affecting the performance and stability of the entire system. Therefore, there is an urgent need to provide a technical solution that can promptly restore the operation of the high-side power elements. Summary of the Invention

[0005] This application provides an IPM based on power-on reset control, a recovery control method, and an IPM control system. By adding circuit protection and power-on reset circuits to the high-side driver chip, the operation of the high-side power components of the IPM can be restored in a timely manner after an abnormality is detected in the high-side power switching element and it enters a protection state.

[0006] In a first aspect, embodiments of this application provide an intelligent power module (IPM), including a first IGBT transistor and a high-side driving chip for driving the first IGBT transistor to turn on or off, a second IGBT transistor and a low-side driving chip for driving the first IGBT transistor to turn on or off; wherein, the collector of the first IGBT transistor is connected to a first power supply terminal, the emitter of the second IGBT transistor is grounded, and the emitter of the first IGBT transistor is electrically connected to the collector of the second IGBT transistor, such that the first IGBT transistor and the second IGBT transistor are connected in series, and the high-side driving chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driving module electrically connected to the gate of the first IGBT transistor;

[0007] The detection circuit has one end connected to the wire connecting the first IGBT and the second IGBT, and the other end connected to the circuit protection and power-on reset circuit. It is used to detect the change in the emitter potential of the first IGBT and output a first protection signal to the circuit protection and power-on reset circuit according to the change in the emitter potential.

[0008] The circuit protection and power-on reset circuit has one end connected to the detection circuit and the signal input terminal, respectively, and the other end connected to the high-side drive module. When it receives the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT, placing the first IGBT in a current protection state. It also receives a power-on reset signal when the first IGBT is re-energized. This power-on reset signal resets the initial state of the circuit protection and power-on reset circuit, disabling the first protection signal, and transmits the first drive signal received from the signal input terminal to the high-side drive module, causing the high-side drive module to drive the first IGBT to turn on or off according to the first drive signal.

[0009] In one embodiment, the circuit protection and power-on reset circuit includes an analog switch, a latch, and an AND gate;

[0010] The analog switch has one end connected to the detection circuit and the signal input terminal respectively, and the other end connected to one end of the latch. It is used to receive the first drive signal transmitted by the signal input terminal, and when the first drive signal is a signal to turn on the first IGBT, it connects to the detection circuit, receives and transmits the first protection signal and the first drive signal to the latch.

[0011] The latch, with its other end connected to the high-side drive module and the AND gate respectively, is used to latch the first protection signal when the first protection signal is received, and to receive a power-on reset signal from the high-side drive module, so that the latched first protection signal is invalidated.

[0012] The AND gate has one end connected to the latch and the signal input terminal, and the other end connected to the high-side drive module. When the first protection signal in the latch is valid, the AND gate transmits the first cut-off signal to the high-side drive module to cut off the power to the first IGBT, so that the first IGBT is in a protected state. When the first protection signal in the latch fails, the first drive signal at the signal input terminal is output to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive chip.

[0013] In one embodiment, the signal input terminal is further configured to transmit a second drive signal for turning off the first IGBT transistor to the circuit protection and power-on reset circuit when the first IGBT transistor is powered on again, so that the circuit protection and power-on reset circuit resumes drive control of the first IGBT transistor based on the second drive signal when the power is restarted.

[0014] In one embodiment, a filter circuit is also included;

[0015] The filter circuit has one end connected to the signal input terminal and the other end connected to the circuit protection and power-on reset circuit, so that the circuit protection and power-on reset circuit receives the filtered first drive signal after filtering the first drive signal through the filter circuit.

[0016] In one embodiment, the high-side driving chip further includes a level conversion circuit. One end of the level conversion circuit is connected to the circuit protection and power-on reset circuit, and the other end is connected to the high-side driving module. This allows the high-side driving module to convert the level of the first driving signal transmitted by the circuit protection and power-on reset circuit through the level conversion circuit, and then drive the first IGBT to turn on or off based on the level-converted first driving signal.

[0017] In one embodiment, the high-side driver chip further includes a second power supply terminal and a pull-up resistor. One end of the pull-up resistor is connected to the second power supply terminal, and the other end is connected to the circuit protection and power-on reset circuit, so that the circuit protection and power-on reset circuit maintains the signal state corresponding to the pull-up resistor when it is not connected.

[0018] In one embodiment, the system further includes a third IGBT and a fourth IGBT. The collector of the third IGBT is connected to the first power supply terminal, the emitter of the fourth IGBT is grounded, and the emitter of the third IGBT is electrically connected to the collector of the fourth IGBT, so that the third IGBT and the fourth IGBT are connected in series. The high-side driver chip is also connected to the gate of the third IGBT.

[0019] The detection circuit is also connected at one end to the wire connecting the third IGBT and the fourth IGBT, for detecting the emitter potential change of the third IGBT and outputting a second protection signal to the circuit protection and power-on reset circuit according to the emitter potential change.

[0020] The circuit protection and power-on reset circuit, with its other end connected to the high-side drive module, is used to output a second cut-off signal to the high-side drive module when receiving the second protection signal transmitted by the detection circuit, so as to cut off the power supply of the third IGBT and put the third IGBT in a current protection state; and to receive a power-on reset signal transmitted by the high-side drive module when the third IGBT is re-powered, the power-on reset signal being used to reset the initial state of the circuit protection and power-on reset circuit, so that the second protection signal is invalidated, and to transmit the second drive signal received from the signal input terminal to the high-side drive module, so that the high-side drive module drives the third IGBT to turn on or off according to the second drive signal;

[0021] The low-side driving chip is also electrically connected to the fourth IGBT transistor and is used to drive the fourth IGBT transistor to turn on or off.

[0022] Secondly, embodiments of this application provide an IPM recovery control method, including a first IGBT and a high-side driving chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driving chip for driving the first IGBT to turn on or off; wherein, the collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, such that the first IGBT and the second IGBT are connected in series; the high-side driving chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driving module electrically connected to the gate of the first IGBT; the method includes:

[0023] The detection circuit detects the change in the emitter potential of the first IGBT transistor and outputs a first protection signal to the circuit protection and power-on reset circuit based on the change in emitter potential.

[0024] When the circuit protection and power-on reset circuit receives the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT, so that the first IGBT is placed in a current protection state.

[0025] The circuit protection and power-on reset circuit receives a power-on reset signal when the first IGBT is powered on again. The power-on reset signal is used to reset the initial state of the circuit protection and power-on reset circuit, causing the first protection signal to fail, and transmits the first drive signal received from the signal input terminal to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive signal.

[0026] Thirdly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the IPM recovery control method.

[0027] Fourthly, embodiments of this application provide an IPM control system, including the IPM and a load device, wherein the load device is electrically connected to the first IGBT tube.

[0028] This application provides an IPM based on power-on reset control, a recovery control method, and an IPM control system. The IPM includes a first IGBT and a high-side driver chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driver chip for driving the first IGBT to turn on or off. The collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, thus connecting the first and second IGBTs in series. The high-side driver chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driver module electrically connected to the gate of the first IGBT. The detection circuit has one end connected to the wire connecting the first and second IGBTs, and the other end connected to the circuit protection and power-on reset circuit. It detects changes in the emitter potential of the first IGBT and outputs a first protection signal to the circuit protection and power-on reset circuit based on these changes. The circuit protection and power-on reset circuit has one end connected to the detection circuit and the signal input terminal, and the other end connected to the high-side drive module. Upon receiving the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power to the first IGBT, placing the first IGBT in a current protection state. It also receives a power-on reset signal when the first IGBT is powered on again. This power-on reset signal resets the initial state of the circuit protection and power-on reset circuit, disabling the first protection signal. The circuit then transmits the first drive signal received from the signal input terminal to the high-side drive module, causing the high-side drive module to turn the first IGBT on or off according to the first drive signal. In this process, by setting up the circuit protection and power-on reset circuit in the high-side drive chip, rapid protection against abnormal states of the high-side IGBT is achieved. Furthermore, when the high-side IGBT is powered on, it can automatically recover upon power-on, effectively solving the problem of the high-side power switching element failing to resume operation in a timely manner, thus affecting the performance and stability of the entire IPM circuit. Furthermore, the detection circuit, circuit protection, and power-on reset circuit in this embodiment are integrated into the high-side driver chip, eliminating the need for additional terminals to receive external detection or recovery signals, while also meeting the small package requirements of the IPM. Attached Figure Description

[0029] To more clearly illustrate the implementation methods in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0030] Figure 1 This is one of the structural schematic diagrams of an IPM based on power-on reset control provided in the embodiments of this application;

[0031] Figure 2a yes Figure 1 A schematic diagram of the circuit protection and power-on reset circuit 124;

[0032] Figure 2b This is a timing diagram of the IPM based on power-on reset control in the embodiments of this application;

[0033] Figure 3 yes Figure 1 One of the structural schematic diagrams of the detection circuit 123 in the middle;

[0034] Figure 4 yes Figure 1 The second schematic diagram of the detection circuit 123;

[0035] Figure 5 yes Figure 1 A schematic diagram of the structure of the driver chip 120;

[0036] Figure 6 This is a second schematic diagram of an IPM structure based on power-on reset control provided in this application embodiment;

[0037] Figure 7 This is a flowchart illustrating an IPM recovery control method provided in an embodiment of this application;

[0038] Figure 8 This is a schematic diagram of the structure of an IPM control system provided in an embodiment of this application. Detailed Implementation

[0039] To make the objectives, implementation methods and advantages of this application clearer, the exemplary implementation methods of this application will be clearly and completely described below with reference to the accompanying drawings of the exemplary embodiments of this application. Obviously, the described exemplary embodiments are only some embodiments of this application, and not all embodiments.

[0040] It should be noted that the brief descriptions of terms in this application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise stated, these terms should be understood in their ordinary and common meaning.

[0041] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover but not exclusively include, for example, a product or device that includes a series of components is not necessarily limited to those that are explicitly listed, but may include other components that are not explicitly listed or that are inherent to such product or device.

[0042] IPMs utilize power switching elements such as Insulated Gate Bipolar Transistors (IGBTs), which combine the advantages of high-power transistors (GTRs) (high current density, low saturation voltage, and high voltage withstand capability) with those of field-effect transistors (MOSFETs) (high input impedance, high switching frequency, and low drive power). Existing IPMs integrate logic, control, detection, and protection circuitry (located in the low-side driver chip), offering ease of use. This not only reduces system size and development time but also significantly enhances system reliability, aligning with the current development trend of power devices—modularization, composite design, and power integrated circuits (PICs). Therefore, they are commonly used in high-current, high-voltage circuit structures. However, when the load malfunctions, such as a short circuit, the IGBT may experience excessive current exceeding its rated capacity, potentially leading to damage.

[0043] In related technologies, considering that when the driver chip (Integrated Circuit Chip, IC) in an IPM is separated on the high and low sides, the detection of abnormal states on the high side usually relies on the external microcomputer control to output corresponding control signals. The delay time between the detection from the (low-side protection circuit) and the actual IGBT power-on shutdown is relatively long, easily leading to damage due to exceeding the IGBT's withstand range. Related technologies propose setting a detection circuit on the high side to detect the potential change at the output terminal of the high-side IGBT and use this potential change to cut off the high-side IGBT, achieving rapid protection control. While the above-mentioned technologies solve the problem of the high-side IGBT quickly entering current protection mode and avoiding IGBT damage, this results in the high-side IGBT remaining in current protection mode for an excessively long time. If the abnormal situation disappears (e.g., the load short-circuit fault has been eliminated), the high-side power components of the IPM cannot be restored to operation in time, causing the IPM to malfunction and affecting the performance and stability of the entire circuit.

[0044] In view of this, embodiments of this application provide an IPM based on power-on reset control, a recovery control method, and an IPM control system. The IPM includes a first IGBT and a high-side driver chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driver chip for driving the first IGBT to turn on or off. The collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, thus connecting the first and second IGBTs in series. The high-side driver chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driver module electrically connected to the gate of the first IGBT. The detection circuit has one end connected to the wire connecting the first and second IGBTs, and the other end connected to the circuit protection and power-on reset circuit. It detects changes in the emitter potential of the first IGBT and outputs a first protection signal to the circuit protection and power-on reset circuit based on these changes. The circuit protection and power-on reset circuit has one end connected to the detection circuit and the signal input terminal, and the other end connected to the high-side drive module. Upon receiving the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power to the first IGBT, placing the first IGBT in a current protection state. It also receives a power-on reset signal when the first IGBT is powered on again. This power-on reset signal resets the initial state of the circuit protection and power-on reset circuit, disabling the first protection signal. The circuit then transmits the first drive signal received from the signal input terminal to the high-side drive module, causing the high-side drive module to turn the first IGBT on or off according to the first drive signal. In this process, by setting up the circuit protection and power-on reset circuit in the high-side drive chip, rapid protection against abnormal states of the high-side IGBT is achieved. Furthermore, when the high-side IGBT is powered on, it can automatically recover upon power-on, effectively solving the problem of the high-side power switching element failing to resume operation in a timely manner, thus affecting the performance and stability of the entire IPM circuit. Furthermore, the detection circuit, circuit protection, and power-on reset circuit in this embodiment are integrated into the high-side driver chip, eliminating the need for additional terminals to receive external detection or recovery signals, while also meeting the small package requirements of the IPM.

[0045] The technical solutions of this application will be described in detail below with reference to specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0046] Please refer to Figures 1-6, Figure 1 This illustration shows a schematic diagram of an IPM based on power-on reset control according to an embodiment of this application. Figure 1 As shown, the IPM100 includes a first IGBT 110 and a high-side driver chip 120 for driving the first IGBT 110 to turn on or off, a second IGBT 130 and a low-side driver chip 140 for driving the second IGBT 130 to turn on or off; wherein, the collector of the first IGBT 110 is connected to the first power supply terminal (VDC), the emitter of the second IGBT 130 is grounded (GND), and the emitter of the first IGBT 110 is connected to the collector of the second IGBT 130. The first IGBT 110 and the second IGBT 130 are connected in series via an electro-galvanic connection. The high-side drive chip 120 includes a signal input terminal 121, a detection circuit 123, a circuit protection and power-on reset circuit 124, and a high-side drive module 125 electrically connected to the gate of the first IGBT 110. One end of the detection circuit 123 is connected to the wire connecting the first IGBT 110 and the second IGBT 130, and the other end is connected to the circuit protection and power-on reset circuit 124, for detecting the... The circuit protects and resets the first IGBT 110 by detecting the emitter potential change and outputting a first protection signal to the circuit protection and power-on reset circuit 124 based on the emitter potential change. The circuit protection and power-on reset circuit 124 has one end connected to the detection circuit 123 and the signal input terminal 121, and the other end connected to the high-side drive module 125. Upon receiving the first protection signal transmitted by the detection circuit 123, it outputs a first cut-off signal to the high-side drive module 120 to cut off the power supply to the high-side drive chip 120, thus placing the first IGBT 110 in a current protection state. It also outputs a power-on reset signal transmitted by the high-side drive module 120 when the first IGBT is re-energized. This power-on reset signal resets the initial state of the circuit protection and power-on reset circuit 124, disabling the first protection signal, and transmits the first drive signal received from the signal input terminal 121 to the high-side drive module 125, causing the high-side drive module 125 to drive the first IGBT 110 to turn on or off according to the first drive signal.

[0047] In this embodiment, the high-side driving chip and the first IGBT, the low-side driving chip and the second IGBT constitute a half-bridge circuit and are connected to the load. Under normal operating conditions, the first IGBT and the second IGBT are turned on or off based on the driving action of their respective driving chips, thereby driving the load. To address the issue of rapid circuit protection for high-side IGBTs under abnormal conditions, related technologies employ a detection circuit to monitor the emitter potential (Vs potential, corresponding to the output of the high-side power switching element, which is relatively stable under normal conditions, i.e., remains unchanged within a certain range) of the high-side IGBT. This achieves efficient protection control of the high-side IGBT, reducing device damage caused by protection delays. However, the lack of a rapid recovery mechanism for the high-side IGBT after it is placed in the protection state may affect the stability of the entire IPM circuit. Therefore, the IPM provided in this application provides a circuit protection and power-on reset circuit that can be used in conjunction with the detection circuit. This allows the high-side IGBT to quickly enter the current protection state while simultaneously achieving automatic power-on recovery control, enabling the high-side IGBT to quickly resume operation.

[0048] The circuit protection and power-on reset circuits, connected to the detection circuit, signal input terminal, and high-side drive module, can achieve both circuit protection and recovery control. Optionally, the high-side drive module can be equipped with a power cut-off circuit. When a first cut-off signal is received (i.e., the first cut-off signal is triggered), the power cut-off circuit will cut off the power supply to the high-side drive chip or the power supply to the first IGBT. Taking the cutting off of the power supply to the first IGBT as an example, the power cut-off circuit can control the power line of the first IGBT by using switching devices (such as transistors) or relays (for example, the switching device can be placed between the collector and the power supply of the first IGBT). In this embodiment, the first protection signal can be a voltage signal corresponding to the Vs potential, and the first cut-off signal can be a cut-off signal that converts the first protection signal (which can be converted by logic gates, comparators, etc.) to control the high-side drive module to cut off the power supply. When the first IGBT is powered on again (a logic circuit can be set in the high-side drive module, and the control logic can control the first IGBT to reconnect to the power supply when the abnormality is recovered), optionally, the high-side drive module or other modules can be used to transmit the power-on reset signal to the circuit protection and power-on reset circuit to realize the reset of the protection signal of the circuit protection and power-on reset circuit. This effectively avoids the circuit protection and power-on reset circuit from still being based on the previous protection signal after power-on, causing the first IGBT to continue to be in the current protection state, thus realizing the rapid recovery of the IGBT operation.

[0049] The principle of the detection circuit is as follows: when the load connected to the first IGBT is abnormal, the Vs potential of the high-side power switching element will change. For example, under normal operating conditions, the Vs potential is high (e.g., 20V, which can be determined according to the actual application). When the load is short-circuited, the current increases sharply, causing the Vs potential to drop sharply. This embodiment, by setting up a detection circuit, can quickly determine the abnormal state of the high-side power switching element by detecting the change in Vs potential, and transmit a cut-off signal to the high-side driver chip in real time to cut off the high-side power switching element. This eliminates the need to transmit protection signals to the high side through the low-side protection circuit and control microcomputer, thus avoiding damage to the high-side power switching element due to signal delay and other issues. Optionally, the detection circuit can use a constant current source structure for detection. Optionally, the detection circuit in this embodiment can be connected to the wire connecting the first and second IGBTs through the high-side floating power return terminal of the high-side driver chip, without adding a new terminal in the high-side driver chip to detect the Vs potential of the first IGBT.

[0050] The working principle of an IGBT is to control the conduction and cutoff states of the device by controlling the voltage at the gate. The signal input terminal receives a first drive signal (HIN). In this embodiment, the first drive signal can be either a high-level signal or a low-level signal. A high-level signal applies a positive voltage to the gate, forming a conduction channel, allowing current to flow through the device; a low-level signal applies a negative voltage to the gate, closing the conduction channel and placing the device in the cutoff state. When the IGBT is in current protection mode, it stops operating regardless of whether the first drive signal is a high-level signal to turn it off or a low-level signal to turn it off.

[0051] In one alternative implementation, such as Figure 2aAs shown, the circuit protection and power-on reset circuit 124 may include an analog switch 1241, a latch 1242, and an AND gate 1243. One end of the analog switch 1241 is connected to the detection circuit 123 and the signal input terminal (receiving HIN), and the other end is connected to one end of the latch 1242. It receives the first drive signal transmitted from the signal input terminal 121, and when the first drive signal is a signal to turn on the first IGBT, it connects to the detection circuit 123, receives and transmits the first protection signal (Vsen) and the first drive signal (HIN) to the latch 1242. The other end of the latch 1242 is connected to the power supply terminal 122 and the AND gate 1243. It latches the first protection signal when it receives the first protection signal, and receives the power-on reset signal (POWER On) from the power supply terminal 122. The AND gate 1243, with one end connected to the latch 1242 and the signal input terminal 121 and the other end connected to the high-side drive module 125, outputs the first protection signal to the high-side drive module when the first protection signal in the latch 1242 is valid, thereby cutting off the power supply to the first IGBT and placing the first IGBT in a protected state. When the first protection signal in the latch 1242 is invalid, the first drive signal from the signal input terminal 121 is output to the high-side drive module 125, causing the high-side drive module 125 to drive the first IGBT 110 to turn on or off according to the first drive chip 120.

[0052] In this embodiment, by setting an analog switch, when the drive signal (HIN) of the first IGBT is ON, the analog switch connects to the detection circuit, making the first protection signal (Vsen) valid. This first protection signal (Vsen) is latched in the latches of the protection circuit and the power-on reset circuit. When the first protection signal is valid, the cut-off signal output by the AND gate combines the first protection signal and the drive signal. Since the power supply to the first IGBT is cut off after the cut-off signal is output, the first IGBT stops operating regardless of whether the drive signal is an ON or OFF signal. Optionally, the AND gate can also be connected to the high-side drive module via a level conversion device. After level conversion, the corresponding cut-off signal is output to the high-side drive module to provide a suitable cut-off signal.

[0053] When the first IGBT is powered on again (e.g., by cutting off the power supply to the high-side driver chip using a cut-off signal output from the high-side driver module, or by cutting off the current path of the first IGBT, etc.), the high-side driver module sends a power-on reset signal to the latch of the current protection and power-on reset circuit, causing the latch to reset the protection signal, i.e., the first protection signal becomes invalid. After the first IGBT is powered on, the circuit protection and power-on reset circuit will no longer send a cut-off signal to the high-side driver module, allowing the first IGBT to resume operation. If the detection circuit does not detect a new Vs potential change at this time, the signal output by the AND gate, i.e., the HIN signal, is used to turn the first IGBT on or off, thereby achieving rapid recovery of the first IGBT's operation. The timing diagram of the circuit protection and power-on reset circuit is as follows: Figure 2b As shown.

[0054] In an optional embodiment, the signal input terminal 121 is further configured to transmit a second drive signal for turning off the first IGBT 110 to the circuit protection and power-on reset circuit 124 when the first IGBT 110 is powered on again, so that the circuit protection and power-on reset circuit 124 resumes drive control of the first IGBT 110 based on the second drive signal when the power is restarted.

[0055] Considering that upon power-on, if the HIN signal is in the ON state (HIN of the first IGBT), the Vsen signal may be in an overcurrent state due to the power restart, causing the circuit to start operating in a false alarm state. To prevent the circuit from starting in a false alarm state and causing the first IGBT to continue entering the protection state, this embodiment controls the signal input terminal to the IGBT OFF state (i.e., turning off the second drive signal of the first IGBT) upon power-on, enabling the first IGBT to efficiently resume operation.

[0056] For example, such as Figure 3The detection circuit 123 includes a constant voltage source circuit 311, a current control circuit 312, and a potential detection circuit 313. The current control circuit 312 includes a current control element 3121 and an operational amplifier 3122 electrically connected to the current control element 3121. One end of the current control circuit 312 is connected via the current control element 3121 to the wire between the first IGBT 110 and the second IGBT 130 (shown as connected to the emitter of the first IGBT 110 in the diagram), for detecting the Vs potential of the first IGBT 110. The other end is connected via the operational amplifier 3122 to the constant voltage source circuit 311. The potential detection circuit 313 has one end connected to the current control element 3121 and the other end connected to the circuit protection and power-on reset circuit 124.

[0057] When the Vs potential of the first IGBT changes, the operational amplifier 3122 outputs a corresponding level signal to the current control element 3121 based on the constant voltage source circuit 311, so as to adjust the resistance value of the current control element 3121 and provide a constant current for the current path; the potential detection circuit 313 detects the gate potential change after the current control element 3121 adjusts the resistance value, and detects the Vs potential change of the first IGBT 110 based on the gate potential change.

[0058] Specifically, in combination Figure 4 As shown, the current control circuit 312 uses a voltage divider circuit to control the current. Specifically, the current control circuit 312 also includes a first resistor R1 and a second resistor R2, and the current control element 3121 is a second MOSFET M1; the constant voltage source circuit 311 includes a first constant voltage source V2; wherein, one end of the first resistor R1 is connected to the wire between the first power switching element 320 and the second power switching element 350, and the other end is connected to the drain of the second MOSFET, so that the second MOSFET M1 is connected to the wire between the first power element 330 and the second power element 350 through the resistor R1; the second resistor R2 is connected to the second MOSFET M1 through the voltage divider circuit. The source of transistor M1 is connected to the ground terminal at the other end; the operational amplifier U2 (i.e., operational amplifier 3122) has its first input terminal connected to the wire between the source of the second MOS transistor M1 and the second resistor R2; its second input terminal connected to the first constant voltage source V2; and its output terminal connected to the wire between the gate of the second MOS transistor M1 and the potential detection circuit 313; when the gate of the second MOS transistor M1 receives the level signal output by the operational amplifier U2, the potential rise of the gate of the second MOS transistor M1 is controlled to turn on or the potential fall is controlled to turn off, so as to adjust to the resistance value.

[0059] In this embodiment, R1 (e.g., 5kΩ), M1, and R2 (e.g., 22Ω) form a voltage divider circuit. By controlling the on / off state of the MOSFET, the current in the R1, M1, and R2 loops is always the same. When the potential of Vs is sufficiently high (normal state), the operational amplifier U2 lowers the gate potential of M1, ensuring that the constant current determined by R2 and V2 is maintained. The current flows through the path. Clearly, the current flowing through this path is also limited by R1. Therefore, when the Vs potential drops (due to abnormal conditions such as a load short circuit) and the current limited by R1 is less than the constant current determined by R2 and V2, operational amplifier U2 controls the rising potential (i.e., the gate potential of M1) to bring M1 to a fully ON state (i.e., turn on M1), thereby reducing the resistance of M1 and ensuring a constant current throughout the entire current path.

[0060] Further, the potential detection circuit 313 includes a third resistor R3 and a fourth resistor R4; one end of the third resistor R3 is connected to the gate of the MOS switch M1, and the other end is connected to the fourth resistor R4; the operational amplifier U2 has its output terminal specifically connected to the wire between the gate of the second MOS transistor M1 and the third resistor R3; the circuit protection and power-on reset circuit is specifically connected to the wire between the third resistor and the fourth resistor, so that the detection circuit is connected to the circuit protection and power-on reset circuit; wherein, the potential change (VR4) at the connection point of the circuit protection and power-on reset circuit connected to the wire between the third resistor and the fourth resistor corresponds to the potential change Vg of the gate, and the potential change Vg of the gate is used to determine the potential change Vs of the second terminal.

[0061] In this embodiment, the potential detection circuit 313 can employ a voltage divider circuit with M1 (gate) to detect the potential of M1. Specifically, the potential detection circuit 313 includes R3 (e.g., 300Ω) and R4 (e.g., 200Ω) connected in series with M1 (gate). The potential point Vg of M1 (gate) and the potential point VR4 of R4 are divided by a voltage divider. Utilizing the potential of R4, according to the principle of the voltage divider circuit, the current at point Vg is equal to the current at point VR4, that is, Vg / (R3+R4)=VR4 / R4. By detecting the voltage change at point VR4, the voltage change at point Vg can be obtained.

[0062] In other embodiments, the potential detection circuit can adopt other potential detection structures besides the circuit structure described above, which will not be elaborated here.

[0063] In one optional embodiment, the potential detection circuit 313 further includes an inverter A1. The input terminal of inverter A1 is connected to the wire between the third resistor R3 and the fourth resistor R4, and its output terminal is connected to the circuit protection and power-on reset circuit. This allows the circuit protection and power-on reset circuit to be connected to the wire between the third resistor R3 and the fourth resistor R4 via the inverter. The inverter A1 is used to invert the potential change Vg of the gate to obtain the first cutoff signal, and outputs the first cutoff signal to the high-side driver chip. Specifically, the inverted potential change (the output signal SEN of the potential detection circuit 313) corresponds to the potential change Vs. This SEN signal is output to the circuit protection and power-on reset circuit 124 to provide current protection for the high-side power components.

[0064] As can be understood, as mentioned in the above embodiments, when the Vs potential drops sharply, the gate potential (i.e., Vg) of M1 needs to be raised by the operational amplifier outputting a high level. In other words, when the Vs potential is low, the Vg potential is high, and the two are negatively correlated. However, the Vg potential and the voltage divider of VR4 are positively correlated. Therefore, the VR4 or its corresponding Vg potential detected in the above embodiments are opposite to the Vs potential that needs to be detected. In order to further improve the output efficiency of the cut-off signal, this embodiment adds an inverter A1. By inverting the VR4 potential, VSEN is obtained and output, which can be directly used as the cut-off signal output corresponding to the Vs potential.

[0065] In other embodiments, it may be unnecessary to set up an inverter; the VR4 potential can be processed in other ways and then output as a cutoff signal.

[0066] Furthermore, the detection circuit may further include a capacitor C1, one end of which is connected to the wire connecting the circuit protection and power-on reset circuit to the third resistor and the second resistor, and the other end of which is connected to the ground terminal, for filtering the detected potential change of the fourth resistor. In this embodiment, the capacitance of capacitor C1 can be 100pF or other values. C1 acts as a filter capacitor, and through filtering, it can remove or amplify the signal, making the output signal more accurate.

[0067] Furthermore, the constant voltage source circuit 311 also includes a second constant voltage source V1; the operational amplifier U2 has its third input terminal connected to the second constant voltage source V1 and its fourth input terminal connected to the ground terminal, so that its output terminal outputs the level signal corresponding to the second constant voltage source or the ground terminal to the current control element.

[0068] Combination Figure 4As shown, operational amplifier U2 includes four input terminals: two signal input terminals (positive and negative input terminals) and two power supply input terminals (positive and negative power supply input terminals). The positive input terminal (i.e., the second input terminal) and the negative input terminal (i.e., the first input terminal) are connected to the branches of M1 and R2, respectively, and to the first constant voltage source V2. By comparing the voltage between R2 and the first constant voltage source, when the voltage at point R2 drops below V2 (for example, V2 is a 0.5V constant voltage source, and the voltage at R2 is less than 0.5V), the second constant voltage source V1 (e.g., 12V) connected to the positive power supply input terminal outputs a high level of 12V at the output terminal, causing the gate potential of M1 to rise, thereby keeping the current in the current path constant. Figure 4 In the example, a third constant voltage source V3 is also set, with one end of the third constant voltage source V3 connected to Vs and the other end grounded.

[0069] Furthermore, to improve the operational stability of the high-side driver chip 120, in addition to the aforementioned components, this embodiment may also include signal input circuits, filter circuits, level conversion circuits, and other circuit structures. Specifically, such as... Figure 5 As shown, the high-side drive signal 120 may further include a filter circuit 126; wherein, one end of the filter circuit 126 is connected to the signal input terminal 121, and the other end is connected to the circuit protection and power-on reset circuit 124, so that the circuit protection and power-on reset circuit 124 receives the filtered first drive signal after filtering the first drive signal through the filter circuit 126.

[0070] Optionally, it may also include a signal input circuit 122, which, together with the signal input terminal 121 and the filter circuit 126, first converts the first drive signal input from the signal input terminal into a suitable voltage, current or frequency and then outputs it to the filter circuit for filtering. The current input circuit may include circuit components such as rectifiers and transformers, as detailed in the prior art, which will not be elaborated here.

[0071] In this embodiment, the filter circuit may include a dead time and a low-pass filter (DT&LPF). The dead time is a short delay period set when switching the upper and lower bridge power switching elements (i.e., the first IGBT and the second IGBT). This delay prevents a short circuit caused by both IGBTs conducting simultaneously. The dead time effectively prevents the two switching devices in the circuit from conducting simultaneously, thus avoiding transient overcurrent and circuit damage. The low-pass filter filters out high-frequency noise or interference signals to ensure the stability and accuracy of the output signal. It allows low-frequency signals to pass while blocking high-frequency signals to achieve the filtering effect. When driving the first IGBT, the low-pass filter helps smooth the output signal, reduce electromagnetic interference, and improve the system's performance and stability.

[0072] Optionally, the high-side drive chip 120 may further include a level conversion circuit 127, one end of which is connected to the circuit protection and power-on reset circuit, and the other end of which is connected to the high-side drive module 125. This allows the high-side drive module 125 to perform level conversion on the first drive signal transmitted by the circuit protection and power-on reset circuit 124 through the level conversion circuit 127, and then drive the first IGBT transistor 110 to turn on or off based on the level-converted first drive signal.

[0073] The level conversion circuit may include a high-level conversion logic module and a high-level conversion module connected in sequence. The high-level conversion logic module may be a logic gate circuit used to control the level of the output signal according to the logic state of the input signal (such as logic high or logic low), ensuring that the input drive signal meets the control logic requirements of the first IGBT. The high-level conversion module may include a level converter or amplifier circuit to convert the logic level signal after high-level conversion logic into a high-level signal sufficient to drive the first IGBT, thereby ensuring stable and reliable conduction and cutoff of the first IGBT and preventing malfunctions or damage.

[0074] In a preferred embodiment, the high-side driver chip 120 further includes a second power supply terminal (VCC) and a pull-up resistor 129. One end of the pull-up resistor (Reg) 129 is connected to the second power supply terminal (VCC), and the other end is connected to the circuit protection and power-on reset circuit 124, so that the circuit protection and power-on reset circuit remains in the signal state corresponding to the pull-up resistor 129 when it is not connected.

[0075] Understandably, in this embodiment, the second power supply terminal VCC is typically a low-voltage input power supply used to receive external signals. In the high-side driver chip, the first power supply terminal is a high-voltage VDC, providing input power to the high-side IGBT. The second power supply terminal VCC can amplify the power supply voltage using a diode circuit (BSD&R) to output the high-voltage gate drive power supply VB to the IGBT from the high-side driver chip.

[0076] In this embodiment, by connecting the pull-up resistor to the second power supply terminal of the high-side driver chip, a stable logic high level can be provided through the first power supply when there is no external signal input. Connecting the circuit protection and power-on reset circuit to the pull-up resistor ensures that the chip's input terminal remains at a high level unless actively pulled low, effectively preventing the input terminal from floating or being in an undefined state, thereby improving the stability and reliability of the circuit. That is, pulling the input terminal high to a logic high level when there is no external signal input ensures normal chip operation.

[0077] In addition, the pull-up resistor 129 can also be connected to signal input circuit 122, filter circuit 126 and detection circuit 123, etc., and the principle is similar, so it will not be described in detail here.

[0078] In one feasible implementation, the connection method between the pull-up resistor Reg and the circuit protection and power-on reset circuit is as follows: Figure 6 As shown, the pull-up resistor Reg can be connected between the analog switch 1241 and the latch 1242. When the HIN signal turns on the analog switch 1241, it transmits the first protection signal. However, when it turns off, the output of the analog switch is in an open circuit state. The resistance of the pull-up resistor Reg is determined for the circuit connected to it. By connecting the pull-up resistor Reg between the analog switch 1241 and the latch 1242, the state when the switch is off is determined. In other words, when the switch is off, the state of this part becomes the Reg voltage, and the connected circuit is kept at a high level (it can be at a potential state of about 0V (low level) or about 5V (high level), which can provide a basis for the operation of the latch logic). This can effectively improve the stability of the circuit.

[0079] The above embodiments illustrate the IPM structure corresponding to the half-bridge circuit, enabling overcurrent protection and fast recovery control of the first IGBT. The embodiments of this application will now be described in conjunction with the full-bridge circuit:

[0080] Figure 6 This is a schematic diagram of another IPM structure provided in an embodiment of this application, as shown below. Figure 6 As shown, IPM100, in addition to Figure 1In addition to the circuit structure shown, it may also include a third IGBT 150 and a fourth IGBT 160. The collector of the third IGBT 150 is connected to the first power supply terminal, the emitter of the fourth IGBT 160 is grounded, and the emitter of the third IGBT 150 is electrically connected to the collector of the fourth IGBT 160, so that the third IGBT 150 and the fourth IGBT 160 are connected in series. The high-side drive chip 120 also includes a second high-side drive module 125 connected to the third IGBT 150. The detection circuit 123 has one end connected to the wire connecting the third IGBT 150 and the fourth IGBT 160, for detecting the emitter potential change of the third IGBT 150, and outputting a second protection signal to the circuit protection and power-on reset circuit 124 according to the emitter potential change. The other end of the circuit protection and power-on reset circuit 124 is also... Connected to the high-side drive module 125, the chip is configured to output a second cut-off signal to the high-side drive module 125 when receiving the second protection signal transmitted by the detection circuit 123, thereby cutting off the power supply to the third IGBT 150 and placing the third IGBT 150 in a current protection state; and to receive a power-on reset signal transmitted by the high-side drive module 125 when the third IGBT 150 is powered on again, the power-on reset signal being used to reset the initial state of the circuit protection and power-on reset circuit 124, causing the second protection signal to fail, and transmitting the second drive signal received from the signal input terminal 121 to the high-side drive module 125, so that the high-side drive module 125 drives the third IGBT 150 to turn on or off according to the second drive signal; the low-side drive chip 140 is also electrically connected to the fourth IGBT 160 and is used to drive the fourth IGBT 160 to turn on or off.

[0081] In this embodiment, the low-side driving chip can receive the third driving signal and the fourth driving signal to drive the second IGBT and the fourth IGBT to turn on or off, respectively.

[0082] It should be noted that the principle of the full-bridge circuit structure provided in this embodiment is similar to that of the embodiments described above, and the relevant content can be found in the embodiments described above. It can provide current protection and fast recovery control for the first and third IGBTs on the high side, effectively reducing the delay of high-side IGBT circuit protection based on the low-side driver chip, and achieving fast recovery operation of the high-side IGBTs.

[0083] In some embodiments, the technical solution provided in this embodiment can also be applied to other circuit structures, such as a three-phase bridge circuit structure, and this embodiment does not make any special limitation on this.

[0084] Figure 7 This application provides an embodiment of an IPM recovery control method. The IPM may include a first IGBT and a high-side driver chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driver chip for driving the first IGBT to turn on or off; wherein, the collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, so that the first IGBT and the second IGBT are connected in series; the high-side driver chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driver module electrically connected to the gate of the first IGBT; the method includes:

[0085] Step S701: The detection circuit detects the change in the emitter potential of the first IGBT transistor and outputs a first protection signal to the circuit protection and power-on reset circuit according to the change in the emitter potential.

[0086] Step S702: When the circuit protection and power-on reset circuit receives the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT transistor, so that the first IGBT transistor is placed in the current protection state.

[0087] Step S703: When the first IGBT is powered on again, the circuit protection and power-on reset circuit receives a power-on reset signal. The power-on reset signal is used to reset the initial state of the circuit protection and power-on reset circuit, so that the first protection signal is disabled, and transmits the first drive signal received from the signal input terminal to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive signal.

[0088] In one embodiment, the circuit protection and power-on reset circuit includes an analog switch, a latch, and an AND gate; the execution steps of the circuit protection and power-on reset circuit in this embodiment may include the following steps:

[0089] The analog switch receives the first drive signal transmitted from the signal input terminal, and when the first drive signal is a signal to turn on the first IGBT, it connects to the detection circuit, receives and transmits the first protection signal and the first drive signal to the latch.

[0090] When the latch receives the first protection signal, it latches the first protection signal; and when it receives the power-on reset signal from the high-side drive module, it causes the latched first protection signal to fail.

[0091] When the first protection signal in the latch is valid, the AND gate transmits the first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT, so that the first IGBT is placed in a protected state.

[0092] When the first protection signal in the latch fails, the AND gate outputs the first drive signal at the signal input terminal to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive chip.

[0093] The method provided in this application embodiment is similar in principle and technical effect to the IPM embodiment described above, and the relevant descriptions can be used accordingly. Figures 1-6 The details of the description will not be repeated here.

[0094] Figure 8 An embodiment of the present application provides an IPM control system, such as... Figure 8 As shown, the IPM control system 800 includes the IPM 100 and a load device 200, the load device 200 being electrically connected to the first IGBT tube.

[0095] The IPM control system provided in this application embodiment is similar in implementation principle and technical effect to the above-described IPM embodiment, and the relevant descriptions can be found in the corresponding descriptions. Figures 1-6 The details of the description will not be repeated here.

[0096] This application also provides a computer-readable storage medium, which may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk. Specifically, the computer-readable storage medium stores computer-executable instructions, which are used for the IPM recovery control method in the above embodiments. Related descriptions can be found in the relevant documentation. Figures 1-6 The relevant descriptions and effects in the corresponding device embodiments are understood and will not be elaborated further here.

[0097] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

[0098] For ease of explanation, the above description has been provided in conjunction with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific forms disclosed above. Various modifications and variations can be obtained based on the above teachings. The selection and description of the above embodiments are for the purpose of better explaining the principles and practical applications, thereby enabling those skilled in the art to better utilize the described embodiments and various different variations of embodiments suitable for specific use considerations.

Claims

1. A smart power module (IPM) based on power-on reset control, characterized in that, The device includes a first IGBT and a high-side driver chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driver chip for driving the second IGBT to turn on or off; wherein, the collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, so that the first IGBT and the second IGBT are connected in series; the high-side driver chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driver module electrically connected to the gate of the first IGBT; the gate of the second IGBT is connected to the low-side driver chip; The detection circuit has one end connected to the wire connecting the first IGBT and the second IGBT, and the other end connected to the circuit protection and power-on reset circuit. It is used to detect the change in the emitter potential of the first IGBT and output a first protection signal to the circuit protection and power-on reset circuit according to the change in the emitter potential. The circuit protection and power-on reset circuit has one end connected to the detection circuit and the signal input terminal, respectively, and the other end connected to the high-side drive module. When it receives the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT, placing the first IGBT in a current protection state. It also receives a power-on reset signal when the first IGBT is re-energized. This power-on reset signal resets the initial state of the circuit protection and power-on reset circuit, disabling the first protection signal, and transmits the first drive signal received from the signal input terminal to the high-side drive module, causing the high-side drive module to drive the first IGBT to turn on or off according to the first drive signal.

2. The intelligent power module (IPM) according to claim 1, characterized in that, The circuit protection and power-on reset circuit includes an analog switch, a latch, and an AND gate; The analog switch has one end connected to the detection circuit and the signal input terminal respectively, and the other end connected to one end of the latch. It is used to receive the first drive signal transmitted by the signal input terminal, and when the first drive signal is a signal to turn on the first IGBT, it connects to the detection circuit, receives and transmits the first protection signal and the first drive signal to the latch. The latch, with its other end connected to the high-side drive module and the AND gate respectively, is used to latch the first protection signal when the first protection signal is received, and to receive a power-on reset signal from the high-side drive module, so that the latched first protection signal is invalidated. The AND gate has one end connected to the latch and the signal input terminal, and the other end connected to the high-side drive module. When the first protection signal in the latch is valid, the AND gate transmits the first cut-off signal to the high-side drive module to cut off the power to the first IGBT, so that the first IGBT is in a protected state. When the first protection signal in the latch fails, the first drive signal at the signal input terminal is output to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive signal.

3. The intelligent power module (IPM) according to claim 1 or 2, characterized in that, The signal input terminal is also used to transmit a second drive signal to the circuit protection and power-on reset circuit to turn off the first IGBT when the first IGBT is powered on again, so that the circuit protection and power-on reset circuit can resume drive control of the first IGBT based on the second drive signal when the power is restarted.

4. The intelligent power module (IPM) according to claim 1 or 2, characterized in that, The high-side driving chip also includes a filter circuit; The filter circuit has one end connected to the signal input terminal and the other end connected to the circuit protection and power-on reset circuit, so that the circuit protection and power-on reset circuit receives the filtered first drive signal after filtering the first drive signal through the filter circuit.

5. The intelligent power module (IPM) according to claim 4, characterized in that, The high-side driving chip also includes a level conversion circuit. One end of the level conversion circuit is connected to the circuit protection and power-on reset circuit, and the other end is connected to the high-side driving module. This allows the high-side driving module to convert the level of the first driving signal transmitted by the circuit protection and power-on reset circuit through the level conversion circuit, and then drive the first IGBT to turn on or off based on the level-converted first driving signal.

6. The intelligent power module (IPM) according to claim 5, characterized in that, The high-side driver chip also includes a second power supply terminal and a pull-up resistor. One end of the pull-up resistor is connected to the second power supply terminal, and the other end is connected to the circuit protection and power-on reset circuit, so that the circuit protection and power-on reset circuit maintains the signal state corresponding to the pull-up resistor when it is not connected.

7. The intelligent power module (IPM) according to claim 1 or 2, characterized in that, The IPM also includes a third IGBT and a fourth IGBT. The collector of the third IGBT is connected to the first power supply terminal, the emitter of the fourth IGBT is grounded, and the emitter of the third IGBT is electrically connected to the collector of the fourth IGBT, so that the third IGBT and the fourth IGBT are connected in series. The high-side driver chip is also connected to the gate of the third IGBT. The detection circuit is also connected at one end to the wire connecting the third IGBT and the fourth IGBT, for detecting the emitter potential change of the third IGBT and outputting a second protection signal to the circuit protection and power-on reset circuit according to the emitter potential change. The circuit protection and power-on reset circuit is connected at one end to the high-side drive module. When the second protection signal transmitted by the detection circuit is received, the circuit outputs a second cut-off signal to the high-side drive module to cut off the power supply of the third IGBT tube, so that the third IGBT tube is placed in the current protection state. And, when the third IGBT is powered on again, it is used to receive a power-on reset signal transmitted by the high-side drive module. The power-on reset signal is used to reset the initial state of the circuit protection and power-on reset circuit, so that the second protection signal is disabled, and to transmit the second drive signal received from the signal input terminal to the high-side drive module, so that the high-side drive module drives the third IGBT to turn on or off according to the second drive signal. The low-side driving chip is also electrically connected to the fourth IGBT transistor and is used to drive the fourth IGBT transistor to turn on or off.

8. A recovery control method for IPM, characterized in that, The IPM includes a first IGBT and a high-side driver chip for driving the first IGBT to turn on or off, a second IGBT and a low-side driver chip for driving the second IGBT to turn on or off; wherein, the collector of the first IGBT is connected to a first power supply terminal, the emitter of the second IGBT is grounded, and the emitter of the first IGBT is electrically connected to the collector of the second IGBT, such that the first IGBT and the second IGBT are connected in series; the high-side driver chip includes a signal input terminal, a detection circuit, a circuit protection and power-on reset circuit, and a high-side driver module electrically connected to the gate of the first IGBT; the gate of the second IGBT is connected to the low-side driver chip; the method includes: The detection circuit detects the change in the emitter potential of the first IGBT transistor and outputs a first protection signal to the circuit protection and power-on reset circuit based on the change in emitter potential. When the circuit protection and power-on reset circuit receives the first protection signal transmitted by the detection circuit, it outputs a first cut-off signal to the high-side drive module to cut off the power supply to the first IGBT, so that the first IGBT is placed in a current protection state. The circuit protection and power-on reset circuit receives a power-on reset signal when the first IGBT is powered on again. The power-on reset signal is used to reset the initial state of the circuit protection and power-on reset circuit, causing the first protection signal to fail, and transmits the first drive signal received from the signal input terminal to the high-side drive module, so that the high-side drive module drives the first IGBT to turn on or off according to the first drive signal.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, implement the IPM recovery control method of claim 8.

10. An IPM control system, characterized in that, Includes the IPM as described in any one of claims 1-7 and a load device, wherein the load device is electrically connected to the first IGBT tube.

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