A structure adjustment method, medium and system of a monolithic integrated inverse-conducting GaN-HEMT power device

Abstract

The application provides a structure adjustment method, medium and system of a monolithic integrated inverse-conducting GaN-HEMT power device, and belongs to the technical field of GaN-HEMT power devices, and comprises the following steps: a heat flow model and a heat dissipation path topology of the internal structure of a GaN-HEMT chip are established, and a key path analysis algorithm is used to calculate and identify the main bottleneck area of heat dissipation; an upper model with the optimal heat dissipation as the target and a lower model with the lowest drain current of the GaN-HEMT as the target are established, and the constraint conditions of the upper model and the lower model are determined; the micron-level metal heat sink parameters, the micro-channel cooling structure parameters and the vertical groove parameters formed by the source and drain regions of the GaN-HEMT are used as Alpha wolves, Beta wolves and Delta wolves of a grey wolf hunting algorithm, the grey wolf hunting algorithm is used to solve the game model, and the optimal solution obtained is used as an adjustment parameter.

Description

Technical Field

[0001] This invention belongs to the technical field of GaN-HEMT power devices, and specifically relates to a method, medium, and system for structural adjustment of a monolithically integrated reverse-conducting GaN-HEMT power device. Background Technology

[0002] Power devices are core components of modern power electronic systems, and their performance directly determines the performance of the entire system. Gallium nitride high electron mobility transistors (GaN-HEMTs), as an emerging wide-bandgap power device, have shown great promise in high-frequency, high-power-density power electronic applications due to their high breakdown voltage, low on-resistance, and fast switching characteristics. A typical GaN-HEMT power device structure mainly includes key structural layers such as a GaN semiconductor layer, an AlGaN barrier layer, an insulating layer, metal electrodes, and a metal heat sink.

[0003] GaN-HEMT devices generate significant power losses under high-frequency, high-power-density operation, leading to a sharp rise in internal temperature and severely impacting device reliability and lifespan. To address this issue, various heat dissipation optimization techniques have been proposed, such as using micron-sized metal heat sinks and microchannel cooling structures. These methods improve heat dissipation by increasing the device's heat dissipation area and enhancing convective heat transfer; however, they often require a large device area and involve complex manufacturing processes, resulting in high costs. On the other hand, researchers have also proposed forming vertical trench structures in the source and drain regions to reduce leakage current. However, this method also affects the heat dissipation path, leading to ineffective heat dissipation.

[0004] Therefore, existing heat dissipation optimization and leakage current reduction techniques each have their limitations and cannot simultaneously address the heat dissipation and leakage current characteristics of GaN-HEMT devices. A systematic design approach is urgently needed to solve this problem. Summary of the Invention

[0005] In view of this, the present invention provides a method, medium and system for structural adjustment of a monolithically integrated reverse-conducting GaN-HEMT power device, which can solve the technical problem that existing heat dissipation optimization and leakage current reduction technologies each have their limitations and cannot simultaneously take into account the heat dissipation and leakage current characteristics of GaN-HEMT devices.

[0006] This invention is implemented as follows:

[0007] The first aspect of the present invention provides a method for structural adjustment of a monolithically integrated inverse-conducting GaN-HEMT power device, comprising the following steps:

[0008] S10. Establish a heat flow model of the internal structure of the GaN-HEMT chip, and analyze the heat dissipation path and the heat dissipation bottleneck area.

[0009] S20. Based on the heat flow model, construct a heat dissipation path topology diagram inside the GaN-HEMT chip, wherein the edges of the topology diagram represent heat conduction paths, and the nodes represent heat sources, thermal resistances, or heat conduction units.

[0010] S30. Based on the topology map, the critical path analysis algorithm is used to calculate and identify the main bottleneck areas for heat dissipation;

[0011] S40. Establish an upper-level model with optimal heat dissipation as the objective. The optimal heat dissipation adjustment method is to optimize the topology by adding heat dissipation channels between two non-adjacent nodes with a step count of 2 to 3 between the nodes of the topology graph.

[0012] S50. Establish a lower-level model with the goal of minimizing the leakage current of GaN-HEMT. The adjustment method for minimizing the leakage current of GaN-HEMT is: to form a vertical trench structure in the source and drain regions to reduce the leakage current.

[0013] S60. Establish a game theory model, including the upper-level model and the lower-level model, and determine the constraints of the upper-level model and the lower-level model;

[0014] S70. Using the parameters of the micron-level metal heat sink, the parameters of the microchannel cooling structure, and the parameters of the vertical trenches formed by the source and drain regions of the GaN-HEMT as the Alpha wolf, Beta wolf, and Delta wolf of the gray wolf hunting algorithm, respectively, the game model is solved by the gray wolf hunting algorithm.

[0015] S80. The obtained optimal solution is used as the parameter for the vertical trench formed by the source and drain regions of the GaN-HEMT and the micron-level metal heat sink or microchannel cooling structure that needs to be set. The parameter is output to the operator to adjust the structure of the monolithic integrated reverse-conducting GaN-HEMT power device.

[0016] Based on the above technical solution, the structural adjustment method of the monolithically integrated reverse-conducting GaN-HEMT power device of the present invention can be further improved as follows:

[0017] Specifically, step S10 includes:

[0018] Step 1: Obtain the geometric dimensions and material parameters of the GaN-HEMT chip, establish a three-dimensional heat conduction model, including the GaN semiconductor layer, AlGaN barrier layer, insulating layer, metal electrode, and metal heat sink. For each layer, use the finite volume method to separate the heat dissipation and conduction equations, and establish a set of steady-state heat conduction equations.

[0019] Step 2: Apply boundary conditions to the heat conduction model, including: a fixed temperature boundary condition for the top of the device, using the ambient temperature; a fixed temperature boundary condition for the bottom of the device, using the heat sink temperature; and an adiabatic boundary condition for the sides of the device.

[0020] Step 3: Input the internal power loss distribution of the GaN-HEMT device under typical operating conditions as a heat source term, solve the heat conduction equations, and obtain the temperature field distribution inside the device.

[0021] Step 4: Analyze the temperature field distribution and identify the main bottleneck areas for heat dissipation, which are usually the highest temperature points or the areas with the largest temperature gradients. These include at least the interface between the GaN semiconductor layer and the insulating layer, and the contact interface between the heat sink and the insulating layer.

[0022] Specifically, step S20 includes:

[0023] Step 1: Abstract the key structural layers inside the GaN-HEMT chip into nodes, including the GaN semiconductor layer, AlGaN barrier layer, insulating layer, metal electrode, and metal heat sink;

[0024] Step 2: Based on the heat conduction model, determine the heat conduction path between each node and abstract it into edges. The weight of the edge reflects the thermal resistance of the heat conduction path.

[0025] Step 3: Identify the key heat source nodes, i.e., the areas where power loss mainly occurs;

[0026] Step 4: Obtain the heat dissipation path topology diagram inside the GaN-HEMT chip, where nodes represent heat sources, thermal resistance or heat conduction units, and edges represent heat conduction paths.

[0027] Specifically, step S30 includes:

[0028] Step 1: Use Dijkstra's algorithm or Floyd's algorithm to calculate the shortest path from the heat source node to each node and obtain the path length;

[0029] Step 2: Identify the longest path from the heat source node to the heat sink node, i.e., the critical heat dissipation path;

[0030] Step 3: Analyze the nodes and edges on the key heat dissipation paths to determine the main causes of heat dissipation bottlenecks.

[0031] The objective function of the upper-level model is to minimize the heat source node n. s to heat sink node n t Total thermal resistance R st :

[0032]

[0033] In the formula, P st For from n s to n t The longest path, e ij Represents node n i and n j The edge between, w ij For edge e ij The weights reflect the thermal resistance (K / W) of the heat conduction path, and i and j represent the node numbers.

[0034] The objective function of the lower-level model is to minimize the leakage current I. off :

[0035]

[0036] In the formula, I s For saturation current, V is the height of the barrier. D q represents the drain voltage, k represents the electron charge, k is the Boltzmann constant, and T is the temperature.

[0037] The constraints of the upper-level model include: device size L ≤ L max W≤W max H≤H max And reliability R≥R min .

[0038] The constraints of the lower-level model include: device size L ≤ L max W≤W max H≤H max And reliability R≥R min .

[0039] A second aspect of the present invention provides a computer-readable storage medium storing program instructions that, when executed, perform the above-described method for structural adjustment of a monolithically integrated reverse-conductive GaN-HEMT power device.

[0040] A third aspect of the present invention provides a structural adjustment system for a monolithically integrated reverse-conducting GaN-HEMT power device, wherein the system includes the aforementioned computer-readable storage medium.

[0041] Compared with existing technologies, the beneficial effects of the structural adjustment method, dielectric, and system for a monolithically integrated reverse-conducting GaN-HEMT power device provided by this invention are:

[0042] 1. A topology diagram of the heat dissipation path inside the GaN-HEMT chip was established, and the main bottleneck areas of heat dissipation were identified using a critical path analysis algorithm, providing a basis for subsequent structural optimization. This topology-based thermal analysis method can more accurately reflect the heat conduction mechanism inside the device, and compared with the traditional single thermal resistance network model, it can improve the targeting of optimization.

[0043] 2. A top-level optimization model targeting optimal heat dissipation and a bottom-level optimization model targeting minimum leakage current are proposed and integrated into a game-theoretic optimization framework. This multi-objective game-theoretic optimization method can balance and coordinate the optimization objectives of heat dissipation and leakage current while meeting constraints such as device size and cost, resulting in an optimal device structure that balances both. Compared to single-objective optimization, this multi-objective optimization method can better balance the electrothermal performance of the device.

[0044] 3. The Grey Wolf Hunting Algorithm was employed to solve the game optimization model. This algorithm possesses strong global search capabilities and robustness, enabling it to find near-global optimal solutions under complex constraints. Compared to traditional optimization algorithms such as genetic algorithms and particle swarm optimization, the Grey Wolf Algorithm converges faster and has higher computational efficiency.

[0045] 4. Based on the optimized structural parameters, this invention also provides specific adjustment measures, such as increasing the thickness of the metal heat sink, adding microchannel cooling structures, and forming vertical trenches in the source and drain regions, providing engineers with actionable design solutions. This method, which combines theoretical optimization with practical processes, can better guide the actual manufacturing and application of devices.

[0046] In summary, the GaN-HEMT power device structure adjustment method proposed in this invention makes full use of techniques such as thermal flow analysis, electrical modeling, and game theory optimization. It can effectively coordinate the heat dissipation and leakage current characteristics of the device, significantly improve the device's performance and reliability, and solve the technical problem that existing heat dissipation optimization and leakage current reduction techniques each have their own limitations and cannot simultaneously take into account the heat dissipation and leakage current characteristics of GaN-HEMT devices. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 A flowchart of the method provided by the present invention. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings.

[0050] like Figure 1 The diagram shown is a flowchart of a method for structural adjustment of a monolithically integrated inverse-conducting GaN-HEMT power device provided by this invention. This method includes the following steps:

[0051] S10. Establish a heat flow model of the internal structure of the GaN-HEMT chip, and analyze the heat dissipation path and the heat dissipation bottleneck area.

[0052] S20. Based on the heat flow model, construct a heat dissipation path topology diagram inside the GaN-HEMT chip, where the edges of the topology diagram represent heat conduction paths and the nodes represent heat sources, thermal resistances, or heat conduction units.

[0053] S30. Based on the topology map, the critical path analysis algorithm is used to calculate and identify the main bottleneck areas for heat dissipation;

[0054] S40. Establish an upper-level model with optimal heat dissipation as the objective. The optimal heat dissipation adjustment method is to optimize the topology graph by adding heat dissipation channels between two non-adjacent nodes with a step count of 2 to 3.

[0055] S50. Establish a lower-level model with the goal of minimizing the leakage current of GaN-HEMT. The adjustment method for minimizing the leakage current of GaN-HEMT is to form a vertical trench structure in the source and drain regions to reduce the leakage current.

[0056] S60. Establish a game theory model, including an upper-level model and a lower-level model, and determine the constraints of the upper-level model and the lower-level model.

[0057] S70. Using the parameters of the micron-level metal heat sink, the parameters of the microchannel cooling structure, and the parameters of the vertical trenches formed by the source and drain regions of GaN-HEMT as the Alpha wolf, Beta wolf, and Delta wolf of the gray wolf hunting algorithm, respectively, the game model is solved by the gray wolf hunting algorithm.

[0058] S80. The obtained optimal solution is used as the parameter for the vertical trench formed by the source and drain regions of the GaN-HEMT and the micron-level metal heat sink or microchannel cooling structure that needs to be set. The parameter is output to the operator to make structural adjustments to the monolithic integrated reverse-conducting GaN-HEMT power device.

[0059] The specific implementation methods of the above steps are described in detail below:

[0060] Step S10: Establish a heat flow model of the internal structure of the GaN-HEMT chip and analyze the heat dissipation path and the heat dissipation bottleneck area.

[0061] The specific implementation method is as follows:

[0062] First, it is necessary to obtain information such as the geometric dimensions and material parameters of the GaN-HEMT chip and establish a three-dimensional heat conduction model. The model includes key structural layers such as the GaN semiconductor layer, AlGaN barrier layer, insulating layer, metal electrode, and metal heat sink. For each layer, the finite volume method is used to establish the heat dissipation and conduction equations, and a set of steady-state heat conduction equations is established.

[0063] Secondly, apply boundary conditions to the model, including: 1) a fixed temperature boundary condition for the top of the device, taking the ambient temperature, such as 25℃; 2) a fixed temperature boundary condition for the bottom of the device, taking the heat sink temperature, such as 80℃; 3) an adiabatic boundary condition for the sides of the device.

[0064] Next, the internal power loss distribution of the GaN-HEMT device under typical operating conditions is input as a heat source term, and the heat conduction equations are solved to obtain the temperature field distribution inside the device.

[0065] Finally, the temperature field distribution was analyzed to identify the main bottleneck regions for heat dissipation. These regions typically contain the highest temperatures or the largest temperature gradients, such as the interface between the GaN semiconductor layer and the insulating layer, or the contact interface between the heat sink and the insulating layer.

[0066] Step S20: Based on the heat flow model, construct the heat dissipation path topology diagram inside the GaN-HEMT chip.

[0067] The specific implementation method is as follows:

[0068] First, the key structural layers inside the GaN-HEMT chip are abstracted into nodes, such as the GaN semiconductor layer, AlGaN barrier layer, insulating layer, metal electrode, and metal heat sink.

[0069] Secondly, based on the heat conduction model, the heat conduction paths between each node are determined and abstracted as edges. The weight of each edge reflects the thermal resistance of that heat conduction path.

[0070] Secondly, identify key heat source nodes, i.e., the areas where power loss mainly occurs, such as the GaN semiconductor layer.

[0071] Finally, a topology diagram of the heat dissipation path inside the GaN-HEMT chip is obtained, where nodes represent heat sources, thermal resistance or heat conduction units, and edges represent heat conduction paths.

[0072] Step S30: Based on the topology map, the critical path analysis algorithm is used to calculate and identify the main bottleneck areas for heat dissipation.

[0073] The specific implementation method is as follows:

[0074] First, the shortest path from the heat source node to each node is calculated using Dijkstra's algorithm or Floyd's algorithm, and the path length is obtained.

[0075] Secondly, the longest path from the heat source node to the heat sink node is identified, which is the critical heat dissipation path. The nodes and edges on this path often represent the main bottleneck areas for heat dissipation.

[0076] Next, the nodes and edges on the key heat dissipation paths are analyzed to determine the main causes of heat dissipation bottlenecks, such as excessive thermal resistance of a certain structural layer or excessive heat source power density.

[0077] Step S40: Establish an upper-level model with optimal heat dissipation as the goal, and optimize the topology graph.

[0078] The specific implementation method is as follows:

[0079] First, define the optimization objective function, such as minimizing the total thermal resistance from the heat source to the heat sink.

[0080] Secondly, determine the optimization variables, such as the thickness and thermal conductivity of the metal heat sink, and the size and number of microchannel cooling structures.

[0081] Next, optimization algorithms such as the Grey Wolf Algorithm and Particle Swarm Optimization are employed to find the optimal solution that minimizes the objective function under constraints. These constraints may include factors such as device size, cost, and reliability.

[0082] Finally, based on the optimization results, the topology is adjusted, such as by increasing the thickness of the heat sink and adding microchannel cooling structures, to improve heat dissipation efficiency.

[0083] Step S50: Establish a lower-level model with the goal of minimizing the leakage current of GaN-HEMT, and form a vertical trench structure in the source and drain regions.

[0084] The specific implementation method is as follows:

[0085] First, an electrical model of the GaN-HEMT device is established, including its impedance, leakage current, and other characteristics.

[0086] Secondly, we analyze the main causes of excessive leakage current in GaN-HEMT device structures, such as surface leakage current and interface traps.

[0087] Furthermore, a solution is proposed to form vertical trench structures in the source and drain regions to reduce surface leakage current.

[0088] Finally, an optimization objective function is established, such as minimizing leakage current, and optimization variables, such as trench depth, width, and spacing, are determined. Optimization algorithms, such as genetic algorithms and particle swarm optimization, are used to solve the problem and obtain the optimal vertical trench parameters.

[0089] Step S60: Establish a game model, including an upper-level model and a lower-level model, and determine the constraints.

[0090] The specific implementation method is as follows:

[0091] First, the optimal heat dissipation model in step S40 and the minimum leakage current model in step S50 are regarded as two sub-models, forming a game theory model.

[0092] Secondly, the correlation between the two sub-models needs to be determined. For example, increasing the heat sink thickness may increase the device size, thus affecting the leakage current; while adopting a vertical trench structure may affect the heat dissipation path.

[0093] Next, determine the constraints of the two sub-models, such as device size, cost, and reliability.

[0094] Finally, the objective functions and constraints of the two sub-models are established to form a complete game optimization model.

[0095] Step S70: Solve the game model using the gray wolf hunting algorithm.

[0096] The specific implementation method is as follows:

[0097] First, the optimization variables (such as heat sink parameters) in step S40 are designated as Alpha wolves, and the optimization variables (such as vertical trench parameters) in step S50 are designated as Beta wolves and Delta wolves.

[0098] Secondly, initialize the position and velocity of the gray wolf population, and set algorithm parameters such as population size, number of iterations, and convergence conditions.

[0099] Furthermore, in each iteration, the positions and velocities of the other gray wolves are updated based on the positions of the Alpha, Beta, and Delta wolves, and the objective function value is calculated.

[0100] Finally, when the convergence condition is met, the optimal solutions for Alpha Wolf, Beta Wolf, and Delta Wolf are output, which are the optimal combinations of heat sink parameters and vertical groove parameters.

[0101] Step S80: The obtained optimal solution is used as the parameter to be set and output to the operator for structural adjustment.

[0102] The specific implementation method is as follows:

[0103] First, output parameters such as the thickness of the heat sink and the thermal conductivity of the material, as well as parameters such as the depth, width, and spacing of the vertical grooves.

[0104] Secondly, it provides the physical meaning of these parameters and their adjustment methods, and how to implement them in actual device design.

[0105] Furthermore, the expected performance indicators after adjustment, such as heat dissipation efficiency and leakage current, are provided for operators' reference.

[0106] Finally, operators are reminded to pay attention to the mutual influence between various parameters during the actual adjustment process, and to make appropriate trade-offs and optimizations.

[0107] To better understand the solution of the present invention, the specific embodiments of S10 to S80 are described in detail below using formulas:

[0108] Step S10: Establish a heat flow model of the internal structure of the GaN-HEMT chip and analyze the heat dissipation path and the heat dissipation bottleneck area.

[0109] The specific implementation method for this step is as follows:

[0110] First, a three-dimensional thermal conductivity model of the GaN-HEMT chip is established. This model includes key structural layers such as the GaN semiconductor layer, AlGaN barrier layer, insulating layer, metal electrodes, and metal heat sink. For each layer, the finite volume method is used to establish the heat dissipation and conduction equations, thus establishing a set of steady-state thermal conductivity equations. The thermal conductivity equations can be expressed as:

[0111]

[0112] Where ζ is the thermal conductivity of the material, T is the temperature, and Q is the volumetric power density.

[0113] Secondly, boundary conditions are applied. In the model, the top of the device is set as a fixed temperature boundary condition, taking the ambient temperature T. a The bottom of the device is set to a fixed temperature boundary condition, and the heat sink temperature T is taken. s The device side is set as an adiabatic boundary condition. The boundary condition can be expressed as:

[0114] Top: T = T a

[0115] Bottom: T = T s

[0116] side:

[0117] Next, the internal power loss distribution Q of the GaN-HEMT device under typical operating conditions is input as a heat source term, and the heat conduction equations are solved to obtain the temperature field distribution T(x, y, z) inside the device.

[0118] Finally, the temperature field distribution is analyzed to identify the main bottleneck regions for heat dissipation. These regions typically contain the highest temperatures or the largest temperature gradients, such as the interface between the GaN semiconductor layer and the insulating layer, or the contact interface between the thermal trench and the insulating layer.

[0119] Step S20: Based on the heat flow model, construct the heat dissipation path topology diagram inside the GaN-HEMT chip.

[0120] The specific implementation method for this step is as follows:

[0121] First, the key structural layers inside the GaN-HEMT chip are abstracted into nodes n. i Examples include GaN semiconductor layers, AlGaN barrier layers, insulating layers, metal electrodes, and metal heat sinks.

[0122] Secondly, based on the heat conduction model, the heat conduction paths between each node are determined and abstracted into edges e. ij The weight w of the edge ij This reflects the magnitude of the thermal resistance of the heat conduction path, and can be expressed as:

[0123]

[0124] Among them, l ij For node n i and n j The distance between them, k ij A represents the thermal conductivity of the corresponding material. ij This represents the heat conduction cross-sectional area.

[0125] Next, the key heat source node n was identified. s This refers to the region where power loss mainly occurs, such as the GaN semiconductor layer.

[0126] Finally, the heat dissipation path topology graph G = (N, E, W) inside the GaN-HEMT chip is obtained, where N is the set of nodes, E is the set of edges, and W is the set of edge weights. In this topology graph, nodes represent heat sources, thermal resistances, or heat conduction units, and edges represent heat conduction paths.

[0127] Step S30: Based on the topology map, the critical path analysis algorithm is used to calculate and identify the main bottleneck areas for heat dissipation.

[0128] The specific implementation method for this step is as follows:

[0129] First, using Dijkstra's algorithm or Floyd's algorithm, the calculation of the heat source node n is performed. s To each node n i Shortest path length d siDijkstra's algorithm can be expressed as:

[0130] d si =min{d sj +w ji}

[0131] Where, d sj For the obtained n s to n j The shortest path length.

[0132] Secondly, identify the heat source node n s to heat sink node n t Longest path This refers to the critical heat dissipation path. The nodes and edges on this path often represent the main bottleneck areas for heat dissipation.

[0133] Next, the nodes and edges on the key heat dissipation paths are analyzed to determine the main causes of heat dissipation bottlenecks, such as excessive thermal resistance of a certain structural layer. ij Excessive power density, excessively high heat source power density Q, etc.

[0134] Step S40: Establish an upper-level model with optimal heat dissipation as the goal, and optimize the topology graph.

[0135] The specific implementation method for this step is as follows:

[0136] First, define the optimization objective function, such as minimizing the time required to reach heat source node n. s to heat sink node n t Total thermal resistance R st :

[0137]

[0138] Among them, P st For from n s to n t The longest path.

[0139] Secondly, determine the optimization variables, such as the thickness t of the metal heat sink. h and thermal conductivity k h The dimensions of the microchannel cooling structure w c h c n c And quantity N c wait.

[0140] Furthermore, optimization algorithms such as the Grey Wolf Algorithm and Particle Swarm Optimization are employed to find the objective function R under constraints. st The optimal solution is minimized. Constraints may include factors such as device dimensions L, W, H, cost C, and reliability R, and can be expressed as:

[0141] minR st

[0142] stL≤L max W≤W max H≤H max

[0143] C≤C max , R≥R min

[0144] Finally, based on the optimization results, the topology graph G is adjusted, such as by increasing the heat sink thickness t. h Add microchannel cooling structure parameters w c h c n c N c These measures aim to improve heat dissipation efficiency.

[0145] Step S50: Establish a lower-level model with the goal of minimizing the leakage current of GaN-HEMT, and form a vertical trench structure in the source and drain regions.

[0146] The specific implementation method for this step is as follows:

[0147] First, an electrical model of the GaN-HEMT device is established, including the leakage current I. off Breakdown voltage V BR Characteristics such as leakage current. The leakage current can be expressed as:

[0148]

[0149] Among them, I s For saturation current, V is the height of the barrier. D This is the drain voltage.

[0150] Secondly, we analyze the main causes of excessive leakage current in GaN-HEMT device structures, such as surface leakage current and interface traps.

[0151] Furthermore, a solution is proposed to form vertical trench structures in the source and drain regions to reduce surface leakage current. The trench depth d... t Width w t and interval s t These are key parameters.

[0152] Finally, an optimization objective function is established, such as minimizing the leakage current I. off And determine the optimization variable d t w t s t The optimal vertical trench parameters were obtained by using optimization algorithms such as genetic algorithm and particle swarm optimization.

[0153] Step S60: Establish a game model, including an upper-level model and a lower-level model, and determine the constraints.

[0154] The specific implementation method for this step is as follows:

[0155] First, the optimal heat dissipation model in step S40 and the minimum leakage current model in step S50 are considered as two sub-models, forming a game theory model. The objective function of the upper-level model is minR. st The objective function of the lower-level model is minI off .

[0156] Secondly, determine the correlation between the two sub-models. For example, increasing the heat sink thickness t h This may increase the device dimensions L, W, H, thereby affecting the leakage current I. off However, using a vertical trench structure may affect the heat dissipation path, thus affecting the total thermal resistance R. st .

[0157] Next, determine the constraints of the two sub-models, such as device dimensions L, W, H, cost C, reliability R, etc.

[0158] Finally, the objective functions and constraints of the two sub-models are established to form a complete game optimization model. The game model can be represented as:

[0159] Upper-level model:

[0160] minR st

[0161] stL≤L max W≤W max H≤H max

[0162] C≤C max , R≥R min

[0163] Lower-level model:

[0164] minI off

[0165] stL≤L max W≤W max H≤H max

[0166] C≤C max , R≥R min

[0167] Step S70: Solve the game model using the gray wolf hunting algorithm.

[0168] The specific implementation method for this step is as follows:

[0169] First, the optimization variables in step S40 (such as the heat sink parameter t) h k h w c h c n c N c As an Alpha wolf, X α =[t h k h w c h c n c N c The optimization variables from step S50 (such as the vertical trench parameter d) t w t s t As a Beta Wolf and a Delta Wolf, X β =[d t w t s t ], X δ =[d t w t s t ].

[0170] Secondly, initialize the location X of the gray wolf population. i and speed V i And set algorithm parameters, such as population size N and number of iterations T. max Convergence conditions include ∈, etc.

[0171] Furthermore, in each iteration t, the positions and velocities of the other gray wolves are updated based on the positions of the Alpha, Beta, and Delta wolves:

[0172]

[0173] r1, r2 ~ U(0, 1)

[0174]

[0175]

[0176]

[0177] And calculate the objective function value of the game model.

[0178] Finally, when the convergence condition is met... When the optimal solution for Alpha Wolf, Beta Wolf, and Delta Wolf is output, that is, the heat sink parameter X is determined. α and vertical trench parameter Xβ X δ The optimal combination.

[0179] Step S80: The obtained optimal solution is used as the parameter to be set and output to the operator for structural adjustment.

[0180] The specific implementation method for this step is as follows:

[0181] First, output the thickness t of the heat sink. h Material thermal conductivity k h Parameters such as the depth d of the vertical trench. t Width w t , interval s t Parameters such as these.

[0182] Secondly, the physical meaning and adjustment methods of these parameters are provided, explaining how to implement them in actual device design. For example, increasing the heat sink thickness t... h It can improve heat dissipation efficiency, but it will increase device size; reducing the vertical trench spacing s t It can reduce leakage current, but may affect the heat dissipation path.

[0183] Next, provide the expected performance metrics after the adjustments, such as heat dissipation efficiency. Leakage current I off Etc., for operators' reference.

[0184] Finally, operators are reminded to pay attention to the mutual influence between various parameters during the actual adjustment process, and to make appropriate trade-offs and optimizations.

[0185] It should be noted that the relevant variables are explained in the table below:

[0186]

[0187]

[0188] A second aspect of the present invention provides a computer-readable storage medium storing program instructions that, when executed, perform the above-described method for structural adjustment of a monolithically integrated reverse-conductive GaN-HEMT power device.

[0189] A third aspect of the present invention provides a structural adjustment system for a monolithically integrated reverse-conducting GaN-HEMT power device, wherein the system includes the aforementioned computer-readable storage medium.

[0190] Specifically, the principle of this invention is to establish a multi-level optimization model to obtain optimal device structure parameters that balance both heat dissipation and leakage current characteristics of the device. Specifically, this method includes the following key steps:

[0191] First, a heat flow model of the GaN-HEMT chip is established to analyze the heat dissipation path and bottleneck regions. Using the finite volume method to solve the heat dissipation and conduction equations, a steady-state heat conduction equation set is established, and the internal temperature field distribution of the device is obtained. Analysis of the temperature field distribution identifies the main bottleneck regions for heat dissipation, providing a basis for subsequent optimization.

[0192] Secondly, based on the heat flow model, a topology diagram of the heat dissipation path inside the GaN-HEMT chip is constructed. The chip structure layers are abstracted as nodes, and the heat conduction paths are abstracted as edges, forming a topology diagram that reflects the heat dissipation mechanism. This topology-based modeling method, compared to the traditional thermal resistance network model, can more comprehensively describe the heat conduction process inside the device.

[0193] Next, a critical path analysis algorithm is used to calculate and identify the longest path from the heat source to the heat sink, i.e., the critical heat dissipation path. The nodes and edges on this path often represent the main bottleneck areas for heat dissipation, providing targeted targets for subsequent structural optimization.

[0194] Next, a higher-level optimization model is established with the goal of optimizing heat dissipation. This model aims to minimize the total thermal resistance from the heat source to the heat sink, and uses the parameters of the metal heat sink and the microchannel cooling structure as optimization variables. Optimization algorithms such as the Grey Wolf algorithm are employed to find the optimal solution that minimizes the total thermal resistance while satisfying constraints such as device size and cost. This improves the overall heat dissipation performance of the device.

[0195] Simultaneously, a lower-level optimization model was established with the goal of minimizing leakage current. This model aims to minimize leakage current and uses the vertical trench parameters of the source and drain regions as optimization variables. By optimizing parameters such as trench depth, width, and spacing, the surface leakage current of the device can be effectively reduced.

[0196] Finally, the two sub-models are integrated into a game-theoretic optimization framework. Within this framework, the two sub-models are mutually restrictive and influential. For example, improving heat dissipation performance may increase device size, thus affecting leakage current; while adopting a vertical trench structure may affect the heat dissipation path. Therefore, it is necessary to balance and coordinate the optimization objectives of the two sub-models while satisfying various constraints, to obtain the optimal structural parameters that balance heat dissipation and leakage current.

[0197] Therefore, this invention employs the gray wolf hunting algorithm to solve the game optimization model. This algorithm simulates the hunting behavior of gray wolves and can quickly converge to a near-global optimum solution under complex constraints. The heat sink parameters and vertical trench parameters are represented as Alpha, Beta, and Delta wolves, respectively. By updating the positions and velocities of other wolves in the population, their respective optimal solutions are obtained, representing the optimal device structure parameters that balance heat dissipation and leakage current performance.

[0198] A specific embodiment of the present invention is given below:

[0199] The GaN-HEMT power device dimensions are as follows: length L = 5mm, width W = 3mm, and height H = 0.5mm. The GaN semiconductor layer thickness is 2μm, the AlGaN barrier layer thickness is 20nm, and the insulating layer (Si3N4) thickness is 100nm. The metal electrodes and heat sink are made of Cu material, with an initial heat sink thickness of 0.3mm. Under rated operating conditions, the device has a total power loss P = 100W and a power density of approximately 6.67MW / m². 3 Ambient temperature T a =25℃, heat sink temperature T s =80℃.

[0200] First, a three-dimensional heat conduction model of the GaN-HEMT chip is established. Each structural layer is constructed as a separate mesh element, and the finite volume method is applied to each element to obtain the heat dissipation and conduction equations, yielding the steady-state heat conduction equations:

[0201]

[0202] Where k is the thermal conductivity of the material, T is the temperature, and Q is the volumetric power density.

[0203] Boundary conditions are applied to the model: the top of the device is set to a fixed temperature T. a =25℃, the bottom of the device is set to a fixed temperature T s =80℃, the side of the device is set to heat insulation condition.

[0204] Using the total power loss of 100W as the heat source term as input to the model, the heat conduction equations are solved to obtain the temperature field distribution inside the device. The temperature field distribution shows that the highest temperature point, reaching 175℃, appears at the interface between the GaN semiconductor layer and the insulating layer. This indicates that this region is the main bottleneck area for heat dissipation.

[0205] Secondly, based on the heat conduction model, a topology diagram of heat dissipation paths inside the GaN-HEMT chip is constructed. Each structural layer is abstracted as node n. i The heat conduction path is abstracted as edge e ij Edge weight w ijThis reflects the magnitude of the thermal resistance of the path, and can be expressed as:

[0206]

[0207] Among them, l ij For node n i and n j The distance between them, k ij A represents the thermal conductivity of the corresponding material. ij This represents the heat conduction cross-sectional area. The GaN semiconductor layer was identified as the key heat source node n. s .

[0208] Next, Dijkstra's algorithm is used to calculate the heat source node n s The shortest path length d to each node si And find out from n s to heat sink node n t Longest path This refers to the critical heat dissipation path. The nodes and edges on this path represent the main bottleneck areas for heat dissipation, primarily concentrated at the interface between the GaN semiconductor layer and the insulating layer.

[0209] Next, a higher-level optimization model is established with the goal of optimizing heat dissipation. The objective function is to minimize the total thermal resistance R from the heat source to the heat sink. st :

[0210]

[0211] The optimization variables include the thickness t of the metal heat sink. h and thermal conductivity k h and the dimensions of the microchannel cooling structure w c h c n c N c The constraints are: device dimensions L≤5mm, W≤3mm, H≤0.5mm.

[0212] The optimal solution obtained by solving the optimization model using the Grey Wolf algorithm is: heat sink thickness t h =0.5mm, thermal conductivity k h = 400W / m·K; Microchannel width w c =200μm, height h c =300μm, quantity n c =20, total number N c =2.

[0213] Simultaneously, a lower-level optimization model is established with the objective of minimizing leakage current. The optimization objective function is to minimize the leakage current I. off The optimization variable is the depth d of the vertical trench. tWidth w t and interval s t The optimal parameters were obtained by using a genetic algorithm: trench depth d. t =1μm, width w t =5μm, interval s t =10μm.

[0214] The two sub-models described above are integrated into a game-theoretic optimization framework. Within this framework, the two sub-models are mutually restrictive and influential. For example, increasing the heat sink thickness may increase device size, thus affecting leakage current; while adopting a vertical trench structure may affect the heat dissipation path. Therefore, it is necessary to coordinate the optimization objectives of the two sub-models while satisfying various constraints.

[0215] The gray wolf hunting algorithm is used to solve this game optimization model. The heat sink parameter is taken as the Alpha wolf, X. α = [0.5, 400, 200, 300, 20, 2], using the vertical trench parameters as Beta Wolf and Delta Wolf, X β =X δ = [1, 5, 10]. Algorithm parameters: Population size N = 30, maximum number of iterations T max =100, convergence condition ∈ =10 -6 .

[0216] In each iteration, based on the positions of the Alpha, Beta, and Delta wolves, the positions and velocities of the other gray wolves are updated, and the objective function value of the game model is calculated. When the convergence condition is met, the optimal solutions for the Alpha, Beta, and Delta wolves are output, i.e., the heat sink parameters and vertical...

[0217] The optimal combination of straight groove parameters.

[0218] The final optimal structure parameters are as follows:

[0219] heat sink thickness t h =0.5mm, thermal conductivity k h = 400W / m·K;

[0220] Microchannel width w c =200μm, height h c =300μm, quantity n c =20, total number N c =2;

[0221] Vertical trench depth d t =1μm, width w t =5μm, interval s t =10μm.

[0222] Technical effect analysis

[0223] Using the optimized structural parameters described above, the performance of GaN-HEMT power devices was analyzed and verified.

[0224] First, calculate the optimized total thermal resistance R. st According to the thermal resistance network model, we can obtain:

[0225]

[0226]

[0227]

[0228]

[0229]

[0230] Total thermal resistance R st =0.05+0.002+0.01+0.125+0.05=0.237K / W

[0231] As can be seen, the total thermal resistance was significantly reduced after optimization, from the initial 0.65K / W to 0.237K / W, and the heat dissipation performance was significantly improved.

[0232] Secondly, calculate the optimized leakage current I. off According to the leakage current model of GaN-HEMT devices:

[0233]

[0234] By employing the optimized vertical trench parameters described above, surface leakage current can be significantly reduced. Assume I... s =1μA, V D =600V, T=175℃, then the leakage current I off =5μA, a 50% reduction compared to the initial design.

[0235] Finally, the overall performance of the optimized device is analyzed. Based on the thermal resistance network model, the junction-ambient temperature difference and the highest junction temperature can be calculated.

[0236] T jc =R jc P = 0.05 * 100 = 5K

[0237] T cs =R cs P = 0.125 * 100 = 12.5 K

[0238] T j=T jc +T cs +T s =175 + 5 + 12.5 = 192.5℃

[0239] The maximum allowable junction temperature is usually taken as T. j，max =200℃, therefore the optimized device meets the temperature requirements.

[0240] The heat dissipation efficiency can be calculated as follows:

[0241]

[0242] Compared to the initial design, heat dissipation efficiency has been improved by 50%.

[0243] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for adjusting the structure of a monolithically integrated inverse- conduction GaN-HEMT power device, characterized in that The method comprises the following steps: S10, a heat flow model of the internal structure of the GaN-HEMT chip is established, and a heat dissipation path and a heat dissipation bottleneck area are analyzed; S20, according to the heat flow model, a heat dissipation path topology graph of the internal structure of the GaN-HEMT chip is constructed, wherein edges of the topology graph represent heat conduction channels, and nodes represent heat sources, thermal resistors or heat conduction units; S30, based on the topology graph, a critical path analysis algorithm is used to calculate and identify the main bottleneck area of heat dissipation; S40, an upper model with optimal heat dissipation as the target is established, and the adjustment mode of the optimal heat dissipation is that, in the nodes of the topology graph, the heat dissipation channel between two non-adjacent nodes is increased by 2-3 steps to optimize the topology graph; S50, a lower model with the lowest drain current of the GaN-HEMT as the target is established, and the adjustment mode of the lowest drain current of the GaN-HEMT is that a vertical trench structure is formed in the source and drain regions to reduce the drain current; S60, a game model is established, including the upper model and the lower model, and the constraint conditions of the upper model and the lower model are determined; S70, the parameters of the micron-level metal heat sink, the parameters of the micro-channel cooling structure and the parameters of the vertical trench formed in the source and drain regions of the GaN-HEMT are taken as Alpha wolves, Beta wolves and Delta wolves of the grey wolf hunting algorithm, and the game model is solved by using the grey wolf hunting algorithm; S80, the optimal solution obtained is taken as the parameters of the micron-level metal heat sink or the micro-channel cooling structure and the vertical trench formed in the source and drain regions of the GaN-HEMT, and is output to an operator to adjust the structure of the single-chip integrated inverse-conducting GaN-HEMT power device.

2. The method according to claim 1, wherein The step S10 specifically comprises: Step 1, the geometric size and material parameter information of the GaN-HEMT chip are obtained, a three-dimensional heat conduction model is established, including a GaN semiconductor layer, an AlGaN barrier layer, an insulating layer, a metal electrode and a metal heat sink, a heat conduction equation is discretized by using a finite volume method for each layer, and a steady-state heat conduction equation set is established; Step 2, boundary conditions are applied in the heat conduction model, including: a fixed temperature boundary condition is applied to the top of the device, and the surrounding environment temperature is taken; a fixed temperature boundary condition is applied to the bottom of the device, and the heat sink temperature is taken; and an adiabatic boundary condition is applied to the side of the device; Step 3, the internal power loss distribution of the GaN-HEMT device under a typical working state is input as a heat source term, the heat conduction equation set is solved, and the temperature field distribution in the device is obtained; Step 4, the temperature field distribution is analyzed, and the main bottleneck area of heat dissipation, i.e., the area with the highest temperature or the largest temperature gradient, is identified, including the interface between the GaN semiconductor layer and the insulating layer and the contact interface between the heat sink and the insulating layer.

3. The method of claim 1, wherein the method is performed on a single chip integrated inverse- direction GaN-HEMT power device having a structure as shown in FIG. 1, and the method comprises: The step S20 specifically comprises: ​ Step 1, the key structural layers in the internal structure of the GaN-HEMT chip are abstracted into nodes, including a GaN semiconductor layer, an AlGaN barrier layer, an insulating layer, a metal electrode and a metal heat sink; Step 2, according to the heat conduction model, determine the heat conduction path between each node and abstract it into an edge, and the weight of the edge reflects the thermal resistance of the heat conduction path; Step 3, identify the key heat source node, that is, the area where power loss mainly occurs; Step 4, obtain the heat dissipation path topology graph inside the GaN-HEMT chip, wherein the node represents the heat source, the thermal resistance or the heat conduction unit, and the edge represents the heat conduction path.

4. The method of claim 1, wherein the method is performed on a single chip integrated inverse- direction GaN-HEMT power device having a structure as shown in FIG.

1. The step S30 specifically comprises: Step 1, using Dijkstra algorithm or Floyd algorithm, calculate the shortest path from the heat source node to each node, and obtain the path length; Step 2, identify the longest path from the heat source node to the heat sink node, that is, the key heat dissipation path; Step 3, analyze the nodes and edges on the key heat dissipation path to determine the main reason for causing the heat dissipation bottleneck.

5. The method of claim 1, wherein the method is performed on a single chip integrated inverse-geometry GaN-HEMT power device having a structure as shown in FIG.

1. The objective function of the upper-level model is to minimize the heat source node. To the heat sink node Total thermal resistance : ； wherein is the longest path from to , denotes an edge between nodes and , is the weight of edge reflecting thermal resistance (K / W) of the heat conduction path, i and j denote node numbers; wherein ; wherein, is the distance between the nodes and , is the thermal conductivity of the corresponding material, is the cross-sectional area of heat conduction.

6. The method of claim 1, wherein the single chip integrated inverse- direction GaN-HEMT power device is a structure adjustment method of a GaN-HEMT power device, and the structure adjustment method comprises the following steps of: The objective function of the lower model is to minimize the leakage current : ； wherein is the saturation current, is the barrier height, is the drain voltage, denotes the electron charge, is the Boltzmann constant and T is the temperature.

7. The method of claim 1, wherein the method is performed on a single chip integrated inverse-geometry GaN-HEMT power device having a structure as shown in FIG. 1, and the method comprises: The constraints of the upper model include: device size and reliability . ​ 8. The method of claim 1, wherein the structure of the monolithic integrated inverse- direction GaN-HEMT power device is adjusted by, The constraints of the lower level model include: device size and reliability .

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores program instructions, and the program instructions run to execute the structure adjustment method of the monolithic integrated inverse conduction GaN-HEMT power device according to any one of claims 1-8.

10. A structure adjustment system of a monolithic integrated inverse- direction GaN-HEMT power device, characterized by, The computer readable storage medium comprises the computer readable storage medium of claim 9.

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