Power System Frequency Control Method and Device under Deterministic Network Delay Attack

By using a superhelical delay estimator and power system power response augmentation model in the power system, combining a state observer, a sequence state predictor and a prediction model controller, to calculate and integrate the amount of power required by the power system, the challenge of deterministic network delay attack on the frequency control of the power system is solved, and the stability of the power system frequency is achieved.

CN118367570BActive Publication Date: 2025-06-24INFORMATION & COMMUNICATION BRANCH STATE GRID JIBEI ELECTRIC POWER CO LTD +1
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Patent Information

Application Number
CN202410515175.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-04-26
Publication Date
2025-06-24
Estimated Expiration
2044-04-26

AI Technical Summary

Technical Problem

Deterministic network delay attacks pose challenges to power system frequency control, resulting in unstable power system frequency, and an effective method to offset frequency deviations are needed.

Method used

The network delay is determined by a superhelical delay estimator and input it with the power change of the power system into the power system power response augmentation model to obtain the control offset. Then, using a state observer, a sequence state predictor, and a prediction model controller, the amount of power required by the power system is calculated to integrate and offset the frequency deviation over a specified sampling period.

Benefits of technology

This method can effectively offset the frequency deviation of the power system and compensate for the network delay attacks of random and unknown deterministic networks, ensuring the frequency stability of the power system.

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Abstract

The embodiments of this specification provide a method and device for power system frequency control under a deterministic network delay attack. The method includes: sending a signal to the deterministic network through a super-twisting delay estimator and receiving an external signal returned by the deterministic network to obtain the network delay of the deterministic network; inputting the network delay and the power change amount of the power system into an augmented power system power response model to obtain a control offset; inputting the control offset into a state observer to obtain an estimated state variable; inputting the estimated state variable into a sequential state predictor to obtain a state variable under the network delay; inputting the state variable into a predictive model controller to obtain the power rate of the power system; integrating the power rate of the power system within a specified sampling period to obtain the required power amount of the power system within the specified sampling period to offset the frequency deviation of the power system. To overcome the problem of deterministic network delay attack in the power system and effectively offset the frequency deviation of the power system.
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Description

Technical Field

[0001] The embodiments of this specification relate to the field of smart grids, and in particular, to a power system frequency control method and device under a deterministic network delay attack. Background Art

[0002] Modern power grids are cyber-physical systems, which have advantages such as advanced control strategies and information and communication technologies, and are vulnerable to cyber attacks. Some common cyber attacks are denial of service, false data injection, and replay attacks. The delay switching attack is achieved by inserting a time delay in a deterministic network communication channel, which is highly destructive to the power system and can cause the power system to be unstable, posing challenges to the load frequency control of the power system. Among them, load frequency control (LFC) is to adjust the frequency of the power system to the rated value (such as 50HZ) and / or maintain the exchange frequency of the regional tie line at the planned value. Frequency stability is an important indicator of the power quality of the power system. Any sudden change in the load may lead to deviations in the exchange frequency of the inter-system tie line and fluctuations in the system frequency. Therefore, to ensure power quality, power system frequency control under a deterministic network delay attack is required.

[0003] Therefore, there is an urgent need for a power system frequency control method under a deterministic network delay attack, which can overcome the problem of deterministic network delay attacks in the power system and effectively offset the power system frequency deviation. Summary of the Invention

[0004] The purpose of the embodiments of this specification is to provide a power system frequency control method and device under a deterministic network delay attack to overcome the problem of deterministic network delay attacks in the power system and effectively offset the power system frequency deviation.

[0005] To achieve the above purpose, on the one hand, the embodiments of this specification provide a power system frequency control method under a deterministic network delay attack, including:

[0006] Sending a signal to the deterministic network through a super-twisting delay estimator and receiving an external signal returned by the deterministic network to obtain the network delay of the deterministic network;

[0007] Inputting the network delay and the power change amount of the power system into a power system power response augmented model to obtain a control offset;

[0008] Inputting the control offset into a state observer to obtain an estimated state variable;

[0009] Inputting the estimated state variable into a sequence state predictor to obtain the state variable under the network delay;

[0010] Input the state variable into the predictive model controller to obtain the power rate of the power system;

[0011] Integrate the power rate of the power system within the specified sampling period to obtain the power amount required by the power system within the specified sampling period to offset the frequency deviation of the power system.

[0012] Preferably, the super-twisting time-delay estimator is characterized by the following formula:

[0013]

[0014]

[0015] where σ(t) is the sliding mode surface of the super-twisting time-delay estimator, m(·) is the external signal, is the derivative of the external signal, t is the current moment considering the network time delay, τ(t) is the network time delay of the deterministic network, the estimated network time delay of the deterministic network, is the derivative of, α1 and α2 are positive constants, and sgn(·) is the sign function.

[0016] Preferably, the method for establishing the power system power response augmented model includes:

[0017] Establish a power system power response model;

[0018] By introducing auxiliary variables to minimize the steady-state error of the power system, according to the power system power response model, obtain the power system power response model after minimizing the steady-state error;

[0019] Based on the existence of network time delay in the deterministic network, according to the power system power response model after minimizing the steady-state error, obtain the power system power response augmented model.

[0020] Preferably, the power system power response model is characterized by the following formula:

[0021]

[0022] where, C p = [0 1], x p (t) is the state variable, is the derivative of the state variable, y(t) is the control offset, A p , B p , C p are all coefficient matrices of the power system, [·] T is the transpose of the matrix, H is the inertia constant, D is the damping coefficient, Tg is the reducer - turbine constant, R g is the equivalent droop constant, P S (·), respectively represent the power of the power system, the change in mechanical power, the change in power of the power system, and the power deviation. t is the current moment considering the network delay.

[0023] Preferably, the power system power response model after minimizing the steady - state error is characterized by the following formula:

[0024]

[0025]

[0026] where v(t) is the auxiliary variable, is the derivative of the auxiliary variable, is the power rate of the power system, is the derivative of the control offset.

[0027] Preferably, the augmented power system power response model is characterized by the following formula:

[0028]

[0029] y(t)=Cx(t);

[0030] where x(t)=[v(t) y(t)] T , is the derivative of x(t), B=[B p 0] T , C=[0I], τ(t) is the network delay of the deterministic network, I is the identity matrix, and t is the current moment considering the network delay.

[0031] Preferably, the state observer is characterized by the following formula:

[0032]

[0033] where, is the estimated state variable, is the derivative of the estimated state variable, B=[B p 0] T , C=[0 I], I is the identity matrix, C p =[0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent droop constant, is the power rate of the power system, y(t) is the control offset, K ob (·) is the state observer gain, t is the current time considering the network delay, is the estimated network delay of the deterministic network.

[0034] Preferably, the sequence state predictor includes:

[0035]

[0036] Among them, B = [B p 0] T , C p = [0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent sag constant, is the power rate of the power system, N is the prediction step of the sequence state predictor, K SP1 , K SP2 , …, K SPN respectively represent the prediction gains of the prediction model controller when i = 1, 2, ..., N, is the estimated state variable, is the estimated network delay of the deterministic network, z1(t), …, z N-1 (t) respectively represent the prediction state sequences when i = 1, ..., N - 1, respectively represent the prediction state sequences considering the delay when i = 1, …, N, respectively represent the derivatives of the prediction state sequences when i = 1, …, N, t is the current time considering the network delay.

[0037] Preferably, the method for establishing the prediction model controller includes:

[0038] Establish a cost function and the constraint conditions of the cost function, where the constraint conditions include power system power rate constraint conditions, power system power constraint conditions, and power system frequency constraint conditions;

[0039] Calculate the cost function and the constraint conditions according to the quadratic programming algorithm to obtain the control gain;

[0040] Establish a prediction model controller according to the control gain and the relationship between the state variable and the power rate of the power system under the network delay.

[0041] Preferably, the cost function and the constraint conditions of the cost function are characterized by the following formula:

[0042]

[0043] Subject to: Mη ≤ β;

[0044] where η is a vector coefficient, T p = qk, where k is a constant step size and q is an integer, is the transpose of the predicted state intermediate variable, Q and R are weight matrices, H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent vertical drop constant, is the estimated state variable, and both M and β are constraint vectors.

[0045] Preferably, the predictive model controller is characterized by the following formula:

[0046]

[0047] where K mpc is the control gain, is the power rate of the power system, z N (t) is the state variable under network delay.

[0048] On the other hand, an embodiment of this specification provides a power system frequency control device under a deterministic network delay attack. The device includes:

[0049] A network delay determination module, configured to send a signal to a deterministic network through a super - helix delay estimator and receive an external signal returned by the deterministic network to obtain the network delay of the deterministic network;

[0050] A control offset determination module, configured to input the network delay and the power change amount of the power system into a power system power response augmented model to obtain a control offset;

[0051] An estimated state variable determination module, configured to input the control offset into a state observer to obtain an estimated state variable;

[0052] A state variable determination module, configured to input the estimated state variable into a sequential state predictor to obtain the state variable under the network delay;

[0053] A power rate determination module, configured to input the state variable into a predictive model controller to obtain the power rate of the power system;

[0054] A power quantity determination module is configured to integrate the power rate of the power system within a specified sampling period to obtain the power quantity required by the power system within the specified sampling period, so as to offset the frequency deviation of the power system.

[0055] In another aspect, an embodiment of this specification also provides a computer device, including a memory, a processor, and a computer program stored on the memory. When the computer program is run by the processor, it executes the instructions of any one of the above methods.

[0056] In another aspect, an embodiment of this specification also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is run by the processor of a computer device, it executes the instructions of any one of the above methods.

[0057] In another aspect, an embodiment of this specification also provides a computer program product. When the computer program product is run by the processor of a computer device, it executes the instructions of any one of the above methods.

[0058] Through the method of the embodiment of this specification, after obtaining the power rate of the power system, the power rate of the power system can be integrated within a specified sampling period to obtain the power quantity required by the power system within the specified sampling period, so as to effectively offset the frequency deviation of the power system and be able to compensate for the network delay attack of a random and unknown deterministic network.

[0059] To make the above and other purposes, features, and advantages of this specification more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes the following detailed description. Description of the Drawings

[0060] To more clearly illustrate the technical solutions in the embodiments of this specification or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of this specification. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0061] Figure 1 It shows a schematic flowchart of a power system power control method under a deterministic network delay attack provided by an embodiment of this specification;

[0062] Figure 2 It shows a schematic flowchart of a method for establishing a power system power response augmented model provided by an embodiment of this specification;

[0063] Figure 3 It shows a schematic flowchart of a method for establishing a predictive model controller provided by an embodiment of this specification;

[0064] Figure 4 Shows the schematic diagram of the module structure of a power system power control device under a deterministic network delay attack provided by the embodiments of this specification;

[0065] Figure 5 Shows the schematic diagram of the structure of a computer device provided by the embodiments of this specification.

[0066] Description of the attached drawing symbols:

[0067] 100, Network delay determination module;

[0068] 200, Control offset determination module;

[0069] 300, Estimated state variable determination module;

[0070] 400, State variable determination module;

[0071] 500, Power rate determination module;

[0072] 600, Power quantity determination module;

[0073] 502, Computer device;

[0074] 504, Processor;

[0075] 506, Memory;

[0076] 508, Driving mechanism;

[0077] 510, Input / output module;

[0078] 512, Input device;

[0079] 514, Output device;

[0080] 516, Rendering device;

[0081] 518, Graphical user interface;

[0082] 520, Network interface;

[0083] 522, Communication link;

[0084] 524, Communication bus. Detailed implementation manners

[0085] Next, the technical solutions in the embodiments of this specification will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of this specification. Obviously, the described embodiments are only a part of the embodiments of this specification, rather than all the embodiments. Based on the embodiments in this specification, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope protected by the embodiments of this specification.

[0086] The modern power grid is a cyber-physical system, with advantages such as advanced control strategies and information and communication technologies. It is vulnerable to cyber attacks. Some common cyber attacks are denial of service, false data injection, and replay attacks. The time-delay switching attack is achieved by inserting time delays in deterministic network communication channels, which is highly destructive to the power system and can lead to power system instability, posing challenges to the load frequency control of the power system. Among them, load frequency control (LFC) is to adjust the frequency of the power system to the rated value (such as 50HZ) and / or maintain the exchange frequency of the regional tie line at the planned value. Frequency stability is an important indicator of the power quality of the power system. Any sudden change in the load may cause deviations in the exchange frequency of the inter-system tie line and fluctuations in the system frequency. Therefore, to ensure power quality, power system frequency control under deterministic network time-delay attacks is required.

[0087] To solve the above problems, the embodiments of this specification provide a power control method for a power system under deterministic network time-delay attacks. Figure 1 It is a schematic flowchart of a power control method for a power system under deterministic network time-delay attacks provided by the embodiments of this specification. This specification provides the method operation steps as described in the embodiments or flowcharts, but based on routine or non-creative labor, it may include more or fewer operation steps. The order of steps listed in the embodiments is only one of the execution orders of numerous steps and does not represent the only execution order. When the actual system or device product executes, it can be executed in the order of the method shown in the embodiments or the drawings or executed in parallel.

[0088] It should be noted that the terms "first", "second", etc. in the description, claims, and the above-mentioned drawings of the embodiments of this specification are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of this specification described here can be implemented in an order other than those illustrated or described here. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, device, product, or equipment that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or equipment.

[0089] Referring to Figure 1 , the embodiments of this specification disclose a power control method for a power system under a deterministic network delay attack, including:

[0090] S101: Send a signal to the deterministic network through a super-twisting delay estimator, and receive the external signal returned by the deterministic network to obtain the network delay of the deterministic network;

[0091] S102: Input the network delay and the power change amount of the power system into the augmented power response model of the power system to obtain a control offset;

[0092] S103: Input the control offset into a state observer to obtain an estimated state variable;

[0093] S104: Input the estimated state variable into a sequential state predictor to obtain the state variable under the network delay;

[0094] S105: Input the state variable into a predictive model controller to obtain the power rate of the power system;

[0095] S106: Integrate the power rate of the power system within a specified sampling period to obtain the required power amount of the power system within the specified sampling period to offset the frequency deviation of the power system.

[0096] In the embodiments of this specification, the super-twisting delay estimator is characterized by the following formula:

[0097]

[0098]

[0099] where σ(t) is the sliding mode surface of the super-twisting delay estimator, m(·) is the external signal, is the derivative of the external signal, t is the current moment considering the network delay, τ(t) is the network delay of the deterministic network, is the estimated network delay of the deterministic network, t is the current moment considering the network delay, is the derivative of, α1 and α2 are positive constants, and sgn(·) is the sign function.

[0100] A deterministic network is a network communication system designed to provide a highly predictable, stable, and controllable communication environment. Compared with traditional networks, deterministic networks ensure that data transmission in the deterministic network can reach the destination within a predetermined time by optimizing data transmission paths, time-sensitive protocols, and intelligent traffic management. The super-twisting delay estimator can send signals to the deterministic network to receive external signals returned by the deterministic network. Network delay refers to the delay time of the signal during transmission. The super-twisting delay estimator can obtain the network delay of the deterministic network based on the external signals returned by the deterministic network. The design of the sliding surface is used to maintain the balance of the error state of the super-twisting delay estimator.

[0101] The derivative of the estimated network delay of the deterministic network can be obtained from the above formula (1). After obtaining the derivative, the derivative of the estimated network delay can be integrated over a specified sampling period to obtain the estimated network delay of the deterministic network within the specified sampling period. Based on the estimated network delay of the deterministic network obtained by integration The network delay τ(t) of the deterministic network is equivalently obtained.

[0102] In the embodiments of this specification, with reference to Figure 2 The method for establishing the power system power response augmented model includes:

[0103] S201: Establish a power system power response model;

[0104] S202: By introducing auxiliary variables to minimize the steady-state error of the power system, based on the power system power response model, obtain the power system power response model after minimizing the steady-state error;

[0105] S203: Based on the existence of network delay in the deterministic network, obtain the power system power response augmented model according to the power system power response model after minimizing the steady-state error.

[0106] The power system power response model is characterized by the following formula:

[0107]

[0108] Wherein, C p = [0 1], x p (t) is the state variable, is the derivative of the state variable, y(t) is the control offset, A p , B p , C p are all coefficient matrices of the power system, [·] T is the transpose of the matrix, H is the inertia constant, D is the damping coefficient, T gis the reducer - turbine constant, R g is the equivalent vertical drop constant, P S (·), respectively represent the power of the power system, the change in mechanical power, the change in power of the power system, and the power offset. t is the current moment considering the network delay.

[0109] The power system power response model after minimizing the steady - state error is characterized by the following formula:

[0110]

[0111]

[0112] where v(t) is an auxiliary variable, is the derivative of the auxiliary variable, is the power rate of the power system, is the derivative of the control offset.

[0113] The augmented power system power response model is characterized by the following formula:

[0114]

[0115] y(t)=Cx(t) (4)

[0116] where x(t)=[v(t) y(t)] T , is the derivative of x(t), B = [B p 0] T , C = [0 I], τ(t) is the network delay of the deterministic network, I is the identity matrix, and t is the current moment considering the network delay.

[0117] The network delay and the change in power of the power system are input into the augmented power system power response model to obtain the control offset y(t).

[0118] In the embodiments of this specification, the state observer is characterized by the following formula:

[0119]

[0120] where, is the estimated state variable, is the derivative of the estimated state variable, B = [B p 0] T , C = [0 I], I is the identity matrix, C p= [0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent sag constant, is the power rate of the power system, y(t) is the control offset, K ob (·) is the state observer gain, t is the current time considering network delay, is the estimated network delay of the deterministic network.

[0121] Input the control offset y(t) into the state observer in formula (5) to obtain the derivative of the estimated state variable After obtaining the derivative, the derivative of the estimated state variable can be integrated over a specified sampling period to obtain the estimated state variable within the specified sampling period.

[0122] In the embodiments of this specification, a sequential state predictor is designed to handle the network delay problem. Through extended sequential prediction, the estimated state variables of the power system at different time scales are obtained z i (t) is defined as the actual value x(t + τ(t)) of the predicted state, and the sequential state predictor is expressed as a continuous estimation set of, where i = 1, 2,..., N, and N is the prediction step. Therefore, the dynamic model of the sequential state predictor is expressed as:

[0123]

[0124] Among them, B = [B p 0] T , C p = [0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent sag constant, is the power rate of the power system, N is the prediction step of the sequential state predictor, K SP1 , K SP2 ,…, K SPN respectively represent the prediction gains of the prediction model controller when i = 1, 2,..., N, x(t) = [v(t) y(t)] T , v(t) is the auxiliary variable, y(t) is the control offset, τ(t) is the network delay of the deterministic network, z1(t),…, z N-1 (t) respectively represent the prediction state sequences when i = 1,..., N - 1, respectively represent the prediction state sequences considering delay when i = 1,…, N, respectively represent the derivatives of the predicted state sequences when i = 1, …, N, and t is the current moment considering the network delay.

[0125] It should be noted that since x(t) is not easily obtained, it is obtained from the state observer The sequential state predictor is modified to:

[0126]

[0127] where B = [B p 0] T , C p = [0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent sag constant, is the power rate of the power system, N is the prediction step of the sequential state predictor, K SP1 , K SP2 , …, K SPN respectively represent the prediction gains of the prediction model controller when i = 1, 2, …, N, is the estimated state variable, is the estimated network delay of the deterministic network, z1(t), …, z N-1 (t) respectively represent the predicted state sequences when i = 1, …, N - 1, respectively represent the predicted state sequences considering the delay when i = 1, …, N, respectively represent the derivatives of the predicted state sequences when i = 1, …, N, and t is the current moment considering the network delay.

[0128] The sequential state predictor obtains the estimated state variable by extended sequence prediction and inputs it into the sequential state predictor to obtain Integrate to obtain the state variable z N (t) under the network delay.

[0129] In the embodiments of this specification, referring to Figure 3 , the establishment method of the prediction model controller includes:

[0130] S301: Establish a cost function and the constraint conditions of the cost function, where the constraint conditions include the power rate constraint condition of the power system, the power constraint condition of the power system, and the frequency constraint condition of the power system;

[0131] S302: Calculate the cost function and the constraints according to the quadratic programming algorithm to obtain the control gain;

[0132] S303: Establish a predictive model controller according to the control gain and the relationship between the state variables and the power rate of the power system under the network delay.

[0133] When establishing the cost function, first design the cost function as:

[0134]

[0135] where J is the cost function, T p is the prediction time interval of the predictive model controller, T p = qk, k is a constant step size, q is an integer, is an arbitrary time interval, k is a constant step size, is the predicted state variable, Q and R are weight matrices, is the power rate of the power system, and t is the current moment considering the network delay.

[0136] The first term of the cost function (8), the actual state variable is:

[0137]

[0138] where η is a vector coefficient, is the predicted state intermediate variable, is an arbitrary time interval, L(t) is the Laguerre function matrix, B = [B p 0] T , H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent droop constant.

[0139] Using the estimated state variable to replace we get:

[0140]

[0141] where the convolution integral can be recursively solved by dividing the prediction time interval T p of the predictive model controller into an arbitrary time interval k is a constant step size, q is an integer. In a single - input power system, R is a scalar. Therefore, the second term of the cost function (8) can be reformulated as:

[0142]

[0143] Substituting equations (9) and (11) into equation (8), the cost function is simplified to:

[0144]

[0145] where, is the estimated state variable.

[0146] By taking the partial derivative of the cost function (12), we get:

[0147]

[0148] where η is the vector coefficient.

[0149] Since the second term of the cost function (12) is a constant, the cost function (12) can be:

[0150]

[0151] where η is the vector coefficient, T p = qk, where k is the constant step size and q is an integer, is the transpose of the predicted state intermediate variable, Q and R are the weight matrices, C p = [0 1], H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent vertical drop constant, is the estimated state variable.

[0152] In practical applications, the power of the power system is subject to certain limitations. These limitations are considered as actuator constraints, which need to be incorporated into the control formula to meet the control objectives. In addition, to maintain the system frequency standard, the allowable range of the system frequency is considered in the control design. Accordingly, the constraint conditions are divided into three aspects: power rate constraint of the power system, power constraint of the power system, and system frequency constraint. These constraints are expressed as linear inequalities, providing the necessary boundary conditions for real - time optimization.

[0153] 1) Power rate of the power system

[0154] During the perturbation process, the magnitude of the power rate of the power system affects the characteristics of the power injected into the power system. The slow ramp - up ability of the power system may cause the time required for the power system to reach the maximum power to slow down, thus affecting the lowest frequency point and the transient time. The power rate of the power system is limited to

[0155]

[0156] Among them, P RR,up and P RR,dn represent the maximum power rate and the minimum power rate respectively.

[0157] At t = 0, the constraint is:

[0158]

[0159] Among them, L(t) is the Laguerre function matrix, λ is the time scale factor of the Laguerre function, λ > 0, and η is the vector coefficient.

[0160] It should be noted that the input of the augmented model of the power system power response is the power rate of the power system This condition means that if Bounded input and bounded output stability can be achieved. This condition causes the control signal to converge to its steady-state value, which can be expressed as:

[0161]

[0162] Among them, is the steady-state control signal.

[0163] Considering the influence of network delay attack, approximate response through a set of Laguerre functions:

[0164]

[0165] Then we can get:

[0166] Among them, η is the vector coefficient.

[0167] 2) The power system is a device with limited capacity, and its power is restricted by its specifications, which can be expressed as:

[0168] P C,max ≤P S (t)≤P D,max (19)

[0169] Among them, P S (·) is the power of the power system, P C,max is the maximum charging power, and P D,max is the maximum discharging power.

[0170] Therefore, the power rate of the power system is expressed as:

[0171]

[0172] Among them, T s is the specified sampling time, t is the current moment considering the network delay, and η is the vector coefficient. The power of the power system at moment t can be expressed as:

[0173] P S (t) = P S (t - T s ) + L(0) T ηT s (21)

[0174] Therefore, it can be obtained that:

[0175] P C,max - P S (t - T s ) ≤ L(0) T ηT s ≤ P D,max - P S (t - T s ) (22)

[0176] Formula (22) can be integrally expressed as:

[0177]

[0178] 3) System frequency

[0179] The system frequency deviation range is expressed as

[0180]

[0181] Among them, C = [0 I], I is the identity matrix, is the estimated state variable, is an arbitrary time interval, y min and y max represent the minimum frequency deviation and the maximum frequency deviation respectively; further, it can be obtained that:

[0182]

[0183] Among them, is the transpose of the predicted state intermediate variable, is an arbitrary time interval, H is the inertia constant, D is the damping coefficient, T g is the reducer - turbine constant, R g is the equivalent droop constant.

[0184] Formula (25) is equivalent to:

[0185]

[0186] Therefore, it can be expressed as:

[0187]

[0188] The constraint conditions are abbreviated as:

[0189]

[0190] where M and β are constraint vectors, specifically:

[0191]

[0192] According to the quadratic programming algorithm, the cost function and constraint conditions are calculated to obtain the control gain K mpc .

[0193] In the embodiments of the present specification, the predictive model controller is characterized by the following formula:

[0194]

[0195] where K mpc is the control gain, is the power rate of the power system, and z N (t) is the state variable under network delay.

[0196] Through the method of the embodiments of the present specification, after obtaining the power rate of the power system, the power rate of the power system can be integrated within a specified sampling period to obtain the required power amount of the power system within the specified sampling period, so as to effectively offset the frequency deviation of the power system and be able to compensate for the network delay attack of a random and unknown deterministic network.

[0197] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or fully authorized by all parties. Moreover, the processing of relevant data, such as collection, storage, use, processing, transmission, provision, disclosure, and application, all comply with the relevant laws, regulations, and standards of relevant countries and regions, take necessary confidentiality measures, do not violate public order and good customs, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0198] The present application provides corresponding operation entrances for users for big data analysis (such as personal biometric characteristics, identity data, consumption data, asset data, electronic terminal operation data, etc.) for users to choose to agree or refuse the results of automated decision-making; if the user chooses to refuse, the expert decision-making process will be entered.

[0199] Based on the power system power control method under a deterministic network delay attack described above, the embodiments of this specification also correspondingly provide a power system power control device under a deterministic network delay attack. The described device may include a system (including a distributed system), software (application), module, component, server, client, etc. that uses the method described in the embodiments of this specification and combines the necessary implementation hardware. Based on the same innovative concept, the devices in one or more embodiments provided by the embodiments of this specification are as described in the following embodiments. Since the implementation solutions for the device to solve problems are similar to the method, the implementation of the specific device in the embodiments of this specification can refer to the implementation of the foregoing method, and the repeated parts will not be elaborated. As used hereinafter, the term "unit" or "module" may be a combination of software and / or hardware that can achieve a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.

[0200] Specifically, Figure 4 is a schematic diagram of the module structure of an embodiment of a power system frequency control device under a deterministic network delay attack provided by the embodiments of this specification. Referring to Figure 4 as shown, a power system frequency control device under a deterministic network delay attack provided by the embodiments of this specification includes: a network delay determination module 100, a control offset determination module 200, an estimated state variable determination module 300, a state variable determination module 400, a power rate determination module 500, and a power quantity determination module 600.

[0201] The network delay determination module 100 is configured to send a signal to the deterministic network through a super-twisting delay estimator and receive an external signal returned by the deterministic network to obtain the network delay of the deterministic network;

[0202] The control offset determination module 200 is configured to input the network delay and the power change amount of the power system into the power system power response augmented model to obtain a control offset;

[0203] The estimated state variable determination module 300 is configured to input the control offset into a state observer to obtain an estimated state variable;

[0204] The state variable determination module 400 is configured to input the estimated state variable into a sequential state predictor to obtain the state variable under the network delay;

[0205] The power rate determination module 500 is configured to input the state variable into a predictive model controller to obtain the power rate of the power system;

[0206] A power quantity determination module 600 is configured to integrate the power rate of the power system within a specified sampling period to obtain the power quantity required by the power system within the specified sampling period, so as to offset the frequency deviation of the power system.

[0207] Referring to Figure 5 As shown, based on the power system frequency control method under a deterministic network delay attack described above, an embodiment of this specification further provides a computer device 502, where the above method runs on the computer device 502. The computer device 502 may include one or more processors 504, such as one or more central processing units (CPUs) or graphics processing units (GPUs), and each processing unit may implement one or more hardware threads. The computer device 502 may also include any memory 506, which is used to store any kind of information such as code, settings, data, etc. In a specific implementation, a computer program stored on the memory 506 and executable on the processor 504, when the computer program is run by the processor 504, may execute the instructions according to the above method. Non-limitingly, for example, the memory 506 may include any one or a combination of the following: any type of RAM, any type of ROM, flash memory devices, hard disks, optical discs, etc. More generally, any memory may use any technology to store information. Further, any memory may provide volatile or non-volatile retention of information. Further, any memory may represent a fixed or removable component of the computer device 502. In one case, when the processor 504 executes the associated instructions stored in any memory or combination of memories, the computer device 502 may perform any operation of the associated instructions. The computer device 502 further includes one or more drive mechanisms 508 for interacting with any memory, such as a hard disk drive mechanism, an optical disc drive mechanism, etc.

[0208] The computer device 502 may also include an input / output module 510 (I / O), which is used to receive various inputs (via the input device 512) and to provide various outputs (via the output device 514). A specific output mechanism may include a presentation device 516 and an associated graphical user interface 518 (GUI). In other embodiments, the input / output module 510 (I / O), the input device 512, and the output device 514 may not be included, and it may only be a computer device in the network. The computer device 502 may also include one or more network interfaces 520, which are used to exchange data with other devices via one or more communication links 522. One or more communication buses 524 couple the components described above together.

[0209] The communication link 522 can be implemented in any way, for example, through a local area network, a wide area network (e.g., the Internet), a point-to-point connection, etc., or any combination thereof. The communication link 522 can include any combination of hardwired links, wireless links, routers, gateway functions, name servers, etc. governed by any protocol or combination of protocols.

[0210] Corresponding to Figures 1-3 In the method of the embodiments of the present specification, the embodiments of the present specification also provide a computer-readable storage medium, on which a computer program is stored, and when the computer program is run by a processor, the steps of the above method are executed.

[0211] The embodiments of the present specification also provide a computer-readable instruction, wherein when the processor executes the instruction, the program therein causes the processor to execute as Figures 1 to 3 shown in the method.

[0212] The embodiments of the present specification also provide a computer program product, and when the computer program product is run by a processor of a computer device, the method as Figures 1 to 3 shown is executed.

[0213] The computer program product described in the present specification is a software product that mainly implements the method described in the present specification through a computer program.

[0214] It should be understood that in various embodiments of the present specification, the magnitudes of the sequence numbers of the above processes do not mean the order of execution is prior or subsequent. The order of execution of each process should be determined according to its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present specification.

[0215] It should also be understood that in the embodiments of the present specification, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the embodiments of the present specification generally represents an "or" relationship between the associated objects before and after.

[0216] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in the embodiments of the present specification can be implemented by electronic hardware, computer software, or a combination of the two. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the embodiments of the present specification.

[0217] Those skilled in the art can clearly understand that for the convenience and conciseness of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0218] In the several embodiments provided in this specification, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is only a logical function division, and there can be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed couplings, direct couplings, or communication connections to each other can be indirect couplings or communication connections through some interfaces, devices, or units, and can also be in electrical, mechanical, or other forms of connection.

[0219] The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiments of this specification.

[0220] In addition, in each embodiment of this specification, the functional units can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

[0221] If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this specification, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the embodiments of this specification. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0222] In this specification, specific embodiments are used to elaborate on the principles and implementation manners of the embodiments of this specification. The description of the above embodiments is only used to help understand the method and its core idea of the embodiments of this specification; at the same time, for those of ordinary skill in the art, according to the idea of the embodiments of this specification, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation on the embodiments of this specification.

Claims

1. A method for controlling power system frequency under deterministic network delay attack, characterized in that: include: Sending a signal to a deterministic network through a superhelical delay estimator and receiving an external signal returned by the deterministic network to obtain a network delay of the deterministic network; Inputting the network time delay and the power variation of the power system into the power response augmented model of the power system to obtain a control offset; Inputting the control offset into a state observer to obtain an estimated state variable; Inputting the estimated state variables into a sequence state predictor to obtain the state variables under the network delay; Inputting the state variable into a prediction model controller to obtain a power system power rate; Integrating the power rate of the power system within a specified sampling period to obtain the power required by the power system within the specified sampling period to offset the frequency deviation of the power system; The superhelical delay estimator is characterized by the following formula: Where σ(t) is the sliding mode surface of the super-helical delay estimator, m(·) is the external signal, is the derivative of the external signal, t is the current time considering the network delay, τ(t) is the network delay of the deterministic network, Estimated network latency for deterministic networks, for The derivative of , α1 and α2 are positive constants, sgn(·) is a sign function; The method for establishing the power system power response augmented model includes: Establish power system power response model; By introducing auxiliary variables to minimize the steady-state error of the power system, a power response model of the power system after the steady-state error is minimized is obtained according to the power response model of the power system; Based on the existence of network delay in the deterministic network, an augmented power response model of the power system is obtained according to the power response model of the power system after the steady-state error is minimized; The power system power response model is characterized by the following formula: in, C p =[01],x p (t) is the state variable, is the derivative of the state variable, y(t) is the control offset, A p , B p , C p are the coefficient matrices of the power system, [·] T is the transpose of the matrix, H is the inertia constant, D is the damping coefficient, T g is the reducer-turbine constant, R g is the equivalent sag constant, P S (·), They represent the power system power, mechanical power change, power system power change, and power offset respectively, and t is the current time considering the network delay; The power response model of the power system after the steady-state error is minimized is characterized by the following formula: Among them, v(t) is an auxiliary variable, is the derivative of the auxiliary variable, is the power system power rate, is the derivative of the control offset; The power system power response augmented model is characterized by the following formula: y(t) = Cx(t); where x(t) = [v(t) y(t)] T , is the derivative of x(t), B=[B p 0] T , C = [0 I], τ(t) is the network delay of the deterministic network, I is the unit matrix, and t is the current time considering the network delay.

2. The method according to claim 1, characterized in that The state observer is characterized by the following formula: in, To estimate the state variables, is the derivative of the estimated state variable, B=[B p 0] T , C = [0I], I is the unit matrix, C p =[01], H is the inertia constant, D is the damping coefficient, T g is the reducer-turbine constant, R g is the equivalent sag constant, is the power system power rate, y(t) is the control offset, K ob (·) is the state observer gain, t is the current time considering network delay, is the estimated network latency for a deterministic network.

3. The method according to claim 1, characterized in that The sequence state predictor comprises: in, B=[B p 0] T , C p =[01], H is the inertia constant, D is the damping coefficient, T g is the reducer-turbine constant, R g is the equivalent sag constant, is the power system power rate, N is the prediction step size of the sequence state predictor, K SP1 ,K SP2 ,…,K SPN They represent the prediction gains of the prediction model controller when i=1,2,…,N respectively, To estimate the state variables, is the estimated network delay of the deterministic network, z1(t),…,z N-1 (t) respectively represent the predicted state sequence when i=1,...,N-1, They represent the predicted state sequence considering delay when i=1,…,N respectively, They represent the derivatives of the predicted state sequence when i=1,...,N respectively, and t is the current time considering the network delay.

4. The method according to claim 1, characterized in that The method for establishing the prediction model controller includes: Establishing a cost function and constraints of the cost function, wherein the constraints include power system power rate constraints, power system power constraints, and power system frequency constraints; Calculating the cost function and the constraint conditions according to a quadratic programming algorithm to obtain a control gain; A prediction model controller is established based on the control gain and the relationship between the state variable under the network delay and the power rate of the power system.

5. The method according to claim 4, characterized in that The cost function and the constraints of the cost function are represented by the following formula: Constrained to: Mη≤β; Among them, η is the vector coefficient, T p =qk, k is a constant step size, q is an integer, is the transposition of the intermediate variable of the prediction state, Q and R are weight matrices, H is the inertia constant, D is the damping coefficient, T g is the reducer-turbine constant, R g is the equivalent sag constant, To estimate the state variables, M and β are constraint vectors.

6. The method according to claim 4, characterized in that The predictive model controller is characterized by the following formula: Among them, K mpc To control the gain, is the power system power rate, z N (t) is the state variable under network delay.

7. A power system frequency control device under deterministic network delay attack, characterized in that: The device comprises: A network delay determination module, configured to send a signal to a deterministic network through a superhelical delay estimator, and receive an external signal returned by the deterministic network to obtain a network delay of the deterministic network; A control offset determination module, used for inputting the network delay and the power variation of the power system into the power response augmented model of the power system to obtain the control offset; An estimated state variable determination module, used for inputting the control offset into a state observer to obtain an estimated state variable; A state variable determination module, used for inputting the estimated state variable into a sequence state predictor to obtain the state variable under the network delay; A power rate determination module, used for inputting the state variable into the prediction model controller to obtain the power rate of the power system; A power quantity determination module, used for integrating the power rate of the power system within a specified sampling period to obtain the power quantity required by the power system within the specified sampling period to offset the frequency deviation of the power system; The superhelical delay estimator is characterized by the following formula: Where σ(t) is the sliding mode surface of the super-helical delay estimator, m(·) is the external signal, is the derivative of the external signal, t is the current time considering the network delay, τ(t) is the network delay of the deterministic network, Estimated network latency for deterministic networks, for The derivative of , α1 and α2 are positive constants, sgn(·) is a sign function; The control offset determination module is further used for: the method for establishing the power system power response augmented model includes: Establish power system power response model; By introducing auxiliary variables to minimize the steady-state error of the power system, a power response model of the power system after the steady-state error is minimized is obtained according to the power response model of the power system; Based on the existence of network delay in the deterministic network, an augmented power response model of the power system is obtained according to the power response model of the power system after the steady-state error is minimized; The power system power response model is characterized by the following formula: in, C p =[01],x p (t) is the state variable, is the derivative of the state variable, y(t) is the control offset, A p , B p , C p are the coefficient matrices of the power system, [·] T is the transpose of the matrix, H is the inertia constant, D is the damping coefficient, T g is the reducer-turbine constant, R g is the equivalent sag constant, P S (·), They represent the power system power, mechanical power change, power system power change, and power offset respectively, and t is the current time considering the network delay; The power response model of the power system after the steady-state error is minimized is characterized by the following formula: Among them, v(t) is an auxiliary variable, is the derivative of the auxiliary variable, is the power system power rate, is the derivative of the control offset; The power system power response augmented model is characterized by the following formula: y(t) = Cx(t); where x(t) = [v(t) y(t)] T , is the derivative of x(t), B=[B p 0r T , C = [0 I], τ(t) is the network delay of the deterministic network, I is the unit matrix, and t is the current time considering the network delay.

8. A computer device comprising a memory, a processor, and a computer program stored in the memory, characterized in that: When the computer program is executed by the processor, the computer program executes the instructions of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor of a computer device, the computer program executes instructions of the method according to any one of claims 1 to 6.

10. A computer program product, characterized in that When the computer program product is executed by a processor of a computer device, the computer program product executes instructions of the method according to any one of claims 1 to 6.

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