Solar cell and component

Abstract

The present application relates to a silicon solar cell, comprising: a silicon substrate, the silicon substrate containing antimony elements, and a carrier separation layer formed on the silicon substrate, wherein the carrier separation layer has antimony elements in at least a portion of a side close to the silicon substrate to form an antimony-containing layer; the peak concentration of the antimony element in the antimony-containing layer is a1, and a1 is equal to or greater than 1E13atoms / cm 3 .

Description

Technical Field

[0001] The present application relates to the field of solar photovoltaics, and in particular to a silicon wafer, and to solar cells and battery modules. Background Art

[0002] In current silicon solar cells, the substrate usually uses a silicon wafer with an n-type or p-type doped substrate. P-type and n-type semiconductors are formed at different locations on the silicon wafer, and then electrodes are formed on the p-type and n-type semiconductor regions to form electrodes. When light enters the silicon cell substrate, electron-hole pairs are generated. The free electron-hole pairs are separated by carriers, so that electrons gather near the n-pole and holes gather near the p-pole. When an external circuit is connected to the electrode, current can be output.

[0003] In the prior art, a p-type substrate or an n-type substrate is usually used as a photovoltaic semiconductor substrate. The p-type substrate is usually doped with boron or gallium. The n-type substrate is usually doped with phosphorus. Summary of the invention

[0004] N-type semiconductor substrates have the advantage of long minority carrier diffusion length. When used in silicon solar cells for power generation, more carriers will be collected compared to p-type substrates, which means they have higher efficiency. N-type substrates are usually doped with phosphorus. However, both N-type doped semiconductor substrates and P-type doped semiconductor substrates have reduced efficiency due to poor passivation. Therefore, the present application is intended to change the problem of poor passivation in the above-mentioned prior art.

[0005] The inventors of the present application discovered that when antimony is doped into a silicon substrate, the antimony will overflow into the semiconductor layer to a certain extent. The antimony overflowed into the semiconductor layer will bond with Si in the semiconductor layer, inhibiting the generation of bubbles in the semiconductor layer and avoiding the formation of voids. This can effectively improve passivation and solve the problem of carrier transport inhibition.

[0006] This application involves the following:

[0007] 1. A silicon solar cell, comprising:

[0008] A silicon substrate containing antimony elements, and

[0009] A carrier separation layer is formed on a silicon substrate, wherein:

[0010] The carrier separation layer has antimony elements in at least a portion of a side close to the silicon substrate to form an antimony-containing layer;

[0011] The peak concentration of antimony element in the antimony-containing layer is a 1 , and a 1Equal to or greater than 1E13 atoms / cm 3 .

[0012] 2. The silicon solar cell according to item 1, wherein:

[0013] The concentration of antimony in the silicon substrate is a, and the range of a is 1E13-1E18 atoms / cm 3 ;or

[0014] The concentration of antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1 It is more than 2nm.

[0015] 3. The silicon solar cell according to item 1 or 2, wherein:

[0016] The carrier separation layer is selected from a doped semiconductor layer, a molybdenum oxide layer, and a PEDOT:PSS layer,

[0017] When the carrier separation layer is a doped semiconductor layer, an interface passivation layer is arranged between the silicon substrate and the carrier separation layer. Preferably, the material of the interface passivation layer is selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide or intrinsic amorphous silicon.

[0018] 4. The silicon solar cell according to any one of items 1 to 3, wherein the concentration of the antimony element in the antimony-containing layer of the carrier separation layer gradually decreases in a direction from a side close to the silicon substrate toward a side opposite to the silicon substrate.

[0019] 5. The silicon solar cell according to any one of items 2 to 4, wherein a / a 1 It is defined as u, and the range of u is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0020] 6. The silicon solar cell according to any one of items 3 to 5, wherein

[0021] The silicon substrate has a B x Elements, forming B x layer,

[0022] The B x Layer B x The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2 It is more than 20nm.

[0023] 7. The silicon solar cell according to item 6, wherein:

[0024] The doped semiconductor layer B x The concentration of the element is b, and the range of b is 1E18~5E22atoms / cm 3 ,

[0025] The B x B in layer x The peak concentration of element b 1 ,

[0026] b / b 1 Defined as v, the range of v is 0.5 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5.

[0027] 8. The silicon solar cell according to item 7, wherein:

[0028] b 1 / a 1 Defined as w, w>1, preferably w>100, preferably w is greater than 1000, and more preferably 1E3 to 1E8.

[0029] 9. The silicon solar cell according to item 6, wherein:

[0030] D 2 / d 1 Defined as x, x is greater than or equal to 1, preferably the range of x is 10 to 1E8, and more preferably 20 to 1E7.

[0031] 10. The silicon solar cell according to any one of items 6 to 9, wherein

[0032] The interface passivation layer contains antimony element, and the peak concentration of the antimony element in the interface passivation layer is a 2 , a 2 The range is 1E13~1E18 atoms / cm 3 , and / or

[0033] The interfacial passivation layer contains B x element, B in the interfacial passivation layer x The peak concentration of element b 2 , b 2 The range is 1E19~1E22 atoms / cm 3 ,

[0034] Preferably b 2 / a 2 Defined as y, y>1, preferably y is in the range of 10 to 1E9.

[0035] 11. The silicon solar cell according to any one of items 6 to 10, wherein

[0036] B x When the element is selected from the fifth main group or the sixth main group, the concentration of the antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1 It is greater than 2 nm, and preferably the range of w is 1E4 to 1E8.

[0037] 12. The silicon solar cell according to item 11, wherein:

[0038] The doped semiconductor layer B x The concentration of the element is 1E19~5E22 atoms / cm 3 ; Preferably said B x The element is phosphorus. At this time, the concentration of phosphorus in the phosphorus-containing layer is greater than 1E17 atoms / cm 3 The thickness of the area d 2 The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2 It is greater than 120nm, greater than 200nm or greater than 300nm.

[0039] 13. The silicon solar cell according to any one of items 6 to 10, wherein

[0040] The B x When the element is selected from the third main group, the concentration of antimony element in the antimony-containing layer is greater than 1E13 atoms / cm 3 The thickness of the area d 1 It is 3 nm or more, and the range of w is preferably 1E3 to 1E7.

[0041] 14. The silicon solar cell according to item 13, wherein:

[0042] The doped semiconductor layer B x The concentration of the element is 1E18~5E21 atoms / cm 3 , preferably B x The element is boron. At this time, the concentration of boron in the boron-containing layer is greater than 1E17 atoms / cm 3 The thickness of the area d 2 The thickness d is 30 nm or more, preferably 40 nm or more, 50 nm or more, and more preferably 2It is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

[0043] 15. The silicon solar cell according to any one of items 3 to 14, wherein

[0044] When the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed on the other side of the silicon substrate away from the P-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1p , change a / a 1p Defined as u p ,u p The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7; or

[0045] When the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed in the silicon substrate on the other side of the silicon substrate away from the N-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1n , change a / a 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0046] 16. The silicon solar cell according to item 15, wherein

[0047] When the doped semiconductor layer is a P-type doped semiconductor layer, an N-type

[0048] When the semiconductor layer is doped, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p 3nm or more; or

[0049] When the doped semiconductor layer is an N-type doped semiconductor layer and a P-type doped semiconductor layer is formed on the side of the silicon substrate opposite to the N-type doped semiconductor layer, the concentration of the antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is more than 2nm.

[0050] In a preferred embodiment, the carrier separation layer and the interface passivation layer are formed on the back side of the silicon substrate to form a PN junction with the silicon substrate.

[0051] 17. The silicon solar cell according to any one of items 3 to 14, wherein

[0052] The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the second interface passivation layer are formed on both sides of the silicon substrate, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are respectively formed on a side of the first interface passivation layer away from the silicon substrate and a side of the second interface passivation layer away from the silicon substrate, the first doped semiconductor layer is doped with a third main group element, and the second doped semiconductor layer is doped with a fifth main group element or a sixth main group element,

[0053] The area of ​​the first doped semiconductor layer is smaller than or larger than the area of ​​the second doped semiconductor layer;

[0054] The first doped semiconductor layer has antimony elements in at least a portion of a side close to the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of a side close to the second interface passivation layer to form a second antimony-containing layer.

[0055] The peak concentration of antimony element in the first antimony-containing layer is a 1p , and a 1p Equal to or greater than 1E13atoms / cm 3 , the peak concentration of antimony element in the second antimony-containing layer is a 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

[0056] 18. The silicon solar cell according to item 17, wherein:

[0057] The concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of the antimony element in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n ;

[0058] Preferably, the concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1pThe thickness of the second antimony-containing layer is greater than 2 nm, and the concentration of antimony in the second antimony-containing layer is greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is above 3nm.

[0059] 19. A silicon solar cell according to item 17 or 18, wherein the concentration of antimony elements in the antimony-containing layer of the first doped semiconductor layer gradually decreases in a direction from a side close to the silicon substrate to a side opposite to the silicon substrate, and the concentration of antimony elements in the antimony-containing layer of the second doped semiconductor layer gradually decreases in a direction from a side close to the silicon substrate to a side opposite to the silicon substrate.

[0060] 20. The silicon solar cell according to any one of items 17 to 19, wherein

[0061] will a / a 1p Defined as u p ,u p The range is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and preferably 100 to 1E7;

[0062] will a / a 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0063] 21. The silicon solar cell according to any one of items 17 to 20, wherein

[0064] The silicon substrate has a B xp Elements, forming B xp layer;

[0065] The silicon substrate has a B xn Elements, forming B xn layer;

[0066] The B xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2p More than 30nm;

[0067] The B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

[0068] 22. The silicon solar cell according to item 21, wherein:

[0069] B xp The element is selected from the third main group, and B in the first doped semiconductor layer xp The concentration of the element is b p , b p The range is 1E18~5E21 atoms / cm 3 ,

[0070] The B xp B in layer xp The peak concentration of element b 1p ,

[0071] B xn The element is selected from the fifth main group or the sixth main group, and the B in the second doped semiconductor layer xn The concentration of the element is b n , b n The range is 1E19~5E22 atoms / cm 3 ,

[0072] The B xn B in layer xn The peak concentration of element b 1n ,

[0073] b p / b 1p Defined as v p , v p The range is 1 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5,

[0074] b n / b 1n Defined as v n , v n The range is 0.5 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5.

[0075] 23. The silicon solar cell according to item 22, wherein:

[0076] b 1p / a 1p Defined as w p , w p >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, more preferably 1E3 to 1E7;

[0077] b 1n / a 1n Defined as w n , w n >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and more preferably 1E4 to 1E8.

[0078] 24. The silicon solar cell according to any one of items 21 to 23, wherein

[0079] d 2p / d 1p Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7,

[0080] d 2n / d 1n Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7;

[0081] Preferred and / or 2p >d 2n , preferably d 2p -d 2n ≥5nm, preferably ≥10nm.

[0082] 25. The silicon solar cell according to any one of items 17 to 24, wherein

[0083] The first interface passivation layer contains antimony element, and the peak concentration of the antimony element in the first interface passivation layer is a 2p , a 2p The range is 1E13~1E18 atoms / cm 3 , and / or

[0084] The first interface passivation layer contains B xp element, B in the first interface passivation layer xp The peak concentration of element b 2p , b 2p The range is 1E19~1E22 atoms / cm 3 ,

[0085] Preferred b 2p / a 2p >1, preferably 10 to 1E9;

[0086] The second interface passivation layer contains antimony element, and the peak concentration of the antimony element in the second interface passivation layer is a 2n , a 2n The range is 1E13~1E18 atoms / cm 3 , and / or

[0087] The second interface passivation layer contains Bxn element, B in the second interface passivation layer xn The peak concentration of element b 2n , b 2n The range is 1E19~1E22 atoms / cm 3 ,

[0088] Preferred b 2n / a 2n >1, preferably 10~1E9.

[0089] 26. The silicon solar cell according to item 21, wherein:

[0090] The B xn The element is phosphorus, and it contains B xn The concentration of phosphorus in the layer is greater than 1E17atoms / cm 3 The thickness of the area d 2n The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2n is 120 nm or more, 200 nm or more or 300 nm or more; or

[0091] The B xp The element is boron, which contains B xp The concentration of boron in the layer is greater than 1E17atoms / cm 3 The thickness of the area d 2p The thickness d is 30 nm or more, preferably 40 nm or more, 50 nm or more, and more preferably 2p It is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

[0092] 27. The silicon solar cell according to any one of items 3 to 14, wherein

[0093] The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the second interface passivation layer are respectively formed on one side of the silicon substrate, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are respectively formed on a side of the first interface passivation layer away from the silicon substrate and on a side of the second interface passivation layer away from the silicon substrate,

[0094] The first doped semiconductor layer is doped with a third main group element, and the second doped semiconductor layer is doped with a fifth main group element or a sixth main group element.

[0095] The first interface passivation layer and the first doped semiconductor layer form a p-type region; the second interface passivation layer and the second doped semiconductor layer form an n-type region;

[0096] The first doped semiconductor layer has antimony elements in at least a portion of a side close to the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of a side close to the second interface passivation layer to form a second antimony-containing layer.

[0097] The peak concentration of antimony element in the first antimony-containing layer is a 1p atoms / cm 3 , and a 1p Equal to or greater than 1E13atoms / cm 3 , the peak concentration of antimony element in the second antimony-containing layer is a 1n atoms / cm 3 , and a 1n Equal to or greater than 1E13atoms / cm 3 .

[0098] 28. The silicon solar cell according to item 27, wherein:

[0099] The concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of the antimony element in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n ;

[0100] Preferably, the concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The thickness of the second antimony-containing layer is greater than 2 nm, and the concentration of antimony in the second antimony-containing layer is greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is above 3nm.

[0101] 29. A silicon solar cell according to item 27 or 28, wherein the concentration of antimony elements in the antimony-containing layer of the first doped semiconductor layer gradually decreases in a direction from a side close to the silicon substrate to a side opposite to the silicon substrate, and the concentration of antimony elements in the antimony-containing layer of the second doped semiconductor layer gradually decreases in a direction from a side close to the silicon substrate to a side opposite to the silicon substrate.

[0102] 30. The silicon solar cell according to any one of items 27 to 29, wherein

[0103] will a / a 1p Defined as u p ,u p The range is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and preferably 100 to 1E7;

[0104] will a / a 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0105] 31. The silicon solar cell according to any one of items 27 to 30, wherein

[0106] The silicon substrate has a B xp Elements, forming B xp layer;

[0107] The silicon substrate has a B xn Elements, forming B xn layer;

[0108] The B xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2p More than 30nm;

[0109] The B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

[0110] 32. The silicon solar cell according to item 31, wherein:

[0111] The B xp The element is selected from the third main group, and B in the first doped semiconductor layer xp The concentration of the element is b p , b p The range is 1E18~5E21 atoms / cm 3 ,

[0112] The B xp B in layer xp The peak concentration of element b 1p atoms / cm3 ,

[0113] The B xn The element is selected from the fifth main group or the sixth main group, and the B in the second doped semiconductor layer xn The concentration of the element is b n , b n The range is 1E19~5E22 atoms / cm 3 ,

[0114] The B xn B in layer xn The peak concentration of element b 1n atoms / cm 3 ,

[0115] b p / b 1p Defined as v p , v p The range is 1 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5,

[0116] b n / b 1n Defined as v n , v n The range is 0.5 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5.

[0117] 33. The silicon solar cell according to item 32, wherein:

[0118] b 1p / a 1p Defined as w p , w p >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, more preferably 1E3 to 1E7;

[0119] b 1n / a 1n Defined as w n , w n >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and more preferably 1E4 to 1E8.

[0120] 34. The silicon solar cell according to any one of items 31 to 33, wherein

[0121] d 2p / d 1p Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7,

[0122] d 2n / d 1n Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7;

[0123] Preferred 2p >d 2n , preferably d 2p -d 2n ≥5nm, preferably ≥10nm.

[0124] 35. The silicon solar cell according to any one of items 27 to 34, wherein

[0125] The first interface passivation layer contains antimony element, and the peak concentration of the antimony element in the first interface passivation layer is a 2p , preferably a 2p The range is 1E13~1E18 atoms / cm 3 , and / or

[0126] The first interface passivation layer contains B xp element, B in the first interface passivation layer xp The peak concentration of element b 2p , preferably b 2p The range is 1E19~1E22 atoms / cm 3 ,

[0127] Preferred b 2p / a 2p >1, preferably 10 to 1E9;

[0128] The second interface passivation layer contains antimony element, and the peak concentration of the antimony element in the second interface passivation layer is a 2n , preferably a 2n The range is 1E13~1E18 atoms / cm 3 , and / or

[0129] The second interface passivation layer contains B xn element, B in the second interface passivation layer xn The peak concentration of element b 2n , preferably b 2n The range is 1E19~1E22 atoms / cm 3 ,

[0130] Preferred b 2n / a 2n >1, preferably 10~1E9.

[0131] 36. The silicon solar cell according to item 35, wherein:

[0132] The B xn The element is phosphorus, and it contains B xn The concentration of phosphorus in the layer is greater than 1E17atoms / cm 3 The thickness of the area d 2n The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2n is 120 nm or more, 200 nm or more or 300 nm or more; or

[0133] The B xp The element is boron, which contains B xp The concentration of boron in the layer is greater than 1E17atoms / cm 3 The thickness of the area d 2p The thickness d is 30 nm or more, preferably 40 nm or more, 50 nm or more, and more preferably 2p It is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

[0134] 37. The battery according to any one of items 27 to 36, wherein a spacer region is provided between the p-type region and the n-type region, a substrate passivation layer is provided in the spacer region between the p-type region and the n-type region, and the substrate passivation layer covers the spacer region of the silicon substrate not covered by the p-type region and the n-type region,

[0135] An antimony-containing region is formed in the region of the substrate passivation layer close to the silicon substrate, and the concentration of the antimony element in the antimony-containing region is a 3 , a 3 Greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 ,

[0136] d 1钝化层 ≤d 1n ≤d 1p ,

[0137] Preferably, the d 1钝化层 ≥1nm.

[0138] 38. The battery according to item 37, wherein an intrinsic spacer region is provided in the spacer region between the p-type region and the n-type region, the intrinsic spacer region covers the spacer region of the silicon substrate not covered by the p-type region and the n-type region, and

[0139] The spacing region of the silicon substrate sequentially comprises an intrinsic semiconductor layer containing antimony elements and an intrinsic semiconductor layer not containing antimony elements in a direction away from the silicon substrate;

[0140] Preferably, the layer includes, from the silicon substrate toward the back side, an intrinsic region interface passivation layer, an intrinsic semiconductor layer containing antimony elements, and an intrinsic semiconductor layer not containing antimony elements;

[0141] The concentration of antimony in the intrinsic semiconductor layer containing antimony is a 3 , a 3 Greater than 1E13atoms / cm 3 The thickness of the area d 1i ,

[0142] d 1i ≤d 1n ≤d 1p ;

[0143] Preferably, the d 1i ≥2nm;

[0144] Preferably, the intrinsic region interface passivation layer contains antimony in the region close to the silicon substrate, and the concentration of antimony in the intrinsic region interface passivation layer is a 3 , a 3 Greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p , preferably the d 1钝化层 ≥2nm.

[0145] 39. The battery according to item 38, wherein an intrinsic region side interface passivation layer is provided between the intrinsic spacer region and the p-type region or the n-type region.

[0146] 40. The silicon solar cell according to any one of items 3 to 14,

[0147] The doped semiconductor layer is an N-type doped semiconductor layer to form an N-type region,

[0148] It also includes:

[0149] A P-region electrode is formed on a side of the silicon substrate having the N-type doped semiconductor layer and is spaced apart from the N-type doped semiconductor layer; and

[0150] The BSF layer is formed in the silicon substrate corresponding to the P-region electrode, and the BSF layer and the P-region electrode have the same metal element, and the peak concentration of the antimony element in the antimony-containing layer is a 1n , change a / a 1n Defined as u n ,un The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0151] 41. The silicon solar cell according to item 40, wherein:

[0152] The concentration of antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is more than 2nm.

[0153] 42. The silicon solar cell according to item 40 or 41, wherein:

[0154] will a / a 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0155] 43. The silicon solar cell according to any one of items 40 to 42, wherein

[0156] The silicon substrate has a B xn Elements, forming B xn layer; the B-containing xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

[0157] 44. The silicon solar cell according to item 43, wherein:

[0158] B xn The element is selected from the fifth main group or the sixth main group, and the B in the N-type doped semiconductor layer xn The concentration of the element is b n , b n The range is 1E19~5E22 atoms / cm 3 ,

[0159] The B xn B in layer xn The peak concentration of element b 1n ,

[0160] b n / b 1n Defined as v n , v nThe range is 0.5 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5.

[0161] 45. The silicon solar cell according to item 44, wherein:

[0162] b 1n / a 1n Defined as w n , w n >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and more preferably 1E4 to 1E8.

[0163] 46. ​​The silicon solar cell according to item 43, wherein:

[0164] d 2n / d 1n It is greater than or equal to 1, preferably 10 to 1E8, and more preferably 20 to 1E7.

[0165] 47. The silicon solar cell according to any one of items 40 to 46, wherein

[0166] The interface passivation layer contains antimony element, and the peak concentration of the antimony element in the interface passivation layer is a 2n , preferably a 2n The range is 1E13~1E18 atoms / cm 3 , and / or

[0167] The interfacial passivation layer contains B xn element, B in the interfacial passivation layer xn The peak concentration of element b 2n , preferably b 2n The range is 1E19~1E22 atoms / cm 3 ,

[0168] Preferred b 2n / a 2n >1, preferably 10~1E9.

[0169] 48. The silicon solar cell according to item 44, wherein:

[0170] The B xn The element is phosphorus, and it contains B xn The concentration of phosphorus in the layer is greater than 1E17atoms / cm 3 The thickness of the area d 2n The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2nIt is greater than 120nm, greater than 200nm or greater than 300nm.

[0171] 49. A solar cell module comprising the silicon solar cell according to any one of items 1 to 48. BRIEF DESCRIPTION OF THE DRAWINGS

[0172] Figure 1 This is a diagram of the structure of a conventional TOPCon battery;

[0173] Figure 2 This is a detail of the passivation contact structure containing antimony;

[0174] Figure 3 This is a diagram of the structure of a local TOPCon cell containing antimony;

[0175] Figure 4 This is a diagram of the structure of a back contact battery containing antimony;

[0176] Figure 5 This is a diagram of the structure of a back contact battery containing antimony;

[0177] Figure 6 This is a diagram of the structure of a back contact battery containing antimony;

[0178] Figure 7 This is a diagram of the structure of a back contact battery containing antimony;

[0179] Figure 8 This is a structural diagram of a back contact battery (HPBC structure) containing antimony elements.

[0180] Reference numerals:

[0181] 1 silicon substrate, 2 interface passivation layer, 3 doped semiconductor layer, 4 antimony containing layer, 5 B containing layer x layer, 21 first interface passivation layer, 31 first doped semiconductor layer, 41 first antimony-containing layer, 51 B-containing xp layer, 22 second interface passivation layer, 32 second doped semiconductor layer, 42 second antimony-containing layer, 52 B-containing xn layer, 6 substrate passivation layer, 7 intrinsic region interface passivation layer, 8 intrinsic semiconductor layer containing antimony element, 9 intrinsic semiconductor layer without antimony element, 10 intrinsic region side interface passivation layer, 11 P region electrode. DETAILED DESCRIPTION

[0182] The following embodiments of the present application are only used to illustrate the specific embodiments of the present application, and these embodiments cannot be understood as limiting the present application. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present application are deemed to be equivalent replacement methods and fall within the scope of protection of the present application.

[0183] The specific embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to enable the scope of the present application to be fully communicated to those skilled in the art.

[0184] It should be noted that certain words are used in the specification and claims to refer to specific components. Those skilled in the art should understand that technicians may use different nouns to refer to the same component. This specification and claims do not use the difference in nouns as a way to distinguish components, but use the difference in the functions of the components as the criterion for distinction. As mentioned throughout the specification and claims, "including" or "comprising" is an open term, so it should be interpreted as "including but not limited to". The subsequent description of the specification is a preferred embodiment of the implementation of the present application, but the description is based on the general principles of the specification and is not used to limit the scope of the present application. The scope of protection of the present application shall be determined by the attached claims.

[0185] As used herein, "substantially free" with respect to a particular component is used herein to mean that the particular component is not purposefully formulated into the composition and / or is present only as a contaminant or in trace amounts. Thus, the total amount of the particular component resulting from any accidental contamination of the composition is less than 0.05%, preferably less than 0.01%. Most preferred are compositions in which the amount of the particular component is undetectable by standard analytical methods.

[0186] As used in this specification, "a" or "an" may mean one or more. As used in the claims, when used with the word "comprising", the word "a" or "an" may mean one or more than one.

[0187] The term "or" is used in the claims to mean "and / or" unless explicitly stated to refer only to alternatives or the alternatives are mutually exclusive, although the present disclosure supports a definition referring only to alternatives and "and / or." As used herein, "another" may mean at least a second or more.

[0188] In the present application, the front side of the silicon substrate refers to the surface facing the sunlight under normal working conditions of the cell, and the back side refers to the surface on the other side of the silicon substrate opposite to the front side.

[0189] Those skilled in the art will understand that silicon wafers generally refer to raw material bare silicon wafers, and silicon substrates generally refer to the parts formed by silicon wafers in batteries. Light absorbers generally refer to functional bodies used in batteries to absorb photons, generate photogenerated carriers and separate photogenerated carriers, including silicon substrates and regions for separating carriers generated by silicon substrates (such as tunneling layers and doped polycrystalline layers in TOPCON structures), wherein the silicon substrate is used to absorb light and generate photogenerated carriers. It is understandable that simple emission-reducing layers, other functional layers, and electrodes do not belong to light absorbers. Those skilled in the art will understand that light absorbers or silicon substrates can be recovered from batteries, and the silicon substrate defined in this application can be obtained by peeling off different laminated structures.

[0190] In the present application, the doped region can also be used to separate photogenerated carriers, such as the region in which the third main group element (boron element) is diffused in the TOPCon cell described below.

[0191] That is, the silicon substrate is obtained from a bare silicon wafer, and the silicon substrate includes a silicon substrate part and a doped region part, wherein the silicon substrate part is a body region that is not doped in the battery process, and its performance is the same as that of the raw material bare silicon wafer. The doped region may be a doped region that is basically the same as the body region except for the doping element, such as a doped region formed by direct doping or internal diffusion doping inside the bare silicon wafer. In addition, in some cases, the doped region is antimony element or doping element, such as the third main group elements and the fifth main group elements, specifically where B or P gathers. In some cases, the doped region may be basically the same as the body region, that is, it mainly includes an antimony element doped region.

[0192] In a structural cell with at least part of TOPCon (e.g., TOPCon cell, partial TOPCon cell, back contact hybrid cell and TBC cell), the silicon substrate generally includes a doped region formed within at least one side surface of the silicon substrate, and the performance of this doped region portion is the same as that of the raw material bare silicon wafer. The doped region may be substantially the same as the body region except for the doping element, that is, the antimony element concentration, resistivity change rate, resistivity shift rate and other properties are substantially the same. Such a doped region may be formed by directly doping the bare silicon wafer as described in detail below, or may be formed by doping the doping element into the bare silicon wafer through layers such as a doped passivation layer and an interface passivation layer. In the present application, for a structural cell with at least part of TOPCon, a doped region generally refers to a region formed by direct doping or internal doping inside the raw silicon wafer, wherein the internal doping is formed by doping polysilicon called a doping layer through a tunneling layer called a passivation layer into the interior of the bare silicon wafer.

[0193] In the present application, there is no further limitation on the silicon wafer involved in the present application. It can be a silicon wafer obtained after machining and slicing after the silicon rod is drawn (also called a bare silicon wafer). The silicon substrate in the present application can be a part of the silicon substrate recovered from the battery assembly, as long as it can have a certain shape and can be in the form of a sheet, that is, the size of one surface is larger than the size of the surface perpendicular to it, and it is flat or plate-shaped. There is no limitation on the size of the silicon wafer or silicon substrate of the present application. The silicon wafer or silicon substrate can be of any size, and the light absorber is recovered from the battery assembly and the part of the silicon substrate after peeling off other layer structures. In addition, those skilled in the art can understand that when peeling, if the doped area is partially destroyed, as long as there is still a part of the doped area, it should be understood that it is the silicon substrate described in the present application, and the battery with such a silicon substrate is also a battery that meets the definition of the present application. For example, in a specific embodiment, the length of at least one side of the silicon wafer or silicon substrate of the present application (including the silicon substrate after the recovery and peeling of other layer structures) is greater than 156 mm, for example, 158±2 mm, (160±2) mm, (165±2) mm, (170±2) mm, (175±2) mm, (180±2) mm, (185±2) mm, 190±2 mm, (195±2) mm, (200±2) mm, (205±2)mm, (210±2)mm, (215±2)mm, (220±2)mm, (225±2)mm, (230±2)mm, (235±2)mm, (240±2)mm, (245±2)mm, (250±2)mm, (255±2)mm, (260±2)mm, (265±2)mm, (270±2)mm, (275±2)mm, and any range between these values. For example, in a specific embodiment, the thickness of the silicon wafer or optical silicon substrate of the present application (including the partial silicon substrate after recovery and stripping of other layer structures) is at least 40 to 170 μm, for example, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm. In a specific manner, the size of the partial silicon substrate after recovery and stripping of other layer structures can be smaller than the above size, as long as the concentration of antimony element and resistivity can be detected, and the resistivity change rate, resistivity average deviation rate and other limitations involved in the present application can be calculated.

[0194] In the present application, the concentration of antimony in a silicon wafer, silicon substrate or carrier separation layer (e.g., a doped semiconductor layer, a molybdenum oxide layer, a PEDOT:PSS layer) can be detected by any method known to those skilled in the art, and those skilled in the art can make a choice based on demand, for example, it can be detected by SIMS, ICP-MS, GDMS and other methods, preferably by ICP-MS method. Those skilled in the art can understand that the concentration of antimony in a silicon wafer or silicon substrate can refer to the concentration of antimony at any site on the surface of a silicon wafer, silicon substrate or carrier separation layer, in a silicon wafer, silicon substrate or carrier separation layer, and of course, it can also be the average value of the antimony concentration at multiple locations or the average value of the antimony concentration on the entire silicon wafer, silicon substrate or carrier separation layer. Those skilled in the art can select any of the above sites for detection based on the actual situation based on the detection conditions and the instruments used, or can calculate the average value of multiple sites after detecting multiple sites as the concentration of antimony. In a specific embodiment, the concentration of antimony element refers to the average value detected on the thickness of the silicon wafer, silicon substrate or carrier separation layer. For example, the concentration of antimony element in the silicon wafer is detected in a thickness direction using the SIMS method, and the average value in this thickness direction is calculated.

[0195] In the present application, the concentration of antimony in the silicon substrate detected as described above is regarded as a; at least a portion of the carrier separation layer near the side of the silicon substrate has antimony to form the maximum value of the concentration of antimony in the antimony-containing layer detected by the above method, that is, the peak concentration of antimony in the antimony-containing layer is a. 1 .

[0196] In this application, B in the silicon substrate x , B xn , B xp The concentration of B can be detected by any method known to those skilled in the art, and those skilled in the art can select the method based on their needs. For example, it can be detected by SIMS, ICP-MS, GDMS and the like, preferably by ICP-MS. x , B xn , B xp The concentration can refer to the surface of the doped region of the silicon substrate, the B concentration at any point in the doped region of the silicon substrate, x , B xn , B xp The concentration of B can also be multiple locations. x , B xn , B xp The average concentration or the B concentration in the entire doping region of the silicon substrate x , B xn , B xpThe technicians in this field can select any of the above sites for detection based on the actual situation based on the detection conditions and the instruments used, or can detect multiple sites and calculate the average value of multiple sites to use as B x , B xn , B xp In a specific embodiment, B x , B xn , B xp The concentration refers to the average value detected in the thickness of the doped region of the silicon substrate. For example, the B concentration in the doped region of the silicon substrate is measured in a thickness direction using the SIMS method. x , B xn , B xp The concentration is detected and the average value in this thickness direction is calculated.

[0197] Those skilled in the art can fully understand that the above-mentioned testing of silicon wafers or silicon substrates can be performed on silicon wafers or silicon substrates of any size, on bare silicon wafers obtained by cutting after the silicon rod is drawn, or on silicon substrates after other layer structures are recovered from batteries or modules. As long as the test results obtained after the test are performed according to the method described in this application, they should be considered to be covered within the scope of the silicon wafers, solar cells, battery strings or solar modules claimed for protection in this application.

[0198] In the present application, the method for detecting whether a silicon wafer or silicon substrate contains a certain element can be detected by SIMS, ICP-MS, GDMS and the like, preferably by ICP-MS method to detect metal elements. In the present application, solar cells are also referred to as batteries.

[0199] In a specific embodiment of the present application, only antimony is doped as a fifth main group doping element in the silicon wafer (e.g., bare silicon wafer) or silicon substrate of the present application to replace phosphorus. In this case, those skilled in the art can understand that depending on the different sources of silicon wafer raw materials, the silicon wafer or silicon substrate itself may contain other elements, such as any one, two or three of phosphorus, gallium, and germanium, but only antimony is actively doped as a fifth main group doping element to replace phosphorus doping.

[0200] Figure 1 A conventional TOPCon cell is shown, which sequentially comprises a silicon substrate 1, an interface passivation layer 2 and a doped semiconductor layer 3. Existing solar cells have the problem of reduced efficiency due to poor passivation.

[0201] In view of the problems existing in the prior art, the present application provides a silicon solar cell, such as Figure 2As shown, it includes: a silicon substrate 1, the silicon substrate 1 contains antimony elements, and a carrier separation layer formed on the silicon substrate 1, wherein the carrier separation layer has antimony elements in at least a portion of a side close to the silicon substrate 1 to form an antimony-containing layer 4, and the peak concentration of the antimony element in the antimony-containing layer 4 is a 1 , and a 1 Equal to or greater than 1E13 atoms / cm 3 For example, the peak concentration of antimony element in the antimony-containing layer 4 may be 1E13 atoms / cm 3 、5E13 atoms / cm 3 、1E14 atoms / cm 3 、5E14 atoms / cm 3 、1E15atoms / cm 3 、5E15atoms / cm 3 、1E16 atoms / cm 3 、5E16 atoms / cm 3 、1E17atoms / cm 3 、5E17 atoms / cm 3 、1E18atoms / cm 3 , and any values ​​in between.

[0202] The peak concentration of antimony element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 , which can reduce the proportion of bubbles in the carrier separation layer of the prior art, and can take into account the passivation problem and electrical transmission of the carrier separation layer, while improving the mechanical properties of the battery, thereby improving the efficiency of the solar cell.

[0203] In some specific embodiments, the concentration of antimony in the silicon substrate 1 is a, and the range of a is 1E13-1E18 atoms / cm 3 , for example, can be 1E13 atoms / cm 3 、5E13 atoms / cm 3 、1E14 atoms / cm 3 、5E14 atoms / cm 3 、1E15 atoms / cm 3 、5E15 atoms / cm 3 、1E16atoms / cm 3 、5E16 atoms / cm 3 、1E17 atoms / cm 3 、5E17 atoms / cm 3 、1E18atoms / cm3 , and any values ​​in between.

[0204] Since the present application dopes the Sb element in the silicon substrate 1 at a low concentration with few defects, the charge mobility of the silicon substrate can be improved and the resistivity of the silicon substrate can be reduced; secondly, the Sb element can reduce the differentiation of the crystalline silicon band edge energy levels caused by doping, and the Sb element doping ionization rate is relatively high.

[0205] In some specific embodiments, the concentration of antimony element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1 It is greater than 2 nm, and may be, for example, 2 nm, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, and any value in between these values.

[0206] In some specific embodiments, a / a 1 Defined as u, u ranges from 0.8 to 1E10, for example, it can be 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value between these values.

[0207] In some specific embodiments, u is 2 to 1E9. In some specific embodiments, u is 10 to 1E8. In some specific embodiments, u is 100 to 1E7.

[0208] In some specific embodiments, no interface passivation layer is provided between the silicon substrate and the carrier separation layer, and the range of u is 1 to 2, for example, u can be 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0. By setting u in the above range, it can be ensured that the antimony concentration escaping from the silicon substrate to the carrier separation layer reaches a preset value, thereby reducing the bubble ratio and improving the passivation effect.

[0209] In some specific embodiments, an interface passivation layer having the function of adsorbing impurities is provided between the silicon substrate and the carrier separation layer, and the range of u is 0.8 to 1E10, for example, it can be 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value between these values. By setting u in the above range, it can be ensured that the antimony concentration escaping from the silicon substrate to the carrier separation layer reaches a preset value, thereby reducing the bubble ratio and improving the passivation effect.

[0210] In some specific embodiments, an interface passivation layer without the function of adsorbing impurities is provided between the silicon substrate and the carrier separation layer, and the range of u is 2 to 1E9, for example, it can be 2, 3, 4, 5, 6, 7, 8, 9, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, and any value between these values. By setting u in the above range, it can be ensured that the antimony concentration escaping from the silicon substrate to the carrier separation layer reaches a preset value, thereby reducing the bubble ratio and improving the passivation effect.

[0211] The concentration of antimony in the silicon substrate 1 is 1E13-1E18 atoms / cm 3 , and / or the concentration of antimony in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1 The thickness of the carrier separation layer is larger than 2nm. Since the recombination at the interface between the carrier separation layer and the silicon substrate mainly comes from the carrier separation layer of a certain thickness close to the silicon substrate, the proportion of bubbles within the 2nm thickness range can be reduced by controlling the concentration of the antimony element within the above range, and the recombination problem caused by bubbles in the bottom layer of the carrier separation layer can be further improved. The passivation problem of the entire carrier separation layer can be basically solved, thereby improving the efficiency of the solar cell.

[0212] In the present application, the carrier separation layer may be selected from a doped semiconductor layer, a molybdenum oxide layer, a PEDOT:PSS layer, etc. Wherein, when the carrier separation layer is a doped semiconductor layer 3, an interface passivation layer 2 is provided between the silicon substrate 1 and the carrier separation layer. The interface passivation layer 2 can further improve the interface passivation effect between the silicon substrate and the carrier separation layer.

[0213] Among them, the materials and thicknesses of the doped semiconductor layer 3 and the interface passivation layer 2 can adopt the materials and thicknesses known in the prior art. For example, the thickness of the doped semiconductor layer 3 can be 50 to 300 nm; the material of the doped semiconductor layer 3 can be selected from one or more of polycrystalline silicon, amorphous silicon or microcrystalline silicon. The thickness of the interface passivation layer 2 can be 0.1 to 5 nm; the material of the interface passivation layer 2 can be selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide or intrinsic amorphous silicon. Since the recombination at the interface between the carrier separation layer and the interface passivation layer mainly comes from the carrier separation layer of a certain thickness close to the interface passivation layer, the above parameter range can reduce the proportion of bubbles within the 2nm thickness range, further improve the recombination problem caused by bubbles in the bottom layer of the carrier separation layer, and can basically solve the passivation problem of the entire carrier separation layer, thereby improving the efficiency of solar cells.

[0214] In some specific embodiments, the concentration of antimony elements in the antimony-containing layer 4 of the carrier separation layer gradually decreases in the direction from the side close to the silicon substrate 1 to the side opposite to the silicon substrate 1. This arrangement is mainly because when the concentration of antimony is greater on the side closer to the silicon substrate 1, fewer bubbles can be achieved, and thus the recombination problems caused by the bubbles are less complex. There are no bubbles in the silicon substrate, and the escape of antimony elements in the silicon substrate will not affect the passivation of the silicon substrate. In addition, surface recombination has a great influence on the overall recombination, so the closer the carrier separation layer 4 is to the surface, the greater the antimony concentration is, and the better the passivation effect brought at the interface.

[0215] Furthermore, if Figure 2 As shown, the silicon substrate 1 has B at least in a part of the area on the side close to the interface passivation layer 2. x Elements, forming B x Layer 5. Among them, B x The element may be an element of the fifth main group (such as phosphorus) or the sixth main group (such as sulfur), or an element of the third main group, such as boron or aluminum. x The element can form an emitter or a high-low junction in the silicon substrate 1, thereby playing a passivation role and further improving the battery performance.

[0216] In some specific embodiments, the x Layer 5 Middle B x The concentration of the element is greater than 1E17atoms / cm 3 The thickness of the area d 2 It is greater than or equal to 20 nm, and may be, for example, 20 nm, 50 nm, 100 nm, 200 nm, 500 nm, 1 μm, 2 μm, 5 μm, and any value in between these values.

[0217] In some specific embodiments, the B in the doped semiconductor layer 3 x The concentration of the element is b, and the range of b is 1E18~5E22 atoms / cm 3 , the B x B in layer 5 x The peak concentration of element b 1 atoms / cm 3 , b / b 1Defined as v, v ranges from 0.5 to 1E10, for example, 0.5, 0.6, 0.7, 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value therebetween. In some specific embodiments, v is 2 to 1E9. In some specific embodiments, v is 10 to 1E8. In some specific embodiments, v is 100 to 1E5.

[0218] In some specific embodiments, the phosphorus concentration in the interface passivation layer 2 is higher than that in the carrier separation layer (doped semiconductor layer 3 ).

[0219] When B x When B is phosphorus, the range of v is 0.5~1E10. x For other elements, the range of v is 1 to 1E10. x can be diffused into the silicon substrate 1 to form a preset concentration, such that B x Elements, depending on their properties, can form emitters or high-low junctions to improve the passivation effect. x Too high a doping concentration will introduce recombination centers in the silicon substrate 1, thereby reducing the battery performance. In the present application, the passivation effect can be improved by controlling the range of v without affecting the battery performance.

[0220] In some specific embodiments, b 1 / a 1 Defined as w, w>1, for example, can be 10, 100, 1000, 1E4, 5E4, 1E5, 5E5, 1E6, 5E6, 1E7, 5E7, 1E8, and any value therebetween. In some specific embodiments, w>100. In some specific embodiments, w is greater than 1000. In some specific embodiments, w is 1E3 to 1E8.

[0221] In this application, b 1 The larger the value, the better the passivation effect of the emitter or high-low junction formed, and the higher the battery performance. 1 It cannot be too small, that is, w cannot be too small. If it is too small, the passivation effect of the emitter or high-low junction formed will be poor, so w should be greater than 1. But too high b 1 (ie, w is too large) will introduce recombination centers into the silicon substrate 1, thereby reducing the battery performance. In the present application, by controlling the range of w, the passivation effect can be improved without affecting the battery performance.

[0222] In the present application, by controlling w within the above range, the iVoc of the prepared battery can be increased, indicating that the passivation performance of the battery can be improved. And whether it is an n-type doping structure or a p-type doping structure formed by the above structure, the passivation performance of the battery formed thereby can be effectively improved.

[0223] In some specific embodiments, d 2 / d 1 Defined as x, x is greater than or equal to 1, for example, 1, 10, 20, 100, 1000, 1E4, 5E4, 1E5, 5E5, 1E6, 5E6, 1E7, 5E7, 1E8, and any value therebetween. In some specific embodiments, x ranges from 10 to 1E8. In some specific embodiments, x ranges from 20 to 1E7.

[0224] In this application, d 2 The larger the d is, the better the passivation effect of the emitter or high-low junction is, and the higher the battery performance is. 2 It cannot be too small, that is, x cannot be too small. If it is too small, the passivation effect of the emitter or high-low junction formed will be poor. 2 The Auger recombination region will be too wide, thereby reducing the battery performance. In the present application, the passivation effect can be improved by controlling the range of x without affecting the battery performance.

[0225] In the present application, similar to the effect of w above, by controlling x within the above range, the iVoc of the prepared battery can be increased, showing that the passivation performance of the battery can be improved. And whether it is for the n-type doping structure or the p-type doping structure formed by the above structure, the passivation performance of the battery formed thereby can be effectively improved.

[0226] In some specific embodiments, the peak concentration of antimony element in the interface passivation layer 2 is a 2 , a 2 The range is 1E13~1E18 atoms / cm 3 , the interface passivation layer 2 contains B x Elements, B in the interfacial passivation layer 2 x The peak concentration of element b 2 , b 2 The range is 1E19~1E22 atoms / cm 3 This is because the B in the interfacial passivation layer 2 x If the element is too low, the carrier transfer efficiency of the interface passivation layer 2 will be reduced, which is affected by the solid solubility. 2 The concentration cannot reach 1E22 atoms / cm 3On the other hand, the interface passivation layer 2 has 1E13 to 1E18 atoms / cm 3 The antimony element can ensure that the carrier separation layer has a preset concentration of antimony element.

[0227] In some specific embodiments, b 2 / a 2 Defined as y, y>1, for example, can be 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, and any value therebetween. In some specific embodiments, y ranges from 10 to 1E9.

[0228] In some specific embodiments, B x The element is selected from the fifth main group or the sixth main group, and the concentration of the antimony element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1 is greater than 2nm, and w is in the range of 1E4 to 1E8. x When the element is selected from the fifth main group or the sixth main group, the escaped antimony element is also an element of the fifth main group, which will increase the effective doping concentration of the carrier separation layer, thereby increasing the electron concentration of the carrier separation layer, improving the passivation effect and conductivity of the carrier separation layer, reducing the transmission resistance of the carrier separation layer, and reducing the interface resistance between the silicon substrate and the carrier separation layer.

[0229] Furthermore, the B in the doped semiconductor layer 3 x The concentration of the element is 1E19~5E22 atoms / cm 3 . x When the element is phosphorus, the concentration of phosphorus in the phosphorus-containing layer is greater than 1E17 atoms / cm 3 The thickness of the area d 2 The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2 It is greater than 120nm, greater than 200nm or greater than 300nm.

[0230] In some specific embodiments, B x The element is an element selected from the third main group, and the concentration of the antimony element in the antimony-containing layer 4 is greater than 1E13 atoms / cm 3 The thickness of the area d 1 It is 3 nm or more, and the preferred range of w is 1E3 to 1E7.

[0231] In a specific embodiment, when the carrier separation layer is a silicon thin film, when Bx When it is a third main group element, the carrier separation layer is P-type. Therefore, antimony, as a fifth main group element, is doped faster in the carrier separation layer, and the antimony-containing layer formed is thicker.

[0232] Furthermore, the B doped semiconductor layer x The concentration of the element is 1E18~5E21 atoms / cm 3 , when B x When the element is boron, the concentration of boron in the boron-containing layer is greater than 1E17 atoms / cm 3 The thickness of the area d 2 The thickness d is 30 nm or more, preferably 40 nm or more, 50 nm or more, and more preferably 2 It is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

[0233] Those skilled in the art will appreciate that the above silicon solar cells may include Figure 2 The various types of silicon solar cells with the structures shown above are all based on the structure of the cell, the antimony element in the cell, and the B x The concentration of the elements and their distribution in the battery all meet the above requirements. For example, the silicon solar cell mentioned in this application can be a TopCon cell, a partial TopCon cell, a back contact cell, a HPBC cell, etc.

[0234] In a specific embodiment, the silicon solar cell is a TopCon cell having the following characteristics: Figure 2 The structure shown in FIG. 1 is a topcon cell, which generally comprises: a silicon substrate 1, wherein the silicon substrate 1 contains antimony, an interface passivation layer 2, which is formed on the silicon substrate 1, and a doped semiconductor layer 3, which is a doped semiconductor layer and is formed on the interface passivation layer 2, wherein the doped semiconductor layer 3 has antimony in at least a portion of a side close to the silicon substrate 1 to form an antimony-containing layer 4, and the peak concentration of the antimony element in the antimony-containing layer 4 is a 1 , and a 1 Equal to or greater than 1E13 atoms / cm 3 The doped semiconductor layer 3 may be a P-type doped semiconductor layer or an N-type doped semiconductor layer.

[0235] When the doped semiconductor layer 3 is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed on the other side of the silicon substrate 1 away from the P-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1p , change a / a 1pDefined as u p ,u p The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0236] In a specific embodiment, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p It is above 3nm.

[0237] When the doped semiconductor layer 3 is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed in the silicon substrate on the other side of the silicon substrate 1 away from the N-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1n , change a / a 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0238] In a specific embodiment, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is more than 2nm.

[0239] Will u,u n or p By controlling within the above range, both Auger recombination and bubbles can be taken into account. The more antimony elements escape, the fewer bubbles there are, the better the surface passivation is, and the Auger recombination of the semiconductor layer will be reduced.

[0240] In a specific way, Figure 2 The structure shown is formed on the front or back side of the silicon substrate. Figure 2 When the structure shown is formed on the back of the silicon substrate, that is, an interface passivation layer is provided on the back of the silicon substrate, and a P-type doped semiconductor layer or an N-type doped semiconductor layer is provided on the side of the interface passivation layer away from the silicon substrate. That is, the carrier separation layer and the interface passivation layer are formed on the back of the silicon substrate to form a PN junction with the silicon substrate. At this time, since the interstitial doping of the antimony-doped silicon substrate is less, the generated recombination is less. Figure 2 The TopCon structure shown has more advantages as the battery performance with the emitter arranged on the back side.

[0241] In a specific embodiment, the silicon solar cell is a local TopCon cell. Figure 3As shown, the local TopCon cell includes: a silicon substrate 1, the silicon substrate 1 contains antimony elements, a first interface passivation layer 21 and a second interface passivation layer 22, which are respectively formed on both sides of the silicon substrate 1, a first doped semiconductor layer 31 and a second doped semiconductor layer 32, which are doped semiconductor layers and are respectively formed on the side of the first interface passivation layer 21 away from the silicon substrate 1 and the side of the second interface passivation layer 22 away from the silicon substrate 1, and the area of ​​the first doped semiconductor layer 31 is smaller than or larger than the area of ​​the second doped semiconductor layer 32. Figure 3 The figure shows that the first doped semiconductor layer 31 is formed on a partial area of ​​the silicon substrate 1, and the second doped semiconductor layer 32 is formed on the entire area of ​​the silicon substrate 1, but those skilled in the art can fully understand that such a structure is only exemplary. Those skilled in the art can design its structure based on their understanding of the local TopCon cell.

[0242] The first doped semiconductor layer 31 is doped with a third main group element, and the second doped semiconductor layer 32 is doped with a fifth main group element or a sixth main group element. The first doped semiconductor layer 31 has antimony elements in at least a portion of a side close to the first interface passivation layer 21 to form a first antimony-containing layer 41, and the second doped semiconductor layer 32 has antimony elements in at least a portion of a side close to the second interface passivation layer 22 to form a second antimony-containing layer 42. The peak concentration of the antimony element in the first antimony-containing layer 41 is a 1p , and a 1p Equal to or greater than 1E13 atoms / cm 3 The peak concentration of antimony element in the second antimony-containing layer 42 is a 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

[0243] Those skilled in the art can understand that the concentration and distribution of antimony element and doping element in the first interface passivation layer 21 and the second interface passivation layer 22, and the first doped semiconductor layer 31 and the second doped semiconductor layer 32 all meet the above description of the interface passivation layer and the doped semiconductor layer.

[0244] In a specific manner, Figure 3 In the battery shown in FIG. 1 , the concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of antimony in the second antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n .

[0245] Specifically, the concentration of antimony in the first antimony-containing layer 41 is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The thickness of the second antimony-containing layer 42 is greater than 2 nm, and the concentration of the antimony element in the second antimony-containing layer 42 is greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is above 3nm.

[0246] The antimony element concentration in the antimony-containing layer of the first doped semiconductor layer 31 gradually decreases in the direction from the side close to the silicon substrate 1 to the side opposite to the silicon substrate 1, and the antimony element concentration in the antimony-containing layer of the second doped semiconductor layer 32 gradually decreases in the direction from the side close to the silicon substrate 1 to the side opposite to the silicon substrate 1.

[0247] will a / a 1p Defined as u p ,u p The range of a / a is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7; 1n Defined as u n ,u n The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E7.

[0248] The silicon substrate 1 has a B at least partially in a region on one side close to the first interface passivation layer 21. xp Elements, forming B xp The silicon substrate 1 has a B layer at least in part of the area near the second interface passivation layer 22. xn Elements, forming B xn Layer 52; contains B xp Layer 51, B xp The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2p More than 30nm; containing B xn Layer 52, B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

[0249] Among them, B xp The element is an element selected from the third main group, and B in the first doped semiconductor layer 31 xp The concentration of the element is b p , b p The range is 1E18~5E21 atoms / cm 3 , containing B xpB in layer 51 xp The peak concentration of element b 1p . B xn The element is selected from the fifth main group or the sixth main group, and the B in the second doped semiconductor layer 32 xn The concentration of the element is b n , b n The range is 1E19~5E22 atoms / cm 3 , containing B xn B in layer 52 xn The peak concentration of element b 1n . p / b 1p Defined as v p , v p The range of b is 1 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5. n / b 1n Defined as v n , v n The range is 0.5 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and preferably 100 to 1E5.

[0250] b 1p / a 1p Defined as w p , w p >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and more preferably 1E3 to 1E7. 1n / a 1n Defined as w n , w n >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and more preferably 1E4 to 1E8. In the present application, by p Controlling within the above range can improve the iVoc of the prepared battery, showing that the passivation performance of the battery can be improved. n When the content is controlled within the above range, the iVoc of the prepared battery can be increased, indicating that the passivation performance of the battery can be improved.

[0251] d 2p / d 1p Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7, d 2n / d 1n Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7; preferably d 1p ≥d 1n ; and / or d 2p >d2n , preferably d 2p -d 2n ≥5nm, preferably ≥10nm.

[0252] Among them, due to the control, d 2p >d 2n At this time, when light is irradiated onto the silicon substrate, an effective photon will excite an electron-hole pair. Under the separation effect of the PN junction, the electron-hole pair will separate at the PN junction to form electron carriers and hole carriers. 2p >d 2n It can ensure the effective separation of carriers at the PN junction. Since the P region is the emitter region, it requires a better passivation effect, so d 1p ≥d 1n It can make more antimony elements overflow, which is beneficial to the passivation of the carrier selection layer interface in the emitter region. The emitter is more important for the battery, that is, the better the passivation effect of the emitter is, the better the battery efficiency can be achieved.

[0253] In this application, the above-mentioned p The effect is similar to that of 2p / d 1p Controlling within the above range can improve the iVoc of the prepared battery, which shows that the passivation performance of the battery can be improved. n The effect is similar to that of 2n / d 1n When the content is controlled within the above range, the iVoc of the prepared battery can be increased, indicating that the passivation performance of the battery can be improved.

[0254] The first interface passivation layer 21 contains antimony element, and the peak concentration of the antimony element in the first interface passivation layer 21 is a 2p , a 2p The range is 1E13~1E18 atoms / cm 3 The first interface passivation layer 21 contains B xp element, B in the first interface passivation layer 21 xp The peak concentration of element b 2p , b 2p The range is 1E19~1E22 atoms / cm 3 . Preferred b 2p / a 2p >1, preferably 10~1E9.

[0255] The second interface passivation layer 22 contains antimony element, and the peak concentration of the antimony element in the second interface passivation layer 22 is a 2n , a 2n The range is 1E13~1E18 atoms / cm3 The second interface passivation layer 22 contains B xn element, B in the second interface passivation layer 22 xn The peak concentration of element b 2n , b 2n The range is 1E19~1E22 atoms / cm 3 . Preferred b 2n / a 2n >1, preferably 10~1E9.

[0256] When B xn When the element is phosphorus, it contains B xn The concentration of phosphorus in layer 52 is greater than 1E17 atoms / cm 3 The thickness of the area d 2n The thickness d is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and more preferably the thickness d is 2n is 120nm or more, 200nm or more, or 300nm or more. xp When the element is boron, it contains B xp The concentration of boron in layer 51 is greater than 1E17 atoms / cm 3 The thickness of the area d 2p The thickness d is 30 nm or more, preferably 40 nm or more, 50 nm or more, and more preferably 2p It is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

[0257] In a specific embodiment, the silicon solar cell is a back contact cell. Figure 4-7The structure of several typical back contact cells is shown. The back contact cell includes: a silicon substrate 1, the silicon substrate 1 contains antimony elements, a first interface passivation layer 21 and a second interface passivation layer 22, which are respectively formed on one side of the silicon substrate 1, a first doped semiconductor layer 31 and a second doped semiconductor layer 32, which are doped semiconductor layers and are respectively formed on the side of the first interface passivation layer 21 away from the silicon substrate 1 and on the side of the second interface passivation layer 22 away from the silicon substrate 1, the first doped semiconductor layer 31 is doped with a third main group element, and the second doped semiconductor layer 32 is doped with a fifth main group or a sixth main group element. Among them, the first doped semiconductor layer 31 has antimony elements in at least a portion of the area on the side close to the first interface passivation layer 21 to form a first antimony-containing layer 41, and the second doped semiconductor layer 32 has antimony elements in at least a portion of the area on the side close to the second interface passivation layer 22 to form a second antimony-containing layer 42, and the peak concentration of the antimony element in the first antimony-containing layer 41 is a. 1p , and a 1p Equal to or greater than 1E13 atoms / cm 3 The peak concentration of antimony element in the second antimony-containing layer 42 is a 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 The first interface passivation layer 21 and the first doped semiconductor layer 31 form a P-type region, and the second interface passivation layer 22 and the second doped semiconductor layer 32 form an N-type region.

[0258] Among them, the concentration and distribution of antimony elements and doping elements in the silicon substrate 1, the first interface passivation layer 21 and the second interface passivation layer 22, and the first doped semiconductor layer 31 and the second doped semiconductor layer 32 can all refer to the above description of the local TOPCon cell.

[0259] In a specific manner, Figure 4-7 In the battery shown in FIG. 1 , the concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of antimony in the second antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n .

[0260] like Figure 4-7 As shown, there is a spacing region between the p-type region and the n-type region, and a substrate passivation layer 6 is arranged in the spacing region between the p-type region and the n-type region. The substrate passivation layer covers the spacing region of the silicon substrate 1 not covered by the p-type region and the n-type region.

[0261] Furthermore, an antimony-containing region is formed in the region of the substrate passivation layer 6 close to the silicon substrate 1, and the concentration of the antimony element in the antimony-containing region is a 3 , a 3 Greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p , preferably the d 1钝化层 ≥1nm.

[0262] where d 1钝化层 ≤d 1n ≤d 1p Because the passivation layer is not an electrical area, there are not many restrictions. A passivation layer such as aluminum oxide / silicon nitride with high passivation quality can be directly used for passivation. Therefore, there is no need for too much antimony element to reduce bubbles and improve the passivation effect of the passivation area. 1n ≤d 1p The technical effects can be found above and will not be described here.

[0263] In this application, by 1钝化层 ≤d 1n ≤d 1p When the voltage is controlled within the above range, the iVoc of the spacer region can be further increased on the basis of improving the passivation performance of the PN region, indicating that the passivation performance of the battery can be improved.

[0264] The spacing region between the p-type region and the n-type region can be an intrinsic spacing region, which covers the spacing region of the silicon substrate 1 not covered by the p-type region and the n-type region, and includes, from the silicon substrate 1 toward the back side, an intrinsic semiconductor layer 8 containing antimony elements and an intrinsic semiconductor layer 9 not containing antimony elements, preferably, including, from the silicon substrate toward the back side, an intrinsic region interface passivation layer 7, an intrinsic semiconductor layer 8 containing antimony elements and an intrinsic semiconductor layer 9 not containing antimony elements.

[0265] The concentration of antimony in the intrinsic semiconductor layer 8 containing antimony is a 3 , a 3 Greater than 1E13atoms / cm 3 The thickness of the area d 1i , d 1i ≤d 1n ≤d 1p Preferably, the d 1i ≥2nm.

[0266] In this application, control d 1钝化层 ≤d 1n , it is possible to improve the passivation effect of the passivation zone without too much antimony element as a means of reducing bubbles.

[0267] In this application, since the i semiconductor passivation performance is slightly lower and the i layer generally does not undergo much thermal processing, its crystallization structure may be poor, so slightly more antimony elements are needed to improve the passivation effect of the bottom layer, so the control of d 1i ≥2nm can better maintain the passivation effect.

[0268] In this application, by 1i ≤d 1n ≤d 1p When the voltage is controlled within the above range, the iVoc of the spacer region can be further increased on the basis of improving the passivation performance of the PN region, indicating that the passivation performance of the battery can be improved.

[0269] The intrinsic region interface passivation layer 7 may contain antimony in the region close to the silicon substrate 1. The concentration of antimony in the intrinsic region interface passivation layer 7 is a. 3 , a 3 Greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p , preferably the d 1钝化层 ≥2nm. In this application, by 1钝化层 ≤d 1n ≤d 1p When the voltage is controlled within the above range, the iVoc of the spacer region can be further increased on the basis of improving the passivation performance of the PN region, indicating that the passivation performance of the battery can be improved.

[0270] Furthermore, an intrinsic region side interface passivation layer 10 may be disposed between the intrinsic spacer region and the p-type region or the n-type region. The side interface passivation layer 10 may be disposed on the side close to the p-type region or the side close to the n-type region.

[0271] In a specific embodiment, the silicon solar cell is a back contact cell of HPBC structure. Figure 8As shown, the back contact cell of the HPBC structure includes: a silicon substrate 1, the silicon substrate 1 contains antimony elements, an interface passivation layer 2, which is formed on the silicon substrate 1, a doped semiconductor layer 3, which is a doped semiconductor layer and is formed on the interface passivation layer 2 and is an N-type doped semiconductor layer to form an N-type region, a P-region electrode 11, which is formed on the side of the silicon substrate having the N-type doped semiconductor layer and is arranged alternately with the N-type doped semiconductor layer, and a BSF layer, which is formed in the silicon substrate 1 corresponding to the P-region electrode 11, and the BSF layer and the P-region electrode have the same metal element. Among them, the doped semiconductor layer 3 has antimony elements in at least a part of the area on the side close to the silicon substrate 1 to form an antimony-containing layer 4, and the peak concentration of the antimony element in the antimony-containing layer 4 is a 1n , and a 1n Equal to or greater than 1E13atoms / cm 3 .

[0272] The P-region electrode may be a metal electrode known in the art that can form a P-region, such as an aluminum electrode.

[0273] The concentration and distribution of the antimony element and the doping element in the silicon substrate 1, the interface passivation layer 2, the doped semiconductor layer 3 and the antimony-containing layer 4 can all be referred to the above description of the doped element B. x The description is of an element moiety selected from the fifth main group or the sixth main group.

[0274] The present application also provides a solar cell assembly, which includes any one of the above-mentioned silicon solar cells.

[0275] Example

[0276] The present application provides a general and / or specific description of the materials and test methods used in the experiments. In the following examples, unless otherwise specified, % means wt%, i.e., weight percentage. The reagents or instruments used without indicating the manufacturer are all conventional reagent products that can be obtained commercially.

[0277] Preparation Example

[0278] Silicon wafers doped with different antimony and phosphorus concentrations were prepared based on the method described in CN117702269A. The concentrations of phosphorus and antimony in the prepared silicon wafers are shown in Table 1.

[0279] Example 1 Bubble Test Comparison (Antimony Concentration)

[0280] The n-type silicon wafer was polished with alkaline solution, cleaned with acid, slowly pulled with water, and dried, and then placed in an LPCVD furnace tube for single-sided deposition of tunnel oxide layer and amorphous silicon layer. Then it was crystallized at 900℃. Each tube of experimental slices contained 1600 silicon wafers, and 12 wafers were extracted from each tube. The surface with the entire poly was tested for bubbles. The statistical data is shown in Table 1 below:

[0281] Table 1

[0282]

[0283] It can be seen that after using antimony-containing silicon wafers, the number of poly wafers with bubbles has been significantly reduced. The number of batches with poly bubbles has also been significantly reduced.

[0284] Example 2 Comparative test of passivation quality test of boron-doped poly

[0285] The n-type silicon wafer prepared in Example 1 (using a phosphorus concentration of 1E15 atoms / cm 3 n-type phosphorus-containing silicon wafer with an antimony concentration of 1E15 atoms / cm 3 The n-type antimony-containing silicon wafer was polished with alkaline solution, cleaned with acid, slowly pulled with water, and dried, and then placed in an LPCVD furnace tube for single-sided deposition of tunnel oxide layer and amorphous silicon layer. Then, boron diffusion doping crystallization treatment was performed (the maximum doping temperature was 950°C, and BBr3 source was used for doping). HF was used to remove the generated BSG (borosilicate glass), and then aluminum oxide + silicon nitride film was plated on both sides, and then iVoc test was performed using a Sinton tester. The test results are shown in Table 2.

[0286] Table 2

[0287]

[0288]

[0289] It can be seen that the iVoc of antimony-containing silicon wafers has increased significantly, indicating that the passivation performance has been significantly improved.

[0290] Example 3 Comparative test of passivation quality test of phosphorus-doped poly

[0291] The n-type silicon wafer prepared in Example 1 (using a phosphorus concentration of 1E15 atoms / cm 3 n-type phosphorus-containing silicon wafer with an antimony concentration of 1E15 atoms / cm 3The n-type antimony-containing silicon wafer was polished with alkaline solution, cleaned with acid, slowly pulled with water, and dried, and then placed in an LPCVD furnace tube for single-sided deposition of tunnel oxide layer and amorphous silicon layer. Then phosphorus diffusion doping crystallization treatment was performed (maximum doping temperature 850°C, using POCl3 source for doping). HF was used to remove the generated PSG (phosphorus silicon glass), and then aluminum oxide + silicon nitride film was plated on both sides, and then iVoc test was performed using a Sinton tester, and the results are shown in Table 3.

[0292] Table 3

[0293] P-poly double-sided sample <![CDATA[b 1 / a 1 ]]> Verification times iVoc median (mV) n-type phosphorus-containing silicon wafer 40 750 n-type antimony-containing silicon wafer 1E3 40 755 n-type antimony-containing silicon wafer 1E4 40 756 n-type antimony-containing silicon wafer 1E5 40 756 n-type antimony-containing silicon wafer 1E6 40 757 n-type antimony-containing silicon wafer 1E8 40 758

[0294] It can be seen that the iVoc of antimony-containing silicon wafers has increased significantly, indicating that the passivation performance has been significantly improved.

[0295] Although the embodiments of the present application are described above, the present application is not limited to the above specific embodiments and application fields, and the above specific embodiments are merely illustrative and instructive, rather than restrictive. A person of ordinary skill in the art can make many forms under the guidance of this specification and without departing from the scope of protection of the claims of the present application, all of which belong to the protection of the present application.

Claims

1. A silicon solar cell, comprising: A silicon substrate containing antimony elements, and A carrier separation layer is formed on a silicon substrate, wherein: The carrier separation layer has antimony elements in at least a portion of the side close to the silicon substrate to form an antimony-containing layer, and the concentration of the antimony elements in the antimony-containing layer gradually decreases in a direction from the side close to the silicon substrate to the side opposite to the silicon substrate; The peak concentration of the antimony element in the antimony-containing layer is a1, and a1 is equal to or greater than 1E13 atoms / cm 3 ; The carrier separation layer is selected from a doped semiconductor layer, a molybdenum oxide layer, and a PEDOT:PSS layer, When the carrier separation layer is a doped semiconductor layer, an interface passivation layer is arranged between the silicon substrate and the carrier separation layer.

2. The silicon solar cell according to claim 1, wherein: The concentration of antimony in the silicon substrate is a, and the range of a is 1E13-1E18 atoms / cm 3 ;or The concentration of antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness d1 of the region is greater than 2 nm.

3. The silicon solar cell according to claim 1, wherein: The material of the interface passivation layer is selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide or intrinsic amorphous silicon.

4. The silicon solar cell according to claim 2, wherein: Define a / a1 as u, and the range of u is 0.8~1E10.

5. The silicon solar cell according to claim 4, wherein: The range of u is 2~1E9.

6. The silicon solar cell according to claim 4, wherein: The range of u is 10~1E8.

7. The silicon solar cell according to claim 4, wherein: The range of u is 100~1E7.

8. The silicon solar cell according to claim 2, wherein: The silicon substrate has a B x Elements, forming B x layer, The B x Layer B x The concentration of the element is greater than 1E17 atoms / cm 3 The thickness d2 of the region is greater than 20 nm.

9. The silicon solar cell according to claim 8, wherein: The doped semiconductor layer B x The concentration of the element is b, and the range of b is 1E18~5E22 atoms / cm 3 , The B x B in layer x The peak concentration of the element is b1, Define b / b1 as v, where v ranges from 0.5 to 1E10.

10. The silicon solar cell according to claim 9, wherein: The range of v is 2~1E9.

11. The silicon solar cell according to claim 9, wherein: The range of v is 10~1E8.

12. The silicon solar cell according to claim 9, wherein: The range of v is 100~1E5.

13. The silicon solar cell according to claim 9, wherein: Define b1 / a1 as w, w>1.

14. The silicon solar cell according to claim 13, wherein: w>100。 15. The silicon solar cell according to claim 13, wherein: w is greater than 1000.

16. The silicon solar cell according to claim 13, wherein: The range of w is 1E3~1E8.

17. The silicon solar cell according to claim 8, wherein: Define d2 / d1 as x, where x is greater than or equal to 1.

18. The silicon solar cell according to claim 17, wherein: The range of x is 10~1E8.

19. The silicon solar cell according to claim 17, wherein: The range of x is 20~1E7.

20. The silicon solar cell according to claim 8, wherein: The interface passivation layer contains antimony element, and the peak concentration of the antimony element in the interface passivation layer is a2, and the range of a2 is 1E13~1E18 atoms / cm 3 , and / or The interfacial passivation layer contains B x element, B in the interfacial passivation layer x The peak concentration of the element is b2, and the range of b2 is 1E19~1E22 atoms / cm 3 .

21. The silicon solar cell according to claim 20, wherein: Define b2 / a2 to be y, y>1.

22. The silicon solar cell according to claim 21, wherein: The range of y is 10~1E9.

23. The silicon solar cell according to claim 13, wherein: B x When the element is selected from the fifth main group or the sixth main group, the concentration of the antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness d1 of the region is greater than 2 nm.

24. The silicon solar cell according to claim 23, wherein: The range of w is 1E4~1E8.

25. The silicon solar cell according to claim 23, wherein: The doped semiconductor layer B x The concentration of the element is 1E19~5E22 atoms / cm 3 .

26. The silicon solar cell according to claim 23, wherein: B x The element is phosphorus. At this time, the concentration of phosphorus in the phosphorus-containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region is greater than 20 nm.

27. The silicon solar cell according to claim 26, wherein: The thickness d2 is greater than or equal to 30 nm, greater than or equal to 40 nm, or greater than or equal to 50 nm.

28. The silicon solar cell according to claim 26, wherein: The thickness d2 is greater than or equal to 120 nm, greater than or equal to 200 nm, or greater than or equal to 300 nm.

29. The silicon solar cell according to claim 13, wherein: B x When the element is selected from the third main group, the concentration of antimony in the antimony-containing layer is greater than 1E13 atoms / cm 3 The thickness d1 of the region is greater than 3 nm.

30. The silicon solar cell according to claim 29, wherein: The range of w is 1E3~1E7.

31. The silicon solar cell according to claim 29, wherein: The doped semiconductor layer B x The concentration of the element is 1E18~5E21 atoms / cm 3 .

32. The silicon solar cell according to claim 31, wherein: B x The element is boron. At this time, the concentration of boron in the boron-containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region is greater than 30 nm.

33. The silicon solar cell according to claim 32, wherein: The thickness d2 is greater than or equal to 40 nm and greater than or equal to 50 nm.

34. The silicon solar cell according to claim 32, wherein: The thickness d2 is greater than 100 nm, greater than 200 nm, greater than 300 nm, greater than 400 nm, greater than 500 nm, greater than 600 nm, greater than 700 nm, greater than 800 nm, greater than 900 nm, greater than 1000 nm, greater than 1100 nm or greater than 1200 nm.

35. The silicon solar cell according to claim 1, wherein: When the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed on the other side of the silicon substrate away from the P-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1p , change a / a 1p Defined as u p ,u p The range is 0.8~1E10.

36. The silicon solar cell according to claim 35, wherein: u p The range is 2~1E9.

37. The silicon solar cell according to claim 35, wherein: u p The range is 10~1E8.

38. The silicon solar cell according to claim 35, wherein: u p The range is 100~1E7.

39. The silicon solar cell according to claim 35, wherein: The concentration of antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p It is above 3nm.

40. The silicon solar cell according to claim 1, wherein: When the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed in the silicon substrate on the other side of the silicon substrate away from the N-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1n , change a / a 1n Defined as u n ,u n The range is 0.8~1E10.

41. The silicon solar cell according to claim 40, wherein: u n The range is 2~1E9.

42. The silicon solar cell according to claim 40, wherein: u n The range is 10~1E8.

43. The silicon solar cell according to claim 40, wherein: u n The range is 100~1E7.

44. The silicon solar cell according to claim 40, wherein: The concentration of antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1n It is more than 2nm.

45. The silicon solar cell according to claim 1, wherein: The carrier separation layer and the interface passivation layer are formed on the back side of the silicon substrate, and form a PN junction with the silicon substrate.

46. ​​The silicon solar cell according to claim 1, wherein: The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the second interface passivation layer are formed on both sides of the silicon substrate, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are respectively formed on a side of the first interface passivation layer away from the silicon substrate and a side of the second interface passivation layer away from the silicon substrate, the first doped semiconductor layer is doped with a third main group element, and the second doped semiconductor layer is doped with a fifth main group element or a sixth main group element, The area of ​​the first doped semiconductor layer is smaller than or larger than the area of ​​the second doped semiconductor layer, The first doped semiconductor layer has antimony elements in at least a portion of a side close to the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of a side close to the second interface passivation layer to form a second antimony-containing layer. The peak concentration of antimony element in the first antimony-containing layer is a 1p , and a 1p Equal to or greater than 1E13 atoms / cm 3 , the peak concentration of antimony element in the second antimony-containing layer is a 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

47. The silicon solar cell according to claim 46, wherein: The concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of the antimony element in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n .

48. The silicon solar cell according to claim 47, wherein: The silicon substrate has a B xp Elements, forming B xp layer; The silicon substrate has a B xn Elements, forming B xn layer; The B xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2p More than 30nm; The B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

49. The silicon solar cell according to claim 1, wherein: The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the second interface passivation layer are respectively formed on one side of the silicon substrate, the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are respectively formed on a side of the first interface passivation layer away from the silicon substrate and on a side of the second interface passivation layer away from the silicon substrate, The first doped semiconductor layer is doped with a third main group element, and the second doped semiconductor layer is doped with a fifth main group element or a sixth main group element. The first interface passivation layer and the first doped semiconductor layer form a p-type region; The second interface passivation layer and the second doped semiconductor layer form an n-type region; The first doped semiconductor layer has antimony elements in at least a portion of a side close to the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of a side close to the second interface passivation layer to form a second antimony-containing layer. The peak concentration of antimony element in the first antimony-containing layer is a 1p atoms / cm 3 , and a 1p Equal to or greater than 1E13 atoms / cm 3 , the peak concentration of antimony element in the second antimony-containing layer is a 1n atoms / cm 3 , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

50. The silicon solar cell according to claim 49, wherein: The concentration of antimony in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness of the area d 1p The concentration of the antimony element in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm 3 The thickness of the area d 1n , that is, d 1p ≥d 1n .

51. The silicon solar cell according to claim 50, wherein: The silicon substrate has a B xp Elements, forming B xp layer; The silicon substrate has a B xn Elements, forming B xn layer; The B xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2p More than 30nm; The B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

52. The silicon solar cell according to claim 48 or 51, wherein: d 2p / d 1p Greater than or equal to 1, d 2n / d 1n Greater than or equal to 1.

53. The silicon solar cell according to claim 52, wherein: d 2p / d 1p 10~1E8, d 2n / d 1n It is 10~1E8.

54. The silicon solar cell according to claim 52, wherein: d 2p / d 1p 20~1E7,d 2n / d 1n It is 20~1E7.

55. The silicon solar cell according to claim 52, wherein: d 2p >d 2n 。 56. The silicon solar cell according to claim 55, wherein: d 2p -d 2n ≥5nm。 57. The silicon solar cell according to claim 55, wherein: d 2p -d 2n ≥10nm。 58. The silicon solar cell according to claim 50, wherein: There is a spacing region between the p-type region and the n-type region, and a substrate passivation layer is arranged in the spacing region between the p-type region and the n-type region, and the substrate passivation layer covers the spacing region of the silicon substrate not covered by the p-type region and the n-type region. An antimony-containing region is formed in a region of the substrate passivation layer close to the silicon substrate, wherein the concentration of antimony element in the antimony-containing region is a3, and a3 is greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p 。 59. The silicon solar cell according to claim 58, wherein The d 1钝化层 ≥1nm.

60. The silicon solar cell according to claim 58, wherein: An intrinsic spacer region is provided in the spacer region between the p-type region and the n-type region, and the intrinsic spacer region covers the spacer region of the silicon substrate not covered by the p-type region and the n-type region, and The spacing region of the silicon substrate sequentially includes an intrinsic semiconductor layer containing antimony elements and an intrinsic semiconductor layer not containing antimony elements in a direction away from the silicon substrate.

61. The silicon solar cell according to claim 60, wherein: The layer includes, from the silicon substrate toward the back side, an intrinsic region interface passivation layer, an intrinsic semiconductor layer containing antimony elements, and an intrinsic semiconductor layer not containing antimony elements; The concentration of antimony in the intrinsic semiconductor layer containing antimony is a3, and a3 is greater than 1E13 atoms / cm 3 The thickness of the area d 1i , d 1i ≤d 1n ≤d 1p 。 62. The silicon solar cell according to claim 61, wherein: The d 1i ≥2nm.

63. The silicon solar cell according to claim 60, wherein: The intrinsic region interface passivation layer contains antimony in the area close to the silicon substrate. The concentration of antimony in the intrinsic region interface passivation layer is a3, which is greater than 1E13 atoms / cm 3 The thickness of the area d 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p .

64. The silicon solar cell according to claim 63, wherein: The d 1钝化层 ≥2nm.

65. The silicon solar cell according to claim 60, wherein: An intrinsic region side interface passivation layer is arranged between the intrinsic spacer region and the p-type region or the n-type region.

66. The silicon solar cell according to claim 1, The doped semiconductor layer is an N-type doped semiconductor layer to form an N-type region, It also includes: A P-region electrode is formed on one side of the silicon substrate having the N-type doped semiconductor layer and is spaced apart from the N-type doped semiconductor layer; as well as The BSF layer is formed in the silicon substrate corresponding to the P-region electrode, and the BSF layer and the P-region electrode have the same metal element, and the peak concentration of the antimony element in the antimony-containing layer is a 1n , change a / a 1n Defined as u n ,u n The range is 0.8~1E10.

67. The silicon solar cell according to claim 66, wherein: u n The range is 2~1E9.

68. The silicon solar cell according to claim 66, wherein: u n The range is 10~1E8.

69. The silicon solar cell according to claim 66, wherein: u n The range is 100~1E7.

70. The silicon solar cell according to claim 66, wherein: The silicon substrate has a B xn Elements, forming B xn layer; the B-containing xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm 3 The thickness of the area d 2n It is more than 20nm.

71. A solar cell module comprising the silicon solar cell according to any one of claims 1 to 70.

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