A GaN-based hysteresis comparator circuit

Abstract

The application discloses a GaN-based hysteresis comparison circuit and relates to the field of semiconductor circuits.The circuit comprises a comparator circuit, a feedback circuit and a current mirror circuit which are connected with each other.The comparator circuit comprises a first N-type GaN device, a second N-type GaN device, a third N-type GaN device, a fourth N-type GaN device and a fifth N-type GaN device.The feedback circuit comprises a sixth N-type GaN device, a seventh N-type GaN device and an eighth N-type GaN device.The feedback circuit is composed of N-type GaN-based active devices instead of resistance passive devices, and the output signal is fed back to the gate of the seventh N-type GaN device, so that the circuit gain is improved, and the signal conversion time is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor circuits, and in particular to a GaN-based hysteresis comparator circuit. Background Technology

[0002] In existing GaN-based hysteresis comparator circuits, resistive passive devices are typically used to construct the feedback circuit. However, the comparator circuit used in the circuit is usually an operational transconductance amplifier, which needs to drive a high-resistance load to obtain ideal circuit performance. As a result, the overall circuit area will increase significantly due to the high-resistance passive devices. In order to ensure the reasonable circuit area, the resistance value of the resistive passive devices will not be very large. This will lead to the unsatisfactory output signal of the operational transconductance amplifier in the existing hysteresis comparator circuit, which is mainly reflected in the small output swing, low gain, and long signal conversion time. Summary of the Invention

[0003] The purpose of this invention is to provide a GaN-based hysteresis comparator circuit that can improve circuit gain and reduce signal switching time.

[0004] To achieve the above objectives, the present invention provides the following solution:

[0005] A GaN-based hysteresis comparator circuit includes: a comparator circuit, a feedback circuit, and a current mirror circuit that are interconnected.

[0006] The comparator circuit includes: a first N-type GaN device, a second N-type GaN device, a third N-type GaN device, a fourth N-type GaN device, and a fifth N-type GaN device;

[0007] The feedback circuit includes: a sixth type N GaN device, a seventh type N GaN device, and an eighth type N GaN device;

[0008] One end of the current mirror circuit is connected to the drain of the sixth N-type GaN device, the drain of the seventh N-type GaN device, the drain of the first N-type GaN device, and the drain of the second N-type GaN device, respectively.

[0009] The other end of the current mirror circuit is connected to the gate of the eighth N-type GaN device and the gate of the fifth N-type GaN device, respectively.

[0010] The gate of the sixth N-type GaN device serves as the in-phase input terminal of the signal; the source of the sixth N-type GaN device is connected to the source of the seventh N-type GaN device, the drain of the eighth N-type GaN device, and the gate of the third N-type GaN device, respectively.

[0011] The source of the first N-type GaN device is connected to the drain of the third N-type GaN device;

[0012] The source of the third N-type GaN device is connected to the source of the fourth N-type GaN device and the drain of the fifth N-type GaN device, respectively.

[0013] The source of the second N-type GaN device and the drain of the fourth N-type GaN device are connected;

[0014] The gate of the fourth type N GaN device is used as the inverting input.

[0015] Optionally, it also includes: a grounding voltage terminal;

[0016] The grounding voltage terminal is connected to the current mirror circuit, the source of the eighth N-type GaN device, and the source of the fifth N-type GaN device, respectively.

[0017] Optionally, the current mirror circuit includes: a bias current source and a ninth-type N-GaN device;

[0018] One end of the bias current source is connected to the drain of the sixth N-type GaN device, the drain of the seventh N-type GaN device, the drain of the first N-type GaN device, and the drain of the second N-type GaN device, respectively.

[0019] The other end of the bias current source is connected to the drain of the ninth type N GaN device and the gate of the ninth type N GaN device, respectively.

[0020] The source of the ninth type N GaN device is connected to the ground voltage terminal.

[0021] Optionally, the ninth N-type GaN device is an enhancement-type N-type GaN device.

[0022] Optionally, both the first N-type GaN device and the second N-type GaN device are depletion-type N-type GaN devices.

[0023] Optionally, the third, fourth, and fifth N-type GaN devices are all enhancement-type N-type GaN devices.

[0024] Optionally, the sixth N-type GaN device, the seventh N-type GaN device, and the eighth N-type GaN device are all enhancement-type N-type GaN devices.

[0025] According to specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0026] This invention discloses a GaN-based hysteresis comparator circuit. This novel GaN-based hysteresis comparator circuit, composed entirely of N-type active devices, replaces resistive passive devices with N-type GaN-based active devices to form the feedback circuit. The output signal is fed back to the gate of the seventh N-type GaN device. This achieves the solution of the requirement for the operational transconductance amplifier output signal to drive a high-resistivity load with a smaller feedback circuit area, and also expands the swing of the output signal, improves the circuit gain, and reduces the signal conversion time. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 The circuit diagram is provided for a GaN-based hysteresis comparator circuit according to an embodiment of the present invention.

[0029] Symbol explanation:

[0030] Comparator circuit-1, Feedback circuit-2, Current mirror circuit-3, First N-type GaN device-M1, Second N-type GaN device-M2, Third N-type GaN device-M3, Fourth N-type GaN device-M4, Fifth N-type GaN device-M5, Sixth N-type GaN device-M6, Seventh N-type GaN device-M7, Eighth N-type GaN device-M8, Ninth N-type GaN device-M9, Inverting input terminal-VIN2, Non-inverting input terminal-VIN1, Ground voltage terminal-VSS, Digital power supply terminal-VDD, Bias current source-IBIAS, Signal output terminal-VOUT. Detailed Implementation

[0031] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0032] The purpose of this invention is to provide a GaN-based hysteresis comparator circuit, which aims to improve circuit gain and reduce signal switching time.

[0033] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0034] like Figure 1 As shown, this embodiment of the invention provides a GaN-based hysteresis comparator circuit, including: a comparator circuit 1, a feedback circuit 2, and a current mirror circuit 3 connected to each other.

[0035] The comparator circuit 1 includes: a first N-type GaN device M1, a second N-type GaN device M2, a third N-type GaN device M3, a fourth N-type GaN device M4, and a fifth N-type GaN device M5.

[0036] Feedback circuit 2 includes: a sixth type N GaN device M6, a seventh type N GaN device M7, and an eighth type N GaN device M8.

[0037] One end of the current mirror circuit 3 is connected to the drain of the sixth N-type GaN device M6, the drain of the seventh N-type GaN device M7, the drain of the first N-type GaN device M1, and the drain of the second N-type GaN device M2, respectively.

[0038] The other end of the current mirror circuit 3 is connected to the gate of the eighth N-type GaN device M8 and the gate of the fifth N-type GaN device M5, respectively.

[0039] The gate of the sixth N-type GaN device M6 serves as the in-phase input terminal VIN1; the source of the sixth N-type GaN device M6 is connected to the source of the seventh N-type GaN device M7, the drain of the eighth N-type GaN device M8, and the gate of the third N-type GaN device M3, respectively.

[0040] The source of the first N-type GaN device M1 is connected to the drain of the third N-type GaN device M3.

[0041] The source of the third N-type GaN device M3 is connected to the source of the fourth N-type GaN device M4 and the drain of the fifth N-type GaN device M5, respectively.

[0042] The source of the second N-type GaN device M2 and the drain of the fourth N-type GaN device M4 are connected.

[0043] The gate of the fourth N-type GaN device M4 serves as the inverting input VIN2.

[0044] In one embodiment, the circuit further includes a ground voltage terminal VSS.

[0045] The grounding voltage terminal VSS is connected to the current mirror circuit 3, the source of the eighth N-type GaN device M8, and the source of the fifth N-type GaN device M5, respectively.

[0046] The current mirror circuit 3 includes: a bias current source IBIAS and a ninth N-type GaN device M9; one end of the bias current source IBIAS is connected to the drain of the sixth N-type GaN device M6, the drain of the seventh N-type GaN device M7, the drain of the first N-type GaN device M1, and the drain of the second N-type GaN device M2, respectively.

[0047] The other end of the bias current source IBIAS is connected to the drain of the ninth type N GaN device M9 and the gate of the ninth type N GaN device M9, respectively.

[0048] The source of the ninth type N GaN device M9 is connected to the ground voltage terminal VSS.

[0049] Specifically, the ninth N-type GaN device M9 is an enhancement-mode N-type GaN device. The first N-type GaN device M1 and the second N-type GaN device M2 are both depletion-mode N-type GaN devices. The third N-type GaN device M3, the fourth N-type GaN device M4, and the fifth N-type GaN device M5 are all enhancement-mode N-type GaN devices. The sixth N-type GaN device M6, the seventh N-type GaN device M7, and the eighth N-type GaN device M8 are all enhancement-mode N-type GaN devices.

[0050] Specifically, the gate of the third N-type GaN device M3 is the non-inverting input of comparator circuit 1, the gate of the fourth N-type GaN device M4 is the inverting input of comparator circuit 1, and the source of the second N-type GaN device M2 is the signal output of comparator circuit 1; the feedback circuit 2 is composed of enhancement-type N-type GaN devices, namely the sixth N-type GaN device M6, the seventh N-type GaN device M7, and the eighth N-type GaN device M8. The gates of the sixth N-type GaN device M6 and the seventh N-type GaN device M7 are both the signal input VIN1 of the feedback circuit 2, and the source of the sixth N-type GaN device M6 is the signal output VOUT of the feedback circuit 2; the current mirror circuit 3 is composed of the bias current source IBIAS and the enhancement-type N-type GaN device M9, namely the ninth N-type GaN device M9.

[0051] Input signal VIN1 is input to the gate of the sixth N-type GaN device M6 in feedback circuit 2. After processing by feedback circuit 2, it is converted into the output signal of feedback circuit 2 and acts on the gate of the third N-type GaN device M3 in comparator circuit 1 as the input signal of the non-inverting input terminal of comparator circuit 1. Input signal VIN2 is input to the gate of the fourth N-type GaN device M4 in comparator circuit 1 as the input signal of the inverting input terminal of comparator circuit 1. Comparator circuit 1 compares the input signals of its non-inverting and inverting input terminals. When the signal level of the non-inverting input terminal is higher than the signal level of the inverting input terminal, the output signal of comparator circuit 1 is high. When the signal level of the non-inverting input terminal is lower than the signal level of the inverting input terminal, the output signal of comparator circuit 1 is low. The output signal of comparator circuit 1 acts as a feedback signal on the gate of the seventh N-type GaN device M7 in feedback circuit 2. When the output signal of comparator circuit 1 is high... When the seventh type N GaN device M7 is turned on, the output signal level of feedback circuit 2 is higher than that of feedback circuit 2 when the output signal of comparator circuit 1 is low. When the output signal of comparator circuit 1 is low, the seventh type N GaN device M7 is turned off, and the output signal level of feedback circuit 2 is lower than that of feedback circuit 2 when the output signal of comparator circuit 1 is high. The input signal of the non-inverting input terminal of comparator circuit 1 changes with the output signal of comparator circuit 1, i.e., the output signal of this new hysteresis comparator circuit. Taking the voltage of the non-inverting input terminal of comparator circuit 1 as the reference voltage and the voltage of the inverting input terminal as the scanning voltage, under different output signals of this new hysteresis comparator circuit, the input signal VIN2 of the inverting input terminal of comparator circuit 1 required for the output signal of this new hysteresis comparator circuit to change from high level to low level or from low level to high level is different, thus achieving the hysteresis comparison effect.

[0052] In comparator circuit 1 and feedback circuit 2, the fifth N-type GaN device M5 and the eighth N-type GaN device M8 are both used as tail current sources, and their gate bias voltages are provided by current mirror circuit 3.

[0053] This invention primarily provides a novel GaN-based hysteresis comparator circuit structure composed entirely of N-type GaN HEMT devices, enabling hysteresis comparator functionality. Based on existing GaN-based hysteresis comparator circuits, this structure modifies the feedback loop by replacing traditional resistive passive devices with enhancement-mode N-type GaN HEMT devices, resulting in a circuit composed entirely of active devices. This structure solves the problem of excessive circuit area caused by the presence of resistive passive devices, while also addressing the operational amplifier's requirement for high output loads, thus improving the circuit's performance in terms of swing, gain, and propagation delay.

[0054] The beneficial effects of this invention are:

[0055] A novel GaN-based hysteresis comparator circuit, composed entirely of N-type active devices, has a smaller circuit area, while expanding the output swing of the circuit's output signal, improving the circuit's signal gain, and shortening the circuit's signal conversion time.

[0056] The circuit has a smaller circuit area because the feedback circuit, composed of all-N-type active devices, is used in a new GaN-based hysteresis comparator circuit, replacing the existing feedback circuit composed of resistive passive devices. Since the comparator circuit is an operational transconductance amplifier circuit, the larger the load driven by its output signal, the more ideal the output signal. Therefore, in the existing feedback circuit, extremely large resistive passive devices are required to meet the load requirements of the operational transconductance amplifier. However, the larger the resistance of the resistive passive device, the larger the area required. Thus, in the existing circuit, the use of resistive passive devices will lead to a significant increase in circuit area. In the new GaN-based hysteresis comparator circuit composed of all N-type active devices, the output signal of the comparator circuit is input to device M7, that is, the gate of the seventh N-type GaN device M7. Due to the structural characteristics of GaN HEMT devices, the gate resistance of the device is always extremely high and basically independent of the device size. Therefore, in the feedback circuit of the new hysteresis comparator, by selecting small GaN HEMT active devices, the area of ​​the feedback circuit is greatly reduced. Thus, the overall area of ​​the new GaN-based hysteresis comparator circuit composed of all N-type active devices will be greatly reduced compared to the existing circuit.

[0057] The expanded output swing, increased signal gain, and shortened signal transition time of the circuit are due to the fact that the output signal of the novel GaN-based hysteresis comparator circuit, composed of all-N-type active devices, is input to the gate of the seventh-type N-GaN device M7. Because the gate resistance of the device is extremely high, the current in the comparator circuit will not leak out from the output terminal. This not only expands the output swing of the circuit's output signal but also makes the output signal at a high level closer to the voltage V at the digital power supply terminal VDD. DD The voltage V at the VSS terminal, which is closer to the ground voltage, is at a low level. SS It also improves the signal gain of the circuit; because the signal gain of the circuit is improved, the range of input signal level changes required for the circuit output signal to switch is smaller, thereby shortening the signal switching time.

[0058] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0059] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the circuit and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A GaN-based hysteresis comparator circuit, characterized in that, include: Interconnected comparator circuits, feedback circuits, and current mirror circuits; The comparator circuit includes: a first N-type GaN device, a second N-type GaN device, a third N-type GaN device, a fourth N-type GaN device, and a fifth N-type GaN device; The feedback circuit includes: a sixth type N GaN device, a seventh type N GaN device, and an eighth type N GaN device; One end of the current mirror circuit is connected to the drain of the sixth N-type GaN device, the drain of the seventh N-type GaN device, the drain of the first N-type GaN device, and the drain of the second N-type GaN device, respectively. The other end of the current mirror circuit is connected to the gate of the eighth N-type GaN device and the gate of the fifth N-type GaN device, respectively. The gate of the sixth N-type GaN device serves as the in-phase input terminal of the signal; the source of the sixth N-type GaN device is connected to the source of the seventh N-type GaN device, the drain of the eighth N-type GaN device, and the gate of the third N-type GaN device, respectively. The source of the first N-type GaN device is connected to the drain of the third N-type GaN device; The source of the third N-type GaN device is connected to the source of the fourth N-type GaN device and the drain of the fifth N-type GaN device, respectively. The source of the second N-type GaN device and the drain of the fourth N-type GaN device are connected; The gate of the fourth N-type GaN device is used as the inverting input terminal; the gate of the seventh N-type GaN device is connected to the gate of the first N-type GaN device. It also includes: the grounding voltage terminal; The grounding voltage terminal is connected to the current mirror circuit, the source of the eighth N-type GaN device, and the source of the fifth N-type GaN device, respectively. The current mirror circuit includes: a bias current source and a ninth-type N-GaN device; One end of the bias current source is connected to the drain of the sixth N-type GaN device, the drain of the seventh N-type GaN device, the drain of the first N-type GaN device, and the drain of the second N-type GaN device, respectively. The other end of the bias current source is connected to the drain of the ninth type N GaN device and the gate of the ninth type N GaN device, respectively. The source of the ninth type N GaN device is connected to the ground voltage terminal; the gate of the ninth type N GaN device is connected to the gate of the eighth type N GaN device.

2. The GaN-based hysteresis comparator circuit according to claim 1, characterized in that, The ninth type N GaN device is an enhancement type N GaN device.

3. The GaN-based hysteresis comparator circuit according to claim 1, characterized in that, Both the first and second N-type GaN devices are depletion-type N-type GaN devices.

4. The GaN-based hysteresis comparator circuit according to claim 1, characterized in that, The third, fourth, and fifth N-type GaN devices are all enhancement-type N-type GaN devices.

5. The GaN-based hysteresis comparator circuit according to claim 1, characterized in that, The sixth, seventh, and eighth N-type GaN devices are all enhancement-mode N-type GaN devices.

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