Voltage regulating circuit, voltage regulating method and display system

Abstract

The application discloses a voltage regulating circuit, a voltage regulating method and a display system. An output end of the voltage regulating circuit provides an output voltage to a power supply end of a subsequent circuit. The voltage regulating circuit comprises an input module, which generates a control signal according to an input voltage of the voltage regulating circuit; a selection module, which is coupled with the input module, provides a selection signal in a first level state when the control signal represents that the input voltage is greater than a preset voltage, and provides a selection signal in a second level state when the control signal represents that the input voltage is less than or equal to the preset voltage; an output module, which is coupled with the selection module, provides the output voltage according to the input voltage when the selection signal is in the first level state; and a pull-down module, which is coupled with the selection module, grounds the output end of the voltage regulating circuit when the selection signal is in the second level state, so as to reset the output voltage. Thus, display abnormalities of the display system during rapid restart are avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a voltage regulating circuit, a voltage regulating method and a display system. BACKGROUND

[0002] A liquid crystal display (LCD) is a display system that utilizes the phenomenon that the arrangement direction of liquid crystal molecules changes under the action of an electric field to change the light transmittance of a light source. Due to the advantages of good display quality, small size and low power consumption, the liquid crystal display has been widely applied to display terminals such as mobile phones and large-size display panels such as flat panel televisions.

[0003] The display panel of the liquid crystal display has a plurality of pixel units arranged in an array, and each pixel unit includes a thin film transistor as a switching element. For each pixel unit, the voltage of the pixel unit can be adjusted only when the thin film transistor is turned on, so as to change the display content of the pixel unit. Based on the working principle of the liquid crystal display, each pixel unit still has an electric quantity after being powered off, so that the display panel will have a residual image after the liquid crystal display is powered off.

[0004] In the prior art, when the liquid crystal display is powered off, a gate-on voltage is provided to the thin film transistor in each pixel unit, so that each pixel unit can be selected and discharged to eliminate the residual image. Moreover, the power-down speed of the gate-on voltage is slowed down to prolong the selection time of each pixel unit, thereby improving the residual image elimination effect.

[0005] However, the slower power-down speed will cause the gate-on voltage to still have a certain potential when the liquid crystal display is quickly restarted, thereby causing the thin film transistor in each pixel unit to still remain in an open state when restarted and unable to normally display a picture, and even causing the liquid crystal display to be black or dead. SUMMARY

[0006] In view of the above problems, the purpose of the present application is to provide a voltage regulating circuit, a voltage regulating method and a display system to avoid display abnormalities of the display system when quickly restarted.

[0007] According to an aspect of the present application, a voltage regulating circuit is provided, wherein an output terminal of the voltage regulating circuit provides an output voltage to a power supply terminal of a subsequent circuit, and the voltage regulating circuit comprises: an input module configured to generate a control signal according to an input voltage of the voltage regulating circuit; a selection module coupled to the input module, configured to provide a selection signal in a first level state when the control signal represents that the input voltage is greater than a preset voltage, and to provide the selection signal in a second level state when the control signal represents that the input voltage is less than or equal to the preset voltage; an output module coupled to the selection module, configured to provide the output voltage according to the input voltage when the selection signal is in the first level state; and a pull-down module coupled to the selection module, configured to ground the output terminal of the voltage regulating circuit when the selection signal is in the second level state, so as to reset the output voltage.

[0008] Optionally, the power-down phase of the input voltage comprises a first power-down phase and a second power-down phase, in the first power-down phase, the input voltage is greater than the preset voltage, the pull-down module is closed, and the output module pulls down the output voltage to a first voltage in response to the power-down of the input voltage, the first voltage is greater than or equal to a minimum power supply voltage allowing the subsequent circuit to work normally; in the second power-down phase, the input voltage is less than or equal to the preset voltage, the output module is closed, and the pull-down module pulls down the output voltage from the first voltage to a ground voltage, and a time length for the input voltage to power down from the preset voltage to the ground voltage is greater than a time length for the output voltage to power down from the first voltage to the ground voltage.

[0009] Optionally, the input module comprises: a first resistor, a first end of the first resistor is coupled to the input voltage, and a second end of the first resistor provides the control signal; a second resistor, a first end of the second resistor is coupled to the second end of the first resistor, and a second end of the second resistor is grounded; and a first capacitor, coupled between the first resistor.

[0010] Optionally, the selection module comprises: a third resistor, a first end of the third resistor is coupled to the input voltage, and a second end of the third resistor provides the selection signal; a first transistor, a control end of the first transistor is coupled to the control signal, and a first path end of the first transistor is coupled to the second end of the third resistor; a fourth resistor, a first end of the fourth resistor is coupled to a second path end of the first transistor, and a second end of the fourth resistor is grounded; and a second capacitor, coupled between the first path end of the first transistor and the ground.

[0011] Optionally, the output module comprises: a third capacitor, a first end of the third capacitor coupled to the input voltage, and a second end of the third capacitor grounded; and a charging path, an input end of the charging path coupled to the input voltage, and an output end of the charging path coupled to an output end of the voltage regulation circuit, in the first power-down phase, the charging path pulls down the output voltage to the first voltage in response to power-down of the input voltage, in the second power-down phase, the charging path is turned off; the charging path comprises: a second transistor, a first path end of the second transistor coupled to the input voltage, and a second path end of the second transistor coupled to the output end of the voltage regulation circuit; and a fifth resistor, a first end of the fifth resistor coupled to a control end of the second transistor, and a second end of the fifth resistor coupled to the selection signal.

[0012] Optionally, the pull-down module comprises: an operational amplifier, a non-inverting input end of the operational amplifier coupled to the selection signal, and an inverting input end of the operational amplifier coupled to an output end of the operational amplifier; a third transistor, a control end of the third transistor coupled to the output end of the operational amplifier, and a first path end of the third transistor coupled to the output end of the voltage regulation circuit; and a sixth resistor, a first end of the sixth resistor coupled to a second path end of the third transistor, and a second end of the sixth resistor grounded.

[0013] According to still another aspect of the present application, a voltage regulation method is provided, wherein the voltage regulation method is used to regulate a supply voltage of a supply end of a subsequent stage circuit, the voltage regulation method comprises: obtaining an output voltage of a previous stage circuit; and providing a corresponding supply voltage according to an electric potential of the output voltage, wherein in a case that the output voltage is greater than a preset voltage, the supply voltage follows the output voltage; in a case that the output voltage is less than / equal to the preset voltage, the supply end is grounded to reset the supply voltage.

[0014] Optionally, a power-down phase of the output voltage comprises a first power-down phase and a second power-down phase, in the first power-down phase, the output voltage is greater than the preset voltage, the supply voltage is pulled down to a first voltage in response to power-down of the output voltage, the first voltage is greater than / equal to a minimum voltage allowing the subsequent stage circuit to work normally, in the second power-down phase, the output voltage is less than / equal to the preset voltage, the supply end is grounded, and the supply voltage is pulled down from the first voltage to a ground voltage; a time length for the output voltage to power down from the preset voltage to the ground voltage is greater than a time length for the supply voltage to power down from the first voltage to the ground voltage.

[0015] Optionally, the method of providing the supply voltage according to the potential of the output voltage comprises: obtaining a control signal according to the output voltage; providing a selection signal in a corresponding level state according to the potential of the output voltage represented by the control signal, providing the selection signal in a first level state when the control signal represents that the output voltage is greater than a preset voltage, and providing the selection signal in a second level state when the control signal represents that the output voltage is less than the preset voltage; and providing a corresponding output supply voltage according to the level state of the selection signal, the supply voltage following the output voltage when the selection signal is in the first level state, and the supply terminal being grounded when the selection signal is in the second level state.

[0016] According to a third aspect of the present application, a display system is provided, wherein the display system comprises: a display panel; and a driving device for driving the display panel, the driving device comprising: a boost circuit for providing a gate-on voltage; a level conversion circuit for providing a gate control signal according to the gate-on voltage and a gate timing signal; a gate driving circuit for providing a corresponding scanning voltage to a pixel unit of the display panel according to the gate control signal; and a voltage adjusting circuit as claimed in any one of the preceding claims, coupled between the boost circuit and the level conversion circuit, for adjusting a power-down speed of the gate-on voltage when the display system is powered down

[0017] According to the voltage adjusting circuit, the voltage adjusting method and the display system provided by the present application, the power-down speed of the gate-on voltage can be adjusted when the display system is powered down, so that the gate-on voltage is rapidly pulled down to the ground voltage when powered down to the preset voltage. Thus, the requirement of the under-voltage lockout mechanism on the potential of the gate-on voltage can be met when the display system is rapidly restarted, and display errors during rapid restart are avoided, and the stability of the display system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0018] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application taken in conjunction with the accompanying drawings, in which:

[0019] Figure 1 A schematic structural diagram of a display system of the prior art is shown;

[0020] Figure 2 A schematic structural diagram of a display system of an embodiment of the present application is shown;

[0021] Figure 3 A schematic structural diagram of a voltage adjusting circuit of an embodiment of the present application is shown;

[0022] Figure 4 A working waveform diagram of a voltage adjusting circuit of an embodiment of the present application is shown.

[0023] Figure 5 a schematic block diagram showing a boost circuit;

[0024] Figure 6 a schematic flow chart showing a voltage regulation method according to an embodiment of the application. DETAILED DESCRIPTION

[0025] Various embodiments of the application will be described in greater detail below, with reference to the accompanying drawings. In the drawings, like reference numerals can refer to like elements, and the various embodiments can be the same or similar. For the sake of clarity, the various parts of the drawings can not be to scale.

[0026] Also, certain terminology can also be used in the following description for the purpose of reference only, and thus are not intended to be limiting. For example, terms such as "upper", "lower", "above", and "below" refer to directions in the drawings to which reference is made. Terms such as "front", "back", "rear", and "side" describe the orientation in use and / or appearance of components, and are not to be construed as positions of components when in use or when being made. The terminology includes the words specifically noted above, derivatives thereof, and words of similar import. The terminology can be based on a design and / or function of a component that is being described. Similar terminology can be understood similarly throughout the present disclosure.

[0027] It should be understood that, in the following description, "circuitry" can include a single or multiple components, or a combination of hardware circuitry, programmable circuitry, state machine circuitry, and / or elements that can store instructions for execution by a programmable circuitry. When an element or circuitry is referred to as being "connected to" another element, or "connected between" two nodes, it can be directly coupled or connected to the other element or can have intervening components between the elements, the connection between elements can be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, it implies that there are no intervening components between the two.

[0028] In addition, it should also be noted that, in this document, terms such as first and second are only used to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such a process, method, article or device. Without more limitations, the element defined by the statement "includes a" does not exclude the presence of additional identical elements in the process, method, article or device that includes the element.

[0029] In the present application, the MOSFET includes a first pass-through terminal, a second pass-through terminal and a control terminal, and in the on state of the MOSFET, current flows from the first pass-through terminal to the second pass-through terminal. The first pass-through terminal, the second pass-through terminal and the control terminal of the P-type MOSFET are respectively the source, the drain and the gate, and the first pass-through terminal, the second pass-through terminal and the control terminal of the N-type MOSFET are respectively the drain, the source and the gate.

[0030] Likewise, the triode also includes a first pass-through terminal, a second pass-through terminal and a control terminal, and in the on state of the triode, current flows from the first pass-through terminal to the second pass-through terminal. The first pass-through terminal, the second pass-through terminal and the control terminal of the NPN triode are respectively the collector, the emitter and the base; and the first pass-through terminal, the second pass-through terminal and the control terminal of the PNP triode are respectively the emitter, the collector and the base.

[0031] Also, it should be noted that in the following, signals with different potential states can be understood as corresponding to signals with different potentials or signals with different potential intervals.

[0032] Figure 1 A schematic structural diagram of a display system of the prior art is shown. As shown in the figure, the display system 100 includes a display panel 160 and a driving device of the display panel 160, wherein the driving device further includes a timing control circuit 110, a source driving circuit 120, a power management circuit 130, a level conversion circuit 140 and a gate driving circuit 150. Figure 1

[0033] The timing control circuit 110 provides display data Data and source timing signals Td to the source driving circuit 120 and provides gate timing signals Tg to the level conversion circuit 140 according to the received image data IMG and timing control signals Cont (for example, including vertical synchronization signal Vsync, horizontal synchronization signal Hsync, data enable signal DE and clock signal CLK, etc.). The source driving circuit 120 converts the display data into corresponding data voltages VD and outputs according to the source timing signals Td. The power management circuit 130 provides gate-on voltage VGH and gate-off voltage VGL according to the power voltage of the display system 100. The level conversion circuit 140 provides gate control signals Vgc to the gate driving circuit 150 according to the gate-on voltage VGH and the gate-off voltage VGL and the gate timing signals Tg, so that the gate driving circuit 150 outputs corresponding scanning voltages VG according to the gate control signals Vgc. It should be noted that the source timing signals Td, the gate timing signals Tg and the gate control signals Vgc should be understood as a general term of a type of signals and should not be understood as a single signal, for example, the gate timing signals Tg usually include at least one gate start pulse signal and a plurality of clock signals.

[0034] ​The display panel 160 is configured to display image data. The display panel 160 includes a plurality of pixel units P arranged in an array, a plurality of data lines and a plurality of scan lines. Each pixel unit P includes a thin film transistor (TFT) as a switching element of the pixel unit, wherein a source of the thin film transistor receives a data voltage VD via a corresponding data line, and a gate of the thin film transistor receives a scan voltage VG via a corresponding scan line. When the scan voltage VG received by the gate of the thin film transistor of the pixel unit P is a gate-on voltage VGH, the pixel unit P is selected and emits light with a preset brightness according to the corresponding data voltage VD (the scan voltage VG received by the gate of the unselected pixel unit P is a gate-off voltage VGL).

[0035] In order to eliminate the residual image, when the display system 100 is powered off, the level conversion circuit 140 provides a corresponding gate control signal Vgc to the gate drive circuit 150, so that the gate drive circuit 150 simultaneously provides the gate-on voltage VGH to each pixel unit P in the display panel 160, so as to select all the pixel units for fast discharge. In order to improve the effect of eliminating the residual image, the discharge speed of the gate-on voltage VGH is slowed down as much as possible to prolong the selection time of each pixel unit. However, the slower discharge speed of the gate-on voltage VGH still has a certain potential when the display system 100 is quickly restarted, so that all the pixel units P still remain in the selected state when the display system 100 is quickly restarted, and display abnormalities (such as black screen or dead screen) occur.

[0036] In order to solve the above problems, the present application provides a voltage adjusting circuit, a voltage adjusting method and a display system, which can adjust the discharge speed of the gate-on voltage when the display system is powered off, so that the gate-on voltage is quickly pulled down to the ground voltage when it is discharged to a preset voltage, thereby avoiding display abnormalities when the display system is quickly restarted.

[0037] Figure 2 A schematic structural diagram of a display system according to an embodiment of the present application is shown. As shown in Figure 2 The display system 200 includes a display panel 260 and a driving device of the display panel 260. The driving device includes a timing control circuit 210, a source drive circuit 220, a power management circuit 230, a level conversion circuit 240, a gate drive circuit 250, a voltage adjusting circuit 270 and a boost circuit 280.

[0038] The timing control circuit 210 provides display data Data and source timing signals Td to the source driving circuit 220 according to the received image data IMG and timing control signals Cont (e.g. including vertical synchronization signal Vsync, horizontal synchronization signal Hsync, data enable signal DE, clock signal CLK, etc.), and provides gate timing signals Tg to the level conversion circuit 240. The source driving circuit 220 converts the display data Data into corresponding data voltages VD according to the source timing signals Td and outputs. The power management circuit 230 provides gate-on voltage VGH and gate-off voltage VGL according to the power voltage of the display system 200. The level conversion circuit 240 provides gate control signals Vgc to the gate driving circuit 250 according to the gate-on voltage VGH and the gate-off voltage VGL and the gate timing signals Tg, so that the gate driving circuit 250 outputs corresponding scanning voltages VG according to the gate control signals Vgc. It should be noted that the source timing signals Td, the gate timing signals Tg and the gate control signals Vgc should be understood as a collective term of a type of signals and should not be understood as a single signal, for example, the gate timing signals Tg usually include at least one gate start pulse signal and a plurality of clock signals.

[0039] The display panel 260 is used to display image data. The display panel 260 includes a plurality of pixel units P arranged in an array, a plurality of data lines and a plurality of scanning lines (only one pixel unit P is taken as an example in the Figure 1 Each pixel unit P further includes a thin film transistor (TFT) as a pixel unit switching element, wherein the source of the thin film transistor receives a data voltage VD through a corresponding data line, and the gate of the thin film transistor receives a scanning voltage VG through a corresponding scanning line. When the scanning voltage VG received by the thin film transistor of the pixel unit P is the gate-on voltage VGH, the pixel unit P is selected and emits light of a preset brightness according to the corresponding data voltage VD (the scanning voltage VG received by the unselected pixel unit P is the gate-off voltage VGL).

[0040] Unlike the display system 100 shown in Figure 1 The display system 200 provided by the present application further includes a voltage adjustment circuit 270 coupled between the power management circuit 230 and the level conversion circuit 240, so that the power-off rate of the gate-on voltage VGH can be adjusted when the display system 200 is powered off.

[0041] Specifically, Figure 3A schematic structural diagram of the voltage regulating circuit according to an embodiment of the present application is shown. When the display system 200 is powered off, the power-off stage of the input voltage VGH-IN of the voltage regulating circuit 270 includes a first power-off stage and a second power-off stage. In the first power-off stage, the input voltage VGH-IN is greater than a preset voltage, and the change of the output voltage VGH-OUT follows the change of the input voltage VGH-IN. In the second power-off stage, the input voltage VGH-IN is less than or equal to the preset voltage, and the output voltage VGH-OUT is grounded.

[0042] It should be noted that when the input voltage VGH-IN is powered off to the preset voltage, the voltage of the output voltage VGH-OUT (denoted as the first voltage) should be greater than or equal to the minimum voltage that allows the subsequent circuit to work normally. In the embodiments shown, it can be understood that at the first voltage, each pixel unit of the display panel is still turned on. It should also be understood that due to the delay caused by each component in the circuit, in some embodiments, the first voltage is slightly greater than the preset voltage. Figure 2

[0043] As shown in Figure 3 The voltage regulating circuit 270 includes an input module 271, a selection module 272, an output module 273, and a pull-down module 274.

[0044] The input module 271 is configured to generate a control signal according to the input voltage VGH-IN of the voltage regulating circuit. Specifically, corresponding to the input voltage VGH-IN including the first power-off stage and the second power-off stage, the control signal also includes a first control signal corresponding to the first power-off stage and a second control signal corresponding to the second power-off stage. In the embodiments of the present application, when the input voltage enters the second power-off stage from the first power-off stage (i.e., when the input voltage drops to the preset voltage), the control signal is quickly switched from the first control signal to the second control signal (i.e., the switching time is less than the preset time).

[0045] Referring to Figure 3 , the input module 271 includes, for example, a first resistor R1, a second resistor R2, and a first capacitor C1. The first end of the first resistor R1 is coupled to the input voltage VGH-IN of the voltage regulating circuit 270, and the second end of the first resistor R1 provides a control signal VA (i.e., the voltage VA at point A). The first end of the second resistor R2 is coupled to the second end of the first resistor R1, and the second end of the second resistor R2 is grounded (i.e., coupled to a ground voltage). By selecting appropriate first resistor R1 and second resistor R2, the voltage division of the first resistor R1 and the second resistor R2 can be adjusted, so that the control voltage VA can meet the preset requirements. The first capacitor C1 is coupled across the first resistor R1, so that the control signal VA can change rapidly when the input voltage drops to the preset voltage, i.e., the first control signal can be quickly switched to the second control signal. ​

[0046] The selection module 272 is coupled with the input module 271 to provide a selection signal VB (i.e. a voltage at point B, VB) according to the control signal VA. In particular, the selection module 272 provides a selection signal in a first level state when the control signal VA indicates that the input voltage VGH-IN of the voltage regulation circuit 270 is greater than a preset voltage (i.e. the control signal is a first control signal and the input voltage VGH-IN is in a first power-down stage), and provides a selection signal in a second level state when the control signal VA indicates that the input voltage VGH-IN is less than or equal to the preset voltage (i.e. the control signal is a second control signal and the input voltage VGH-IN is in a second power-down stage).

[0047] Referring to Figure 3 The selection module 272 includes, for example, a first transistor Q1, a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 is coupled with the input voltage VGH-IN, and the second end of the third resistor R3 provides the selection signal VB. The first pass end of the first transistor Q1 (as an example, the first transistor Q1 is an NPN transistor) is coupled with the second end of the third resistor R3. The control end of the first transistor Q1 is coupled with the control signal VA. The first end of the fourth resistor R4 is coupled with the second pass end of the first transistor Q1, and the second end of the fourth resistor R4 is grounded. The fourth resistor R4 is used to avoid short circuit when the first transistor is turned on. In order to reduce the influence of the fourth resistor R4 on the selection signal VB, the resistance of the fourth resistor R4 should be as small as possible.

[0048] Further, in some embodiments, the selection module 272 further includes a second capacitor C2. The second capacitor C2 is coupled between the first pass end of the first transistor Q1 and the ground to delay the voltage change of the first pass end of the first transistor Q1, and improve the stability of the first transistor Q1.

[0049] The output module 273 is coupled with the selection module 272 to provide an output voltage VGH-OUT of the voltage regulation circuit 270 according to the input voltage VGH-IN of the voltage regulation circuit 270 when the selection signal VB is in the first level state (i.e. the first power-down stage of the input voltage VGH-IN). In particular, the output module 273 pulls down the output voltage VGH-OUT to a first voltage greater than or equal to a minimum supply voltage allowing the normal operation of the subsequent circuit in response to the power-down of the input voltage VGH-IN.

[0050] Referring to Figure 3The output module 273, for example, includes a charging path, which, in the first voltage drop phase of the input voltage VGH-IN, pulls down the output voltage VGH-OUT of the voltage regulating circuit 270 to a first voltage in response to the voltage drop of the input voltage VGH-IN. Specifically, the charging path includes a second transistor Q2 and a fifth resistor R5. Taking the second transistor Q2 as a PNP type transistor as an example, the first path end of the second transistor Q2 is coupled with the input voltage VGH-IN of the voltage regulating circuit 270, the second path end of the second transistor Q2 is coupled with the output end of the voltage regulating circuit 270 to provide the output voltage VGH-OUT of the voltage regulating circuit 270, and the control end of the second transistor Q2 is connected with the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is coupled with the selection signal VB.

[0051] Further, in some embodiments, the output module 273 further includes a third capacitor C3. The third capacitor C3 is coupled between the first path end of the second transistor Q2 and the ground, so as to delay the voltage change of the first path end of the second transistor Q2, thereby improving the working stability of the second transistor Q2.

[0052] The pull-down module 274 is coupled with the selection module 272, and is configured to ground the output end of the voltage regulating circuit 270 when the selection signal VB is in the second level state (i.e., in the second voltage drop phase of the input voltage VGH-IN).

[0053] Referring to Figure 3 The pull-down module 274, for example, includes an operational amplifier OP1, a third transistor Q3, and a sixth resistor R6. The non-inverting input end of the operational amplifier OP1 is coupled with the selection signal VB, and the inverting input end of the operational amplifier OP1 is coupled with the output end of the operational amplifier OP1, thereby forming a voltage follower circuit. Taking the third transistor Q3 as an NMOS transistor as an example, the control end of the third transistor Q3 is coupled with the output end of the operational amplifier OP1, the first path end of the third transistor Q3 is coupled with the output end of the voltage regulating circuit 270, the second path end of the third transistor Q3 is connected with the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is grounded. The sixth resistor R6 is used to avoid short circuit when the third transistor is turned on, and thus the resistance value of the sixth resistor R6 should be as small as possible.

[0054] In addition, it should be understood that, in the first voltage drop phase of the input voltage VGH-IN, the pull-down module 274 is turned off, and in the second voltage drop phase of the input voltage VGH-OUT, the output module 273 is turned off.

[0055] The voltage regulating circuit 270 is further described below in combination with the working process. Taking R1=16KΩ, R2=2KΩ, R3=660Ω, and R5=630Ω as examples of main resistance selection (the resistance values of R4 and R6 are as small as possible, and no specific examples are given here).

[0056] When the display system 200 is powered on, the gate-on voltage VGH (i.e. the input voltage VGH-IN of the voltage regulating circuit 270) gradually rises to the working voltage (e.g. 19V). As the input voltage VGH-IN rises, the control signal VA also gradually rises, thereby gradually turning on the first transistor Q1. Since the fourth resistor R4 has a small resistance value, the voltage division of the fourth resistor R4 is small, and the selection signal VB (i.e. the voltage VB at point B) is approximately 0 (i.e. the first level state of the selection signal), so the second transistor Q2 is turned on and the third transistor Q3 is turned off. Specifically, corresponding to the above-mentioned resistance selection, when the input voltage VGH-IN rises to the working voltage, the voltage VC at point C is 19V. At this time, VA = 0.7V, the first transistor Q1 is turned on, VB = 145mv, thereby turning on the second transistor Q2, turning off the third transistor Q3, and the output voltage VGH-OUT follows the voltage at point C, i.e. 19V. That is, the voltage regulating circuit 270 provides the output voltage VGH-OUT according to the input voltage VGH-IN.

[0057] When the display system 200 is powered off, in the first power-off stage of the input voltage VGH-IN, the pull-down module 274 is closed, and the charging path in the output module 273 pulls down the output voltage VGH-OUT to the first potential in response to the power-off of the input voltage VGH-IN. Due to the effect of the third capacitor C3, the power-off speed of the voltage at point C is reduced, so that the working state of the second transistor Q2 can be kept stable, i.e. the relative stability of the output voltage VGH-OUT can be maintained, thereby keeping the pixel units of the display panel in a relatively stable open state, and the elimination effect of the shutdown residual image of the display panel is better.

[0058] When VGH-IN drops to a preset voltage (e.g., 5V), the second power-down stage begins. Capacitor C1 rapidly de-energizes the control signal VA, switching it quickly from the first to the second control signal. The first transistor Q1 is turned off, and the selection signal VB approximates the input voltage VGH-IN of the voltage regulation circuit 270, causing the second transistor Q2 to turn off and the third transistor Q3 to turn on. This closes the charging path of the output module 273, turns on the pull-down module 274, and pulls the output voltage VGH-OUT of the voltage regulation circuit 270 down to ground. Specifically, corresponding to the resistor selection mentioned above, when VGH-IN drops to the preset voltage of 5V, the voltage VC at point C also drops to 5V (it should be understood that in some embodiments, due to the effect of the third capacitor C3, the voltage drop of the voltage VC at point C may lag slightly behind the voltage drop of VGH-IN. That is, when VGH-IN drops to 5V, the voltage at point C may be a first voltage slightly higher than 5V, and the output voltage VGH-OUT at this time is also this first voltage. For ease of explanation, the first voltage is approximately equal to the preset voltage). At this time, due to the effect of the first capacitor C1, VA is quickly pulled down to 0.55V, and the first transistor Q1 is turned off. Based on the voltage division of resistor R3, VB is approximately 4.9V at this time. This causes the second transistor Q2 to turn off, the third transistor Q3 to turn on, and VGH-OUT to be pulled down to ground.

[0059] Similarly, due to the function of the second capacitor C2, the power-down speed of the selection signal VB can be slowed down, which improves the stability of the second transistor Q2 and thus improves the stability of the voltage regulation circuit 270.

[0060] Figure 4 The diagram shows the operating waveforms of the voltage regulation circuit according to an embodiment of this application. VGH-IN represents the input voltage of the voltage regulation circuit 270; VGH-OUT represents the output voltage of the voltage regulation circuit 270. For example, the operating voltage of the gate turn-on voltage VGH is 19V, and the preset voltage is 5V.

[0061] like Figure 4 As shown: At time t1, the display system is powered on, and the input voltage VGH-IN of the voltage regulation circuit 270 increases accordingly. Each module in the voltage regulation circuit 270 operates in sequence following the increase of the input voltage VGH-IN, and starts to provide the output voltage VGH-OUT at time t2.

[0062] At time t3, the display system loses power, and the input voltage VGH-IN of the voltage regulation circuit 270 decreases accordingly, then drops to the preset voltage at time t4 (entering the second power-down stage of the input voltage; the output voltage at this time is the first voltage, but...). Figure 4In some embodiments, the first voltage is approximately equal to the preset voltage for the sake of illustration). At time t4, the control signal VA is quickly powered off (i.e., quickly switched from the first control signal to the second control signal) based on the action of the first capacitor C1, the charging path of the output module 273 is closed, the pull-down module 274 is turned on, and then the output voltage VGH-OUT of the voltage regulation circuit 270 is quickly pulled down to the ground voltage under the action of the pull-down module 274, and is powered off to the ground voltage at time t5 as shown. Figure 4 Thus, the time length (i.e., the time length of t4-t5) for the output voltage VGH-OUT to be powered off from the first voltage to the ground voltage is much smaller than the time length (i.e., the time length of t4-t6) for the input voltage VGH-IN to be powered off from the preset voltage to the ground voltage. Furthermore, the total time length for the output voltage VGH-OUT to be powered off from the working voltage to the ground voltage is smaller than the total time length for the input voltage VGH-IN to be powered off from the working voltage to the ground voltage. The shorter total power-off time length can enable the display system 200 to still meet the start-up limit of the gate-on voltage by the UVLO (Under Voltage Lock Out) when quickly restarting, and the display system can normally display after restarting. Thus, the voltage regulation module 270 provided in the present application can enable the power-off speed of the gate-on voltage to meet both the high requirement for the power-off effect of the shutdown residual image and the potential requirement of the gate-on voltage by the display system when quickly restarting.

[0063] It should be noted that, in the waveform diagram shown in Figure 4 , t1-t6 are only used to represent the display order of each time, and do not represent the size relationship of each time length. In addition, it should be understood that, due to the action of the third capacitor C3 in the output module, at times t3, t4, etc., the change of VGH-OUT may have a delay relative to the change of VGH-IN, and when the input voltage VGH-IN is powered off to the preset voltage, the output voltage VGH-OUT (the first voltage) may be slightly higher than the preset voltage. For the sake of illustration, these very subtle delays or voltage differences are not shown in Figure 4 .

[0064] Further, as shown in Figure 2 , in some embodiments, in order to enable the potential of the gate-on voltage to meet the requirement, the driving device further includes a boost circuit 280 to boost the gate-on voltage to the working voltage. Figure 5 A schematic structural diagram of the boost circuit is shown. As shown in Figure 5 , the boost circuit 280 includes a fourth capacitor C4 to an eighth capacitor C8, and a first diode D1 to a fourth diode D4.

[0065] Specifically, a first terminal of the fourth capacitor C4 is coupled with the power management circuit 230 to receive the reference voltage Vref, and a second terminal of the fourth capacitor C4 is coupled with an anode of the first diode D1 and a cathode of the second diode D2, respectively. The cathode of the first diode D1 provides the gate-on voltage. The sixth capacitor C6 and the eighth capacitor C8 are connected in parallel and coupled between the cathode of the first diode D1 and the ground. The anode of the second diode D2 is coupled with the first power supply terminal via the seventh capacitor C7 to receive the first power supply voltage AVDD. A first terminal of the fifth capacitor C5 is coupled with the power management circuit 230 to receive the reference voltage Vref, and a second terminal of the fifth capacitor C5 is coupled with an anode of the third diode D3 and a cathode of the fourth diode D4, respectively. The cathode of the third diode D3 is coupled with the anode of the second diode D2. The anode of the fourth diode D4 is coupled with the first power supply terminal. The seventh resistor R7 and the eighth resistor R8 are connected in series between the cathode of the first diode D1 and the ground, and a middle node of the seventh resistor R7 and the eighth resistor R8 provides the feedback voltage Vfb to the power management circuit 230.

[0066] However, it should be understood that Figure 5 The shown boost circuit is only as an example, and the boost circuit in the display system 200 of the present application can select any circuit structure in the prior art.

[0067] According to the voltage regulation circuit, the driving device and the display system provided by the present application, the voltage drop speed of the gate-on voltage can be regulated when the display system is powered off, so that the gate-on voltage is rapidly pulled down to the ground voltage when the voltage is dropped to the preset voltage. Thus, the requirement of the under-voltage lockout mechanism on the gate-on voltage potential can be met when the display system is quickly restarted, and display errors during the quick restart are avoided, and the stability of the display system is improved.

[0068] Figure 6 A schematic flow chart of the voltage regulation method of the embodiment of the present application is shown. The voltage regulation method provided by the present application can be applied to the voltage regulation circuit, the driving device and the display system provided by the present application to regulate the voltage drop speed of the gate-on voltage when the display system is powered off. Referring to Figure 6 The voltage regulation method comprises:

[0069] In step S11, the output voltage of the previous stage circuit is obtained.

[0070] For the regulation of the gate-on voltage, the previous stage circuit is, for example, a power management circuit or a corresponding boost circuit.

[0071] In step S12, the control signal is obtained according to the output voltage.

[0072] The power-down stage of the gate-on voltage includes a first power-down stage and a second power-down stage. In the first power-down stage, the output voltage of the front-stage circuit is greater than the preset voltage, and in the second power-down stage, the output voltage of the front-stage circuit is less than or equal to the preset voltage.

[0073] Correspondingly, the control signal includes a first control signal and a second control signal with different potential states. In the first power-down stage, the control signal is the first control signal, and when the gate-on voltage is power down to the preset voltage (i.e., enters the second power-down stage), the control signal is quickly switched to the second control signal, and the switching duration is less than the preset duration.

[0074] In step S13, it is determined whether the output voltage represented by the control signal is greater than the preset voltage.

[0075] In this step, the potential state of the output voltage is obtained according to the control signal. If the control signal is the first control signal, it indicates that the output voltage is still in the first power-down stage, i.e., the output voltage is greater than the preset voltage, and the subsequent steps S14 and S15 are executed. If the control signal is the second control signal, it indicates that the output voltage is in the second power-down stage, i.e., the output voltage is less than or equal to the preset voltage, and the subsequent steps S16 and S17 are executed.

[0076] In step S14, a selection signal of a first level state is provided.

[0077] In the first power-down stage of the output voltage, the selection signal of the first level state is provided according to the first control signal.

[0078] In step S15, a supply voltage that changes with the change of the output voltage is provided according to the selection signal of the first level state.

[0079] In this step, the supply voltage of the rear-stage circuit that changes with the change of the output voltage of the front-stage circuit is selected according to the selection signal of the first level state. That is, as the output voltage of the front-stage circuit is power down, the supply voltage of the rear-stage circuit is also decreased. Then, the steps S13, S14 and S15 are executed in a loop until the output voltage is power down to the preset voltage and enters the second power-down stage.

[0080] It should be noted that when the output voltage of the front-stage circuit is power down to the preset voltage, the supply voltage of the rear-stage circuit should be greater than or equal to the minimum voltage that allows the rear-stage circuit to work normally. Corresponding to the gate-on voltage, it can be understood that at the first voltage, each pixel unit of the display panel is still opened. It should also be understood that due to the delay caused by each component in the circuit, in some embodiments, the first voltage is slightly greater than the preset voltage.

[0081] In step S16, a selection signal of a second level state is provided.

[0082] In the second power-down stage of the output voltage, the selection signal in the second level state is provided according to the second control signal.

[0083] In step S17, the power supply terminal of the subsequent circuit is grounded according to the selection signal in the second level state.

[0084] In this step, the power supply terminal of the subsequent circuit is grounded according to the selection signal in the second level state. Thus, the speed of dropping the power supply voltage of the subsequent circuit from the first voltage to the ground voltage should be greater than the speed of dropping the output voltage of the previous circuit from the preset voltage to the ground voltage. That is, the time length required for dropping the power supply voltage of the subsequent circuit from the first voltage to the ground voltage should be less than the time length required for dropping the output voltage of the previous circuit from the preset voltage to the ground voltage.

[0085] According to the voltage regulation method provided by the present application, the dropping speed of the gate-on voltage can be regulated when the display system is powered down, so that the gate-on voltage is rapidly pulled down to the ground voltage when it is powered down to the preset voltage. Thus, the requirement of the under-voltage lockout mechanism on the gate-on voltage potential can be met when the display system is rapidly restarted, and the display error during rapid restart is avoided, and the stability of the display system is improved.

[0086] In addition, it should be understood that the voltage regulation circuit and the voltage regulation method provided by the present application can be applied to any application scenario with similar speed regulation requirements to provide the output voltage of the output terminal of the voltage regulation circuit to the power supply terminal of the subsequent circuit, and should not be limited to the above-mentioned driving circuit and display system.

[0087] In accordance with the embodiments of the present application as described above, these embodiments do not describe all the details, nor limit the present application to only the specific embodiments. Obviously, many modifications and variations can be made according to the above description. The present application selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can well utilize the present application and make modifications and uses on the basis of the present application.

Claims

1. A voltage regulating circuit, wherein, An output terminal of the voltage regulation circuit provides an output voltage to a power supply terminal of a subsequent circuit, and the voltage regulation circuit comprises: an input module configured to generate a control signal according to an input voltage of the voltage regulation circuit; a selection module coupled to the input module, configured to provide a selection signal in a first level state when the control signal represents that the input voltage is greater than a preset voltage, and to provide the selection signal in a second level state when the control signal represents that the input voltage is less than or equal to the preset voltage; an output module coupled to the selection module, configured to provide the output voltage according to the input voltage when the selection signal is in the first level state; and a pull-down module coupled to the selection module, configured to ground the output terminal of the voltage regulation circuit when the selection signal is in the second level state, so as to reset the output voltage, wherein the power-off stage of the input voltage comprises a first power-off stage and a second power-off stage, in the first power-off stage, the input voltage is greater than the preset voltage, the pull-down module is closed, and the output module pulls down the output voltage to a first voltage in response to the power-off of the input voltage, the first voltage being greater than or equal to a minimum power supply voltage allowing the subsequent circuit to work normally; in the second power-off stage, the input voltage is less than or equal to the preset voltage, the output module is closed, and the pull-down module pulls down the output voltage from the first voltage to a ground voltage, a time length for the input voltage to power off from the preset voltage to the ground voltage is greater than a time length for the output voltage to power off from the first voltage to the ground voltage.

2. The voltage regulation circuit of claim 1, wherein, The input module comprises: a first resistor, a first end of the first resistor being coupled to the input voltage, and a second end of the first resistor providing the control signal; a second resistor, a first end of the second resistor being coupled to the second end of the first resistor, and a second end of the second resistor being grounded; and a first capacitor coupled between the first resistor.

3. The voltage regulation circuit of claim 1, wherein, The selection module comprises: a third resistor, a first end of the third resistor being coupled to the input voltage, and a second end of the third resistor providing the selection signal; a first transistor, a control end of the first transistor being coupled to the control signal, and a first path end of the first transistor being coupled to the second end of the third resistor; a fourth resistor, a first end of the fourth resistor being coupled to a second path end of the first transistor, and a second end of the fourth resistor being grounded; and a second capacitor coupled between the first path end of the first transistor and the ground.

4. The voltage regulation circuit of claim 1, wherein, The output module comprises: a third capacitor, a first end of the third capacitor being coupled to the input voltage, and a second end of the third capacitor being grounded; and a charging path, an input end of the charging path being coupled to the input voltage, and an output end of the charging path being coupled to the output terminal of the voltage regulation circuit, in the first power-off stage, the charging path pulls down the output voltage to the first voltage in response to the power-off of the input voltage, and in the second power-off stage, the charging path is closed; the charging path comprises: a second transistor, a first pass end of the second transistor being coupled with the input voltage, a second pass end of the second transistor being coupled with an output end of the voltage regulation circuit; and a fifth resistor, a first end of the fifth resistor being coupled with a control end of the second transistor, a second end of the fifth resistor being coupled with the selection signal.

5. The voltage regulation circuit of claim 1, wherein, The pull-down module comprises: an operational amplifier, a non-inverting input end of the operational amplifier being coupled with the selection signal, an inverting input end of the operational amplifier being coupled with an output end of the operational amplifier; a third transistor, a control end of the third transistor being coupled with the output end of the operational amplifier, a first pass end of the third transistor being coupled with the output end of the voltage regulation circuit; and a sixth resistor, a first end of the sixth resistor being coupled with a second pass end of the third transistor, a second end of the sixth resistor being grounded.

6. A voltage regulation method, wherein, The voltage regulation method is used for controlling the voltage regulation circuit as claimed in any one of claims 1-5 to regulate an output voltage of the voltage regulation circuit, the output voltage being provided to a power supply end of a subsequent circuit, the voltage regulation method comprising: acquiring an input voltage of the voltage regulation circuit; and providing a corresponding output voltage according to a potential of the input voltage, wherein, a power-down phase of the input voltage comprises a first power-down phase and a second power-down phase, in the first power-down phase, the input voltage is greater than a preset voltage, the output voltage is pulled down to a first voltage in response to a power-down of the input voltage, the first voltage being greater than / equal to a minimum voltage allowing the subsequent circuit to work normally; in the second power-down phase, the input voltage is less than / equal to the preset voltage, the power supply end is grounded to make the output voltage be pulled down from the first voltage to a ground voltage; a time length for the input voltage to be powered down from the preset voltage to the ground voltage is greater than a time length for the output voltage to be powered down from the first voltage to the ground voltage.

7. The voltage regulation method of claim 6, wherein, The method of providing a corresponding output voltage according to a potential of the input voltage comprises: acquiring a corresponding control signal according to the input voltage; providing a selection signal in a corresponding level state according to the potential of the input voltage represented by the control signal, providing a selection signal in a first level state when the control signal represents that the input voltage is greater than a preset voltage, and providing a selection signal in a second level state when the control signal represents that the input voltage is less than a preset voltage; and providing a corresponding output voltage according to a level state of the selection signal, the output voltage following the input voltage when the selection signal is in the first level state, and the power supply end being grounded when the selection signal is in the second level state.

8. A display system, wherein, The display system comprises: a display panel; and a driving device for driving the display panel, the driving device comprising: a boost circuit providing a gate-on voltage as a working voltage; a level conversion circuit providing a gate control signal according to the gate-on voltage and a gate timing signal; a gate driving circuit providing a corresponding scanning voltage to a pixel unit of the display panel according to the gate control signal; and The voltage regulating circuit according to any one of claims 1-5, coupled between the boost circuit and the level conversion circuit, for regulating a power-down speed of the gate-on voltage when the display panel is powered down.

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