A control method for optimizing dynamic load shedding of DCDC phase-shifted full-bridge

By limiting the maximum no-load phase shift angle and performing gain compensation, the problem of voltage drop of the DCDC phase-shifted full bridge under wide input and output conditions is solved, and the voltage stability is improved.

CN118487495BActive Publication Date: 2025-01-21GUANGDONG GOSPOWER ELECTRIC TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202410549463.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-05-06
Publication Date
2025-01-21
Estimated Expiration
2044-05-06

AI Technical Summary

Technical Problem

In the communication power supply industry, DCDC phase-shifting full bridge is under the conditions of a wide input range and a wide output range. It is difficult for the voltage to fall during empty full load switching, resulting in poor voltage stability.

Method used

By limiting the maximum phase shift angle of no-load, a linear control method is used to appropriately calculate the maximum phase shift angle, perform gain compensation, and optimize the no-load and full-load switching of wide input and output.

Benefits of technology

It effectively optimizes empty-to-full load switching under wide input and output conditions, improves voltage stability, and reduces voltage drops.

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Abstract

The present invention belongs to the field of control technology, and discloses a control method for optimizing dynamic load shedding of a DCDC phase-shift full bridge. The DCDC phase-shift full bridge adopts different input voltages and determines the corresponding maximum phase-shift angle limit value. The relationship between the input voltage and the maximum phase-shift angle limit value f(x) is obtained by the above input voltage and the maximum phase-shift angle limit value; the input voltage and output voltage of the DCDC phase-shift full bridge are sampled, and the maximum phase-shift angle limit value y is obtained by the input voltage and f(x). The output voltage and the output reference voltage are loop-calculated to obtain the phase-shift angle y1; the size of y and y1 is compared, and the smaller value of the two is taken as the maximum phase-shift angle value Y, and the DCDC phase-shift full bridge is PWM-controlled according to the Y value. The beneficial effects of the present invention are as follows: by limiting the maximum phase-shift angle of no-load, gain compensation is performed on the no-load and full-load switching, thereby optimizing the no-load and full-load switching of wide input and output, and improving voltage stability.
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Description

Technical Field

[0001] This invention relates to the field of control technology, and in particular to a control method for optimizing dynamic load shedding of a DC-DC phase-shifting full-bridge bridge. Background Technology

[0002] With the rapid development of society, electronic technology has been widely applied in various fields. In medium and high power DC-DC switching power supplies, the phase-shifted full-bridge topology is widely used. The main circuit structure of the topology is simple, and it is easy to achieve high frequency. The leakage inductance of the transformer can be incorporated into the resonant circuit to realize soft switching of power devices.

[0003] Traditional phase-shifted full-bridge control primarily employs phase-shift control, where all four switches are driven with a 50% duty cycle. The drive voltages of the same bridge arm are complementary, with a 180-degree phase difference. The leading and lagging arms differ by a phase angle, and the output voltage is adjusted by regulating this phase angle—this is the so-called phase-shift control. During no-load / full-load switching, the loop control gradually reduces the phase shift angle from its maximum to obtain the gain required for full load. However, due to the wide input / output range, the gain required for full load varies under different conditions, making it difficult to optimize the no-load / full-load switching results through the loop. This leads to different voltage drops under different conditions, and most of these drops are quite significant.

[0004] Therefore, it is necessary to provide an optimized control method for dynamic load switching of a DC-DC phase-shifting full-bridge circuit to solve the problem that voltage drop during no-load / full-load switching is difficult to meet requirements under wide input and output range conditions in the communication power supply industry. Summary of the Invention

[0005] This invention discloses an optimized control method for dynamic load switching of a DC-DC phase-shifting full-bridge power supply, which relates to the field of power equipment and can effectively solve the technical problems mentioned in the background art.

[0006] To achieve the above objectives, the technical solution of the present invention is as follows:

[0007] A method for optimizing dynamic load shedding in a DC-DC phase-shifting full-bridge bridge includes the following steps:

[0008] S1 and DCDC phase-shifted full bridges use different input voltages and determine the corresponding maximum phase shift angle limit. The relationship between the input voltage and the maximum phase shift angle limit is f(x) obtained by using the above input voltage and maximum phase shift angle limit.

[0009] S2. Sample the input and output voltages of the DC-DC phase-shifted full bridge, calculate the maximum phase shift angle limit y using the input voltage and f(x), and obtain the phase shift angle y1 by loop calculation using the output voltage and output reference voltage.

[0010] S3. Compare the magnitudes of y and y1, and take the smaller value as the maximum phase shift angle value Y. Perform PWM control on the DC-DC phase-shifting full bridge based on the Y value.

[0011] When using phase-shift control, the loop control gradually reduces the phase shift angle from the maximum to obtain the gain required for full load. However, due to the wide input / output range, the gain required for full load varies under different conditions, resulting in different voltage drops, most of which are quite significant. This invention compensates for the gain during no-load / full-load switching by limiting the maximum phase shift angle under no-load conditions. Simultaneously, for different input / output conditions, a linear control method is used to appropriately calculate the maximum phase shift angle, thereby optimizing the no-load / full-load switching across a wide input / output range and improving voltage stability.

[0012] As a preferred improvement of the present invention: step S1 specifically involves determining the corresponding maximum phase shift angle limit value at the highest input voltage and the lowest input voltage, where the input voltage is x and the maximum phase shift angle limit value is y, and f(x) is obtained by drawing a line between the two points.

[0013] As a preferred improvement of the present invention: the highest input voltage is 500V, the lowest input voltage is 300V, and f(x) is y = 0.001x + 0.4.

[0014] As a preferred improvement of the present invention: in step S2, the input voltage and output voltage are sampled in real time.

[0015] As a preferred improvement of the present invention: in step S2, the loop operation specifically involves taking the difference between the output reference voltage and the output voltage, transmitting the error signal to the output loop compensator for calculation to obtain the phase shift angle y1.

[0016] As a preferred improvement of the present invention, the output loop compensator is a PI compensator.

[0017] As a preferred improvement of the present invention: the DC-DC phase-shifting full bridge includes a port DC+ and a port DC-. The port DC+ is connected to the drain of switch Q1, the negative terminal of diode D7, the drain of switch Q3, and the negative terminal of diode D9. The source of switch Q1 is connected to the positive terminal of diode D7, one end of inductor L1, the negative terminal of diode D8, and the drain of switch Q2. The other end of inductor L1 is connected to one end of capacitor C1. The other end of capacitor C1 is connected to pin 1 of transformer T1. The source of switch Q3 is connected to the positive terminal of diode D9, pin 2 of transformer T1, the negative terminal of diode D10, and the drain of switch Q4. The port DC- is connected to the source of switch Q2, the positive terminal of diode D8, the source of switch Q4, the positive terminal of diode D10, and port GND1.

[0018] Pin 4 of transformer T1 is connected to the positive terminal of diode D5 and the negative terminal of diode D6. The negative terminal of diode D5 is connected to the negative terminal of diode D3 and one end of inductor L2. The other end of inductor L2 is connected to one end of capacitor C2 and one end of resistor R1. Pin 3 of transformer T1 is connected to the positive terminal of diode D3 and the negative terminal of diode D4. The positive terminal of diode D6 is connected to port GND2, the positive terminal of diode D4, the other end of capacitor C2, and one end of resistor R2. The other end of resistor R2 is connected to the other end of resistor R1.

[0019] As a preferred improvement of the present invention, the resistance of resistor R2 is 0.01 ohms.

[0020] The beneficial effects of this invention are as follows:

[0021] For different input and output conditions, a linear control method is used to calculate the maximum phase shift angle appropriately. By limiting the maximum phase shift angle under no-load conditions, gain compensation is performed for no-load and full-load switching, thereby optimizing no-load and full-load switching under wide input and output conditions. This solves the problem that voltage drop is difficult to meet requirements during no-load and full-load switching under wide input and output range conditions in the communication power supply industry, and improves voltage stability. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:

[0023] Figure 1 This is a schematic diagram of the working framework of the phase-shifting full-bridge;

[0024] Figure 2 This is a schematic diagram of the phase shift angle;

[0025] Figure 3 This is the control logic diagram of the DC-DC phase-shifting full-bridge circuit of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0027] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indication will also change accordingly.

[0028] Furthermore, in this invention, descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0029] In this invention, unless otherwise explicitly specified and limited, the terms "connection," "fixed," etc., should be interpreted broadly. For example, "fixed" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0030] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are feasible for those skilled in the art. If the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0031] Please see Figure 1As shown, the DC-DC phase-shifting full bridge includes a DC+ port and a DC- port. The DC+ port is connected to the drain of switching transistor Q1, the negative terminal of diode D7, the drain of switching transistor Q3, and the negative terminal of diode D9. The source of switching transistor Q1 is connected to the positive terminal of diode D7, one end of inductor L1, the negative terminal of diode D8, and the drain of switching transistor Q2. The other end of inductor L1 is connected to one end of capacitor C1, and the other end of capacitor C1 is connected to pin 1 of transformer T1. The source of switching transistor Q3 is connected to the positive terminal of diode D9, pin 2 of transformer T1, the negative terminal of diode D10, and the drain of switching transistor Q4. The DC- port is connected to the source of switching transistor Q2. The transformer T1 is connected to the following terminals: the positive terminal of diode D8, the source terminal of switching transistor Q4, the positive terminal of diode D10, and port GND1; pin 4 of transformer T1 is connected to the positive terminal of diode D5 and the negative terminal of diode D6; the negative terminal of diode D5 is connected to the negative terminal of diode D3 and one end of inductor L2; the other end of inductor L2 is connected to one end of capacitor C2 and one end of resistor R1; pin 3 of transformer T1 is connected to the positive terminal of diode D3 and the negative terminal of diode D4; the positive terminal of diode D6 is connected to port GND2, the positive terminal of diode D4, the other end of capacitor C2, and one end of resistor R2; the other end of resistor R2 is connected to the other end of resistor R1. The resistance of resistor R2 is very small and can be selected as 0.01 ohms.

[0032] Phase-shifted full-bridge control primarily employs phase-shift control. All four switching transistors are driven with a 50% duty cycle. The drive voltages for the same bridge arm (Q1 and Q2, Q3 and Q4) are complementary, with a phase difference of 180 degrees. The leading and lagging arms differ by a phase angle, and the output voltage is adjusted by regulating this phase angle. A phase-shifted full-bridge refers to a power supply topology; DC-DC refers to DC input and DC output; and the leading arm is... Figure 1 The lag arm of the Q1 / Q2 switching transistors is... Figure 1 In the Q3 / Q4 switching transistors, the phase shift angle is the angle between the leading arm and the lagging arm. The load shedding refers to when the output load changes significantly, the heavy load refers to a large output load, and the light load refers to a small output load.

[0033] Please see Figure 2As shown, the phase-shifted full-bridge control method mainly adopts phase-shift control. Q1-Q4 are four switching transistors, and D7-D10 are parasitic diodes of the switching transistors. All four switching transistors are driven with a 50% duty cycle. The two switching transistors in the same bridge arm conduct complementaryly at 180°. Q1 and Q2 lead Q4 and Q3 respectively. Generally, Q1 and Q2 are called the leading arms, and Q3 and Q4 are called the lagging arms. The difference between the target voltage and the output voltage is used as the input of the loop. This difference is calculated by a PI or other high-order negative feedback system to obtain the phase shift angle of the leading and lagging arms. The phase shift angle is theoretically from 0 to 50% of the pulse width (50% pulse width is...). Figure 2 The maximum gain occurs when the phase shift angle is MAX (equivalent to 180°), and the gain is maximized when the phase shift is 0 and the leading and lagging arms are completely overlapped. The gain is minimized when the phase shift angle is maximized.

[0034] When the power supply switches from a light load to a heavy load, the phase shift angle gradually decreases from its maximum (calculated based on the output voltage) until it reaches a suitable angle that provides sufficient gain. However, the gain of a phase-shifted full-bridge is not linearly related to the phase shift angle. In fact, when the phase shift angle exceeds a certain value, the gain becomes very small, almost the same as at 50% of the maximum phase shift angle. This results in a situation where, for a considerable period, although the phase shift angle is decreasing, the resonant current remains almost unchanged, the gain fails to increase, and the output continuously drops, leading to poor dynamic performance. Therefore, limiting the maximum phase shift angle to restrict the minimum gain can improve the output response. Limiting the maximum phase shift angle from 50% to 40% or a suitable value can significantly improve dynamic switching.

[0035] Please see Figure 3 As shown, this invention provides a control method for optimizing dynamic load switching of a DC-DC phase-shifted full-bridge, comprising the following steps: S1, the DC-DC phase-shifted full-bridge uses different input voltages and determines the corresponding maximum phase-shift angle limit value, and calculates the relationship f(x) between the input voltage and the maximum phase-shift angle limit value; S2, the input voltage and output voltage of the DC-DC phase-shifted full-bridge are sampled, and the maximum phase-shift angle limit value y is calculated using the input voltage and f(x). The output voltage and output reference voltage are processed through a loop to obtain the phase-shift angle y1; S3, the magnitudes of y and y1 are compared, and the smaller value is taken as the maximum phase-shift angle value Y. The DC-DC phase-shifted full-bridge is then subjected to PWM control based on the Y value and the phase-shift control principle.

[0036] Specifically, this method includes a maximum phase shift angle limiting mechanism, which adaptively adjusts the limit value based on the input voltage. The maximum phase shift angle limiting mechanism is composed of both input voltage detection and output voltage detection. The phase-shifted full-bridge loop control adjusts the system's maximum phase shift angle accordingly based on the real-time sampled input and output voltage results. The phase-shifted full-bridge loop control typically works by subtracting the output reference voltage from the real-time sampled output voltage, sending the error signal to the output loop compensator for calculation to obtain the real-time phase shift angle, and simultaneously calculating the maximum phase shift angle limit by detecting the input voltage. The smaller phase shift angle of the two results is chosen to limit the minimum gain, thereby optimizing no-load / full-load switching. The output loop compensator here can be a PI (proportional-integral) compensator or other high-order negative feedback compensator systems.

[0037] A DC-DC phase-shifted full-bridge topology typically has a wide input-output range, and the required phase shift angle varies depending on the input. Therefore, the limitation on the maximum phase shift angle needs to be linearly processed. First, at the highest and lowest input levels (or several arbitrary points with linear optimization), the most suitable maximum phase shift angle limit is determined (through experimental simulation). A line is drawn between these two points, and the corresponding point on this line is obtained by detecting the input voltage. This ensures a suitable maximum phase shift angle limit across the entire input range.

[0038] Example 1

[0039] The values ​​in Table 1 were obtained after testing.

[0040] Table 1. Input Voltage and Maximum Phase Shift Angle Limits

[0041]

[0042] Step S1 specifically involves determining the corresponding maximum phase shift angle limit for the highest and lowest input voltages, where the input voltage is x and the maximum phase shift angle limit is y. A line is drawn between the two points to calculate f(x). Referring to Table 1, the highest input voltage is 500V and the lowest input voltage is 300V. The calculated f(x) is y = 0.001x + 0.4, where the maximum phase shift angle limit is 50% of the pulse width (i.e.,...). Figure 2 The maximum phase shift angle (MAX) is equivalent to 180°. A 300V input voltage corresponds to a 126° phase shift angle. In step S2, the input and output voltages are sampled in real time, and the maximum phase shift angle limit is continuously adjusted. Specifically, in step S2, the loop calculation involves subtracting the output reference voltage from the output voltage, transmitting the error signal to the output loop compensator for calculation to determine the phase shift angle y1. The output loop compensator is a PI compensator.

[0043] Taking an output voltage of 50V as an example, when the phase-shift control method was used before, the voltage drop was 10%, meaning the output voltage would drop to 45V. After calculating the maximum phase-shift angle limit using the present invention, the voltage drop was reduced to 5%, meaning the output voltage dropped to 47.5V. The voltage is more stable than the original method.

[0044] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. Other modifications can be easily made by those skilled in the art. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge, characterized in that: The following steps are involved: S1, DCDC phase-shifted full bridge adopts different input voltages and determines the corresponding maximum phase shift angle limit value. The relationship between the input voltage and the maximum phase shift angle limit value f(x) is obtained by the above input voltage and the maximum phase shift angle limit value; At the highest input voltage and the lowest input voltage, the corresponding maximum phase shift angle limit value is respectively confirmed, the input voltage is x, the maximum phase shift angle limit value is y, and f(x) is obtained by the two-dot dash line. The highest input voltage is 500V, the lowest input voltage is 300V, and f(x) is y=0.001x+0.4; S2, sampling the input voltage and output voltage of the DCDC phase-shift full bridge, calculating the maximum phase-shift angle limit value y through the input voltage and f(x), and obtaining the phase-shift angle y1 after loop calculation of the output voltage and the output reference voltage; S3. Compare the values ​​of y and y1, take the smaller value of the two as the maximum phase shift angle value Y, and perform PWM control on the DCDC phase-shift full bridge according to the Y value.

2. The control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge according to claim 1, characterized in that: In step S2, the input voltage and the output voltage are sampled in real time.

3. The control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge according to claim 1 is characterized in that: In step S2, the loop operation is specifically to make a difference between the output reference voltage and the output voltage, and transmit the error signal to the output loop compensator for operation to obtain the phase shift angle y1.

4. The control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge according to claim 3 is characterized in that: The output loop compensator is a PI compensator.

5. The control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge according to claim 1 is characterized in that: The DCDC phase-shifted full bridge includes a port DC+ and a port DC-, wherein the port DC+ is connected to the drain of the switch tube Q1, the negative end of the diode D7, the drain of the switch tube Q3 and the negative end of the diode D9, the source of the switch tube Q1 is connected to the positive end of the diode D7, one end of the inductor L1, the negative end of the diode D8 and the drain of the switch tube Q2, the other end of the inductor L1 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the pin 1 of the transformer T1, the source of the switch tube Q3 is connected to the positive end of the diode D9, the pin 2 of the transformer T1, the negative end of the diode D10 and the drain of the switch tube Q4, and the port DC- is connected to the source of the switch tube Q2, the positive end of the diode D8, the source of the switch tube Q4, the positive end of the diode D10 and the port GND1; Pin 4 of the transformer T1 is connected to the positive end of the diode D5 and the negative end of the diode D6, the negative end of the diode D5 is connected to the negative end of the diode D3 and one end of the inductor L2, the other end of the inductor L2 is connected to one end of the capacitor C2 and one end of the resistor R1, pin 3 of the transformer T1 is connected to the positive end of the diode D3 and the negative end of the diode D4, the positive end of the diode D6 is connected to port GND2, the positive end of the diode D4, the other end of the capacitor C2 and one end of the resistor R2, and the other end of the resistor R2 is connected to the other end of the resistor R1.

6. A control method for optimizing dynamic load shedding of a DCDC phase-shifted full-bridge according to claim 5, characterized in that: The resistance of the resistor R2 is 0.01 ohm.

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