Image sensor and method for manufacturing the same

Abstract

The present application relates to an image sensor and a method for preparing the same. The image sensor comprises: an initial semiconductor structure, a barrier layer is disposed on one side of the initial semiconductor structure; a functional stack located on the barrier layer; a plurality of deep trench isolation structures disposed in the functional stack, wherein at least one deep trench isolation structure penetrates the functional stack and the barrier layer, and the remaining deep trench isolation structures penetrate part of the functional stack, and at least two deep trench isolation structures have different depths; a plurality of pixel units, each pixel unit is located in the functional stack between adjacent deep trench isolation structures; wherein at least two pixel units have different depths and the depth of each pixel unit is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit. The image sensor of the present application can effectively meet the needs of different regions within the image sensor for crosstalk suppression, and can adapt to work scenarios with different functional requirements such as sensitivity and response speed.

Description

Technical Field

[0001] The present application relates to the field of semiconductor process technology, and in particular to an image sensor and a method for preparing the same. Background Art

[0002] With the development of semiconductor technology, higher requirements are placed on the photosensitivity of image sensors (CMOS image sensors, CIS).

[0003] However, in the traditional backside illumination (BSI) process, the functional areas are formed by high-energy ion implantation in the front-end process, which will cause damage to the wafer, resulting in crosstalk between adjacent functional areas and between functional areas and other structures when light is irradiated. Summary of the invention

[0004] Based on this, it is necessary to provide an image sensor and a preparation method thereof that can suppress crosstalk and improve photosensitivity.

[0005] In order to achieve the above objectives, on the one hand, the present application provides an image sensor, comprising:

[0006] An initial semiconductor structure, wherein a barrier layer is disposed on one side surface of the initial semiconductor structure;

[0007] A functional stack located on the barrier layer;

[0008] A plurality of deep trench isolation structures are arranged in the functional stack, wherein at least one of the deep trench isolation structures penetrates the functional stack and the barrier layer, and the remaining deep trench isolation structures penetrate part of the functional stack, and at least two of the deep trench isolation structures have different depths;

[0009] A plurality of pixel units, each of which is located in a functional stack between adjacent deep trench isolation structures; wherein at least two of the pixel units have different depths and the depth of each of the pixel units is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit.

[0010] The above-mentioned image sensor includes an initial semiconductor structure, a functional stack, a plurality of deep trench isolation structures and a plurality of pixel units. A barrier layer is arranged on one side surface of the initial semiconductor structure. The functional stack is arranged on the barrier layer. A plurality of deep trench isolation structures are arranged in the functional stack, at least one deep trench isolation structure penetrates the functional stack and the barrier layer, and the other remaining deep trench isolation structures penetrate part of the functional stack, and the depths of at least two deep trench isolation structures are different, that is, there are deep trench isolation structures with different depth-to-width ratios in the image sensor, which can more effectively meet the needs of different regions of the image sensor for crosstalk suppression. Each pixel unit is located in the functional stack between adjacent deep trench isolation structures. The depths of at least two pixel units are different and the depth of each pixel unit is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit. In this way, good matching between the pixel unit and the deep trench isolation structure can be ensured. In addition, pixel units with different depths can adapt to different functional requirements. For example, pixel units with larger depths can be applied to areas with high sensitivity requirements, while pixel units with smaller depths can be applied to areas requiring faster response speeds.

[0011] In one embodiment, the plurality of deep trench isolation structures include a first deep trench isolation structure, a second deep trench isolation structure and a third deep trench isolation structure, and the first deep trench isolation structure, the second deep trench isolation structure and the third deep trench isolation structure have different depths.

[0012] In one embodiment, the functional stack includes a first functional layer, a second functional layer and a third functional layer stacked in sequence, wherein the first functional layer is in contact with the barrier layer;

[0013] The first deep trench isolation structure penetrates the first functional layer, the second functional layer and the third functional layer, the second deep trench isolation structure penetrates the second functional layer and the third functional layer, and the third deep trench isolation structure penetrates the third functional layer.

[0014] In one of the embodiments, in a first direction, the width of the first deep trench isolation structure has a trend of first decreasing and then increasing, and the widths of the second deep trench isolation structure and the third deep trench isolation structure have a trend of increasing respectively.

[0015] In one embodiment, the plurality of pixel units include a first pixel unit, a second pixel unit and a third pixel unit, wherein:

[0016] The first pixel unit is located between two adjacent first deep trench isolation structures;

[0017] The second pixel unit is located between two adjacent second deep trench isolation structures, or between the adjacent first deep trench isolation structure and the second deep trench isolation structure;

[0018] The third pixel unit is located between two adjacent third deep trench isolation structures, or between the adjacent second deep trench isolation structure and the third deep trench isolation structure.

[0019] In one embodiment, the materials of the first pixel unit, the second pixel unit and the third pixel unit respectively include at least one element of the fifth main group.

[0020] In one embodiment, the materials of the plurality of deep trench isolation structures respectively include metal aluminum.

[0021] In one embodiment, the image sensor further comprises:

[0022] A plurality of isolation grids, each of the isolation grids being located on a surface of a side of the deep trench isolation structure away from the initial semiconductor structure;

[0023] The filter is located between two adjacent isolation grids.

[0024] In a second aspect, the present application also provides a method for preparing an image sensor, comprising:

[0025] Providing an initial semiconductor structure; a barrier layer is disposed on one side of the initial semiconductor structure;

[0026] forming a functional stack and a plurality of deep trench isolation structures on the barrier layer, wherein at least one of the deep trench isolation structures penetrates the functional stack and the barrier layer, and the remaining deep trench isolation structures penetrate part of the functional stack, and at least two of the deep trench isolation structures have different depths;

[0027] Annealing is performed on the functional stack between two adjacent deep trench isolation structures to form a pixel unit; wherein at least two of the pixel units have different depths and the depth of each of the pixel units is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit.

[0028] In the preparation method of the above-mentioned image sensor, an initial semiconductor structure with a barrier layer on one surface is provided, and a functional stack and a plurality of deep trench isolation structures are formed on the barrier layer, wherein at least one deep trench isolation structure penetrates the functional stack and the barrier layer, and the other remaining deep trench isolation structures penetrate part of the functional stack, and the depths of at least two deep trench isolation structures are different, that is, deep trench isolation structures with different aspect ratios are formed in the image sensor, which can more effectively meet the requirements of different regions of the image sensor for crosstalk suppression; further, the functional stack between two adjacent deep trench isolation structures is annealed to form a pixel unit, wherein the depths of at least two pixel units are different and the depth of each pixel unit is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit, so that good matching between the pixel unit and the deep trench isolation structure can be ensured. In addition, pixel units with different depths can meet different functional requirements. For example, pixel units with larger depths can be suitable for areas with high sensitivity requirements, while pixel units with smaller depths can be suitable for areas requiring faster response speeds.

[0029] In one embodiment, forming a functional stack and a plurality of deep trench isolation structures on the barrier layer includes:

[0030] forming a first functional layer and at least one first isolation structure on the barrier layer;

[0031] forming a second functional layer and a plurality of second isolation structures on the first functional layer;

[0032] forming a third functional layer and a plurality of third isolation structures on the second functional layer;

[0033] Among them, the number of the second isolation structures is greater than the number of the first isolation structures, and less than the number of the third isolation structures; the corresponding first isolation structure, the second isolation structure and the third isolation structure constitute a first deep trench isolation structure, the corresponding second isolation structure and the third isolation structure constitute a second deep trench isolation structure, and the separately arranged third isolation structure constitutes a third deep trench isolation structure.

[0034] In one embodiment, the annealing process is performed on the functional stack between two adjacent deep trench isolation structures to form a pixel unit, comprising:

[0035] Performing a first annealing process on the functional stack between two adjacent third deep trench isolation structures and the functional stack between the adjacent second deep trench isolation structure and the third deep trench isolation structure to form a third pixel unit;

[0036] Performing a second annealing process on the functional stack between two adjacent second deep trench isolation structures and the functional stack between the adjacent first deep trench isolation structure and the second deep trench isolation structure to form a second pixel unit;

[0037] A third annealing process is performed on the functional stack between two adjacent first deep trench isolation structures to form a third pixel unit.

[0038] In one embodiment, forming a first functional layer and a plurality of first isolation structures on the barrier layer includes:

[0039] Depositing a first functional material on the initial semiconductor device to form a first functional layer;

[0040] forming at least one first groove in the first functional layer and the barrier layer;

[0041] An isolation material is deposited in the first groove to form the first isolation structure.

[0042] In one embodiment, forming a second functional layer and a plurality of second isolation structures on the first functional layer includes:

[0043] Depositing a second functional material on the first functional layer to form a second functional layer;

[0044] forming a plurality of second grooves in the second functional layer;

[0045] An isolation material is deposited in the second groove to form the second isolation structure.

[0046] In one embodiment, forming a third functional layer and a plurality of third isolation structures on the second functional layer includes:

[0047] Depositing a third functional material on the second functional layer to form the third functional layer;

[0048] forming a plurality of third grooves in the third functional layer;

[0049] An isolation material is deposited in the third groove to form the third isolation structure.

[0050] The unexpected effects of the present application are: first, deep trench isolation structures with different aspect ratios are formed in the image sensor, which can more effectively meet the needs of different areas of the image sensor for crosstalk suppression; second, the depth of each pixel unit is set to be less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit, which can ensure good matching between the pixel unit and the deep trench isolation structure; third, setting pixel units of different depths can adapt to different functional requirements. For example, pixel units with larger depths can be suitable for areas with high sensitivity requirements, while pixel units with smaller depths can be suitable for areas that require faster response speeds. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0052] Figure 1 is a flow chart of a method for preparing an image sensor provided in an embodiment;

[0053] Figure 2 A schematic diagram of a cross-sectional structure of a structure obtained by providing an initial semiconductor structure in a step in an embodiment;

[0054] Figure 3 A schematic diagram of a cross-sectional structure of a structure obtained by forming a functional stack and a plurality of deep trench isolation structures on a barrier layer in a step in an embodiment;

[0055] Figure 4 A schematic diagram of a cross-sectional structure of a structure obtained by annealing a functional stack between two adjacent deep trench isolation structures in a step of an embodiment;

[0056] Figure 5 A flowchart of the steps of forming a functional stack and a plurality of deep trench isolation structures on a barrier layer in an embodiment;

[0057] Figure 6 It is a schematic cross-sectional view of a structure obtained by forming a first functional layer and at least one first isolation structure on a barrier layer in a step in an embodiment;

[0058] Figure 7 It is a schematic cross-sectional structural diagram of a structure obtained by forming a second functional layer and a plurality of second isolation structures on a first functional layer in a step in an embodiment;

[0059] Figure 8It is a schematic cross-sectional structural diagram of a structure obtained by forming a third functional layer and a plurality of third isolation structures on the second functional layer in a step in an embodiment;

[0060] Fig. 9 A schematic diagram of a cross-sectional structure of a structure obtained by annealing a functional stack between two adjacent deep trench isolation structures in a specific embodiment;

[0061] Fig.10 It is a schematic diagram of the cross-sectional structure of a structure obtained by etching the first dielectric layer, the second dielectric layer and the third dielectric layer to form a plurality of isolation grids in one embodiment;

[0062] Fig.11 It is a schematic diagram of the cross-sectional structure of a structure obtained by depositing filter material on two adjacent isolation grids to form a filter in a step of an embodiment;

[0063] Fig.12 A schematic diagram of a cross-sectional structure of an image sensor provided by an embodiment;

[0064] Fig.13 A schematic diagram of the cross-sectional structure of an image sensor provided by another embodiment.

[0065] Description of reference numerals:

[0066] 100-initial semiconductor structure, 110-barrier layer, 120-substrate, 200-functional stack, 210-first functional layer, 220-second functional layer, 230-third functional layer, 300-deep trench isolation structure, 310-first deep trench isolation structure, 320-second deep trench isolation structure, 330-third deep trench isolation structure, 301-first isolation structure, 302-second isolation structure, 303-third isolation structure, 400-pixel unit, 410-first pixel unit, 420-second pixel unit, 430-third pixel unit, 500-isolation grid, 501-first dielectric layer, 502-second dielectric layer, 503-third dielectric layer, 600-filter. DETAILED DESCRIPTION

[0067] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0069] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ..." or "directly connected to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or part discussed below can be represented as a second element, component, region, layer or part.

[0070] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0071] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0072] As mentioned in the background technology, conventional image sensors have the problem of undesirable crosstalk. Based on this, the present application proposes a method for preparing an image sensor to reduce the crosstalk of the image sensor and improve the photosensitivity of the image sensor.

[0073] See also Figure 1 In one embodiment, the method for preparing an image sensor includes steps S10-S30.

[0074] S10, providing an initial semiconductor structure.

[0075] like Figure 2 As shown, a barrier layer 110 is disposed on one side of the initial semiconductor structure 100. It is understood that the initial semiconductor structure 100 may include a substrate 120 and a barrier layer 110. The material of the substrate 120 may be any commonly used known material. The material of the barrier layer 110 may be boron, etc. The barrier layer 110 is disposed on one side of the substrate 120. Optionally, the initial semiconductor structure 100 may also include a shallow trench isolation structure located in the substrate 120 and a metal layer located on the surface of the substrate on a side away from the barrier layer 110.

[0076] S20, forming a functional stack and a plurality of deep trench isolation structures on the barrier layer.

[0077] like Figure 3 As shown, a functional stack 200 and a plurality of deep trench isolation structures 300 may be formed on the barrier layer 110 by using deposition, photolithography, etching and other processes.

[0078] Among them, at least one deep trench isolation structure 300 penetrates the functional stack 200 and the barrier layer 110, and the remaining deep trench isolation structures 300 penetrate part of the functional stack 200, and the depths of at least two deep trench isolation structures 300 are different. It can be understood that multiple deep trench isolation structures 300 are arranged in the functional stack 200 and the barrier layer 110, and the depths of the multiple deep trench isolation structures 300 are not completely the same, wherein the bottom height of some deep trench isolation structures 300 is the same as the bottom height of the barrier layer 110, and the bottom height of some deep trench isolation structures 300 is higher than the bottom height of the functional stack 200. In this way, deep trench isolation structures 300 with different aspect ratios can be formed in the functional stack 200.

[0079] In addition, the cross-sectional shapes of the multiple deep trench isolation structures may be the same or different. For example, Figure 3 Only one shape of the cross-section of the multiple deep trench isolation structures is given. In fact, the cross-section shapes of the multiple deep trench isolation structures can also be trapezoidal, rectangular, etc.

[0080] It should be noted that, in the embodiments of the present application, the comparison of the heights of the various structures recorded is based on the positive direction of OY as the reference direction. For example, the bottom height of a portion of the deep trench isolation structure 300 described above is higher than the bottom height of the functional stack 200, which means that in the positive direction of OY, the bottom height of a portion of the deep trench isolation structure 300 is higher than the bottom height of the functional stack 200.

[0081] S30, performing annealing treatment on the functional stack between two adjacent deep trench isolation structures to form a pixel unit.

[0082] like Figure 4 As shown, a laser annealing process may be used to anneal the functional stack 200 between two adjacent deep trench isolation structures to activate the portion of the functional stack 200 to form a pixel unit 400 .

[0083] Wherein, the depths of at least two pixel units 400 are different and the depth of each pixel unit 400 is less than or equal to the minimum depth of the deep trench isolation structure 300 in contact with the pixel unit 400. It can be understood that the depths of the plurality of pixel units 400 are not exactly the same. Furthermore, if the depths of the two deep trench isolation structures 300 in contact with the pixel unit 400 are the same, the depth of the pixel unit 400 may be the same as the depth of the deep trench isolation structure 300, or may be slightly less than the depth of the deep trench isolation structure 300. If the depths of the two deep trench isolation structures 300 in contact with the pixel unit 400 are different, the depth of the pixel unit 300 may be the same as the depth of the deep trench isolation structure 300 with a smaller depth, or may be slightly less than the depth.

[0084] In the embodiment of the present application, an initial semiconductor structure 100 having a barrier layer 110 on one surface is provided, and a functional stack 200 and a plurality of deep trench isolation structures 300 are formed on the barrier layer 110, wherein at least one deep trench isolation structure 300 penetrates the functional stack 200 and the barrier layer 110, and the remaining deep trench isolation structures 300 penetrate part of the functional stack 200, and at least two deep trench isolation structures 300 have different depths, that is, deep trench isolation structures 300 with different aspect ratios are formed in the image sensor, which can more effectively meet the needs of different regions of the image sensor for crosstalk suppression; further, for two adjacent deep trench isolation structures 300, the depths of the deep trench isolation structures 300 are different, and the depths of the deep trench isolation structures 300 are different. The functional stack 200 between the trench isolation structures 300 is annealed to form pixel units 400, wherein at least two pixel units 400 have different depths and the depth of each pixel unit 400 is less than or equal to the minimum depth of the deep trench isolation structure 300 in contact with the pixel unit 400, thereby ensuring good matching between the pixel unit 400 and the deep trench isolation structure 300. In addition, setting pixel units 400 of different depths can adapt to different functional requirements. For example, pixel units with larger depths can be suitable for areas with high sensitivity requirements, while pixel units with smaller depths can be suitable for areas requiring faster response speeds.

[0085] In one embodiment, Figure 5 As shown, a functional stack and a plurality of deep trench isolation structures are formed on the barrier layer, including steps S201-S203.

[0086] S201, forming a first functional layer and at least one first isolation structure on the barrier layer.

[0087] like Figure 6 As shown, the first functional layer 210 and at least one first isolation structure 301 may be formed on the barrier layer 110 by using deposition, photolithography, etching and other processes. The first isolation structure 301 penetrates the first functional layer 210 and the barrier layer 110 .

[0088] Specifically, a first functional material is deposited on the initial semiconductor structure 100 to form a first functional layer 210, at least one first groove is formed in the first functional layer 210 and the barrier layer 110, and an isolation material is deposited in the first groove to form a first isolation structure 301. The first functional material may be a material including an element of the fifth main group, such as silicon phosphide. The isolation material may be metal aluminum.

[0089] It can be understood that a layer of first functional material can be first deposited on the barrier layer 110 to form the first functional layer 210, and then, at least one first groove can be formed in the first functional layer 210 and the barrier layer 110 using processes such as photolithography and etching, and an isolation material can be deposited in the first groove using a deposition process to form a first isolation structure 301. Finally, the formed semiconductor structure can be planarized so that the top height of the first isolation structure 301 is the same as the top height of the first functional layer 210.

[0090] S202, forming a second functional layer and a plurality of second isolation structures on the first functional layer.

[0091] like Figure 7 As shown, deposition, photolithography, etching and other processes can be used to form the second functional layer 220 and multiple second isolation structures 302 on the first functional layer 210. The second isolation structures 302 and the second functional layer 220 have the same depth, and some of the second isolation structures 302 and the first isolation structures 301 are arranged correspondingly.

[0092] Specifically, a second functional material is deposited on the first functional layer 210 to form the second functional layer 220, a plurality of second grooves are formed in the second functional layer 220, and an isolation material is deposited in the second grooves to form the second isolation structure 302. The second functional material may be a material including a fifth main group element, such as silicon arsenide.

[0093] It can be understood that the second functional material can be deposited on the first functional layer 210 by a deposition process to form the second functional layer 220, and then a plurality of second grooves can be formed in the second functional layer 220 by a photolithography and etching process. Some of the second grooves are arranged correspondingly to the first isolation structures 301, that is, each first isolation structure 301 is arranged correspondingly to a second groove, but not every second groove corresponds to a first isolation structure 301. Further, the isolation material is deposited in the second groove by a deposition process to form a plurality of second isolation structures 302, and finally the obtained structure can be planarized.

[0094] S203, forming a third functional layer and a plurality of third isolation structures on the second functional layer.

[0095] like Figure 8 As shown, deposition, photolithography, etching and other processes can be used to form the third functional layer 230 and the third isolation structure 303 on the second functional layer 220. The depth of the third isolation structure 303 is the same as that of the third functional layer 230, and part of the third isolation structure 303 and the second isolation structure 302 are arranged correspondingly.

[0096] Specifically, a third functional material is deposited on the second functional layer 220 to form the third functional layer 230, a plurality of third grooves are formed in the third functional layer 230, and an isolation material is deposited in the third grooves to form the third isolation structure 303. The third functional material may be a material including an element of the fifth main group, such as silicon antimonide.

[0097] It can be understood that a deposition process can be used to deposit a third functional material on the second functional layer 220 to form a third functional layer 230, and then the third functional layer 230 is etched to form a plurality of third grooves. It should be noted that some of the third grooves are arranged correspondingly to the second isolation structure 302, that is, each second isolation structure 302 corresponds to a third groove, but not every third groove is arranged correspondingly to a second isolation structure 302. Further, a deposition process is used to deposit an isolation material in the third groove to form a third isolation structure 303, and finally, the obtained structure can also be planarized.

[0098] In the semiconductor structure formed at this stage, the number of the second isolation structures 302 is greater than the number of the first isolation structures 301, and less than the number of the third isolation structures 303. The first isolation structures 301, the second isolation structures 302, and the third isolation structures 303 arranged correspondingly constitute a first deep trench isolation structure, the second isolation structures 302 and the third isolation structures 303 arranged correspondingly constitute a second deep trench isolation structure, and the third isolation structures 303 arranged separately constitute a third deep trench isolation structure.

[0099] As the size of semiconductor devices shrinks, it is easy to encounter the limits of lithography and etching when forming deep trench isolation structures with a high aspect ratio. In the present embodiment, by forming the second functional layer 220 and a plurality of second isolation structures 302 on the first functional layer 210, the second functional layer 220 and a plurality of second isolation structures 302 are formed on the first functional layer 210, and the third functional layer 230 and a plurality of third isolation structures 303 are formed on the second functional layer 220. By depositing a functional layer and then etching the functional layer to form a groove, the problem of easily encountering the limits of lithography and etching can be effectively alleviated.

[0100] In one embodiment, performing annealing on a functional stack between two adjacent deep trench isolation structures to form a pixel unit includes steps S301 - S303 .

[0101] S301 , performing a first annealing process on the functional stack 200 between two adjacent third deep trench isolation structures and the functional stack 200 between the adjacent second deep trench isolation structure and the third deep trench isolation structure to form a third pixel unit.

[0102] like Fig. 9As shown, a laser annealing process may be used to perform a first annealing treatment on the first functional layer 210 in the region a and the region b to activate the first functional layer 210 in the region a and the region b to form a third pixel unit.

[0103] S302 , performing a second annealing process on the functional stack between two adjacent second deep trench isolation structures and the functional stack between the adjacent first deep trench isolation structure and the second deep trench isolation structure to form a second pixel unit.

[0104] Please continue reading Fig. 9 The first functional layer 210 and the second functional layer 220 in the region c and the region d may be subjected to a second annealing process by using a laser annealing process to activate the first functional layer 210 and the second functional layer 220 in these regions to form a second pixel unit.

[0105] S303 , performing a third annealing process on the functional stack 200 between two adjacent first deep trench isolation structures 310 to form a first pixel unit 410 .

[0106] Please continue reading Fig. 9 The first functional layer 210, the second functional layer 220 and the third functional layer 230 in the region e may be subjected to a third annealing treatment by using a laser annealing process to activate the first functional layer 210, the second functional layer 220 and the third functional layer 230 in these regions to form a first pixel unit.

[0107] It should be noted that Fig. 9 This is just a schematic diagram. In fact, there may be many areas a, area b, area c, area d and area e in the image sensor, and these areas are not completely in accordance with Fig. 9 The specific arrangement method needs to be set according to the actual functional requirements. All the schematic diagrams of the structures of this application are essentially only schematic, and the embodiments of this application should not be limited to the order shown here. For example, multiple first pixel units, second pixel units and third pixel units do not necessarily follow the order shown. Fig. 9 The sequence shown may also be a cross arrangement of multiple first pixel units, second pixel units and third pixel units, etc. Therefore, the sequence shown in the figure cannot represent the actual arrangement of pixel units in the image sensor, and does not limit the scope of the present invention.

[0108] The depths of the first pixel unit, the second pixel unit, and the third pixel unit are different, so the process parameters of the first annealing treatment, the second annealing treatment, and the third annealing treatment are also different. The heating time and heating temperature of the first annealing treatment, the second annealing treatment, and the third annealing treatment can be the same, but the energy is different. For example, the energy of the first annealing treatment can be 20Kev, the energy of the second annealing treatment can be 40Kev, and the energy of the third annealing treatment can be 60Kev.

[0109] In this embodiment, by performing different annealing treatments on the functional stack 200 between two adjacent deep trench isolation structures to form a first pixel unit, a second pixel unit and a third pixel unit, good matching between the pixel unit and the deep trench isolation structure can be ensured. In addition, setting pixel units of different depths can adapt to different functional requirements.

[0110] In some embodiments, before annealing the functional stack 200 between two adjacent deep trench isolation structures, the method for preparing the image sensor of the present application also includes the steps of sequentially forming a first dielectric layer 501, a second dielectric layer 502 and a third dielectric layer 503 on the third functional layer 230, and etching the first dielectric layer 501, the second dielectric layer 502 and the third dielectric layer 503 to form a plurality of isolation grids 500.

[0111] like Fig.10 As shown, a deposition process can be used to sequentially deposit a first dielectric layer 501, a second dielectric layer 502, and a third dielectric layer 503 on the third functional layer 230, and then, the first dielectric layer 501, the second dielectric layer 502, and the third dielectric layer 503 are sequentially etched by photolithography, etching, and other processes to form a plurality of isolation grids 500. The first dielectric layer 501, the second dielectric layer 502, and the third dielectric layer 503 respectively include high dielectric constant materials. Exemplarily, the first dielectric layer 501 includes tantalum oxide, the second dielectric layer 502 includes metal aluminum, and the third dielectric layer 503 includes titanium nitride. Multiple isolation grids 500 and multiple deep trench isolation structures are correspondingly arranged.

[0112] In some embodiments, after forming a plurality of pixel units, the method for manufacturing an image sensor of the present application further includes the step of depositing a filter material on two adjacent isolation grids 500 to form a filter 600. Fig.11 As shown, a filter material can be deposited between two adjacent isolation grids 500 through a deposition process to form a filter 600. Multiple filters 600 and multiple pixel units are arranged correspondingly, so that corresponding visible light can pass through the filter and enter the corresponding pixel unit. The filter 600 can include a red light filter, a blue light filter, a green light filter, etc.

[0113] In one embodiment, the present application also provides an image sensor (see Figure 4 ), including an initial semiconductor structure 100, a functional stack 200, a plurality of deep trench isolation structures 300 and a plurality of pixel units 400.

[0114] A barrier layer 110 is disposed on one side of the initial semiconductor structure 100. It is understood that the initial semiconductor structure 100 may include a substrate 120 and a barrier layer 110. The material of the substrate 120 may be any commonly used known material. The material of the barrier layer 110 may be boron, etc. The barrier layer 110 is disposed on one side of the substrate 120. Optionally, the initial semiconductor structure 100 may further include a shallow trench isolation structure located in the substrate 120 and a metal layer located on the surface of the substrate on a side away from the barrier layer 110.

[0115] The functional stack 200 is disposed on the barrier layer 110. A plurality of deep trench isolation structures 300 are disposed in the functional stack 200, at least one deep trench isolation structure 300 penetrates the functional stack 200 and the barrier layer 110, and the remaining deep trench isolation structures 300 penetrate part of the functional stack 200, and at least two deep trench isolation structures 300 have different depths. It can be understood that the bottom height of a portion of the deep trench isolation structures 300 is the same as the bottom height of the barrier layer 110, and the bottom height of a portion of the deep trench isolation structures 300 is higher than the bottom height of the functional stack 200.

[0116] Each pixel unit 400 is located in the functional stack 200 between adjacent deep trench isolation structures 300. The depths of at least two pixel units 400 are different and the depth of each pixel unit 400 is less than or equal to the minimum depth of the deep trench isolation structure 300 in contact with the pixel unit 400. It can be understood that the depths of multiple pixel units 400 are not exactly the same. In addition, if the depths of the two deep trench isolation structures 300 in contact with the pixel unit 400 are the same, the depth of the pixel unit 400 may be the same as the depth of the deep trench isolation structure 300, or slightly less than the depth of the deep trench isolation structure 300. If the depths of the two deep trench isolation structures 300 in contact with the pixel unit 400 are different, the depth of the pixel unit 400 may be the same as the depth of the deep trench isolation structure 300 with a smaller depth, or slightly less than the depth.

[0117] In this embodiment, the image sensor includes an initial semiconductor structure 100, a functional stack 200, a plurality of deep trench isolation structures 300 and a plurality of pixel units 400. A barrier layer 110 is provided on one side surface of the initial semiconductor structure 100. The functional stack 200 is provided on the barrier layer 110. A plurality of deep trench isolation structures 300 are provided in the functional stack 200, at least one deep trench isolation structure 300 penetrates the functional stack 200 and the barrier layer 110, and the remaining deep trench isolation structures 300 penetrate part of the functional stack 200, and at least two deep trench isolation structures 300 have different depths, that is, there are deep trench isolation structures 300 with different depth-to-width ratios in the image sensor, which can more effectively meet the requirements of crosstalk suppression in different regions of the image sensor. Each pixel unit 400 is located in the functional stack 200 between adjacent deep trench isolation structures 300. At least two pixel units 400 have different depths and the depth of each pixel unit 400 is less than or equal to the minimum depth of the deep trench isolation structure 300 in contact with the pixel unit 400. In this way, it can be ensured that the pixel unit 400 and the deep trench isolation structure 300 have good matching. In addition, pixel units 400 with different depths can be adapted to different functional requirements. For example, a pixel unit with a larger depth can be applied to an area with high sensitivity requirements, while a pixel unit with a smaller depth can be applied to an area requiring a faster response speed.

[0118] In one embodiment, Fig.12 As shown, the plurality of deep trench isolation structures 300 include a first deep trench isolation structure 310, a second deep trench isolation structure 320, and a third deep trench isolation structure 330. The first deep trench isolation structure 310, the second deep trench isolation structure 320, and the third deep trench isolation structure 330 have different depths. The depth of the second deep trench isolation structure 320 is greater than the depth of the third deep trench isolation structure 330, and less than the depth of the first deep trench isolation structure 310.

[0119] In this embodiment, deep trench isolation structures with different aspect ratios are formed in the image sensor, which can more effectively meet the requirements of different areas of the image sensor for crosstalk suppression.

[0120] In one embodiment, please refer to Fig.12 The functional stack 200 includes a first functional layer 210, a second functional layer 220, and a third functional layer 230 stacked in sequence. The first functional layer 210 is in contact with the barrier layer 110. The first functional layer 210, the second functional layer 220, and the third functional layer 230 each include at least one element of the fifth main group. For example, the first functional layer 210 may include silicon phosphide, the second functional layer 220 may include silicon arsenide, and the third functional layer 230 may include silicon antimonide.

[0121] The first deep trench isolation structure 310 penetrates the first functional layer 210 , the second functional layer 220 and the third functional layer 230 , the second deep trench isolation structure 320 penetrates the second functional layer 220 and the third functional layer 230 , and the third deep trench isolation structure 330 penetrates the third functional layer 230 .

[0122] In one embodiment, please refer to Fig.12 In the first direction, the width of the first deep trench isolation structure 310 has a tendency to decrease first and then increase, and the width of the second deep trench isolation structure 320 and the third deep trench isolation structure 330 have a tendency to increase respectively. The first direction refers to the positive direction of OY, that is, the direction from the initial semiconductor structure 100 to the functional stack 200. The cross-sections of the first deep trench isolation structure 310, the second deep trench isolation structure 320 and the third deep trench isolation structure 330 are set to such a shape that when incident light enters the sidewall of the deep trench isolation structure, more incident light will be concentrated and reflected to the bottom of the pixel unit, thereby increasing the light flux.

[0123] In some embodiments, the materials of the plurality of deep trench isolation structures 300 include metal aluminum. It is understood that the first deep trench isolation structure 310, the second deep trench isolation structure 320, and the third deep trench isolation structure 330 include metal aluminum. When incident light is incident on the sidewall of the deep trench isolation structure, based on the reflective properties of the metal, the incident light will be completely reflected into the pixel unit, thereby increasing the light flux.

[0124] In one embodiment, Fig.13 As shown, the plurality of pixel units 400 include a first pixel unit 410, a second pixel unit 420 and a third pixel unit 430. The first pixel unit 410 is located between two adjacent first deep trench isolation structures 310. The second pixel unit 420 is located between two adjacent second deep trench isolation structures 320, or between an adjacent first deep trench isolation structure 310 and a second deep trench isolation structure 320. The third pixel unit 430 is located between two adjacent third deep trench isolation structures 330, or between an adjacent second deep trench isolation structure 320 and a third deep trench isolation structure 330.

[0125] It can be understood that the depths of the first pixel unit 410, the second pixel unit 420 and the third pixel unit 430 are different. The depth of the second pixel unit 420 is greater than the depth of the third pixel unit 430, and less than the depth of the first pixel unit 410. In this way, the depth of the first pixel unit 410 is less than the depth of the first deep trench isolation structure 310, the depth of the second pixel unit 420 is less than or equal to the depth of the second deep trench isolation structure 320, and the depth of the third pixel unit 430 is less than or equal to the depth of the third deep trench isolation structure 330. In this way, it can be ensured that there is good matching between the pixel unit and the deep trench isolation structure. In addition, setting pixel units with different depths can adapt to different functional requirements. For example, the first pixel unit 410 can be applied to areas with high sensitivity requirements, while the third pixel unit 430 can be applied to areas that require faster response speeds.

[0126] In one embodiment, the materials of the first pixel unit 410, the second pixel unit 420, and the third pixel unit 430 respectively include at least one element of the fifth main group. In the above content about the method for preparing the image sensor, it has been explained that the first pixel unit 410, the second pixel unit 420, and the third pixel unit 430 are formed by annealing different regions of the functional stack 200, respectively. Therefore, the materials of the first pixel unit 410, the second pixel unit 420, and the third pixel unit 430 respectively include at least one element of the fifth main group. For example, the first pixel unit 410 includes silicon phosphide, silicon arsenide, and silicon antimonide, the second pixel unit 420 includes silicon arsenide and silicon antimonide, and the third pixel unit 430 includes silicon antimonide.

[0127] In one embodiment, the image sensor of the present application further includes a plurality of isolation grids 500 and filters 600 (see Fig.11 ). Each isolation grid 500 is respectively located on a side surface of the deep trench isolation structure 300 away from the initial semiconductor structure 100, and the filter 600 is located between two adjacent isolation grids 500. Among them, the isolation grid 500 includes a first dielectric layer 501, a second dielectric layer 502 and a third dielectric layer 503. The first dielectric layer 501, the second dielectric layer 502 and the third dielectric layer 503 respectively include high dielectric constant materials. Exemplarily, the first dielectric layer 501 includes tantalum oxide, the second dielectric layer 502 includes metal aluminum, and the third dielectric layer 503 includes titanium nitride. The filter 600 may include a red light filter, a blue light filter, a green light filter, etc.

[0128] The unexpected effects of the present application are: first, deep trench isolation structures with different aspect ratios are formed in the image sensor, which can more effectively meet the needs of different areas of the image sensor for crosstalk suppression; second, the depth of each pixel unit is set to be less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit, which can ensure good matching between the pixel unit and the deep trench isolation structure; third, setting pixel units of different depths can adapt to different functional requirements. For example, pixel units with larger depths can be suitable for areas with high sensitivity requirements, while pixel units with smaller depths can be suitable for areas that require faster response speeds.

[0129] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0130] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0131] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. An image sensor, characterized in that: include: An initial semiconductor structure, wherein a barrier layer is disposed on one side surface of the initial semiconductor structure; A functional stack located on the barrier layer; the functional stack comprises a first functional layer, a second functional layer and a third functional layer stacked in sequence, wherein the first functional layer is in contact with the barrier layer; A plurality of deep trench isolation structures are arranged in the functional stack, wherein the plurality of deep trench isolation structures include a first deep trench isolation structure, a second deep trench isolation structure and a third deep trench isolation structure, the first deep trench isolation structure penetrates the first functional layer, the second functional layer and the third functional layer, the second deep trench isolation structure penetrates the second functional layer and the third functional layer, and the third deep trench isolation structure penetrates the third functional layer; in a first direction, the width of the first deep trench isolation structure has a trend of first decreasing and then increasing, and the second deep trench isolation structure and the third deep trench isolation structure have a trend of increasing respectively; the first direction is a direction along the barrier layer pointing to the functional stack; A plurality of pixel units, each of which is located in a functional stack between adjacent deep trench isolation structures; wherein at least two of the pixel units have different depths and the depth of each of the pixel units is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit.

2. The image sensor according to claim 1, characterized in that The plurality of pixel units include a first pixel unit, a second pixel unit and a third pixel unit, wherein: The first pixel unit is located between two adjacent first deep trench isolation structures; The second pixel unit is located between two adjacent second deep trench isolation structures, or between the adjacent first deep trench isolation structure and the second deep trench isolation structure; The third pixel unit is located between two adjacent third deep trench isolation structures, or between the second adjacent deep trench isolation structure and the third adjacent deep trench isolation structure.

3. The image sensor according to claim 2, characterized in that The materials of the first pixel unit, the second pixel unit and the third pixel unit respectively include at least one element of the fifth main group.

4. The image sensor according to claim 1, characterized in that The materials of the plurality of deep trench isolation structures respectively include metal aluminum.

5. The image sensor according to claim 1, characterized in that The image sensor further comprises: A plurality of isolation grids, each of the isolation grids being located on a surface of a side of the deep trench isolation structure away from the initial semiconductor structure; The filter is located between two adjacent isolation grids.

6. A method for preparing an image sensor, characterized in that: include: providing an initial semiconductor structure; A barrier layer is provided on one side surface of the initial semiconductor structure; A functional stack and a plurality of deep trench isolation structures are formed on the barrier layer, wherein the functional stack comprises a first functional layer, a second functional layer and a third functional layer stacked in sequence, wherein the first functional layer is in contact with the barrier layer; the plurality of deep trench isolation structures comprise a first deep trench isolation structure, a second deep trench isolation structure and a third deep trench isolation structure, the first deep trench isolation structure penetrates the first functional layer, the second functional layer and the third functional layer, the second deep trench isolation structure penetrates the second functional layer and the third functional layer, and the third deep trench isolation structure penetrates the third functional layer; in a first direction, the width of the first deep trench isolation structure has a tendency to decrease first and then increase, and the width of the second deep trench isolation structure and the third deep trench isolation structure have a tendency to increase respectively; the first direction is a direction along the barrier layer pointing to the functional stack; Annealing is performed on the functional stack between two adjacent deep trench isolation structures to form a pixel unit; wherein at least two of the pixel units have different depths and the depth of each of the pixel units is less than or equal to the minimum depth of the deep trench isolation structure in contact with the pixel unit.

7. The method according to claim 6, characterized in that The forming of a functional stack and a plurality of deep trench isolation structures on the barrier layer comprises: forming a first functional layer and at least one first isolation structure on the barrier layer; forming a second functional layer and a plurality of second isolation structures on the first functional layer; forming a third functional layer and a plurality of third isolation structures on the second functional layer; Among them, the number of the second isolation structures is greater than the number of the first isolation structures, and less than the number of the third isolation structures; the corresponding first isolation structure, the second isolation structure and the third isolation structure constitute a first deep trench isolation structure, the corresponding second isolation structure and the third isolation structure constitute a second deep trench isolation structure, and the separately arranged third isolation structure constitutes a third deep trench isolation structure.

8. The method according to claim 7, characterized in that The step of performing annealing on the functional stack between two adjacent deep trench isolation structures to form a pixel unit comprises: Performing a first annealing process on the functional stack between two adjacent third deep trench isolation structures and the functional stack between the adjacent second deep trench isolation structure and the third deep trench isolation structure to form a third pixel unit; Performing a second annealing process on the functional stack between two adjacent second deep trench isolation structures and the functional stack between the adjacent first deep trench isolation structure and the second deep trench isolation structure to form a second pixel unit; A third annealing process is performed on the functional stack between two adjacent first deep trench isolation structures to form a third pixel unit.

9. The method according to claim 7, characterized in that: The step of forming a first functional layer and a plurality of first isolation structures on the barrier layer comprises: Depositing a first functional material on the initial semiconductor structure to form a first functional layer; forming at least one first groove in the first functional layer and the barrier layer; An isolation material is deposited in the first groove to form the first isolation structure.

10. The method according to claim 7, characterized in that The forming of a second functional layer and a plurality of second isolation structures on the first functional layer comprises: Depositing a second functional material on the first functional layer to form a second functional layer; forming a plurality of second grooves in the second functional layer; An isolation material is deposited in the second groove to form the second isolation structure.

11. The method according to claim 7, characterized in that The forming of a third functional layer and a plurality of third isolation structures on the second functional layer comprises: Depositing a third functional material on the second functional layer to form the third functional layer; forming a plurality of third grooves in the third functional layer; An isolation material is deposited in the third groove to form the third isolation structure.

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