Amplifier circuits and electronic devices

Abstract

The present application discloses a power amplifier circuit and an electronic device, which relates to the field of radio frequency and is used to realize phase alignment of two power amplifier output ends in a power amplifier circuit with power backoff. The power amplifier circuit includes: a first capacitor, a first power amplifier, a second power amplifier, a matching network, a first phase shifting network, a power divider, and a second phase shifting network; the first output end of the power divider is electrically connected to the input end of the first power amplifier, the second output end of the power divider is electrically connected to the first end of the second phase shifting network, and the second end of the second phase shifting network is electrically connected to the input end of the second power amplifier; the output end of the first power amplifier is electrically connected to the first end of the first phase shifting network, the output end of the second power amplifier is electrically connected to the first end of the first capacitor, and the second end of the first capacitor, the second end of the first phase shifting network, and the first end of the matching network are electrically connected to a junction point.

Description

Technical Field

[0001] The present application relates to the field of radio frequency, and in particular to a power amplifier circuit and an electronic device. Background Art

[0002] Power amplifiers are used in the power amplifier circuits of electronic devices to amplify the power of radio frequency signals. In the linear region, the output power of the power amplifier increases linearly with the increase of input power. When the input power of the power amplifier increases further, the power amplifier enters the nonlinear region, and the output power of the power amplifier no longer increases with the increase of input power. The output power of the power amplifier reaches saturation, and the efficiency of the power amplifier is the highest at this time. The power amplifier is usually designed so that the saturated output power corresponds to the peak power of the input radio frequency signal, that is, when the radio frequency signal input to the power amplifier reaches the peak power, the output power also reaches saturation, so that the power amplifier works in the linear region as much as possible. However, this means that the power amplifier cannot reach saturation most of the time, so the efficiency is not the highest most of the time.

[0003] In the prior art, the power back-off technology of two parallel power amplifiers is used to improve the efficiency of power amplification. Specifically, the first power amplifier is load modulated by a frequency element, so that the power amplifier is more likely to enter the saturation region in advance as the input power increases, thereby improving the efficiency of the power amplifier in amplifying small signals (i.e., RF signals with low power), and the second power amplifier is used to amplify large signals (i.e., RF signals with high power), thereby improving the efficiency of power amplification as a whole.

[0004] Since the bias states of the two power amplifiers are different, in fact, the phase shift angles generated by the two power amplifiers are not exactly the same, and strict phase alignment is not achieved at the output end. Summary of the invention

[0005] Embodiments of the present application provide a power amplifier circuit and an electronic device, which are used to achieve phase alignment of two power amplifier output ends in a power amplifier circuit with power back-off.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a power amplifier circuit is provided, comprising: a first capacitor, a first power amplifier, a second power amplifier, a matching network, a first phase-shifting network, a power divider, and a second phase-shifting network; a first output end of the power divider is electrically connected to an input end of the first power amplifier, a second output end of the power divider is electrically connected to a first end of the second phase-shifting network, and a second end of the second phase-shifting network is electrically connected to an input end of the second power amplifier; an output end of the first power amplifier is electrically connected to a first end of the first phase-shifting network, an output end of the second power amplifier is electrically connected to a first end of the first capacitor, and a second end of the first capacitor, a second end of the first phase-shifting network, and a first end of the matching network are electrically connected to a junction.

[0008] In the power amplifier circuit provided in the embodiment of the present application, in a power amplifier circuit with power back-off, a capacitor is connected in series at the output end of a power amplifier, and the phase difference between the output ends of the two power amplifiers is adjusted by the capacitor to achieve phase alignment of the output ends of the two power amplifiers.

[0009] In a possible implementation, the capacitance value of the first capacitor is 1 / (4π*f*tanφ*Ropt), where φ is the phase difference between the first power amplifier and the second power amplifier, f is the frequency of the radio frequency signal, and Ropt is the load impedance of the first power amplifier or the second power amplifier. This implementation provides a way to determine the capacitance value of the first capacitor.

[0010] In a possible implementation, the first power amplifier, the second power amplifier, the power divider and the second phase shift network are integrated in the chip, and the first capacitor, the matching network and the first phase shift network are arranged on the substrate; the output end of the first power amplifier is electrically connected to the first port of the chip, and the first port is electrically connected to the first end of the first phase shift network through the first bonding wire and the first microstrip line on the substrate; the output end of the second power amplifier is electrically connected to the second port of the chip, and the second port is electrically connected to the first end of the first capacitor through the second bonding wire and the second microstrip line on the substrate. The advantage of this is that the first phase shift network and the first capacitor are easier to debug and replace. On the contrary, if all the components are integrated in the chip, they will be solidified after the chip is processed and can no longer be debugged or replaced, unless the chip is redesigned and re-printed, which will take more time and cost.

[0011] In a possible implementation manner, the equivalent inductance of the first bonding wire is L11, the equivalent inductance of the first microstrip line is L12, L 1 1 + L 1 2 = R 1 2 * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , wherein C11 is the parasitic capacitance of the first power amplifier, R1 is the optimal load impedance when the first power amplifier does not have parasitic capacitance, and f is the frequency of the radio frequency signal. This embodiment provides a method for determining the equivalent inductance of the first bonding wire and the first microstrip line, thereby adjusting the length or width of the first bonding wire and the first microstrip line.

[0012] In a possible implementation manner, the equivalent inductance of the second bonding wire is L21, the equivalent inductance of the second microstrip line is L22, L 2 1 + L 2 2 = R 2 2 * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , wherein C12 is the parasitic capacitance of the second power amplifier, R2 is the optimal load impedance when the second power amplifier does not have parasitic capacitance, and f is the frequency of the radio frequency signal. This embodiment provides a method for determining the equivalent inductance of the second bonding wire and the second microstrip line, thereby adjusting the length or width of the second bonding wire and the second microstrip line.

[0013] In a possible implementation, a third capacitor and a fourth capacitor are further included, the second end of the first microstrip line is electrically connected to the first end of the third capacitor, the second end of the third capacitor is grounded, the second end of the second microstrip line is electrically connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded. The third capacitor is used to neutralize the overcompensation of the parasitic capacitance of the first power amplifier by the equivalent inductance of the first bonding wire and the equivalent inductance of the first microstrip line. The fourth capacitor is used to neutralize the overcompensation of the parasitic capacitance of the second power amplifier by the equivalent inductance of the second bonding wire and the equivalent inductance of the second microstrip line.

[0014] In a possible implementation manner, the capacitance value of the third capacitor is C21, C 2 1 = b 1 / [ 2 π * f * ( a 1 2 + b 1 2 ) ] ,in, b 1 = 2 π * f * ( L 1 1 + L 1 2 ) − 2 π * R 1 2 * f * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , a 1 = R 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , L11 is the equivalent inductance of the first bonding wire, L12 is the equivalent inductance of the first microstrip line, C11 is the parasitic capacitance of the first power amplifier, R1 is the optimal load impedance when the first power amplifier does not have parasitic capacitance, and f is the frequency of the radio frequency signal. This embodiment provides a way to determine the capacitance value of the third capacitor.

[0015] In a possible implementation manner, the capacitance value of the fourth capacitor is C22, C 2 2 = b 2 / [ 2 π * f * ( a 2 2 + b 2 2 ) ] ,in, b 2 = 2 π * f * ( L 2 1 + L 2 2 ) − 2 π * R 2 2 * f * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , a 2 = R 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , L21 is the equivalent inductance of the second bonding wire, L22 is the equivalent inductance of the second microstrip line, C12 is the parasitic capacitance of the second power amplifier, R2 is the optimal load impedance when the second power amplifier does not have parasitic capacitance, and f is the frequency of the radio frequency signal. This embodiment provides a way to determine the capacitance value of the fourth capacitor.

[0016] In one possible implementation, the first power amplifier is a class AB power amplifier, and the second power amplifier is a class C power amplifier or a class D power amplifier. Because the first power amplifier is a class AB power amplifier, when the input RF signal is a small signal, the first power amplifier starts to work. Because the second power amplifier is a class B power amplifier or a class C power amplifier, when the input RF signal is a small signal, the power of the input RF signal is small and is not enough to trigger the second power amplifier to work, and the second power amplifier is cut off and presents an open circuit state. When the power of the input RF signal increases until it reaches the power back-off point, that is, the RF signal changes from a small signal to a large signal, triggering the second power amplifier to start working. That is, the first power amplifier is used to power amplify small signals, and the second power amplifier is used to power amplify large signals, so that the power amplifier circuit achieves a high level of overall power amplification efficiency through power back-off.

[0017] In a second aspect, an electronic device is provided, comprising an antenna and a power amplifier circuit as described in the first aspect and any embodiment thereof, wherein the power amplifier circuit is used to output a power-amplified radio frequency signal to the antenna.

[0018] The technical effects of the second aspect refer to the technical effects of the first aspect and any of its embodiments, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the structure of a mobile communication module provided in an embodiment of the present application;

[0021] Figure 3 A schematic diagram of the structure of a power amplifier circuit provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structures of several implementation methods of the quarter-wavelength line provided in the embodiments of the present application;

[0023] Figure 5 A schematic diagram of a load impedance change of a power amplifier provided in an embodiment of the present application;

[0024] Figure 6A schematic diagram of the relationship between power back-off and efficiency provided in an embodiment of the present application;

[0025] Figure 7 A schematic diagram of a phase difference introduced by a first power amplifier provided in an embodiment of the present application;

[0026] Figure 8 A schematic diagram of a phase difference introduced by a second power amplifier provided in an embodiment of the present application;

[0027] Fig. 9 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0028] Fig.10 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0029] Fig.11 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0030] Fig.12 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0031] Fig.13 A schematic diagram of a PAE of a power amplifier circuit provided in an embodiment of the present application;

[0032] Fig.14 A schematic diagram of PAE of another power amplifier circuit provided in an embodiment of the present application;

[0033] Fig.15 A schematic diagram of a PAE of another power amplifier circuit provided in an embodiment of the present application;

[0034] Fig.16 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0035] Fig.17 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0036] Fig.18 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application;

[0037] Fig.19 A schematic diagram of the structure of another power amplifier circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] First, some concepts involved in this application are described.

[0039] The terms "first", "second", etc. involved in the embodiments of the present application are only used to distinguish features of the same type and cannot be understood as indicating relative importance, quantity, order, etc.

[0040] The terms "exemplary" or "for example" and the like in the embodiments of the present application are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the related concepts in a specific way.

[0041] The terms "coupling" and "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, they may refer to a direct physical connection, or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0042] The saturation, linear and nonlinear regions of a power amplifier. In the linear region, the output power of the power amplifier increases linearly with the increase of the input power. When the input power of the power amplifier increases further, the power amplifier enters the nonlinear region, the output power of the power amplifier no longer increases with the increase of the input power, and the output power of the power amplifier reaches saturation.

[0043] Classification of power amplifiers: According to the current conduction angle of the RF signal, the power amplifier can be divided into Class A (conduction angle of 360 degrees), Class B (conduction angle of 180 degrees), Class C (conduction angle less than 180 degrees), and Class AB (conduction angle between 180 degrees and 360 degrees). Among them, Class A power amplifiers are suitable for scenarios where the RF signal is a small signal, Class B power amplifiers and Class C power amplifiers are suitable for scenarios where the RF signal is a large signal, and Class AB power amplifiers are equivalent to Class A power amplifiers when the RF signal is a small signal, and are equivalent to Class B power amplifiers when the RF signal is a large signal. Among them, small signal refers to the RF signal input to the power amplifier with a small power, and large signal refers to the RF signal input to the power amplifier with a large power.

[0044] The efficiency of a power amplifier refers to the ratio of the output power to the input power of the power amplifier.

[0045] The power added efficiency (PAE) of a power amplifier is equal to the ratio of the power amplifier efficiency to the DC power, indicating how much DC power is converted into RF power.

[0046] Power back-off: Reduce the 1dB compression point of the power amplifier (i.e., the critical point between the linear and nonlinear regions of the power amplifier) ​​by a certain amount (e.g., 6dB-10dB), so that the power amplifier can enter the saturation region earlier as the input power increases, thereby improving the efficiency of the power amplifier in amplifying small signals.

[0047] The embodiment of the present application provides an electronic device, which is an electronic device with a wireless communication function. The electronic device can be mobile or fixed. The electronic device can be deployed on land (for example, indoors or outdoors, handheld or vehicle-mounted, etc.), on the water (for example, ships, etc.), or in the air (for example, airplanes, balloons, and satellites, etc.). The electronic device can be called user equipment (UE), access terminal, terminal unit, subscriber unit, terminal station, mobile station (MS), mobile station, terminal agent or terminal device, etc. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a smart bracelet, a smart screen, a smart watch, a virtual reality (VR) device, an augmented reality (AR) device, a terminal in industrial control, a terminal in self-driving, a terminal in remote medical, a terminal in smart grid, a terminal in transportation safety, a terminal in smart city, a terminal in smart home, etc. The embodiments of the present application do not limit the specific type and structure of the electronic device. A possible structure of the electronic device is described below.

[0048] Taking a mobile phone as an example, Figure 1A possible structure of the electronic device 101 is shown. The electronic device 101 may include a processor 210, an external memory interface 220, an internal memory 221, a universal serial bus (USB) interface 230, a power management module 240, a battery 241, a wireless charging coil 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, an earphone interface 270D, a sensor module 280, a button 290, a motor 291, an indicator 292, a camera 293, a display screen 294, and a subscriber identification module (SIM) card interface 295. Optionally, in some embodiments, an audio digital signal processor (ADSP) 243 is also included.

[0049] It is understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0050] The processor 210 may include one or more processing units, for example, the processor 210 may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processing unit (CPU), an application processor (AP), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, and a neural-network processing unit (NPU). Among them, different processing units may be independent devices or integrated into one or more processors. For example, the processor 210 may be an application processor AP. Alternatively, the processor 210 may be integrated into a system on chip (SoC). Alternatively, the processor 210 may be integrated into an integrated circuit (IC) chip. The processor 210 may include an analog front end (AFE) and a micro-controller unit (MCU) in an IC chip.

[0051] The processor 210 executes the antenna feeding control method provided in the embodiment of the present application by executing the program and computer instructions stored in the internal memory 221.

[0052] The processor 210 may also be provided with a memory for storing computer instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory may store computer instructions or data that the processor 210 has just used or circulated. If the processor 210 needs to use the computer instructions or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 210, and thus improves the efficiency of the system.

[0053] In some embodiments, the processor 210 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a USB interface, etc.

[0054] ADSP 243 can be coupled with audio module 270 and sensor module 280, and ADSP 243 can be used to process audio signals and sensor data. When the processor is in a dormant state, ADSP 243 can still keep working, thereby reducing the power consumption of the electronic device.

[0055] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0056] The external memory interface 220 can be used to connect an external memory card, such as a micro SanDisk (Micro SD) card, to expand the storage capacity of the electronic device 101. The external memory card communicates with the processor 210 through the external memory interface 220 to implement a data storage function. For example, files such as music and videos can be stored in the external memory card.

[0057] The internal memory 221 may be used to store computer executable program codes, which include computer instructions. The processor 210 executes various functional applications and data processing of the electronic device 101 by running the computer instructions stored in the internal memory 221. In addition, the internal memory 221 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0058] The memory involved in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0059] The electronic device 101 can implement audio functions such as music playing and recording through the audio module 270, the speaker 270A, the receiver 270B, the microphone 270C, the headphone interface 270D and the application processor.

[0060] The audio module 270 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signal. In some embodiments, the audio module 270 can be arranged in the processor 210, or some functional modules of the audio module 270 can be arranged in the processor 210. The speaker 270A, also known as the "speaker", is used to convert the audio electrical signal into a sound signal. The receiver 270B, also known as the "earpiece", is used to convert the audio electrical signal into a sound signal. The microphone 270C, also known as the "microphone" or "microphone", is used to convert the sound signal into an electrical signal. The electronic device 101 can be provided with at least one microphone 270C. The headphone interface 270D is used to connect a wired headset. The headphone interface 270D can be a USB interface 230, or it can be a 3.5mm open mobile terminal platform (OMTP) standard interface, or a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0061] The button 290 includes a power button, a volume button, etc. The button 290 may be a mechanical button. It may also be a touch button. The electronic device 101 may receive a button input and generate a key signal input related to the user settings and function control of the electronic device 101. The motor 291 may generate a vibration prompt. The motor 291 may be used for an incoming call vibration prompt or for touch vibration feedback. The indicator 292 may be an indicator light, which may be used to indicate the charging status, the change in power, or may be used to indicate messages, missed calls, notifications, etc. The SIM card interface 295 is used to connect a SIM card. The SIM card may be inserted into or removed from the SIM card interface 295 to achieve contact and separation with the electronic device 101. The electronic device 101 may support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The SIM card interface 295 may support a Nano SIM card, a Micro SIM card, a SIM card, etc. In some embodiments, the electronic device 101 uses an embedded SIM (eSIM) card. The eSIM card can be embedded in the electronic device 101 and cannot be separated from the electronic device 101.

[0062] The electronic device 101 can realize the shooting function through the ISP, the camera 293, the video codec, the GPU, the display screen 294, and the application processor. The ISP is used to process the data fed back by the camera 293. In some embodiments, the ISP can be set in the camera 293. The camera 293 is used to capture a static image or a video. In some embodiments, the electronic device 101 may include 1 or N cameras 293, where N is a positive integer greater than 1.

[0063] The electronic device 101 can realize the display function through a GPU, a display screen 294, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 294 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 210 may include one or more GPUs, which execute computer instructions to generate or change display information.

[0064] The sensor module 280 may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, an angle sensor, etc. When the display screen 294 is a folding screen, the angle sensor may detect the folding angle of the display screen 294, and the folding angle ranges from 0 to 180 degrees.

[0065] The battery 241 may include one or more batteries to power the load.

[0066] The power management module 240 is used to receive charging input from a charger. The charger may be a wireless charger, such as a wireless charging base, other electronic devices 101 with reverse wireless charging function, etc. The power management module 240 may receive wireless charging input through a wireless charging coil 242 of the electronic device. The charger may also be a wired charger, for example, the power management module 240 may receive charging input from a wired charger through the USB interface 230. The power management module 240 is also called a charging chip.

[0067] The power management module 240 can charge the battery 241 and also power the electronic device. The power management module 240 receives input from the battery 241 and powers the processor 210, the internal memory 221, the external memory interface 220, the display screen 294, the camera 293, and the wireless communication module 260. The power management module 240 can also be used to monitor the capacity, voltage, battery cycle number, battery health status (leakage, impedance) and other parameters of the battery 241. In some other embodiments, the power management module 240 can also be set in the processor 210.

[0068] The display screen 294 is used to display images, videos, etc. The display screen 294 includes a display panel. In some embodiments, the electronic device 101 may include one or more display screens 294 .

[0069] The wireless communication function of the electronic device 101 can be implemented through the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, the modem processor, etc.

[0070] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 101 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0071] The mobile communication module 250 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 101. The wireless communication module 260 can provide solutions for wireless communications including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., applied to the electronic device 101. In some embodiments, the antenna 1 of the electronic device 101 is coupled to the mobile communication module 250, and the antenna 2 is coupled to the wireless communication module 260, so that the electronic device 101 can communicate with the network and other devices through wireless communication technology.

[0072] like Figure 2 As shown, the mobile communication module 250 may include a baseband chip 31 , a radio frequency integrated circuit (RFIC) 32 and a power amplifier circuit 33 .

[0073] The baseband chip 31 is used to convert the data from the processor 210 into a baseband signal, including modulation and demodulation, digital filtering, equalization processing, etc. of the baseband signal. The RFIC 32 is used to convert the baseband signal from the baseband chip 31 into a radio frequency signal, which is transmitted through the power amplifier circuit 33 and the antenna 34. The power amplifier circuit 33 can improve the efficiency of power amplification of the radio frequency signal when the power is backed off. It should be noted that the baseband chip 31 and the RFIC 32 can also be integrated with the processor 210 in the SoC.

[0074] like Figure 3 As shown, the power amplifier circuit 33 includes: a first power amplifier (also called a carrier power amplifier) ​​331, a second power amplifier (also called a peak power amplifier) ​​332, a matching network 333, a first phase shift network 334, a power divider 335 and a second phase shift network 336.

[0075] The matching network 333 is used to perform impedance transformation on the equivalent impedance (for example, 10 ohms) of the combining point CON to obtain an equivalent impedance RL (for example, 50 ohms), thereby achieving impedance matching.

[0076] The input terminal of the power divider 335 is used to Figure 2 The RFIC 32 shown is electrically connected to input a radio frequency signal. The first output end of the power divider 335 is electrically connected to the input end of the first power amplifier 331, and the second output end of the power divider 335 is electrically connected to the first end of the second phase shift network 336. The second end of the second phase shift network 336 is electrically connected to the input end of the second power amplifier 332. The output end of the first power amplifier 331 is electrically connected to the first end of the first phase shift network 334. The second end of the first phase shift network 334, the output end of the second power amplifier 332, and the first end of the matching network 333 are electrically connected to the junction point CON. The second end of the matching network 333 is used to Figure 2 The antenna 34 is shown electrically connected, and the second end of the matching network 333 is used to output the power-amplified radio frequency signal.

[0077] The power divider 335 is used to evenly divide the RF signal inputted from the input end into a first RF signal and a second RF signal, and output the first RF signal through the first output end and output the second RF signal through the second output end. The power of the first RF signal and the second RF signal are both half of the power of the input RF signal.

[0078] The first power amplifier 331 is used to power amplify the first RF signal. The first power amplifier 331 is a class AB power amplifier, that is, the first power amplifier 331 is equivalent to a class A power amplifier when the first RF signal is a small signal, and is equivalent to a class B power amplifier when the first RF signal is a large signal. The second power amplifier 332 is used to power amplify the second RF signal. The second power amplifier 332 is a class B power amplifier or a class C power amplifier, that is, the second power amplifier 332 starts working when the second RF signal is a large signal. The first power amplifier 331 and the second power amplifier 332 have the same load impedance when saturated, for example, both are pure resistance Ropt, and the efficiency is highest at this time. The load impedance of the power amplifier refers to the output voltage / output current of the power amplifier.

[0079] The first phase shift network 334 and the second phase shift network 336 are both frequency elements, that is, elements whose load impedance and phase shift angle change with the frequency of the RF signal. The first phase shift network 334 plays the role of impedance transformation, for example, changing the load impedance of the first power amplifier 331. The first phase shift network 334 or the second phase shift network 336 can be a quarter-wavelength line, which refers to the wavelength corresponding to the center frequency of the RF signal. The quarter-wavelength line can also be called a 90-degree phase shift line, that is, at the center frequency of the RF signal, a 90-degree phase shift can be generated on the RF signal.

[0080] The first phase shift network 334 performs phase shifting on the first RF signal, and the phase shift angle is related to the frequency of the RF signal. At the center frequency of the RF signal, the first phase shift network 334 can produce a 90-degree phase shift on the first RF signal, and the impedance of the first phase shift network 334 is equal to the load impedance of the first power amplifier 331 when saturated, thereby achieving impedance matching with a reflection coefficient of 0.

[0081] The second phase shift network 336 performs a phase shift on the second RF signal, and the phase shift angle is related to the frequency of the RF signal. At the center frequency of the RF signal, the second phase shift network 336 can produce a 90-degree phase shift on the second RF signal, and the impedance of the second phase shift network 336 is equal to the load impedance of the first power amplifier 331 when saturated. Under ideal conditions, for any frequency of the RF signal, the phase shift angle of the second RF signal by the second phase shift network 336 is the same as the phase shift angle of the first RF signal by the first phase shift network 334, so that the first RF signal and the second RF signal are combined in phase at the junction CON to maximize the output power.

[0082] For example, Figure 4 As shown, the embodiments of the present application provide several implementation methods of quarter-wavelength lines. Figure 4As shown in A, the quarter-wavelength line can be a microstrip line with an electrical length of 90 degrees. This quarter-wavelength line can achieve a -90 degree phase shift for the RF signal at the center frequency, and the phase shift angle will change linearly at other frequencies.

[0083] like Figure 4 As shown in B, the quarter-wavelength line can be a series inductor π-type network, including capacitor C1, capacitor C2, and inductor L1. The first end of the inductor L1 is electrically connected to the first end of the capacitor C1 and serves as the input end of the series inductor π-type network. The second end of the capacitor C1 is grounded. The second end of the inductor L1 is electrically connected to the first end of the capacitor C2 and serves as the output end of the series inductor π-type network. The second end of the capacitor C2 is grounded. This quarter-wavelength line can achieve a -90 degree phase shift for the RF signal at the center frequency, and the phase shift angle will change linearly at other frequencies.

[0084] like Figure 4 As shown in C, the quarter-wavelength line can be a series capacitor π-type network, including capacitor C1, inductor L1, and inductor L2. The first end of capacitor C1 is electrically connected to the first end of inductor L1 and serves as the input end of the series capacitor π-type network. The second end of inductor L1 is grounded. The second end of capacitor C1 is electrically connected to the first end of inductor L2 and serves as the output end of the series capacitor π-type network. The second end of inductor L2 is grounded. This quarter-wavelength line can achieve a 90-degree phase shift for the RF signal at the center frequency, and the phase shift angle will change linearly at other frequencies.

[0085] like Figure 4 As shown in D, the quarter-wavelength line can be a series inductor T-type network, including capacitor C1, inductor L1, and inductor L2, the first end of inductor L1 serves as the input end of the series inductor T-type network, the second end of inductor L1, the first end of inductor L2 and the first end of capacitor C1 are electrically connected, the second end of capacitor C1 is grounded, and the second end of inductor L2 serves as the output end of the series inductor T-type network. This quarter-wavelength line can achieve a -90 degree phase shift for the RF signal at the center frequency, and the phase shift angle will change linearly at other frequencies.

[0086] like Figure 4 As shown in Figure E, the quarter-wavelength line can be a series capacitor T-type network, including capacitor C1, capacitor C2, and inductor L1. The first end of capacitor C1 serves as the input end of the series capacitor T-type network, the second end of capacitor C1, the first end of capacitor C2, and the first end of inductor L1 are electrically connected, the second end of inductor L1 is grounded, and the second end of capacitor C2 serves as the output end of the series capacitor T-type network. This quarter-wavelength line can achieve a 90-degree phase shift for the RF signal at the center frequency, and the phase shift angle will change linearly at other frequencies.

[0087] Figure 4These inductors all satisfy L=Ropt / (2πf), and these capacitors all satisfy C=1 / (2πfRopt), where f is the center frequency of the RF signal, and Ropt is the load impedance of the first power amplifier 331.

[0088] The working principle of the power amplifier circuit 33 to achieve power amplifier power back-off is as follows:

[0089] The load impedance of the power amplifier is equal to the output voltage / output current of the power amplifier, such as Figure 5 As shown in A, when the load impedance of the power amplifier remains unchanged (that is, the slope of the output voltage / output current remains unchanged), when the output current of the power amplifier is small, the output voltage is also small. At this time, the efficiency of the power amplifier is low. Figure 5 As shown in B, when the output current of the power amplifier is small, the efficiency of the power amplifier can be improved by increasing the load impedance of the power amplifier and then increasing the output voltage of the power amplifier, making it easier for the power amplifier to enter the saturation region in advance.

[0090] Therefore, if Figure 6 middle" Figure 3 As shown in the MN section of the "power amplifier circuit shown in the figure", because the second power amplifier 332 is a class B power amplifier or a class C power amplifier, when the input RF signal is a small signal, the power of the input RF signal is small and is not enough to trigger the second power amplifier 332 to work, the second power amplifier 332 is cut off and presents an open circuit state, and the load impedance of the second power amplifier 332 is infinite (∞). Because the first power amplifier 331 is a class AB power amplifier, when the input RF signal is a small signal, the first power amplifier 331 starts to work, and the first phase shift network 334 shifts the negative impedance of the first power amplifier 331 to zero. The load impedance is transformed to increase the load impedance of the first power amplifier 331, and the output voltage of the first power amplifier 331 is increased, so that the first power amplifier 331 enters the saturation state in advance, that is, the first power amplifier 331 is more likely to enter the saturation region in advance as the input power increases, thereby improving the efficiency of the first power amplifier 331 in power amplification of small signals, thereby improving the overall power amplification efficiency of the power amplifier circuit 33. The output voltage of the first power amplifier 331 increases as the power of the input RF signal increases, and the output power of the first power amplifier 331 also increases as the power of the input RF signal increases.

[0091] like Figure 6 middle" Figure 3As shown in the NP segment of the power amplifier circuit shown in the figure, when the power of the input RF signal increases until it reaches the power back-off point N, that is, the RF signal changes from a small signal to a large signal, at this time, the load impedance of the first power amplifier 331 is 2Ropt, and the output power of the power amplifier circuit 33 is backed off by 6dB, that is, the output power of the power amplifier circuit 33 is one-fourth of the saturated output power. The power of the RF signal input to the power amplifier circuit 33 is relatively large, triggering the second power amplifier 332 to start working. As the power of the input RF signal continues to increase, the load impedance of the first power amplifier 331 decreases from 2Ropt to Ropt, and the second power amplifier 33 2 decreases from infinity (∞) to Ropt. The first power amplifier 331 remains in a pre-saturation state due to its high output voltage, the output voltage remains basically constant, and the output current increases with the increase of the power of the input RF signal. Therefore, the output power of the first power amplifier 331 increases with the increase of the power of the input RF signal. The output voltage of the second power amplifier 332 increases with the increase of the power of the input RF signal. Therefore, the output power of the second power amplifier 332 increases with the increase of the power of the input RF signal. The overall power amplification efficiency of the power amplifier circuit 33 can still be maintained at a high level.

[0092] It should be noted that at the power back-off point N, the output power of the power amplifier circuit 33 is one-fourth of the saturated output power. This is because, relative to the saturation of the first power amplifier 331 and the second power amplifier 332, at the power back-off point N, only the first power amplifier 331 is working, so the output power of the entire power amplifier circuit 33 is halved. Since the load impedance of the first power amplifier 331 is 2Ropt, which is twice the load impedance Ropt at saturation, the output power of the first power amplifier 331 is half of the saturated output power. The corresponding ratio of the output power of the first power amplifier at the power back-off point N is 0.5, which further halves the output power of the power amplifier circuit 33.

[0093] like Figure 6 middle" Figure 3 As shown in the power saturation point P of the power amplifier circuit "shown in the figure", when the power of the input RF signal continues to increase, so that the first power amplifier 331 and the second power amplifier 332 are both saturated, the load impedance of the first power amplifier 331 and the load impedance of the second power amplifier 332 are both Ropt, and the equivalent impedance of the combining point CON is Ropt / 2, and the overall power amplification efficiency of the power amplifier circuit 33 reaches the highest.

[0094] for Figure 6 Although the class B power amplifier or class AB power amplifier shown has the highest efficiency at the power saturation point P, when the power is backed off, the efficiency will drop significantly as the power back-off increases. Figure 3Compared with the class B power amplifier and the class AB power amplifier, the power amplifier circuit shown not only has the highest efficiency at the power saturation point P, but also has higher efficiency in power amplification in the entire MP section.

[0095] Although in an ideal state, for any frequency of the RF signal, the phase shift angle of the second RF signal by the second phase shift network 336 is the same as the phase shift angle of the first RF signal by the first phase shift network 334, so that the first RF signal and the second RF signal are combined in phase at the junction CON to maximize the output power. However, due to the different bias states of the first power amplifier 331 and the second power amplifier 332, the phase shift angles generated by the two power amplifiers are not exactly the same. At the junction CON, the phases of the first RF signal and the second RF signal are not completely aligned, and power will be lost. For example, Figure 7 It shows the phase difference (phase difference between output and input) introduced by the first power amplifier 331 at different output voltages (3.0V-3.3V) (ie corresponding to different powers) within the frequency band of 3.3GHz-4.2GHz for RF signals. Figure 8 It shows the phase difference (phase difference between output and input) introduced by the second power amplifier 332 at different output voltages (1.0V-1.3V) (ie corresponding to different powers) within the frequency band of 3.3GHz-4.2GHz for RF signals.

[0096] To this end, the power amplifier circuit provided in the embodiment of the present application achieves phase alignment of the two power amplifier output ends by connecting a capacitor in series at the output end of one power amplifier and adjusting the phase difference between the two power amplifier output ends through the capacitor.

[0097] like Fig. 9 As shown, the embodiment of the present application provides another power amplifier circuit. Figure 3 Based on the power amplifier circuit 33 shown, the power amplifier circuit 33 further includes a capacitor C01, which is a fixed capacitor or an adjustable capacitor. The output end of the first power amplifier 331 is electrically connected to the first end of the capacitor C01, and the second end of the capacitor C01 is electrically connected to the first end of the first phase shift network 334, that is, the capacitor C01 is connected in series between the output end of the first power amplifier 331 and the first phase shift network 334.

[0098] The capacitance value of capacitor C01 is obtained according to the phase difference between the first power amplifier 331 and the second power amplifier 332 in different bias states. Assuming that the phase difference between the second power amplifier 332 and the first power amplifier 331 is φ, the capacitance value of capacitor C01 is: C01=1 / (4π*f*tanφ*Ropt), f is the frequency of the RF signal, and Ropt is the load impedance of the first power amplifier 331 or the load impedance of the second power amplifier 332.

[0099] The function of capacitor C01 is: due to the different bias states of the first power amplifier 331 and the second power amplifier 332, the phase shifts generated by the two power amplifiers are not exactly the same. At the junction CON, the phases of the first RF signal and the second RF signal are not completely aligned, and power will be lost. Capacitor C01 can fine-tune the phase difference of the phase shifts generated by the two power amplifiers, which will not only not change the load impedance of the first power amplifier 331, but also make the phases of the first RF signal and the second RF signal at the junction CON more aligned, thereby improving the efficiency of power amplification.

[0100] like Fig.10 As shown, the first power amplifier 331, the second power amplifier 332, the power divider 335 and the second phase shift network 336 can be integrated in the chip. The capacitor C01, the matching network 333 and the first phase shift network 334 can be arranged on a substrate (such as a printed circuit board (PCB) or other carrier medium, etc.). The output end of the first power amplifier 331 is electrically connected to the first port P1 of the chip, and the first port P1 is electrically connected to the first end of the capacitor C01 through the first bonding wire K1 and the first microstrip line V1 on the substrate. The output end of the second power amplifier 332 is electrically connected to the second port P2 of the chip, and the second port P2 is electrically connected to the junction CON through the second bonding wire K2 and the second microstrip line V2 on the substrate. The advantage of this is that the first phase shift network 334 and the capacitor C01 are easier to debug and replace. On the contrary, if all the components are integrated in the chip, they will be solidified after the chip is processed and can no longer be debugged and replaced. Unless the chip is redesigned and re-printed, it will take more time and cost.

[0101] like Fig.11 As shown, the embodiment of the present application provides another power amplifier circuit. Figure 3 Based on the power amplifier circuit 33 shown, the power amplifier circuit 33 further includes a capacitor C02, which is a fixed capacitor or an adjustable capacitor. The output end of the second power amplifier 332 is electrically connected to the first end of the capacitor C02, and the second end of the capacitor C02 is electrically connected to the junction CON, that is, the capacitor C02 is connected in series between the output end of the second power amplifier 332 and the junction CON.

[0102] The capacitance value of capacitor C02 is obtained according to the phase difference between the first power amplifier 331 and the second power amplifier 332 in different bias states. Assuming that the phase difference between the first power amplifier 331 and the second power amplifier 332 is φ, the capacitance value of capacitor C02 is: C02=1 / (4π*f*tanφ*Ropt), f is the frequency of the RF signal, and Ropt is the load impedance of the first power amplifier 331 or the second power amplifier 332.

[0103] The function of capacitor C02 is: due to the different bias states of the first power amplifier 331 and the second power amplifier 332, the phase shifts generated by the two power amplifiers are not exactly the same. At the junction CON, the phases of the first RF signal and the second RF signal are not completely aligned, and power will be lost. Capacitor C02 can fine-tune the phase difference of the phase shifts generated by the two power amplifiers, which will not only not change the load impedance of the second power amplifier 332, but also make the phases of the first RF signal and the second RF signal at the junction CON more aligned, thereby improving the efficiency of power amplification.

[0104] like Fig.12 As shown, the first power amplifier 331, the second power amplifier 332, the power divider 335 and the second phase shift network 336 can be integrated in the chip. The capacitor C02, the matching network 333 and the first phase shift network 334 can be arranged on a substrate (e.g., a printed circuit board (PCB) or other carrier medium, etc.). The output end of the first power amplifier 331 is electrically connected to the first port P1 of the chip, the first port P1 is electrically connected to the first end of the first phase shift network 334 through the first bonding wire K1 and the first microstrip line V1 on the substrate, the output end of the second power amplifier 332 is electrically connected to the second port P2 of the chip, and the second port P2 is electrically connected to the first end of the capacitor C02 through the second bonding wire K2 and the second microstrip line V2 on the substrate. The advantage of this is that the first phase shift network 334 and the capacitor C02 are easier to debug and replace components. On the contrary, if all components are integrated in the chip, they will solidify after the chip is processed and cannot be debugged or replaced. Unless the chip is redesigned and re-printed, it will take more time and cost.

[0105] For example, Figure 13-Figure 15As shown, the PAE of the power amplifier circuit corresponds to the capacitor C02 of 2pF, 2.5pF, and 3pF respectively. Among them, the frequencies of the RF signals are 3.3GHz, 3.6GHz, 3.9GHz, and 4.2GHz respectively, and the output power of the power amplifier circuit ranges from 18dBm to 36dBm. At the 6dB power back-off point, the output power of the power amplifier circuit is 28dBm, the first power amplifier 331 works, and the second power amplifier 332 starts working. The PAE corresponding to different values ​​of capacitor C02 is slightly different. In the saturated state, the output power of the power amplifier circuit is 34dBm, and the PAE corresponding to different values ​​of capacitor C02 is more obvious, that is, capacitor C02 can change the efficiency of the power amplifier circuit in the saturated state.

[0106] like Fig.16 and Fig.17 As shown, in Fig.10 and Fig.12 On the basis of the power amplifier circuit 33 shown, it is assumed that the parasitic capacitance of the output end of the first power amplifier 331 to the ground is C11, the parasitic capacitance of the output end of the second power amplifier 332 to the ground is C12, the equivalent inductance of the first bonding wire is L11, the equivalent inductance of the first microstrip line is L12, the equivalent inductance of the second bonding wire is L21, and the equivalent inductance of the second microstrip line is L22. The equivalent inductance L11 of the first bonding wire and the equivalent inductance L12 of the first microstrip line can be used to offset the parasitic capacitance C11 of the first power amplifier 331, so that the load impedance of the first power amplifier 331 is a pure resistance Ropt, thereby improving the efficiency of the first power amplifier 331. The equivalent inductance L21 of the second bonding wire and the equivalent inductance L22 of the second microstrip line can be used to offset the parasitic capacitance C12 of the second power amplifier 332, so that the load impedance of the second power amplifier 332 is a pure resistance Ropt, thereby improving the efficiency of the second power amplifier 332.

[0107] It should be noted that, since the length and width of the first bonding wire and the second bonding wire are limited, the inductance values ​​of the equivalent inductance L11 of the first bonding wire and the equivalent inductance L21 of the second bonding wire are limited. By adjusting the length and width of the first microstrip line, the inductance value of the equivalent inductance L12 of the first microstrip line can be adjusted, thereby increasing the degree of freedom of adjustment of the inductance connected to the output end of the first power amplifier 331, and furthermore, the parasitic capacitance C11 of the first power amplifier 331 can be more flexibly offset. Similarly, by adjusting the length and width of the second microstrip line, the inductance value of the equivalent inductance L22 of the second microstrip line can be adjusted, thereby increasing the degree of freedom of adjustment of the inductance of the output end of the second power amplifier 332, and furthermore, the parasitic capacitance C12 of the second power amplifier 332 can be more flexibly offset.

[0108] Usually, during design, the first power amplifier 331 and the second power amplifier 332 have the same size, and in theory, C11=C12, L11=L21, and L12=L22. The optimal load impedance of the first power amplifier 331 can be obtained by performing a load-pull simulation on the first power amplifier 331, and the imaginary part of the optimal load impedance is the capacitance value of the parasitic capacitor C11. The optimal load impedance of the second power amplifier 332 can be obtained by performing a load-pull simulation on the second power amplifier 332, and the imaginary part of the optimal load impedance is the capacitance value of the parasitic capacitor C12.

[0109] Assuming that the first power amplifier 331 does not have parasitic capacitance C11, the optimal load impedance of the first power amplifier 331 is R1. When the first power amplifier 331 has parasitic capacitance C11, the load impedance R1 will be connected in parallel with the capacitance C11 to form a load impedance of 1 / (1 / R1+j*2π*f*C11), where f is the frequency of the RF signal. If the output end of the first power amplifier 331 is connected in series with the inductors L11 and L12, the optimal load impedance Ropt is formed, that is, the imaginary part of 1 / (1 / R1+j*2π*f*C11)+j*2π*f*(L11+L12) is 0. Then we have R opt = R 1 / [ 1 + ( 2 π * R 1 * f * C 11 ) 2 ] , L 1 1 + L 1 2 = R 1 2 * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] .

[0110] Similarly, assuming that the second power amplifier 332 does not have parasitic capacitance C12, the optimal load impedance of the second power amplifier 332 is R2. When the first power amplifier 331 has parasitic capacitance C12, the load impedance R2 will be connected in parallel with the capacitance C12 to form a load impedance of 1 / (1 / R2+j*2π*f*C12), where f is the frequency of the RF signal. If the output end of the second power amplifier 332 is connected in series with inductors L21 and L22, the optimal load impedance Ropt is formed, that is, the imaginary part of 1 / (1 / R2+j*2π*f*C12)+j*2π*f*(L21+L22) is 0. Then we have R opt = R 2 / [ 1 + ( 2 π * R 2 * f * C 11 ) 2 ] , L 2 1 + L 2 2 = R 2 2 * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] .

[0111] In addition, due to the certain distance between the chip and the device on the substrate, even when the lengths of the first bonding wire, the first microstrip line, the second bonding wire, and the second microstrip line are the shortest, that is, when the equivalent inductance L11, the equivalent inductance L21, the equivalent inductance L12, and the equivalent inductance L22 are the smallest, the sum of the inductance values ​​of the first bonding wire and the first microstrip line may be greater than the inductance value required to offset the parasitic capacitance C11 of the first power amplifier 331, for example L 1 1 + L 1 2 > R 1 2 * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , the parasitic capacitance C11 is over-compensated; there may also be a sum of the inductance values ​​of the second bonding wire and the second microstrip line, which is greater than the inductance value required to offset the parasitic capacitance C12 of the second power amplifier 332, for example L 2 1 + L 2 2 > R 2 2 * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , the parasitic capacitance C12 is overcompensated.

[0112] So if Fig.18 and Fig.19 As shown, in Fig.16 and Fig.17 On the basis of the power amplifier circuit 33 shown, the power amplifier circuit 33 also includes a capacitor C21 and a capacitor C22, and the capacitor C21 and the capacitor C22 can be arranged on the substrate. The second end of the first microstrip line (i.e., the other end not electrically connected to the first bonding wire) is electrically connected to the first end of the capacitor C21, and the second end of the capacitor C21 is grounded. The second end of the second microstrip line (i.e., the other end not electrically connected to the second bonding wire) is electrically connected to the first end of the capacitor C22, and the second end of the capacitor C22 is grounded. The capacitor C21 is used to neutralize the overcompensation of the parasitic capacitor C11 by the equivalent inductance L11 and the equivalent inductance L12, and the capacitor C22 is used to neutralize the overcompensation of the parasitic capacitor C12 by the equivalent inductance L21 and the equivalent inductance L22.

[0113] That is to say, when L 1 1 + L 1 2 > R 1 2 * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] When assuming that the first power amplifier 331 does not have a parasitic capacitor C11, the optimal load impedance of the first power amplifier 331 is R1. When the first power amplifier 331 has a parasitic capacitor C11, the load impedance R1 is connected in series with the equivalent inductance L11 and the equivalent inductance L12, and in parallel with the capacitor C11 to form an optimal load impedance a1+j*b1, where a 1 = R 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , b 1 = 2 π * f * ( L 1 1 + L 1 2 ) − 2 π * R 1 2 * f * C 1 1 / [ 1 + ( 2 π * R 1 * f * C 1 1 ) 2 ] , f is the frequency of the RF signal. When the output terminal of the first power amplifier 331 is connected in parallel with the capacitor C21, the optimal load impedance Ropt of the first power amplifier 331 is formed, that is, the imaginary part of 1 / [1 / (a1+j*b1)+j*2π*f*C21] is 0. Then R opt = a 1 / [ ( 2 π * f * C 2 1 * a 1 ) 2 + ( 1 − 2 π * f * C 2 1 b 1 ) 2 ] , C 2 1 = b 1 / [ 2 π * f * ( a 1 2 + b 1 2 ) ] .

[0114] Similarly, when L 2 1 + L 2 2 > R 2 2 * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] When the second power amplifier 332 does not have a parasitic capacitor C12, the optimal load impedance of the second power amplifier 332 is R2. When the second power amplifier 332 has a parasitic capacitor C12, the load impedance R2 is connected in series with the equivalent inductance L21 and the equivalent inductance L22, and in parallel with the capacitor C12 to form an optimal load impedance a2+j*b2, where: a 2 = R 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , b 2 = 2 π * f * ( L 2 1 + L 2 2 ) − 2 π * R 2 2 * f * C 1 2 / [ 1 + ( 2 π * R 2 * f * C 1 2 ) 2 ] , f is the frequency of the RF signal. When the output terminal of the second power amplifier 332 is connected in parallel with the capacitor C22, the optimal load impedance Ropt of the second power amplifier 332 is formed, that is, the imaginary part of 1 / [1 / (a2+j*b2)+j*2π*f*C22] is 0. Then R opt = a 2 / [ ( 2 π * f * C 2 2 * a 2 ) 2 + ( 1 − 2 π * f * C 2 2 b 2 ) 2 ] , C 2 2 = b 2 / [ 2 π * f * ( a 2 2 + b 2 2 ) ] .

[0115] The power amplifier circuit and electronic device provided in the embodiments of the present application, in a power amplifier circuit with power back-off, a capacitor is connected in series at the output end of a power amplifier, and the phase difference between the output ends of the two power amplifiers is adjusted by the capacitor to achieve phase alignment of the output ends of the two power amplifiers.

[0116] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0117] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one device or distributed on multiple devices. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0118] In addition, each functional module in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0119] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power amplifier circuit, characterized in that: include: A first capacitor, a first power amplifier, a second power amplifier, a matching network, a first phase-shifting network, a power divider, and a second phase-shifting network; a first output end of the power divider is electrically connected to an input end of the first power amplifier, a second output end of the power divider is electrically connected to a first end of the second phase-shifting network, and a second end of the second phase-shifting network is electrically connected to an input end of the second power amplifier; an output end of the first power amplifier is electrically connected to a first end of the first phase-shifting network, an output end of the second power amplifier is electrically connected to a first end of the first capacitor, and a second end of the first capacitor, a second end of the first phase-shifting network, and a first end of the matching network are electrically connected to a junction point; The first power amplifier, the second power amplifier, the power divider and the second phase shift network are integrated in a chip, and the first capacitor, the matching network and the first phase shift network are arranged on a substrate; the output end of the first power amplifier is electrically connected to a first port of the chip, and the first port is electrically connected to a first end of the first phase shift network through a first bonding wire and a first microstrip line on the substrate; the output end of the second power amplifier is electrically connected to a second port of the chip, and the second port is electrically connected to a first end of the first capacitor through a second bonding wire and a second microstrip line on the substrate; the equivalent inductance of the first bonding wire is L11, and the equivalent inductance of the first microstrip line is L12, , wherein C11 is the parasitic capacitance of the first power amplifier, R1 is the optimal load impedance of the first power amplifier when there is no parasitic capacitance, and f is the frequency of the RF signal.

2. The circuit according to claim 1, characterized in that The capacitance value of the first capacitor is 1 / (4π*f*tanφ*Ropt), φ is the phase difference between the first power amplifier and the second power amplifier, f is the frequency of the RF signal, and Ropt is the load impedance of the first power amplifier or the second power amplifier.

3. The circuit according to claim 1, characterized in that The equivalent inductance of the second bonding wire is L21, the equivalent inductance of the second microstrip line is L22, , wherein C12 is the parasitic capacitance of the second power amplifier, R2 is the optimal load impedance of the second power amplifier when there is no parasitic capacitance, and f is the frequency of the RF signal.

4. The circuit according to claim 3, characterized in that It also includes a third capacitor and a fourth capacitor, wherein the first end of the first microstrip line is electrically connected to the first bonding wire, the second end of the first microstrip line is electrically connected to the first end of the third capacitor, the second end of the third capacitor is grounded, the first end of the second microstrip line is electrically connected to the second bonding wire, the second end of the second microstrip line is electrically connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded.

5. The circuit according to claim 4, characterized in that The capacitance value of the third capacitor is C21, ,in, , , L11 is the equivalent inductance of the first bonding wire, L12 is the equivalent inductance of the first microstrip line, C11 is the parasitic capacitance of the first power amplifier, R1 is the optimal load impedance of the first power amplifier when there is no parasitic capacitance, and f is the frequency of the RF signal.

6. The circuit according to claim 4, characterized in that The capacitance value of the fourth capacitor is C22, ,in, , , L21 is the equivalent inductance of the second bonding wire, L22 is the equivalent inductance of the second microstrip line, C12 is the parasitic capacitance of the second power amplifier, R2 is the optimal load impedance of the second power amplifier when there is no parasitic capacitance, and f is the frequency of the RF signal.

7. The circuit according to claim 1 or 2, characterized in that: The first power amplifier is a class AB power amplifier, and the second power amplifier is a class C power amplifier or a class D power amplifier.

8. An electronic device, characterized in that: It comprises an antenna and a power amplifier circuit as described in any one of claims 1 to 7, wherein the power amplifier circuit is used to output a power-amplified radio frequency signal to the antenna.

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