A depletion-mode GaN HEMT device with a dual-gate structure and its application

Abstract

The present invention discloses a depletion-mode GaN HEMT device with a dual-gate structure and its application. The device has a first gate and a second gate, wherein the first gate is a main gate used to turn on or off the device; the second gate is located between the source and the first gate; the threshold voltages corresponding to the first gate and the second gate are both negative values, and the absolute value of the threshold voltage corresponding to the second gate is smaller than the absolute value of the threshold voltage corresponding to the first gate. The depletion-mode GaN HEMT device with a dual-gate structure can reduce the magnitude of overcurrent that can flow through itself and the circuit in which it is located. By adding the circuit structure in which the depletion-mode GaN HEMT device with a dual-gate structure is connected in series with a power device in a power electronic circuit, the depletion-mode GaN HEMT device will limit the magnitude of overcurrent flowing through the circuit structure, thereby improving the overcurrent protection capability of the power device.

Description

Technical Field

[0001] The present invention relates to a gallium nitride high electron mobility transistor, in particular to a depletion-mode gallium nitride high electron mobility transistor and an application thereof in improving overcurrent protection capability of a power device, and belongs to the technical field of semiconductor devices. Background Art

[0002] Gallium nitride (GaN) materials have a large bandgap and a high critical breakdown field strength, so GaN devices have a high voltage resistance. Based on the high-concentration, high-mobility two-dimensional electron gas (2DEG) conductive channel generated by the GaN material system, the GaN high electron mobility transistor (GaN HEMT) has the excellent characteristics of low conduction loss and high switching frequency. Therefore, GaN devices are usually used in high-voltage and high-frequency fields. Compared with silicon (Si) power conversion systems, GaN power conversion systems have higher power conversion efficiency, while reducing the weight and volume of the unit, thus forming a high power density system.

[0003] Overcurrent fault is a common fault event in power supply system. The causes of this fault include controller failure, mechanical and environmental stress, load transient change and magnetic component saturation. At this time, power devices usually work under high voltage and high current conditions, and the high heat generated in the process may completely damage the device.

[0004] In order to protect power devices from overcurrent, the current solution is generally to add an overcurrent protection circuit to the power conversion system. By quickly detecting the overcurrent flowing through the power device and stopping the current flowing through the power device, the power device is protected from overcurrent. Ohio State University designed a short-circuit protection circuit and proposed a three-step short-circuit protection scheme (X. Lyu, et al ., “A Reliable Ultrafast Short-CircuitProtection Method for E-Mode GaN HEMT,” in IEEE Transactions on PowerElectronics, vol. 35, no.9, pp. 8926-8933, Sept. 2020, doi: 10.1109 / TPEL.2020.2968865.). This scheme can quickly detect overcurrent faults, reduce the gate voltage of GaN HEMTs, and shut down the GaN HEMTs. Experimental results show that this scheme can shorten the overcurrent fault detection time of GaN HEMTs from 2 μs to tens of nanoseconds. However, the short-circuit protection circuit makes the design of the entire system more complicated.

[0005] A more direct and effective method is to directly reduce the overcurrent that can flow through power devices through the design of device structure. Transphorm proposed a method to partially remove the two-dimensional electron gas (2DEG) conductive channel under the gate in the device width direction (D. Bisi, et al.,"Short -circuit capability demonstratedfor GaN power switches,” APEC, Phoenix, AZ, USA, Jun. 2021, pp. 370–375, doi:10.1109 / APEC42165.2021.9486987.), ultimately extending the overcurrent fault tolerance time of GaN HEMT to 3μs. However, removing the 2DEG conductive channel under the gate by methods such as ion implantation will bring gate reliability issues, and this technology requires an increase in the on-resistance of the device (up to 35%).

[0006] Currently, there is an urgent need for a technical solution that can reduce the overcurrent of power devices, so as to achieve the purpose of improving the overcurrent protection capability of power devices. Summary of the invention

[0007] The purpose of the present invention is to provide a depletion-mode GaN HEMT device with a dual-gate structure, which can reduce the amount of overcurrent that can flow through the device and its circuit, thereby solving the problem that power devices in power electronic circuits are prone to performance degradation or even complete damage due to overcurrent failures.

[0008] To achieve the above technical objectives, in a first aspect of the present invention, a depletion-mode GaN HEMT device with a dual-gate structure is provided, the device having a first gate and a second gate, wherein the first gate is the main gate of the depletion-mode GaN HEMT and is used to turn on or off the device; the second gate is located between the source and the first gate; the threshold voltages corresponding to the first gate and the second gate are both negative values, that is, both are gates of depletion-mode devices, and the absolute value of the threshold voltage corresponding to the second gate is less than the absolute value of the threshold voltage corresponding to the first gate.

[0009] In some specific embodiments of the present invention, the depletion-mode GaN HEMT device with a dual-gate structure includes a substrate, and a buffer layer, a channel layer, and a barrier layer sequentially stacked on the substrate, the source and the drain are located on both sides of the active region on the barrier layer, the first gate and the second gate are located between the source and the drain, and the second gate is located between the source and the first gate.

[0010] In the above-mentioned depletion-mode GaN HEMT device with a dual-gate structure, the method of achieving that the absolute value of the threshold voltage corresponding to the second gate is smaller than the absolute value of the threshold voltage corresponding to the first gate may be one of the following methods:

[0011] (1) Add a dielectric layer under the first gate to weaken the depletion effect on 2DEG;

[0012] (2) Partially etching the barrier layer under the second gate to form an etched groove to help deplete the 2DEG;

[0013] (3) The second gate uses a metal with a larger work function than the first gate to help deplete the 2DEG;

[0014] (4) A dielectric layer with a larger dielectric constant than that of the dielectric layer under the first gate is used under the second gate to help deplete the 2DEG;

[0015] (5) A thinner dielectric layer is used under the second gate than the dielectric layer under the first gate to help deplete the 2DEG;

[0016] (6) Ion implantation, such as F and N ions, into the barrier layer below the second gate helps deplete the 2DEG.

[0017] Its working principle is as follows: when the first gate and the second gate of the depletion-type GaN HEMT with a dual-gate structure are both in the on state, as the drain voltage of the device increases, since the threshold voltages corresponding to the first gate and the second gate are both negative and the absolute value of the threshold voltage corresponding to the second gate is less than the absolute value of the threshold voltage corresponding to the first gate, the current pinch-off point will first be formed at the second gate, indicating that the depletion-type GaN HEMT has entered the current saturation region. Compared with the depletion-type GaN HEMT with a traditional gate structure, the depletion-type GaN HEMT with a dual-gate structure proposed in the present invention will reach current saturation faster, with lower saturation voltage and saturation current, and lower overcurrent flowing through the GaNHENT during an overcurrent fault. The design of the depletion-type GaN HEMT is conducive to improving the overcurrent protection capability of the device itself and other power devices in the power circuit where the device is located.

[0018] It is worth noting that the focus of the present invention is to propose a GaN HEMT device with a double depletion gate, and the absolute value of the threshold voltage corresponding to the second gate is less than the absolute value of the threshold voltage corresponding to the first gate. It can be understood that there may be other structures and other variations without departing from the scope of the present invention. Furthermore, different examples, structures and processes can be combined with each other to achieve the same purpose.

[0019] The present invention provides a depletion-type GaN HEMT device structure with a dual-gate structure. Figure 1As shown, including:

[0020] Substrate 1, which may be a Si substrate, a SiC substrate, a sapphire substrate or a GaN substrate;

[0021] The buffer layer 2, which can reduce the leakage current of the device and increase the breakdown voltage, can be a combination of one or more materials such as GaN, AlN, InGaN, AlGaN, InAlGaN, etc.;

[0022] A channel layer 3 providing an electronic conductive channel, which may be made of GaN, InGaN, AlGaN, InAlGaN, etc.;

[0023] The barrier layer 4 for generating two-dimensional electron gas through polarization effect can be a combination of one or more materials such as GaN, AlN, AlGaN, InGaN, InAlGaN, etc.;

[0024] GaN HEMT source 5;

[0025] GaN HEMT drain 6;

[0026] GaN HEMT first gate dielectric layer 7;

[0027] GaN HEMT first gate 8;

[0028] GaN HEMT second gate 9.

[0029] Note: One of the device structure designs of a depletion-type GaN HEMT with a dual-gate structure is provided here. The focus of the present invention is to require that the absolute value of the threshold voltage corresponding to the second depletion-type gate is smaller than the absolute value of the threshold voltage corresponding to the first depletion-type gate. Other device structure designs that meet this requirement are shown in specific embodiments.

[0030] In a second aspect of the present invention, a circuit application method of the depletion-mode GaN HEMT with a dual-gate structure is provided. A circuit structure in which a depletion-mode GaN HEMT with a dual-gate structure is connected in series with a power device is added to a power electronic circuit. The depletion-mode GaN HEMT with a dual-gate structure limits the magnitude of overcurrent flowing through the circuit structure, thereby improving the overcurrent protection capability of the power device.

[0031] In the specific circuit connection design, only V G,1 − V G,2 > V th,1 − V th,2Under the condition of , the conductive channel at the second gate of the depletion-mode GaN HEMT with a dual-gate structure will be pinched off before the first gate, wherein, V G,1 and V G,2 represent the voltages applied to the first gate and the second gate, respectively, V th,1 and V th,2 Represent the threshold voltages corresponding to the first gate and the second gate respectively. V G,1 and V G,2 Can be connected to a fixed voltage V fix,1 and V fix,2 , or connected to a built-in voltage point in the circuit, such as the source of the depletion-mode GaN HEMT with a dual-gate structure or the source of the power device such as an enhancement-mode transistor.

[0032] Taking the depletion-mode GaN HEMT with a dual-gate structure as an example, the circuit application of the depletion-mode GaN HEMT device with a dual-gate structure provided by the present invention is demonstrated. Figure 8 As shown, a depletion-mode GaN device with a dual-gate structure is connected in series with an enhancement-mode transistor, and the first gate and the second gate of the depletion-mode GaN HEMT device are connected to fixed voltages respectively. V fix,1 and V fix,2 . Selected V fix,1 and V fix,2 The voltage causes the electronic channel at the second gate of the depletion-mode GaN HEMT device to be pinched off first, thereby controlling the maximum on-state current of the device under high voltage and high current conditions such as hard switching, thereby achieving the purpose of overcurrent protection.

[0033] Note: Here is one circuit application of a depletion-mode GaN HEMT device with a dual-gate structure. The key point is that the electron channel at the second gate of the depletion-mode GaN HEMT device with a dual-gate structure is pinched off first, and its saturation current clamps the current of the entire circuit. Other device structure designs that meet this requirement are shown in specific embodiments.

[0034] Beneficial effects of the invention: The invention provides a depletion-mode GaN HEMT device with a dual-gate structure and a circuit application method thereof. The depletion-mode GaN HEMT with a dual-gate structure can reduce the magnitude of overcurrent that can flow through the device and its circuit, thereby improving the overcurrent protection capability of power devices in power electronic circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 . Embodiment 1 of the present invention provides a device structure of a depletion-mode GaN HEMT device with a dual-gate structure.

[0036] Figure 2 . A second embodiment of the present invention provides a device structure of a depletion-mode GaN HEMT device with a dual-gate structure.

[0037] Figure 3 . A device structure of a depletion-mode GaN HEMT device with a dual-gate structure is provided in a third embodiment of the present invention.

[0038] Figure 4 . A fourth embodiment of the present invention provides a device structure of a depletion-mode GaN HEMT device with a dual-gate structure.

[0039] Figure 5 . A device structure of a depletion-mode GaN HEMT device with a dual-gate structure is provided in a fifth embodiment of the present invention.

[0040] Figure 6 . Embodiment 6 of the present invention provides a device structure of a depletion-mode GaN HEMT device with a dual-gate structure.

[0041] Figure 7 . Embodiment 7 of the present invention provides a device structure of a depletion-mode GaN HEMT device with a dual-gate structure.

[0042] Figure 8 . Embodiment 8 of the present invention provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure.

[0043] Fig. 9 . A circuit application of a depletion-mode GaN HEMT device with a dual-gate structure provided in a ninth embodiment of the present invention.

[0044] Fig.10 . A circuit application of a depletion-mode GaN HEMT device with a dual-gate structure provided in a tenth embodiment of the present invention.

[0045] Fig.11 . The circuit application of a depletion-mode GaN HEMT device with a dual-gate structure provided in the eleventh embodiment of the present invention.

[0046] Fig.12 . A circuit application of a depletion-mode GaN HEMT device with a dual-gate structure provided in the twelfth embodiment of the present invention.

[0047] Fig.13 . A circuit application of a depletion-mode GaN HEMT device with a dual-gate structure provided in the thirteenth embodiment of the present invention. DETAILED DESCRIPTION

[0048] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0049] Embodiment 1

[0050] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 1 As shown, it includes: a substrate 1, a buffer layer 2, a channel layer 3, a barrier layer 4, a GaN HEMT source 5; a GaN HEMT drain 6; a GaN HEMT first gate dielectric layer 7; a GaN HEMT first gate 8; and a GaN HEMT second gate 9. The first gate 8 forms an MIS contact with the barrier layer 4, and the second gate 9 forms a Schottky contact with the barrier layer 4.

[0051] A two-dimensional electron gas (2DEG) conductive channel naturally exists between the barrier layer 4 and the channel layer 3 . The first gate 8 and the second gate 9 are both depletion gates, and their threshold voltages are negative.

[0052] The density of 2DEG is related to the thickness of the barrier layer 4. The thinner the barrier layer 4 is, the less 2DEG there is underneath it. There is a work function difference between the gate metal and the semiconductor. Depending on the size of the work function difference, the depletion ability of 2DEG is also different. Assuming that the first gate 8 and the second gate 9 are of the same metal and have the same work function, when the first gate dielectric layer 7 is added under the first gate 8, part of the work function difference between the first gate 8 and the semiconductor will fall on the first gate dielectric layer 7, weakening the depletion effect on 2DEG, so the absolute value of the threshold voltage corresponding to the first gate 8 is greater than the absolute value of the threshold voltage corresponding to the second gate 9.

[0053] In embodiment 1, the first gate 8 and the second gate 9 may also be made of metals with different work functions, wherein the metal work function of the first gate 8 is smaller and the depletion effect on 2DEG is weaker, so the first gate 8 needs to apply a more negative gate voltage to completely deplete 2DEG, that is, the threshold voltage corresponding to the first gate 8 is more negative and the absolute value of the threshold voltage is larger.

[0054] Embodiment 2

[0055] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 2 As shown, the second gate 9 of this embodiment is located in the etched groove formed by the barrier layer 4 .

[0056] Etching a groove in the barrier layer 4 can help deplete the 2DEG in this area. By etching a groove in the barrier layer 4 below the second gate 9, the 2DEG in this area is reduced, and the negative gate voltage required to completely deplete the 2DEG here is smaller, that is, the absolute value of the threshold voltage is smaller.

[0057] Other structures and effects are consistent with those of the first embodiment.

[0058] Embodiment 3

[0059] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 3 As shown, the second gate 9 of this embodiment is separated from the barrier layer 4 by a second gate dielectric layer 10, and a MIS contact is formed between the first gate 8 and the barrier layer 4. Compared with the first gate dielectric layer 7 of the GaN HEMT, the second gate dielectric layer 10 can be made of a thinner dielectric layer of the same material, or a dielectric layer material with a larger dielectric constant.

[0060] Other structures and effects are consistent with those of the first embodiment.

[0061] Embodiment 4

[0062] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 4 As shown, the second gate 9 and the second gate dielectric layer 10 of this embodiment are located in the etched groove formed by the barrier layer 4 .

[0063] Other structures and effects are consistent with those of the third embodiment.

[0064] Embodiment 5

[0065] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 5 As shown, the barrier layer 4 below the second gate 9 of this embodiment has been ion implanted.

[0066] By performing ion implantation with lower energy and dosage in the barrier layer below the second gate 9 , the 2DEG is partially depleted, so that the absolute value of the threshold voltage corresponding to the second gate 9 is smaller.

[0067] Other structures and effects are consistent with those of the first embodiment.

[0068] Embodiment 6

[0069] The structure of a depletion-mode GaN HEMT device with a dual-gate structure provided in this embodiment is as follows: Figure 6 As shown, the second gate 9 of this embodiment is separated from the barrier layer 4 by a p-type GaN layer 11 , and the p-type GaN layer does not completely deplete the two-dimensional electron gas between the barrier layer 4 and the channel layer 3 .

[0070] Other structures and effects are consistent with those of the first embodiment.

[0071] Embodiment 7

[0072] In the depletion-type GaN HEMT device with a dual-gate structure provided in this embodiment, a Schottky contact is formed between the first gate 8 and the barrier layer 4, and the GaN HEMT first gate dielectric layer 7 is not included in the device structure. The structure of the second gate 9 region in this embodiment can adopt any one of the second embodiment, the fifth embodiment and the sixth embodiment. Figure 7 Take this as an example to illustrate: Figure 7 The first gate 8 and the second gate 9 may be made of metals with different work function sizes, wherein the metal work function of the first gate 8 is smaller, the depletion effect on 2DEG is weaker, and the absolute value of the threshold voltage is larger.

[0073] Other structures and effects are consistent with those of the first embodiment.

[0074] Embodiment 8

[0075] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Figure 8 As shown, a depletion-mode GaN HEMT device with a dual-gate structure is connected in series with an enhancement-mode transistor, and the first gate and the second gate of the depletion-mode GaN HEMT device are connected to fixed voltages respectively. V fix,1 and V fix,2 . Selected V fix,1 and V fix,2 The voltage causes the electronic channel at the second gate of the depletion-mode GaN HEMT device to be pinched off first, thereby controlling the maximum on-state current of the device under high voltage and high current conditions such as hard switching, thereby achieving the purpose of overcurrent protection. Specifically, V fix,1 and V fix,2 Can be positive, 0V, negative, and V th,1 and V th,2 are all negative values. Vfix,1 − V fix,2 > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0076] The depletion-mode GaN HEMT device with a dual-gate structure in this embodiment may adopt any device structure of Embodiments 1 to 7.

[0077] Embodiment 9

[0078] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Fig. 9 As shown, the first gate of the depletion-mode GaN HEMT device is connected to a fixed voltage V fix,1 , the second gate is connected to its source ( Fig. 9 (a)) or connected to the source of an enhancement mode transistor ( Fig. 9 (b)).

[0079] Other structures and effects are consistent with those of the eighth embodiment.

[0080] for Fig. 9 In the case shown in (a), the gate voltage of the second gate of the depletion-mode GaN HEMT is V DS,E (Enhancement mode transistor V DS ). So when V fix,1 − V DS,E > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0081] for Fig. 9 In the case shown in (b), the gate voltage of the second gate of the depletion-mode GaN HEMT is 0 V. Therefore, when V fix,1 – 0 V> V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0082] Embodiment 10

[0083] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Fig.10 As shown, the first gate of the depletion-mode GaN HEMT device of this embodiment is connected to the source of the enhancement-mode transistor, and the second gate is connected to the source of the enhancement-mode transistor ( Fig.10 (a)) or connected to the source of an enhancement mode transistor ( Fig.10 (b)).

[0084] Other structures and effects are consistent with those of the eighth embodiment.

[0085] for Fig.10 In the case shown in (a), the gate voltage of the first gate of the depletion-mode GaN HEMT is 0 V, and the gate voltage of the second gate is V DS,E (Enhancement mode transistor V DS ). So when 0 V− V DS,E > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0086] for Fig.10 In the case shown in (b), the gate voltage of the first gate of the depletion-mode GaN HEMT is 0 V, and the gate voltage of the second gate is also 0 V. Therefore, when 0 V−0 V> V th,1 − V th,2 When (this condition must be met), the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0087] Embodiment 11

[0088] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Fig.11 As shown, the second gate of the depletion-mode GaN HEMT device of this embodiment is connected to a fixed voltage V fix,2 , the first gate is connected to the source of the enhancement mode transistor.

[0089] Other structures and effects are consistent with those of the eighth embodiment.

[0090] The gate voltage of the first gate of the depletion-mode GaN HEMT is 0 V, and the gate voltage of the second gate isV fix,2 So when 0 V− V fix,2 > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0091] Embodiment 12

[0092] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Fig.12 As shown, the first gate of the depletion-mode GaN HEMT device of this embodiment is connected to the gate of the enhancement-mode transistor, and the second gate is connected to the source of the depletion-mode GaN HEMT device ( Fig.12 (a)) or connected to the source of an enhancement mode transistor ( Fig.12 (b)).

[0093] Other structures and effects are consistent with those of the eighth embodiment.

[0094] for Fig.12 In the case shown in (a), the gate voltage of the first gate of the depletion-mode GaN HEMT is V GS,E (Enhancement mode transistor V GS ), the gate voltage of the second gate is V DS,E (Enhancement mode transistor V DS ). So when V GS,E − V DS,E > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0095] for Fig.12 In the case shown in (b), the gate voltage of the first gate of the depletion-mode GaN HEMT is V GS,E (Enhancement mode transistor V GS ), the gate voltage of the second gate is 0 V. So when V GS,E > V th,1 −V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0096] Embodiment 13

[0097] This embodiment provides a circuit application of a depletion-mode GaN HEMT device with a dual-gate structure, such as Fig.13 As shown, in this embodiment, a capacitor is added between the first gate of the depletion-mode GaN HEMT device and the gate of the enhancement-mode transistor, and a diode is added between the first gate and the source of the enhancement-mode transistor. The second gate of the depletion-mode GaN HEMT device is connected to its source ( Fig.13 (a)) or connected to the source of an enhancement mode transistor ( Fig.13 (b)).

[0098] Other structures and effects are consistent with those of the eighth embodiment.

[0099] for Fig.13 In the case shown in (a), the gate voltage of the first gate of the depletion-mode GaN HEMT is V ON (the conduction voltage drop of the diode), the gate voltage of the second gate is V DS,E (Enhancement mode transistor V DS ). So when V ON − V DS,E > V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0100] for Fig.13 In the case shown in (b), the gate voltage of the first gate of the depletion-mode GaN HEMT is V ON (the conduction voltage drop of the diode), the gate voltage of the second gate is 0 V. So when V ON – 0 V> V th,1 − V th,2 When the conductive channel at the second gate of the depletion-mode GaN HEMT is pinched off before the conductive channel at the first gate.

[0101] It should be noted that the purpose of publishing the embodiments is to further help understand the connotation and extension of the present invention, but those skilled in the art can understand that various substitutions and modifications are possible without departing from the scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the contents disclosed in the embodiments, and the scope of protection claimed by the present invention shall be subject to the scope defined in the claims.

Claims

1. A circuit application method of a depletion-mode GaN HEMT device having a dual-gate structure, wherein the depletion-mode GaN HEMT device has a first gate and a second gate, wherein: The first gate is a main gate used to turn on or off the device; the second gate is located between the source and the first gate; the threshold voltages corresponding to the first gate and the second gate are both negative values, that is, both are gates of depletion-type devices, and the absolute value of the threshold voltage corresponding to the second gate is smaller than the absolute value of the threshold voltage corresponding to the first gate; a circuit structure in which the depletion-type GaN HEMT device with a dual-gate structure is connected in series with a power device is added to a power electronic circuit, and the depletion-type GaN HEMT device with a dual-gate structure will limit the size of the overcurrent flowing through the circuit structure, thereby improving the overcurrent protection capability of the power device.

2. The circuit application method according to claim 1, characterized in that: The depletion-mode GaN HEMT device comprises a substrate, and a buffer layer, a channel layer and a barrier layer sequentially stacked on the substrate, a source and a drain are located on both sides of an active region on the barrier layer, a first gate and a second gate are located between the source and the drain, wherein the second gate is located between the source and the first gate.

3. The circuit application method according to claim 1, characterized in that: The depletion-mode GaN HEMT device realizes that the absolute value of the threshold voltage corresponding to the second gate is smaller than the absolute value of the threshold voltage corresponding to the first gate by one of the following methods: 1) Add a dielectric layer under the first gate; 2) Partially etching the barrier layer below the second gate to form an etching groove; 3) The second gate uses a metal with a larger work function than the first gate; 4) A dielectric layer with a larger dielectric constant than that of the dielectric layer under the first gate is used under the second gate; 5) A dielectric layer thinner than the dielectric layer under the first gate is used under the second gate; 6) Perform ion implantation into the barrier layer below the second gate.

4. The circuit application method according to claim 1, characterized in that: The circuit structure satisfies V G,1 − V G,2 > V th,1 − V th,2 Under the condition that the conductive channel at the second gate of the depletion-mode GaN HEMT device with a dual-gate structure is pinched off before the first gate; wherein, V G,1 and V G,2 represent the voltages applied to the first gate and the second gate, respectively, V th,1 and V th,2 Represent the threshold voltages corresponding to the first gate and the second gate respectively.

5. The circuit application method according to claim 4, characterized in that: The power device is an enhancement mode transistor, and the first gate and the second gate of the depletion mode GaN HEMT device with a double gate structure are connected to fixed voltages respectively. V fix,1 and V fix,2 ,make V fix,1 − V fix,2 > V th,1 − V th,2 .

6. The circuit application method according to claim 4, characterized in that: The power device is an enhancement mode transistor, and the first gate of the depletion mode GaN HEMT device with a double gate structure is connected to a fixed voltage V fix,1 , the second gate is connected to its source or to the source of the enhancement transistor; or the second gate of the depletion-mode GaN HEMT device with a dual-gate structure is connected to a fixed voltage V fix,2 , the first gate is connected to the source of the enhancement mode transistor.

7. The circuit application method according to claim 4, characterized in that: The power device is an enhancement mode transistor. The first gate of the depletion mode GaN HEMT device with a double gate structure is connected to the source of the enhancement mode transistor, and the second gate is connected to the source thereof or to the source of the enhancement mode transistor.

8. The circuit application method according to claim 4, characterized in that: The power device is an enhancement mode transistor. The first gate of the depletion mode GaN HEMT device with a double gate structure is connected to the gate of the enhancement mode transistor, and the second gate is connected to its source or to the source of the enhancement mode transistor.

9. The circuit application method according to claim 4, characterized in that: The power device is an enhancement-mode transistor, a capacitor is added between the first gate of the depletion-mode GaN HEMT device with a dual-gate structure and the gate of the enhancement-mode transistor, and a diode is added between the first gate and the source of the enhancement-mode transistor in parallel; the second gate of the depletion-mode GaN HEMT device with a dual-gate structure is connected to its source or to the source of the enhancement-mode transistor.

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