Image display method and device, laser projection equipment and storage medium

Abstract

The embodiment of the application discloses an image display method and device, a laser projection equipment and a storage medium, and belongs to the image field. In the embodiment of the application, a first time period for loading data of a to-be-displayed image for a target micro-mirror unit group is within an allowed reset display time period of a first micro-mirror unit group. That is, for any micro-mirror unit group, the allowed reset display time of other micro-mirror unit groups that are displaying data can be used for data loading, so as to reduce the time occupancy of data loading in the image display process, thereby shortening the time length required for image display and improving the frame frequency of image display.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese patent applications filed on March 9, 2022, application number 202210226688.X, and on March 28, 2022, application number 202210314704.0, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of images, and in particular to an image display method, apparatus, laser projection device, and storage medium. Background Technology

[0004] A Digital Micromirror Device (DMD) is one of the main components of a projection system. A DMD consists of a micromirror unit array, which comprises multiple micromirror units, each corresponding to a pixel. By controlling the binary grayscale value loaded in the storage unit within each micromirror unit, the "on" or "off" state of each micromirror unit during the display of one frame of an image, as well as the duration of its "on" or "off" state, can be controlled. This controls the grayscale value of each pixel in the displayed image, thereby achieving image display.

[0005] In related technologies, to ensure that the next bit plane data is loaded for each micromirror unit (MMU) during the display of current data, so that each MMU can immediately reset and display based on the loaded data after displaying the current data, the control device typically controls all MMUs to reset and display based on the loaded data after loading all data once. Since the allowed display time for each MMU is determined by the bit plane of the loaded data, the reset and display time for data corresponding to the lower bits is shorter. Therefore, in practical applications, it often happens that a MMU that loaded data earlier has already completed its reset and display and needs to load the next data. While waiting for the next data to load, this MMU continues to display, causing its display time to exceed the allowed display time and affecting the image display quality. Summary of the Invention

[0006] The embodiment of the present application provides a kind of image display method, the method comprises: determining the bit plane corresponding to target micro-mirror cell group in micro-mirror cell array, and the display duration of each bit plane, wherein the micro-mirror cell array includes multiple micro-mirror cell groups, each micro-mirror cell group includes multiple micro-mirror cells, and the target micro-mirror cell group is the micro-mirror cell group currently loaded data in the multiple micro-mirror cell groups;Display the data of the image to be displayed in each micro-mirror cell of the target micro-mirror cell group based on the display duration of each bit plane;Wherein, the first period for loading the data of the image to be displayed for the target micro-mirror cell group is in the allowed reset display period of the first micro-mirror cell group, and the first micro-mirror cell group is the micro-mirror cell group currently displaying data in the multiple micro-mirror cell groups.

[0007] The embodiment of the present application provides an image display device, the device comprises: a processor;Memory for storing processor executable instructions;Wherein, the processor executes the executable instructions in the memory to execute any of the above image display methods.

[0008] The embodiment of the present application provides a laser projection equipment, including light source, optical machine, lens and control device, the optical machine includes digital micro-mirror device DMD, and the control device is used to control the DMD to execute the steps of any of the above image display methods.

[0009] The embodiment of the present application provides a computer readable storage medium, the storage medium stores computer program, and the computer program is executed by computer to realize the steps of any of the above image display methods.

[0010] The embodiment of the present application provides a computer program product containing instructions, when it runs on computer, makes computer execute the steps of any of the above image display methods. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 It is the architecture diagram of the display system involved in the image display method provided by the embodiment of the present application;

[0012] Figure 2 It is the structure schematic diagram of the laser projection equipment provided by the embodiment of the present application;

[0013] Figure 3 It is the circuit architecture schematic diagram of the laser projection equipment provided by the embodiment of the present application;

[0014] Figure 4 It is the circuit architecture schematic diagram of the three-color laser projection equipment provided by the embodiment of the present application;

[0015] Figure 5 It is the structure schematic diagram of the micro-mirror cell provided by the embodiment of the present application;

[0016] Figure 6 is a schematic diagram of a gray scale data loading method provided by an embodiment of the present application;

[0017] Figure 7 is a flowchart of an image display method provided by an embodiment of the present application;

[0018] Figure 8 is a schematic diagram of a data loading display method provided by an embodiment of the present application;

[0019] Figure 9 is a flowchart of an image display method provided by an embodiment of the present application;

[0020] Figure 10 is a schematic diagram of a data loading method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical scheme and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0022] Before the embodiments of the present application are explained in detail, the system architecture involved in the embodiments of the present application will be introduced.

[0023] Figure 1 is an architecture diagram of a display system involved in an image display method provided by an embodiment of the present application. As shown in Figure 1 , the display system includes a light source 100, an optical engine 200, a lens 300 and a control device 400, the optical engine 200 includes a DMD 201. The DMD 201 includes a micro mirror unit array, the micro mirror unit array includes a plurality of micro mirror units, and each micro mirror unit can reflect a light beam incident to its surface.

[0024] The control device 400 can divide the micro mirror unit array into a plurality of micro mirror unit groups, and determine a target micro mirror unit group from the plurality of micro mirror unit groups, then determine the bit planes corresponding to the target micro mirror unit group and the display time length of each bit plane, wherein the target micro mirror unit group is the micro mirror unit group whose data is currently to be loaded in the plurality of micro mirror unit groups. Then, based on the display time length of each bit plane, display the data of the image to be displayed in each micro mirror unit of the target micro mirror unit group; wherein the first time period for loading the data of the image to be displayed for the target micro mirror unit group is within the allowed reset display time period of the first micro mirror unit group, and the first micro mirror unit group is the micro mirror unit group whose data is currently being displayed in the plurality of micro mirror unit groups.

[0025] The light beam emitted by the light source 100 can be incident on the surface of each micro-mirror unit included in the micro-mirror unit array after being refracted and / or reflected by the optical machine 200. When the micro-mirror unit is in the "on" state, the light beam incident thereon can be reflected to the lens 300. When the micro-mirror unit is in the "off" state, the light beam incident thereon can be reflected to other directions, so that the reflected light beam cannot be incident on the lens 300. In this way, the control device 400 can control the length of time for which the light beam reflected by the micro-mirror unit to the lens 300 by controlling the "on" or "off" state of each micro-mirror unit and the length of time for which the micro-mirror unit is in the "on" or "off" state, thereby controlling the gray value of each pixel point in the displayed image.

[0026] The control device 400 can be a control chip capable of controlling the DMD 201, or can be other hardware devices capable of controlling the DMD 201, and the embodiments of the present application do not limit the same.

[0027] In addition, Figure 1 The devices in the display system shown are only exemplary devices given by the embodiments of the present application. In some possible cases, the display system can further include other devices such as a light absorber, a digital image processor, and the like, and the embodiments of the present application do not repeat the same.

[0028] Exemplarily, the display system is taken as a laser projection device, Figure 2 is a schematic diagram of a laser projection device provided by the embodiments of the present application. As shown in Figure 2 After the upper shell of the laser projection device is disassembled, the internal structure is divided according to the optical function, and can include a light source 100, an optical machine 200, a lens 300, and a control device 400. The light source 100 is used to provide a light source illumination light beam, which is transmitted to a rear-end light modulation device and a lens. The light source 100 can include at least one color laser, such as a blue laser, or can be a dual-color laser, such as a blue laser and a red laser, or can be a three-color laser light source, including red, green, and blue lasers, for providing a three-color laser illumination light beam.

[0029] The laser light beam provided by the light source 100 is incident on the illumination light path portion in the optical machine 200 after being combined and shaped. In the Digital Light Processing (DLP) projection architecture, the DMD chip is a core light modulation device. The DMD chip receives a driving control signal corresponding to an image signal, flips the corresponding driving signal by thousands of micro-mirrors on its surface by a positive angle or a negative angle, and reflects the light beam irradiated on its surface into the lens 300.

[0030] The lens 300 can be an ultra-short-focus projection lens, which is used to project an image light beam onto a projection screen to realize projection image display. The laser projection device in the above example can be an ultra-short-focus laser projection device.

[0031] Based on the above Figure 2 The laser projection device structure in the example, Figure 3 A circuit architecture schematic diagram of a laser projection device in an embodiment is shown.

[0032] As Figure 3 shown, the laser projection device includes a display panel 001, a power panel 002, and a TV panel 003. The power panel 002 is connected to the display panel 001 and the TV panel 003, and can be used to supply power to each device or partial module on the display panel 001 and the TV panel 003. In addition, the power panel 002 can also supply power to other functional modules in the laser projection device, such as an eye protection module, a fan, a WIFI module, etc., to ensure normal power supply of each part of the laser projection device. In some specific implementations, a laser driver circuit can also be arranged on the power panel 002. Alternatively, the laser driver circuit can also be arranged independently of the power panel 002.

[0033] The TV panel 003 is mainly used for decoding external audio and video signals.

[0034] The TV panel 003 is provided with a system on chip (SoC), which can decode data in different data formats into a normalized format, and transmit the data in the normalized format to the display panel 001 through, for example, a connector.

[0035] The video image signal output by the TV panel 003 is transmitted to the display panel 001.

[0036] The display panel 001 can be provided with a field programmable gate array (FPGA), and an algorithm processing module FPGA (which can also not be provided, and is mainly used for image correction or image decomposition processing, and can not be provided when this function is not needed). The FPGA is used to process the input video image signal, such as performing MEMC frequency multiplication processing, or image correction, etc. to realize image enhancement functions. The projection display control processing unit 010 is connected to the algorithm processing module FPGA, and is used to receive the processed video image processing signal data as image data to be displayed. It should be noted that the FPGA usually exists as an enhancement function module, and in some low-cost solutions, the module part can also not be provided, but the projection display control processing unit 010 receives the video image display signal output by the TV panel 003.

[0037] The projection display control processing unit 010 mainly includes a DLP, and can also include a driving chip.

[0038] In the DLP control architecture, the light source part needs to cooperate with the working timing of the DLP chip and the DMD chip. Specifically, the DLP chip outputs an image enable signal, which can also be called a primary color light enable signal, usually represented as X_EN, X being the abbreviation of different primary color lights, and also outputs a brightness adjustment signal, simply referred to as a pulse width modulation (PWM) signal. With the timing modulation process of the DMD chip for different primary color image components, the light source part needs to synchronously output the corresponding color primary light beam. That is, the DLP chip outputs a primary color light enable signal to inform the laser light source to enable the lighting of a certain color laser, and outputs a PWM signal to inform the laser light source to light a certain laser with a certain brightness.

[0039] Corresponding to Figure 3 As shown in the figure, the projection display control processing unit 010 is used to generate a modulation driving signal for driving the light modulating device (DMD) according to the display image signal, and on the other hand, due to the display of the projection image, the synchronous cooperation of the light source beam and the light modulating device is required, and the projection display control processing unit 010 also generates a driving signal for driving the light source to emit light, which can be called an initial driving signal, including two specific driving signals, an image enable signal EN and a current PWM signal. The image enable signal EN is a timing control signal used to coordinate the timing of different color light output, and the current PWM signal is a square wave signal used to provide a current signal for laser lighting.

[0040] And, Figure 3 As shown in the schematic diagram of the circuit architecture of the laser projection device, it also includes a laser driving circuit 030 for receiving the image enable signal EN and the current PWM signal output by the projection display control processing unit 010, and specifically controlling the lighting of the laser 040.

[0041] In the figure, the laser 040 can be a laser of one color, or a laser of multiple colors. Generally, a corresponding laser driving circuit 030 is provided for each color of laser.

[0042] In an example, the laser projection device can be a three-color laser projection device, including red, green, and blue lasers. Figure 4 A schematic diagram of the circuit structure of a three-color laser projection device is shown. As Figure 4 As shown, the projection display control processing unit 010 in Figure 3 Figure 4 ​The DLP master control processing unit 010a and the DLP slave control processing unit 010b can be two DLP control chips, and can be divided according to the specific circuit function division requirement, and are not specifically limited. The DLP master control processing unit 010a and the DLP slave control processing unit 010b receive data output of the algorithm processing module FPGA, and are connected with the light modulation device (DMD).

[0043] In addition, in the example shown in FIG. 4, the DLP master control processing unit 010a outputs an image enable signal EN and a current PWM signal for driving the laser. Figure 4

[0044] In addition, in the example shown in FIG. 4, the DLP master control processing unit 010a outputs an image enable signal EN and a current PWM signal for driving the laser. Figure 4

[0045] In addition, in the example shown in FIG. 4, the DLP master control processing unit 010a outputs an image enable signal EN and a current PWM signal for driving the laser.

[0046] The laser 040 can include three groups of lasers of different colors, which are a blue laser 401 for emitting blue laser light, a red laser 402 for emitting red laser light, and a green laser 403 for emitting green laser light. Each of the above lasers can be a multi-chip laser (MCL).

[0047] The three-color laser can be a light-emitting unit independently packaged, such as three groups of MCL type lasers, or a multi-color chip packaged in a light-emitting unit, such as an MCL type laser provided with multiple rows of light-emitting chips of different colors. The above different light-emitting units can output three-color laser light.

[0048] In the embodiment of the present application, the micro-mirror unit is based on the data stored in the CMOS (Complementary Metal Oxide Semiconductor) to make itself in a light-on state or a light-off state, and the specific process is as follows:

[0049] Referring to FIG. 5, the DMD 201 includes a micro-mirror unit array, and the structure of any micro-mirror unit in the micro-mirror unit array is as shown in FIG. 6. Figure 5 Figure 5 ​​​As shown, the micromirror unit includes a micromirror 2011, a connecting layer 2012, a metal layer 2013, and a CMOS layer 2014. The micromirror 2011 is provided with a support column on the bottom surface thereof; the connecting layer 2012 includes a yoke plate 20121, a hinge 20122, a first hinge support column 20123, a second hinge support column 20124, a first addressing electrode 20125, and a second addressing electrode 20126; the metal layer 2013 includes a first landing platform 20131, a second landing platform 20132, a first addressing metal plate 20133, a second addressing metal plate 20134, a first reset bias electrode 20135, and a second reset bias electrode 20136; and the CMOS layer 2014 includes CMOS1 and CMOS2. The micromirror 2011 is connected to the yoke plate 20121 of the connecting layer 2012 through the support column on the bottom surface thereof, the yoke plate 20121 is fixed on the hinge 20122, one end of the hinge 20122 is connected to the first hinge support column 20123, and the other end thereof is connected to the second hinge support column 20124. The first hinge support column 20123 is connected to the first reset bias electrode 20135, the second hinge support column 20124 is connected to the second reset bias electrode 20136, the first addressing electrode 20125 is connected to one end of the first addressing metal plate 20133, the other end of the first addressing metal plate 20133 is connected to the CMOS1, the second addressing electrode 20126 is connected to one end of the second addressing metal plate 20134, and the other end of the second addressing metal plate 20134 is connected to the CMOS2.

[0050] The first reset bias electrode 20135, the second reset bias electrode 20136, the first hinge support column 20123, the second hinge support column 20124, the hinge 20122, the yoke plate 20121, and the micromirror 2011 included in the micromirror unit can conduct electricity, and thus the control device 400 can control the voltage on the micromirror 2011 by loading a bias voltage or a reset voltage on the first reset bias electrode 20135 or the second reset bias electrode 20136, wherein the bias voltage is a positive voltage, for example, 18V, and the reset voltage is a negative voltage, for example, -14V.

[0051] As can be seen from the above description, one end of the first addressing metal plate 20133 is connected with the CMOS 1, and the other end is connected with the first addressing electrode 20125. Based on this, the control device 400 can load data into the CMOS 1, so that the CMOS 1 controls the voltage on the first addressing metal plate 20133 to be the first voltage or zero based on the loaded data. The first voltage is a positive voltage, for example, 5V. When the binary number loaded into the CMOS 1 by the control device 400 is 1, the CMOS 1 controls the voltage on the first addressing metal plate 20133 to be the first voltage. At this time, the voltage on the first addressing electrode 20125 is also the first voltage. When the data loaded into the CMOS 1 by the control device 400 is 0, the CMOS 1 controls the voltage on the first addressing metal plate 20133 to be zero. At this time, the voltage on the first addressing electrode 20125 is also zero.

[0052] In addition, in the micromirror unit in the embodiment of the present application, the data loaded in the CMOS 1 and the CMOS 2 are complementary. That is, if the data loaded into the CMOS 1 by the control device 400 is 1, the CMOS 2 will automatically load data 0. When the data loaded into the CMOS 1 by the control device 400 is 0, the CMOS 2 will automatically load data 1. Therefore, when the CMOS 1 controls the voltage on the first addressing electrode 20125 to be the first voltage based on the data 1, the voltage on the second addressing electrode 20126 corresponding to the CMOS 2 is zero. When the CMOS 1 controls the voltage on the first addressing electrode 20125 to be zero based on the data 0, the voltage on the second addressing electrode 20126 corresponding to the CMOS 2 is the first voltage. As can be seen, no matter whether the data loaded in the CMOS 1 is 0 or 1, the voltages on the first addressing electrode 20125 and the second addressing electrode 20126 are different.

[0053] When data 0 is loaded in CMOS1, the voltage on the first addressing electrode 20125 is zero, and the voltage on the second addressing electrode 20126 is the first voltage. At this time, if the control device 400 loads a bias voltage to the micro mirror 2011 through the first reset bias electrode 20135 or the second reset bias electrode 20136, the voltage difference between the first addressing electrode 20125 and the micro mirror 2011 above is greater than the voltage difference between the second addressing electrode 20126 and the micro mirror 2011 above, which causes the electrostatic force between the first addressing electrode 20125 and the micro mirror 2011 above to be greater than the electrostatic force between the second addressing electrode 20126 and the micro mirror 2011 above. Based on this, the micro mirror 2011 in the release state will drive the hinge 20122 and the yoke plate 20121 to deflect towards the first addressing electrode 20125, until the yoke plate 20121 contacts the first landing platform 20131. At this time, the light beam emitted from the light source 100 will be incident on the surface of the micro mirror 2011 after refraction and / or reflection by the optical machine 200, and will be incident on the light absorber after reflection by the surface of the micro mirror 2011. In the embodiment of the present application, the state of the micro mirror 2011 when the light beam is incident on the light absorber is referred to as the light-off state.

[0054] Similarly, when the data loaded in CMOS1 is 1, the voltage on the first addressing electrode 20125 is the first voltage, and the voltage on the second addressing electrode 20126 is zero. The voltage loaded on the micro mirror 2011 is the bias voltage. The voltage difference between the first addressing electrode 20125 and the micro mirror 2011 above is less than the voltage difference between the second addressing electrode 20126 and the micro mirror 2011 above, which causes the electrostatic force between the first addressing electrode 20125 and the micro mirror 2011 above to be less than the electrostatic force between the second addressing electrode 20126 and the micro mirror 2011 above. At this time, the micro mirror 2011 in the release state will drive the hinge 20122 and the yoke plate 20121 to deflect towards the second addressing electrode 20126, until the yoke plate 20121 contacts the second landing platform 20132. At this time, the light beam emitted from the light source 100 will still be incident on the surface of the micro mirror 2011 after refraction and / or reflection by the optical machine 200, and will be incident on the lens 300 after reflection by the micro mirror 2011. In the embodiment of the present application, the state of the micro mirror 2011 when the light beam is incident on the lens 300 is referred to as the light-on state.

[0055] It should be noted that after the micro-mirror 2011 is in the light-off state or the light-on state for a display time length, the control device 400 can load a reset voltage to the micro-mirror 2011 through the first reset bias electrode 20135 or the second reset bias electrode 20136 to release the micro-mirror 2011 to end the display of the current data. After the micro-mirror 2011 is released, the bias voltage is loaded to the micro-mirror 2011 again to control the micro-mirror 2011 to deflect again to realize the display of the next data, and the process is repeated to realize the display of a frame of image.

[0056] In the formula, the process that the micro-mirror 2011 recovers from the current light-on state or the light-off state to the release of the micro-mirror and deflects from the original state to the next light-on state or the light-off state is the reset of the micro-mirror, and the time length used for the reset of the micro-mirror 2011 is the reset time length of the micro-mirror, that is, during the reset process of the micro-mirror, the control device 400 cannot load data to the CMOS 1.

[0057] In the embodiment of the application, the DMD image display method is to use PWM, and the time of a frame of signal is divided into a plurality of binary bit times, and different gray scale levels correspond to different binary bit times. Taking an 8-bit image as an example, the color data of each pixel uses 24-bit RGB (red, green and blue), and each color data is 8 bits, so it has 2 8 =256 gray scale levels, that is, 0-255 gray values. The size of the gray value is arranged in the form of 8-bit binary, and the 8-bit binary is represented as:

[0058]

[0059] The gray value calculation formula corresponding to any n-bit gray scale is:

[0060]

[0061] In the formula, n is the number of bits, and n is an integer greater than or equal to 1. is the binary value corresponding to n bits, and the value is only 0 or 1, 2 i-1 is the weight of the corresponding binary bit, that is, the time interval.

[0062] So, for example, when displaying a frame of image, taking 8-bit gray scale as an example, according to the above content, the gray scale of a frame of image is divided into 8-bit data, each bit of data corresponds to 8 different time interval lengths, which are 1, 2, 4, 8, 16, 32, 64, 128 respectively. Since the higher the bit is, the greater the weight of the time interval is, therefore, when loading 8 times of gray scale data, the micro-mirror unit of different bit data maintains different time, the higher the bit is, the longer the micro-mirror unit maintains, but in a frame of time, 8-bit gray scale data of different bits is downloaded to the CMOS of the micro-mirror unit for 8 times, since the downloading order of 8-bit data does not follow the order from low bit to high bit or from high bit to low bit, it will not affect the gray scale value of the image, that is, it has no effect on the gray scale value, therefore, in the embodiment of the present application, the loading order of DMD bit data is not to download data from low bit to high bit or from high bit to low bit, but to adopt the bit gray scale data loading and display order shown in Figure 6 , that is, to download the 3rd bit data first, the micro-mirror unit maintains in the time interval of the 3rd bit weight for 2 3 seconds, and then to load and display the gray scale data of the 4th bit. According to the same principle, the loading and display order of 8-bit gray scale data is the 3rd bit, the 4th bit, the 2nd bit, the 5th bit, the 1st bit, the 6th bit, the 0th bit, the 7th bit, and the next round of cycle is carried out in turn. The reason for using the above downloading data and display method is that the length of the bit time period of different bits (the weight of different bits is different) is different, and the complementary method is used when displaying the next data, the bit time period with the longest length and the bit time period with the shortest length are complementary groups, as shown in Figure 6 , the complementary groups include the 7th bit and the 0th bit, the 3rd bit and the 4th bit, the 2nd bit and the 5th bit, the 1st bit and the 6th bit, and the data downloading and display order is carried out in turn according to Figure 6 , which can reduce the waiting time of the next block of data downloading and display, thereby improving the data loading and display rate and improving the frame frequency.

[0063] In the specific implementation, still referring to Figure 1 , the control device 400 specifically determines the target bit plane corresponding to the target micro-mirror unit group when determining the target bit plane corresponding to the target micro-mirror unit group. After obtaining the target bit plane corresponding to the target micro-mirror unit group, the target data on the target bit plane is loaded into all micro-mirror units in the target micro-mirror unit group based on the binary gray scale value of each micro-mirror unit in the target micro-mirror unit group, so as to control all micro-mirror units to reset and display based on the loaded data. In addition, the control device 400 can also control the reset and display time length of all micro-mirror units according to the bit plane corresponding to the loaded data.

[0064] Exemplarily, after determining the target bit plane corresponding to the target micromirror unit group, the control device 400 can obtain the bit data corresponding to the target bit plane from the binary grayscale value of each micromirror unit in the target micromirror unit group, take the obtained bit data as the to-be-loaded data of the corresponding micromirror unit, and send the corresponding to-be-loaded data to the corresponding micromirror unit. Correspondingly, each micromirror unit in the target micromirror unit group receives the to-be-loaded data sent by the control device 400, and stores the to-be-loaded data into the CMOS of the corresponding micromirror unit, and then causes itself to be in the "on" or "off" state based on the data stored in the CMOS. In addition, the control device 400 can also determine the time for sending the corresponding to-be-loaded data to each micromirror unit in the target micromirror unit group next time according to the target bit plane, so as to control the reset display time length of each micromirror unit in the target micromirror unit group.

[0065] Next, the image display method provided by the embodiment of the present application is introduced. Figure 7 The image display method provided by the embodiment of the present application. The method can be applied to the control device introduced in the above embodiment. As shown in the figure, Figure 7 The method comprises the following steps:

[0066] Step 201: Determine the target bit plane corresponding to the target micromirror unit group in the micromirror unit array.

[0067] Different specifications of DMD include different numbers of micromirror units in the micromirror unit array. The higher the resolution of the DMD, the more micromirror units it includes. In the embodiment of the present application, the micromirror unit array can be divided into multiple micromirror unit groups according to the specification of the DMD, and each micromirror unit group includes multiple rows of micromirror units.

[0068] It should be noted that, except for the last micromirror unit group, each micromirror unit group includes the same number of rows of micromirror units.

[0069] Exemplarily, in the micromirror unit array included in the DMD with a resolution of 1920*1080, there are 1080 rows of micromirror units, and the control device can divide the entire micromirror unit array into 15 groups with 72 rows of micromirror units as one group. Alternatively, the control device can also divide the first 1008 rows of micromirror units into 7 groups, and the last 72 rows of micromirror units into 1 group, or divide the first 846 rows of micromirror units into 3 groups, and the last 216 rows of micromirror units into 1 group.

[0070] Optionally, each micromirror unit group in the multiple micromirror unit groups includes at least one subarray, and each subarray includes multiple rows of micromirror units.

[0071] That is, the control device can further divide the micromirror cell array into a plurality of sub-arrays, each of which includes a plurality of rows of micromirror cells. After obtaining the plurality of sub-arrays, the control device can further divide at least one of the sub-arrays into a group of micromirror cells, thereby obtaining a plurality of groups of micromirror cells, wherein the number of sub-arrays included in each of the groups of micromirror cells, except for the last group of micromirror cells, is the same.

[0072] Still taking the above example, the control device can divide the 1080 rows of micromirror cells into 15 sub-arrays, each of which includes 72 adjacent rows of micromirror cells, starting from the first row. Then, the control device can divide two or four sub-arrays into a group of micromirror cells, thereby obtaining a plurality of groups of micromirror cells.

[0073] For the plurality of groups of micromirror cells included in the micromirror cell array, the control device can obtain a data loading time required by each of the groups of micromirror cells, determine a reset display time of each of a plurality of bit planes, and then determine a target bit plane corresponding to a target group of micromirror cells based on the data loading time required by each of the groups of micromirror cells and the reset display time of each of the bit planes. The plurality of bit planes are determined based on the gray levels of an image displayed by the micromirror cell array, and the plurality of bit planes include the target bit plane.

[0074] The control device can determine the data loading time required by a row of micromirror cells based on the resolution of an image displayed by the micromirror cell array, the bit width of the data transmission bus, and the clock period, and determine the data loading time required by each of the groups of micromirror cells based on the data loading time required by the row of micromirror cells.

[0075] For example, the control device can determine the number of micromirror cells included in a row of micromirror cells based on the resolution of an image displayed by the micromirror cell array, determine how many micromirror cells can be loaded with data in one clock period based on the bit width of the data transmission bus and the clock period, and then determine the number of clock periods required to load a row of micromirror cells with data. Then, the control device can calculate the data loading time required by a row of micromirror cells based on the length of one clock period and the number of clock periods required to load a row of micromirror cells with data, and calculate the data loading time required by each of the groups of micromirror cells based on the number of rows of micromirror cells included in each of the groups of micromirror cells and the data loading time required by a row of micromirror cells.

[0076] For example, assuming that a micro-mirror unit group includes 72 rows, each row includes 1920 micro-mirror units, a 64-bit data transmission bus is used, and a DDR (Double Data Rate) data transmission mode is used, data can be transmitted twice in one clock cycle, that is, 128 bits of data can be transmitted in one clock cycle, so that one clock cycle can load data for 128 micro-mirror units. Since there are 1920 micro-mirror units in a row, it takes 15 clock cycles to load data for a row of micro-mirror units, and if each clock cycle is 2.5 ns, it takes 37.5 ns to load data for a row of micro-mirror units, and it takes 2.7 us to load data for a 72-row micro-mirror unit group.

[0077] In addition, in the embodiment of the present application, the control device can also determine a plurality of bit planes according to the gray scale level of the image displayed by the micro-mirror unit array, wherein the number of the plurality of bit planes is equal to the gray scale level.

[0078] For example, assuming that the gray scale level of the image displayed by the micro-mirror unit array is 8 bits, it is indicated that the gray scale value of each pixel point in the image displayed by the micro-mirror unit array can be represented by an 8-bit binary number, in which case it is determined that the displayed image corresponds to 8 bit planes. At this time, the first bit data in the binary gray scale value of each pixel point of the image in order from left to right constitutes the first bit plane, the second bit data constitutes the second bit plane, and so on.

[0079] For the plurality of bit planes of the image to be displayed, the control device can determine the reset display time length of each bit plane. Wherein the reset display time length of the bit plane is the sum of the reset time length and the display time length of the bit plane.

[0080] It should be noted that the reset time length refers to the time length required for a micro-mirror unit to change from the current "on" state or "off" state to the next "on" state or "off" state. Wherein the reset time length required by each micro-mirror unit in the micro-mirror unit array when loading any bit plane is the same, and the reset time length is related to the model of the DMD. For example, the reset time length of a DMD with a resolution of 1920*1080 is 5 us.

[0081] The display time length refers to the time length during which the control device controls the micro-mirror unit to remain in the "on" state or the "off" state. The display time lengths of different bit planes are different, and the display time length of each bit plane in the plurality of bit planes is twice the display time length of the adjacent previous bit plane. Based on this, the control device can obtain the display time length of the first bit plane, and further determine the display time length of each bit plane based on the display time length of the first bit plane.

[0082] Exemplarily, the control device can take the shortest display time length of the micro-mirror unit as the display time length of the first bit plane. For example, assuming that the shortest display time length of the micro-mirror unit is t, the display time length of the first bit plane is t. On this basis, the display time length of the second bit plane is 2t, the display time length of the third bit plane is 4t, and so on, and the display time length of the eighth bit plane is 128t.

[0083] It should be noted that the shortest display time length of the micro-mirror unit is related to the model of the DMD. For example, the shortest display time length t of the DMD with a resolution of 1920*1080 is equal to 8us.

[0084] After obtaining the reset time length and the display time length of each bit plane, the control device adds the display time length and the reset time length of the corresponding bit plane to obtain the reset display time length of the corresponding bit plane.

[0085] After obtaining the data loading time length required by each micro-mirror unit group and the reset display time length of each bit plane, the control device can start the first data loading of each micro-mirror unit group. In the process of performing the first data loading on each micro-mirror unit group in the micro-mirror unit array, a target micro-mirror unit group is determined based on the position sequence of the plurality of micro-mirror unit groups; a total data loading time length required by a second micro-mirror unit group which has not loaded data in the plurality of micro-mirror unit groups is determined based on the data loading time length required by each micro-mirror unit group; a remaining reset display time length of the first micro-mirror unit group at the current time is determined; and a target bit plane is determined based on the total data loading time length required by the second micro-mirror unit group, the remaining reset display time length of the first micro-mirror unit group, and the reset display time length of each bit plane. The first micro-mirror unit group is the micro-mirror unit group which is currently displaying data in the plurality of micro-mirror unit groups.

[0086] When the control device starts the first data loading of each micro-mirror unit group in the micro-mirror unit array, the control device can first take the first micro-mirror unit group in the micro-mirror unit array as the target micro-mirror unit group according to the position sequence of each micro-mirror unit group.

[0087] Since the first micro-mirror unit group is the first micro-mirror unit group to load data, the micro-mirror unit groups other than the first micro-mirror unit group have not loaded data, and therefore the micro-mirror unit groups other than the first micro-mirror unit group are the second micro-mirror unit groups. At this time, the control device can obtain the data loading time length required by each micro-mirror unit group after the first micro-mirror unit group, and take the sum of the data loading time lengths required by each micro-mirror unit group after the first micro-mirror unit group as the total data loading time length required by the second micro-mirror unit group.

[0088] After obtaining the total data loading time required by the second micro mirror unit group, the control device can obtain a plurality of first differences by subtracting the data loading time required by the first micro mirror unit group from the reset display time of each bit plane.

[0089] For example, assuming that the obtained first candidate bit plane includes the third bit plane to the eighth bit plane, the control device can take any one of the third bit plane to the eighth bit plane as the target bit plane corresponding to the first micro mirror unit group.

[0090] For the i-th micro mirror unit group after the first micro mirror unit group, after loading data for the (i-1)-th micro mirror unit group, the control device can take the i-th micro mirror unit group as the target micro mirror unit group. Since the control device loads data for all micro mirrors of the (i-1)-th micro mirror unit group after determining the target bit plane corresponding to the (i-1)-th micro mirror unit group, each micro mirror of the (i-1)-th micro mirror unit group can perform reset display based on the loaded data, therefore, when loading data for the i-th micro mirror, each micro mirror unit group before the i-th micro mirror unit group is in the reset display period, at this time, each micro mirror unit group before the i-th micro mirror unit group can be taken as the first micro mirror unit group, and the remaining reset display time of each first micro mirror unit group at the end time of the first period is obtained. The first period refers to the period of loading data for the target micro mirror unit group, therefore, the end time of the first period refers to the time when the control device loads the target data on the target bit plane for the target micro mirror unit group.

[0091] In addition, since the i-th micro mirror unit group is the first time to load data, the micro mirror unit group after the i-th micro mirror unit group has not loaded data, therefore, the micro mirror unit group after the i-th micro mirror unit group is the second micro mirror unit group. The control device can obtain the data loading time required by each micro mirror unit group after the i-th micro mirror unit group, and take the sum of the data loading time required by each micro mirror unit group after the i-th micro mirror unit group as the total data loading time required by the second micro mirror unit group.

[0092] After obtaining the total data loading time required by the second micromirror unit group and the remaining reset display time of the first micromirror unit group, the control device can obtain a plurality of second difference values by subtracting the reset display time of each bit plane from the data loading time required by the i-th micromirror unit group, wherein each second difference value corresponds to a bit plane. After obtaining the plurality of second difference values, the control device compares each second difference value with the total data loading time required by the second micromirror unit group, and takes the bit plane corresponding to the second difference value that is not less than the total data loading time required by the second micromirror unit group as a second candidate bit plane, thereby obtaining at least one second candidate bit plane.

[0093] After obtaining the at least one second candidate bit plane, the control device takes any second candidate bit plane A in the at least one second candidate bit plane as an example, determines the absolute value of the difference between the reset display time of the second candidate bit plane A and the remaining reset display time of each first micromirror unit group, thereby obtaining a plurality of first difference absolute values. Then, the control device compares each first difference absolute value with the data loading time required by the i-th micromirror unit group, and takes the second candidate bit plane A as a third candidate bit plane if each first difference absolute value is not less than the data loading time required by the i-th micromirror unit group. For any candidate bit plane in the at least one second candidate bit plane, the control device can process it according to the above method, thereby obtaining at least one third candidate bit plane. Then, the control device takes any bit plane in the at least one third candidate bit plane as the target bit plane corresponding to the i-th micromirror unit group.

[0094] For example, still taking the DMD with a resolution of 1920*1080 as an example, a 64-bit data transmission bus is used, and a DDR data transmission mode is used to load data for each micromirror unit. The micromirror unit array included in the DMD is divided into four micromirror unit groups, wherein each micromirror unit group in the first three groups has 288 micromirror units, and the loading time is 10.8us, and the last micromirror unit group has 216 micromirror units, and the data loading time required by each micromirror unit group is 8.1us. The control device first takes the first micromirror unit group as the target micromirror unit group. Since the first micromirror unit group is the first micromirror unit group to load data, the second micromirror unit group to the fourth micromirror unit group has not loaded data, and thus the second micromirror unit group to the fourth micromirror unit group is a second micromirror unit group. Since the data loading time required by each micromirror unit group in the first three micromirror unit groups is 10.8us, and the data loading time of the fourth micromirror unit group is 8.1us, the total data loading time required by the second micromirror unit group is 29.7us.

[0095] Assuming that the gray scale number of the image displayed by the DMD is 8 bits, there are 8 bit planes, wherein the display time of the first bit plane is 8us, the reset time is 5us, the reset display time of the first bit plane is 13us, the display time of the second bit plane is twice the display time of the first bit plane, and thus the reset display time of the second bit plane is us, and so on, the reset display times of the third bit plane to the eighth bit plane are us, us, us, us, us, us.

[0096] After obtaining the total data loading time required by the second micromirror unit group and the reset display time of each bit plane, the control device subtracts the reset display time of each bit plane from the data loading time required by the first micromirror unit group 10.8us, and obtains the first difference values 2.2us, 10.2us, 26.2us, 58.2us, 122.2us, 250.2us, 506.2us, 1018.2us respectively, wherein each first difference value corresponds to a bit plane, 2.2us corresponds to the first bit plane, 10.2us corresponds to the second bit plane, and so on.

[0097] After obtaining the first difference values, the control device compares 2.2us, 10.2us, 26.2us, 58.2us, 122.2us, 250.2us, 506.2us, 1018.2us with the total data loading time required by the second micromirror unit group 29.7us respectively, so as to obtain the first difference values not less than 29.7us, which are 58.2us, 122.2us, 250.2us, 506.2us, 1018.2us. In this way, it can be determined that the first selected bit plane includes the fourth bit plane to the eighth bit plane, at this time, any bit plane in the fourth bit plane to the eighth bit plane can be taken as the target bit plane corresponding to the first micromirror unit group.

[0098] For the other micro-mirror cell groups except the first micro-mirror cell group in the first data loading process, for example, assuming that the control device determines that the fifth bit plane is the bit plane corresponding to the first micro-mirror cell group by the above method, and the reset display duration is 133 us. Then, according to the order of the micro-mirror cell groups, the control device takes the second micro-mirror cell group as the target micro-mirror cell group. At this time, the first micro-mirror cell group is the first micro-mirror cell group, and the third to fourth micro-mirror cell groups are the second micro-mirror cell group, and the total data loading duration required by the second micro-mirror cell group is 18.9 us. Since the control device will load data for the second micro-mirror cell group immediately after loading data for the first micro-mirror cell group, the start time of the data loading of the second micro-mirror cell group is also the start time of the reset display of the first micro-mirror cell group. The data loading duration required by the second micro-mirror cell group is 10.8 us, that is, when the data loading for the second micro-mirror cell group is completed, the remaining reset display duration of the first micro-mirror cell group is 133 us minus 10.8 us, equal to 122.2 us.

[0099] After obtaining the total data loading duration 18.9 us required by the second micro-mirror cell group, the remaining reset display duration 122.2 us of the first micro-mirror cell group, and the reset display duration of each bit plane, the control device subtracts the reset display duration of each bit plane from the data loading duration 10.8 us required by the second micro-mirror cell group, and obtains the second difference values corresponding to the eight bit planes respectively as 2.2 us, 10.2 us, 26.2 us, 58.2 us, 122.2 us, 250.2 us, 506.2 us, and 1018.2 us, wherein the first bit plane corresponds to the second difference value of 2.2 us, the second bit plane corresponds to the second difference value of 10.2 us, and so on.

[0100] After obtaining the second difference value corresponding to each bit plane, the control device compares the second difference value corresponding to each bit plane with the total data loading time required by the second micromirror unit group, 18.9us, to determine the bit plane corresponding to the second difference value not less than the total data loading time required by the second micromirror unit group, 18.9us. The determined bit plane is the third bit plane, the fourth bit plane, the fifth bit plane, the sixth bit plane, the seventh bit plane and the eighth bit plane, that is, the third bit plane to the eighth bit plane are all second selected bit planes. Then, the control device can determine the absolute value of the difference between the reset display time of the third bit plane to the eighth bit plane, 37us, 69us, 133us, 261us, 517us, 1029us, and the remaining reset display time of the first micromirror unit group, 122.2us, to obtain a plurality of first absolute difference values, which are 85.2us, 53.2us, 10.8us, 133.8us, 394.8us, and 906.8us, respectively. Among them, 85.2us corresponds to the third bit plane, 53.2us corresponds to the fourth bit plane, and so on.

[0101] After obtaining the first absolute difference value corresponding to the second selected bit plane, the control device takes the bit plane corresponding to the first absolute difference value not less than the data loading time required by the second micromirror unit group, 10.8us, as a third selected bit plane. As can be seen from the above calculation, the third bit plane to the eighth bit plane can all be taken as the third selected bit plane. Therefore, the control device can take any one of the third bit plane to the eighth bit plane as the target bit plane corresponding to the second micromirror unit group.

[0102] For the micromirror unit groups after the second micromirror unit group, the target bit plane of the corresponding micromirror unit group can be determined in the manner of determining the target bit plane corresponding to the second micromirror unit group as described above, and the embodiments of the present application will not be described here.

[0103] After the control device loads the first data for all micromirror unit groups in the micromirror unit array, in the process of loading the nth data for each micromirror unit group in the micromirror unit array, the control device first determines the remaining reset display time of the plurality of first micromirror unit groups at the current time, selects the micromirror unit group with the shortest remaining reset display time from the plurality of first micromirror unit groups as a target micromirror unit group, and obtains the data loading time required by the target micromirror unit group. Based on the reset display time of each bit plane, the data loading time required by the target micromirror unit group and the remaining reset display time of the remaining micromirror unit groups in the plurality of first micromirror unit groups except the target micromirror unit group, the target bit plane is determined. Wherein, n is an integer greater than 1.

[0104] After the control device loads the first data to all micro mirror cell groups in the micro mirror cell array, all micro mirror cell groups in the micro mirror cell array are in the reset display period, that is, all micro mirror cell groups in the micro mirror cell array are the first micro mirror cell group at this time. At this time, the remaining reset display time length of each first micro mirror cell group at the current time can be counted, and the remaining reset display time length of each first micro mirror cell group at the current time counted is sorted in ascending order, and the first micro mirror cell group with the shortest remaining reset display time length is taken as the target micro mirror cell group.

[0105] After determining the target micro mirror cell group, the control device can obtain the data loading time length required by the target micro mirror cell group, the remaining reset display time length of the micro mirror cell group other than the target micro mirror cell group in the plurality of first micro mirror cell groups at the end time of the first time period, and the reset display time length of each bit plane that is not loaded by the target micro mirror cell group in the period of displaying the current frame of image. Then, for any bit plane that is not loaded by the target micro mirror cell group, the control device can determine the absolute value of the difference between the reset display time length of the bit plane and the remaining reset display time length of each first micro mirror cell group other than the target micro mirror cell group, to obtain a plurality of second difference absolute values corresponding to the bit plane. The plurality of second difference absolute values corresponding to the bit plane are compared with the data loading time length required by the target micro mirror cell group, and if the plurality of second difference absolute values corresponding to the bit plane are all not less than the data loading time length required by the target micro mirror cell group, the bit plane is taken as a fourth candidate bit plane. For each bit plane that is not loaded by the target micro mirror cell group, whether the corresponding bit plane can be taken as a fourth candidate bit plane can be judged by referring to the above method, so as to obtain at least one fourth candidate bit plane. Then, the control device can take any bit plane in the at least one fourth candidate bit plane as the target bit plane corresponding to the target micro mirror cell group.

[0106] It should be noted that the determination method of the target bit plane in the nth data loading process of any micro mirror cell group in the micro mirror cell array can refer to the determination method of the target bit plane corresponding to the target micro mirror cell group, which will not be described herein again.

[0107] Still taking the above example as an example, referring to Figure 8, assuming that the first time data is loaded, the first micro-mirror unit group to the fourth micro-mirror unit group loads the bit planes respectively as the fifth bit plane, the sixth bit plane, the fifth bit plane, and the second bit plane. After loading all micro-mirror unit groups, the remaining reset display duration of the first micro-mirror unit group is 103.3us, the remaining reset display duration of the second micro-mirror unit group is 242.1us, the remaining reset display duration of the third micro-mirror unit group is 124.9us, and the remaining reset display duration of the fourth micro-mirror unit group is 21us. It can be seen that at the current time, the remaining reset display duration of the fourth micro-mirror unit group is the shortest, and therefore, the fourth micro-mirror unit group can be taken as the target micro-mirror unit group.

[0108] After the control device takes the fourth micro-mirror unit group as the target micro-mirror unit group, since the fourth micro-mirror unit group has already loaded the data on the second bit plane, the bit planes that have not been loaded by the fourth micro-mirror unit group are the first bit plane, the third bit plane, the fourth bit plane, the fifth bit plane, the sixth bit plane, the seventh bit plane, and the eighth bit plane. Then, the absolute values of the differences between the reset display duration of the first bit plane and the remaining reset display durations of the micro-mirror unit groups other than the fourth micro-mirror unit group are determined, obtaining a plurality of second absolute difference values corresponding to the first bit plane, which are 90.3us, 229.1us, and 111.9us, respectively. Then, the plurality of second absolute difference values are compared with the data loading duration required by the fourth micro-mirror unit group. Since the plurality of second absolute difference values are all greater than the data loading duration required by the fourth micro-mirror unit group, the first bit plane can be taken as the fourth candidate bit plane corresponding to the fourth micro-mirror unit group. According to the same method, the control device can continue to determine whether the remaining other bit planes that have not been loaded can be taken as the fourth candidate bit plane. In this way, the determined fourth candidate bit planes include the first bit plane, the third bit plane, the fourth bit plane, the fifth bit plane, the sixth bit plane, the seventh bit plane, and the eighth bit plane, which can all be taken as the target bit plane corresponding to the fourth micro-mirror unit group. At this time, the control device can take any one of the first bit plane, the third bit plane, the fourth bit plane, the fifth bit plane, the sixth bit plane, the seventh bit plane, and the eighth bit plane as the target bit plane corresponding to the fourth micro-mirror unit group.

[0109] Assuming the control device takes the first bit plane as the target bit plane corresponding to the fourth micro-mirror unit group, and loads the target data on the first bit plane for the fourth micro-mirror unit group, then the remaining reset display time of the fourth micro-mirror unit group is still the shortest, and the fourth micro-mirror unit group is still the target micro-mirror unit group. At this time, the fourth micro-mirror unit group can be continuously determined as the target micro-mirror unit group, and the target bit plane of the fourth micro-mirror unit group is determined according to the above method, and the target data on the target bit plane is loaded for the fourth micro-mirror unit group (the fifth bit plane in FIG. 6). Figure 8 The target micro-mirror unit group is determined from the other four micro-mirror unit groups, and the target data on the target bit plane is loaded for the target micro-mirror unit group. In this way, the display of one frame of image is completed.

[0110] Referring to Figure 8 In summary, the bit planes loaded by each micro-mirror unit group in sequence are as follows:

[0111] The bit planes loaded by the first micro-mirror unit group in sequence are: 5, 6, 4, 1, 2, 7, 3, and 8.

[0112] The bit planes loaded by the second micro-mirror unit group in sequence are: 6, 7, 5, 2, 1, 8, 4, and 3.

[0113] The bit planes loaded by the third micro-mirror unit group in sequence are: 5, 2, 1, 6, 4, 7, 3, and 8.

[0114] The bit planes loaded by the fourth micro-mirror unit group in sequence are: 2, 1, 5, 6, 8, 3, 4, and 7.

[0115] Step 202: Loading target data on the target bit plane for the target micro-mirror unit group based on the binary grayscale values of each micro-mirror unit in the target micro-mirror unit group, so that the target micro-mirror unit group displays based on the target data.

[0116] In the embodiment of the present application, the control device can convert the grayscale value of each pixel point in the image to be displayed by the micro-mirror unit array into a binary grayscale value. Then, the binary grayscale value of each pixel point is taken as the binary grayscale value of the micro-mirror unit corresponding to the corresponding pixel point. Each bit of the binary grayscale value corresponds to a bit plane, and the binary number on each bit is the bit data on the corresponding bit plane.

[0117] For example, taking any one of the micromirror units as an example. Assuming that the binary grayscale value of the micromirror unit is 10101010, the 0th bit to the 7th bit of the binary grayscale value 10101010 each corresponds to a bit plane, and the binary number 0 on the 0th bit is the bit data on the corresponding bit plane, the binary number 1 on the 1th bit can be used as the bit data on the corresponding bit plane, and so on, and the binary number 1 on the 7th bit can be used as the bit data on the corresponding bit plane.

[0118] Based on this, after the control device determines the target bit plane corresponding to the target micromirror unit group, the control device can obtain the bit data corresponding to the target bit plane in the binary grayscale value of each micromirror unit in the target micromirror unit group, take the obtained bit data as the target data on the corresponding target bit plane of the corresponding micromirror unit, and send the corresponding target data to the corresponding micromirror unit. Accordingly, each micromirror unit in the target micromirror unit group receives the target data sent by the control device, and stores the target data in the CMOS of the corresponding micromirror unit, and then causes itself to be in the "on" or "off" state based on the data in the storage CMOS. In addition, the control device can also determine the time of sending the corresponding target data to each micromirror unit in the target micromirror unit group next time according to the target bit plane, so as to realize the control of the reset display time length of each micromirror unit in the target micromirror unit group.

[0119] From the above-described data loading process, it can be known that in the embodiment of the present application, when the control device performs the first data loading for each micromirror unit group in the micromirror unit array, the reset display time length of the target bit plane determined by the control device for each micromirror unit group in sequence is not less than the total data loading time length required by the second micromirror unit group which has not yet loaded data. In this way, for any micromirror unit group, the first time period for loading the target data on the target bit plane of the micromirror unit group will be within the allowed reset display time period of the previous first micromirror unit group, and it can be ensured that before the last micromirror unit group is loaded with the first data, the micromirror unit groups that have loaded data are all within the reset display time period, and the situation that a certain micromirror unit group has ended or is about to end the display and needs to be loaded with the second data will not occur. The length of the allowed reset display time period of the first micromirror unit group is the sum of the reset time length of the corresponding unit group and the display time length of the currently displayed bit plane.

[0120] In addition, when determining the target bit plane corresponding to the target micro-mirror unit group, the absolute value of the difference between the reset display time length of the target bit plane and the residual reset display time length of the first micro-mirror unit group at the end of the first time period is compared with the data loading time length required by the target micro-mirror unit group, so that the reset display time length of the determined target bit plane is not less than the residual reset display time length of the first micro-mirror unit group at the end of the first time period. In this way, the absolute value of the difference between the residual reset display time lengths of any two micro-mirror unit groups is not less than the data loading time length required by the corresponding micro-mirror unit group, so as to ensure that any two micro-mirror unit groups in the micro-mirror unit array do not need to load data at the same time, i.e., data loading conflict does not occur.

[0121] In the embodiments of the present application, the first time period for loading target data for the target micro-mirror unit group is within the allowed reset display time period of the first micro-mirror unit group. That is, for any micro-mirror unit group, the allowed reset display time of other micro-mirror unit groups that are currently displaying data can be used for data loading, so as to reduce the time occupancy of data loading in the image display process, thereby shortening the time length required for image display and improving the frame frequency of image display. In addition, in the embodiments of the present application, at the end of the first time period, the residual reset display time length of each micro-mirror unit group in the plurality of micro-mirror unit groups is not less than the data loading time length required by the corresponding micro-mirror unit group. After the control device loads the target data for the target micro-mirror unit group, the residual reset display time length of other micro-mirror unit groups is still sufficient for data loading. Since the absolute value of the difference between the residual reset display time lengths of any two micro-mirror unit groups in the plurality of micro-mirror unit groups is not less than the data loading time length required by the corresponding micro-mirror unit group, it is ensured that any two micro-mirror unit groups in the micro-mirror unit array do not need to load data at the same time, i.e., data loading conflict does not occur, thereby ensuring the display quality of the image.

[0122] Still referring to Figure 1The control device 400 can also obtain the micro-mirror stabilization time length and the data zeroing time length of the micro-mirror cell array included in the DMD 201. After obtaining the micro-mirror stabilization time length and the data zeroing time length, in determining the display time length of each bit plane, the first basic display time length is determined based on the micro-mirror stabilization time length and the data zeroing time length, and the display time length of each bit plane of the plurality of bit planes of the image to be displayed is determined based on the first basic display time length. Then, in displaying the data of the image to be displayed in the micro-mirror cells of the target micro-mirror cell group based on the display time length of each bit plane, the data of the plurality of bit planes of the image to be displayed is displayed based on the display time length of each bit plane, the data loading time length and the micro-mirror stabilization time length, so that the display time length of the image to be displayed is less than the reference time length, the data of part of the plurality of bit planes is loaded after performing the data zeroing operation on the loaded data in the micro-mirror cell array, the data loading time length is greater than the data zeroing time length, and the reference time length refers to the display time length of displaying one frame of image based on the reference basic display time length, and the reference basic display time length is greater than the first basic display time length.

[0123] For example, after determining the first basic display time length, the control device 400 can take the first basic display time length as the display time length of the lowest bit plane of the image to be displayed, and for each bit plane other than the lowest bit plane, the display time length of the bit plane is twice the display time length of the lower bit plane adjacent to the bit plane. In this way, the control device 400 can determine the display time length of other bit planes according to the display time length of the lowest bit plane. In addition, the control device 400 can also determine the to-be-loaded data of each micro-mirror cell corresponding to each bit plane according to the binary gray value of the image to be displayed. Then, when displaying any bit plane, the control device 400 can load the to-be-loaded data of each micro-mirror cell corresponding to the bit plane into the CMOS of each micro-mirror cell. Then, the control device 400 controls each micro-mirror cell to be in the light-on state or the light-off state based on the data stored in the CMOS of the micro-mirror cell, and controls the time length of the micro-mirror cell in the micro-mirror cell array to be in the light-on state or the light-off state according to the display time length of the bit plane, so as to realize the display of the image.

[0124] Figure 9 Another image display method provided by the embodiments of the present application is shown. The method can be applied to the control device introduced in the above embodiments. As shown in the figure, Figure 9 The method comprises the following steps:

[0125] Step 301: determining the first basic display time length based on the micro-mirror stabilization time length and the data zeroing time length.

[0126] In the embodiment of the present application, after the micro-mirror in the micro-mirror unit is reset, the yoke plate in the micro-mirror is in contact with the first landing platform or the second landing platform, and after the yoke plate is in contact with the first landing platform or the second landing platform, the micro-mirror needs a stable process, and during the stable process of the micro-mirror, the control device cannot still load data into the CMOS 1 included in the micro-mirror unit, and in the embodiment of the present application, the time length used for the stable process of the micro-mirror is referred to as a micro-mirror stable time length. The control device can determine the micro-mirror stable time length according to the model of the DMD, for example, for the DMD with a resolution of 1920*1080, the micro-mirror stable time length is 8us.

[0127] In addition, the data zeroing time length refers to a time length required for performing a data zeroing operation on the data loaded in each micro-mirror unit in the micro-mirror unit array. The data zeroing time length is related to the number of micro-mirror units included in the DMD, and the more the number of micro-mirror units included in the DMD, the longer the data zeroing time length. For example, for the DMD with a resolution of 1920*1080, the data zeroing time length is 0.5625us.

[0128] For example, after obtaining the data zeroing time length, the control device can first determine whether the data zeroing time length satisfies the following formula (1), and if yes, the first basic display time length is determined according to the micro-mirror stable time length and the data zeroing time length.

[0129] (1)

[0130] wherein, is the data zeroing time length, n is the number of the plurality of bit planes, and k is used to indicate the kth bit plane in the n bit planes, is the data loading time length, is a reset time length required for the reset operation, is the micro-mirror stable time length, and m is the number of the bit planes in the n bit planes whose display time length is less than the sum of the micro-mirror stable time length and the data loading time length.

[0131] In one implementation mode, after the control device determines that the data zeroing time length satisfies the above condition, the sum of the micro-mirror stable time length and the data zeroing time length is taken as the first basic display time length.

[0132] For example, for the DMD with a resolution of 1920*1080, the micro-mirror stable time length is 8us, and the data zeroing time length is 0.5625us, and if the above formula (1) is satisfied, the first basic display time length is 8.5625us.

[0133] Optionally, the control device can also set a value greater than the sum of the micro-mirror stabilization time length and the data zeroing time length as the first basic display time length. In this case, the difference between the first basic display time length and the micro-mirror stabilization time length, i.e., the first difference, satisfies the condition shown in the following formula (2).

[0134] (2)

[0135] wherein, is the first difference, n is the number of the plurality of bit planes, k is used to indicate the kth bit plane in the n bit planes, is the data loading time length, is the reset time length required for the reset operation, is the micro-mirror stabilization time length, and m is the number of the bit planes in the n bit planes whose display time lengths are less than the sum of the micro-mirror stabilization time length and the data loading time length.

[0136] Step 302: determining the display time length of each bit plane in the plurality of bit planes of the image to be displayed based on the first basic display time length.

[0137] The control device can also determine the plurality of bit planes according to the gray scale level of the image to be displayed by the micro-mirror cell array, wherein the number of the plurality of bit planes is equal to the gray scale level.

[0138] For example, assuming that the gray scale level of the image to be displayed by the micro-mirror cell array is 8 bits, it is explained that the gray scale value of each pixel point in the image to be displayed by the micro-mirror cell array can be represented by an 8-bit binary number, in which case, it is determined that the image to be displayed corresponds to 8 bit planes. At this time, the first bit data in the binary gray scale value of each pixel point of the image in order from low to high forms the first bit plane, the second bit data forms the second bit plane, and so on.

[0139] In an implementation manner, the control device can set the first basic display time length as the display time length of the first bit plane of the image to be displayed, and for each bit plane other than the first bit plane, the display time length of the bit plane is twice the display time length of the previous bit plane adjacent to the bit plane. Based on this, after obtaining the display time length of the first bit plane, the control device can determine the display time lengths of the other bit planes according to the display time length of the first bit plane.

[0140] Exemplarily, assuming that the first base display duration is 8.5625us, the display duration of the first bit plane can be set as 8.5625us, at this time, the display duration of the second bit plane is 2 times of the display duration of the first bit plane, which is 17.125us, and so on, the display durations of the third bit plane to the eighth bit plane are 34.25us, 68.5us, 137us, 274us, 548us and 1096us respectively.

[0141] Step 303: Displaying the data on the plurality of bit planes in the to-be-displayed image based on the display duration of each bit plane, the data loading duration and the micro-mirror stabilization duration, so that the display duration of the to-be-displayed image is less than the reference duration.

[0142] The data loading duration refers to the duration required for loading data for the micro-mirror cell array.

[0143] Exemplarily, the control device can determine the total number of micro-mirror cells included in the micro-mirror cell array according to the resolution of the DMD, and determine the number of micro-mirror cells that can be loaded in one clock cycle according to the data transmission bus bit width and the clock period. Then, the number of clock cycles required for loading data for each micro-mirror cell in the micro-mirror cell array is determined according to the total number of micro-mirror cells included in the micro-mirror cell array and the number of micro-mirror cells that can be loaded in one clock cycle, and the data loading duration required for loading data for each micro-mirror cell in the micro-mirror cell array is calculated according to the duration of one clock cycle.

[0144] For example, for a DMD with a resolution of 1920*1080, the total number of micro-mirror cells included is 1080*1920, a data transmission bus with 64 bits is used, and a DDR (Double Data Rate) data transmission mode is used, which can transmit data twice in one clock cycle, that is, 128 bits of data can be transmitted in one clock cycle, so that one clock cycle can load data for 128 micro-mirror cells. The number of clock cycles required for loading data for 1080*1920 micro-mirror cells is 16200, and the duration of one clock cycle is 2.5ns, so the data loading duration required for loading data for 1080*1920 micro-mirror cells is 40.5us.

[0145] After obtaining the display time length, the data loading time length and the micro-mirror stabilization time length of each bit plane in the image to be displayed, the control device can take the sum of the data loading time length and the micro-mirror stabilization time length as a target time length, and then load the data on the corresponding bit plane for the micro-mirror unit array based on the target time length and the display time length of each bit plane. The data on part of the bit planes in the plurality of bit planes in the image to be displayed is loaded after performing a data zero operation on the data of the previously displayed bit plane loaded in the micro-mirror unit array. The part of the bit planes refers to the bit planes with a display time length less than the target time length.

[0146] Next, the process is introduced by taking the loading of data on any bit plane in the plurality of bit planes as an example. For the convenience of description, the bit plane is referred to as a first bit plane.

[0147] Exemplarily, the control device can compare the display time length of the first bit plane, i.e., the first display time length, with the target time length. If the first display time length is less than the target time length, it means that the second data cannot be loaded for each micro-mirror unit in the micro-mirror unit array within the first display time length. Therefore, the data zero operation can be performed on the micro-mirror unit array in the process of displaying the first data on the first bit plane by the micro-mirror unit array, and the reset operation is performed on the micro-mirror unit array after the display of the first data is completed, so that the micro-mirror unit array is in the light-off state. As can be known from the above introduction, when the micro-mirror unit array is in the light-off state, each micro-mirror unit in the micro-mirror unit array can reflect the incident light beam to the light absorber, so that the light beam emitted from the light source is absorbed by the light absorber. Since the light beam emitted from the light source does not reach the lens, such as a projection lens, in the light-off state, the pixel value of the displayed image will not be affected. Therefore, the second data on the second bit plane can be loaded for the micro-mirror unit array when the micro-mirror unit array is in the light-off state, and the micro-mirror unit array is controlled to display the second data. The second bit plane is the bit plane to be displayed next after the display of the first bit plane.

[0148] Exemplarily, after the control device determines that the first display duration of the first bit plane is less than the target duration, the control device can set the data in CMOS1 in each micro-mirror cell included in the micro-mirror cell array to 0 through the data zeroing instruction in the process in which the micro-mirror cell array displays the first data, and correspondingly, the data 1 will be automatically loaded in CMOS2 under the micro-mirror. After the data in CMOS1 in each micro-mirror cell is set to 0, the control device can load a reset voltage to the micro-mirror in each micro-mirror cell after the display duration of the first data by the micro-mirror cell array reaches the first display duration, so that the micro-mirror is released, and after the micro-mirror is released, a bias voltage is loaded to the micro-mirror in each micro-mirror cell, and the control device controls each micro-mirror cell to deflect based on the 0 loaded in CMOS1 and the bias voltage loaded on the micro-mirror, that is, controls the micro-mirror in each micro-mirror cell to deflect towards the direction close to the first addressing electrode, so that each micro-mirror cell is in a light-off state. After the duration in which each micro-mirror cell is in the light-off state is equal to the micro-mirror stable duration, that is, after the micro-mirror in each micro-mirror cell is stable, the second data is loaded to CMOS1 in each micro-mirror cell included in the micro-mirror cell array for a duration. After the control device loads the second data to each micro-mirror cell in the micro-mirror cell array, the reset voltage is again loaded to the micro-mirror in each micro-mirror cell, so that the micro-mirror in each micro-mirror cell is released again, and after the micro-mirror in each micro-mirror cell is released, the bias voltage is again loaded to the micro-mirror in each micro-mirror cell, so that the micro-mirror in each micro-mirror cell can deflect again based on the second data loaded in CMOS1 and the bias voltage loaded on the micro-mirror to display the second data loaded in CMOS1.

[0149] Exemplarily, the control device compares the display duration of the first bit plane, that is, the first display duration, with the target duration. If the first display duration is not less than the target duration, it indicates that the control device can load the second data to each micro-mirror cell in the micro-mirror cell array within the first display duration, and at this time, the control device can load the second data to the micro-mirror cell array in the process in which the micro-mirror cell array displays the first data, and after the display of the first data is completed, the control device controls the micro-mirror cell array to display the second data.

[0150] Exemplarily, after determining that the first display time length on the first bit plane is not less than the target time length, the control device can calculate a difference between the first display time length and the micro-mirror stabilization time length, to obtain a second difference value. If the second difference value is equal to the data loading time length, the second data is loaded to the micro-mirror unit in the micro-mirror unit array immediately after the micro-mirror is stabilized. If the first difference value is greater than the data loading time length, the second data can be loaded to the micro-mirror unit in the micro-mirror unit array at any time after the micro-mirror is stabilized and the remaining display time length is not less than the data loading time length. After the control device loads the second data to each micro-mirror unit included in the micro-mirror unit array, it can determine whether the display time length of the first data reaches the first display time length. If the first display time length is reached, it is determined that the display of the first data is completed. After determining that the display of the first data is completed, a reset voltage is loaded to the micro-mirror of each micro-mirror unit, so that the micro-mirror of each micro-mirror unit is released. After the micro-mirror of each micro-mirror unit is released, a bias voltage is loaded to the micro-mirror of each micro-mirror unit, so that the micro-mirror of each micro-mirror unit displays the second data based on the loaded second data and the bias voltage.

[0151] For each bit plane in the image to be displayed, the control device can display the data on each bit plane in turn according to the above method. It should be noted that the display order of each bit plane can be the same as the high-low order of the bit positions of the binary gray scale values corresponding to each bit plane, or can be different.

[0152] Next, the implementation process of another image display method provided by the embodiment of the present application will be described through a specific example.

[0153] Reference Figure 10For example, assuming that the resolution of the DMD is 1920*1080, the micro-mirror stable time length is 8us, the data zeroing time length is 0.5625us, and the data loading time length is 40.5us. If the gray scale level of the image to be displayed is 8bit, there are 8 bit planes. The sum of the micro-mirror stable time length and the data zeroing time length is taken as the first basic display time length, i.e., the first basic display time length is 8.5625us. On this basis, the display time lengths of the first bit plane to the eighth bit plane are 8.5625us, 17.125us, 34.25us, 68.5us, 137us, 274us, 548us, and 1096us, respectively. In the process of displaying the image to be displayed, the control device first loads the data on the first bit plane into each micro-mirror unit in the micro-mirror unit array, and the required data loading time length is 40.5us. After loading the data on the first bit plane into each micro-mirror unit, the control device controls each micro-mirror unit to start deflection based on the data stored in the CMOS1 of each micro-mirror unit and the bias voltage on the micro-mirror, and the time length required for deflection to the light-on state or the light-off state is the micro-mirror reset time length, which is assumed to be 5us. Then, the data on the first bit plane is displayed, and the display time length is 8.5625us. Since the display time length of the first bit plane 8.5625us is less than the sum of the micro-mirror stable time length and the data loading time length 48.5us, after the micro-mirror is stable for 8us, the control device starts to perform the zeroing operation, i.e., the data on the first bit plane stored in the CMOS1 of each micro-mirror unit is set to 0. After setting the data on the first bit plane in the CMOS1 of the micro-mirror of each micro-mirror unit to 0, the reset operation is performed on each micro-mirror unit, and the reset time length is 5us. Then, each micro-mirror unit is controlled to be in the light-off state based on the 0 loaded in the CMOS1 and the bias voltage, and after the micro-mirror unit is in the light-off state and stable for 8us, the data on the second bit plane is loaded into the CMOS1 of each micro-mirror unit. After each micro-mirror unit loads the data on the second bit plane, each micro-mirror unit is controlled to reset again, and then the data on the second bit plane is displayed, and the display time length is 17.125us.

[0154] Since the display time length of the second bit plane 17.125us is still less than the sum of the micro-mirror stable time length and the data loading time length 48.5us, the zero resetting operation still needs to be performed in the process of displaying the data on the second bit plane, and the data on the third bit plane is loaded to each micro-mirror unit when the micro-mirror is in the light-off state, and then the display of the data on the third bit plane is reset and performed. Since the display time length of the third bit plane 34.25us is still less than the sum of the micro-mirror stable time length and the data loading time length, the above process needs to be repeated for the loading and display of the data on the fourth bit plane. Since the display time length of the fourth bit plane is 68.5us, which is greater than the sum of the micro-mirror stable time length and the data loading time length 48.5us, the control device can load the data on the fifth bit plane to each micro-mirror unit when the micro-mirror unit array displays the data on the fourth bit plane. Since the display time lengths of the fifth bit plane to the eighth bit plane are all greater than the sum of the micro-mirror stable time length and the data loading time length, the loading of the data on the next bit plane can be performed when the data on the current bit plane is displayed, until the display of a frame of image is completed.

[0155] From the above display process, it can be calculated that the display time length required for displaying a frame of image is equal to 2383.9375us, and thus the maximum display frame frequency of the image can reach 419Hz, which can meet the display requirement of high-frequency image.

[0156] In the embodiments of the present application, the first basic display time length is determined based on the micro-mirror stable time length and the data zero resetting time length, and then the image is displayed based on the first basic display time length. For the data on part of the bit planes in the image, the loaded data in the micro-mirror unit array can be zero reset and then loaded and displayed, so as to ensure the display of the data on each bit plane. Since the data zero resetting time length is less than the data loading time length, the first basic display time length determined based on the micro-mirror stable time length and the data zero resetting time length is less than the reference basic display time length determined based on the micro-mirror stable time length and the data loading time length. The display time length of a frame of image is determined by the basic display time length, and thus the display time length of a frame of image displayed based on the first basic display time length can be ensured to be less than the display time length of a frame of image displayed based on the reference basic display time length, so as to improve the frame frequency of image display.

[0157] For the convenience of explanation, the above description has been made in combination with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the precise forms disclosed. Various modifications and variations can be derived from the above teachings. The selection and description of the above embodiments are for better explaining the principles and practical applications, so that those skilled in the art can better use the embodiments and various different modified embodiments suitable for specific use considerations.

Claims

1. An image display method, comprising: determining bit planes corresponding to a target micro mirror cell group in a micro mirror cell array, and a display time length of each bit plane, wherein the micro mirror cell array comprises a plurality of micro mirror cell groups, each micro mirror cell group comprises a plurality of micro mirror cells, and the target micro mirror cell group is a micro mirror cell group in the plurality of micro mirror cell groups that is currently to be loaded with data; displaying data of an image to be displayed in each micro mirror cell of the target micro mirror cell group based on the display time length of each bit plane; wherein a first time period in which the target micro mirror cell group is loaded with the data of the image to be displayed is within an allowed reset display time period of a first micro mirror cell group, and the first micro mirror cell group is a micro mirror cell group in the plurality of micro mirror cell groups that is currently displaying data; wherein the determination of the display time length of each bit plane comprises determining a first basic display time length based on a micro mirror stabilization time length and a data zeroing time length, and the data zeroing time length is a time length required for performing a data zeroing operation on loaded data in the micro mirror cell array; determining the display time length of each bit plane in a plurality of bit planes of the image to be displayed based on the first basic display time length; the displaying of the data of the image to be displayed in each micro mirror cell of the target micro mirror cell group based on the display time length of each bit plane comprises: displaying data in a plurality of bit planes in the image to be displayed based on the display time length of each bit plane, a data loading time length, and the micro mirror stabilization time length, so that a display time length of the image to be displayed is less than a reference time length, data in some bit planes in the plurality of bit planes is loaded after the data zeroing operation is performed on loaded data in the micro mirror cell array, the data loading time length is greater than the data zeroing time length, and the reference time length is a display time length of displaying one frame of image based on a reference basic display time length, and the reference basic display time length is greater than the first basic display time length.

2. The method of claim 1, wherein the determination of the bit planes corresponding to the target micro mirror cell group in the micro mirror cell array comprises: determining target bit planes corresponding to the target micro mirror cell group in the micro mirror cell array; after the determination of the target bit planes corresponding to the target micro mirror cell group in the micro mirror cell array, the method further comprises: loading target data on the target bit planes into the target micro mirror cell group based on binary grayscale values of each micro mirror cell in the target micro mirror cell group, so that the target micro mirror cell group displays based on the target data; wherein at an end time of the first time period, a remaining reset display time length of each micro mirror cell group in the plurality of micro mirror cell groups is not less than a data loading time length required by the corresponding micro mirror cell group, and an absolute value of a difference between the remaining reset display time lengths of any two micro mirror cell groups in the plurality of micro mirror cell groups is not less than the data loading time length required by the corresponding micro mirror cell group.

3. The method of claim 2, wherein the determination of the target bit planes corresponding to the target micro mirror cell group in the micro mirror cell array comprises: obtaining the data loading time length required by each micro mirror cell group in the plurality of micro mirror cell groups. determining a reset display time length of each bit plane in a plurality of bit planes, the plurality of bit planes being determined based on a gray scale level of an image displayed by the array of micro-mirror units, the plurality of bit planes including the target bit plane; determining the target bit plane corresponding to the target group of micro-mirror units based on a data loading time length required by each group of micro-mirror units and the reset display time length of each bit plane.

4. The method of claim 3, wherein the determining the target bit plane corresponding to the target group of micro-mirror units based on the data loading time length required by each group of micro-mirror units and the reset display time length of each bit plane comprises: determining the target group of micro-mirror units based on a position sequence of the plurality of groups of micro-mirror units during a first data loading of each group of micro-mirror units in the array of micro-mirror units; determining a total data loading time length required by a second group of micro-mirror units in the plurality of groups of micro-mirror units which has not loaded data based on the data loading time length required by each group of micro-mirror units; determining a remaining reset display time length of the first group of micro-mirror units at an end time of the first time period; determining the target bit plane based on the total data loading time length required by the second group of micro-mirror units, the remaining reset display time length of the first group of micro-mirror units and the reset display time length of each bit plane.

5. The method of claim 3, wherein the determining the target bit plane corresponding to the target group of micro-mirror units based on the data loading time length required by each group of micro-mirror units and the reset display time length of each bit plane comprises: determining a remaining reset display time length of a plurality of the first groups of micro-mirror units at a current time during an n-th data loading of each group of micro-mirror units in the array of micro-mirror units, n being greater than 1 and not greater than a gray scale level of an image displayed by the array of micro-mirror units; selecting a group of micro-mirror units with a shortest remaining reset display time length from the plurality of the first groups of micro-mirror units as the target group of micro-mirror units; obtaining a data loading time length required by the target group of micro-mirror units; determining the target bit plane based on the reset display time length of each bit plane, the data loading time length required by the target group of micro-mirror units and a remaining reset display time length of the remaining groups of micro-mirror units in the plurality of the first groups of micro-mirror units except the target group of micro-mirror units.

6. The method of claim 3, wherein the obtaining the data loading time length required by each group of micro-mirror units in the plurality of groups of micro-mirror units comprises: determining a data loading time length required by a row of micro-mirror units based on a resolution of an image displayed by the array of micro-mirror units, a data transmission bus bit width and a clock period; and determining the data loading time length required by each group of micro-mirror units based on the data loading time length required by the row of micro-mirror units.

7. The method of any one of claims 2-6, wherein each group of micro-mirror units in the plurality of groups of micro-mirror units comprises at least one sub-array, and each sub-array comprises a plurality of rows of micro-mirror units.

8. The method of claim 1, wherein the displaying the data on the plurality of bit planes in the image to be displayed based on the display time length, the data loading time length and the micro-mirror stabilization time length comprises: determining a sum of the data loading time length and the micro-mirror stabilization time length as a target time length; if a first display time length of a first bit plane is less than the target time length, performing a data zeroing operation on the micro-mirror cell array during displaying first data on the first bit plane by the micro-mirror cell array, and performing a reset operation on the micro-mirror cell array after the first data is displayed to make the micro-mirror cell array in a light-off state, the first bit plane being any bit plane in the plurality of bit planes; and loading second data on a second bit plane to the micro-mirror cell array and controlling the micro-mirror cell array to display the second data with the micro-mirror cell array in the light-off state, the second bit plane being a bit plane to be displayed next after the first bit plane; and if the first display time length is not less than the target time length, loading the second data to the micro-mirror cell array during displaying the first data by the micro-mirror cell array, and controlling the micro-mirror cell array to display the second data after the first data is displayed.

9. The method of claim 1, wherein the determining the first base display time length based on the micro-mirror stabilization time length and the data zeroing time length comprises: determining a sum of the micro-mirror stabilization time length and the data zeroing time length as the first base display time length.

10. The method of claim 1 or 9, comprising: a processor; a memory for storing executable instructions of the processor; wherein the processor executes the executable instructions in the memory to perform the image display method of any one of claims 1-10.

12. A laser projection device comprising a light source, a light engine, a lens and a control device, the light engine comprising a digital micro-mirror device (DMD), the control device being configured to control the DMD to perform the steps of the image display method of any one of claims 1-10.

13. A computer readable storage medium having stored therein a computer program, the computer program being executed by a computer to implement the steps of the image display method of any one of claims 1-11. ​ ​ ； wherein The is the data zeroing duration, n is the number of bitplanes, k is used to indicate the kth bitplane among n bitplanes, and is the data loading duration, n is the number of bitplanes, k is used to indicate the kth bitplane among n bitplanes, and is the reset duration required for the reset operation, n is the number of bitplanes, k is used to indicate the kth bitplane among n bitplanes, and is the micro-mirror settling duration, and m is the number of bitplanes in the n bitplanes whose display duration is less than the sum of the micro-mirror settling duration and the data loading duration.

11. An image display device, the device comprising: ​ ​ ​ ​

Images