Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel comprises a substrate, a first surface, a second surface and a first side surface connected with the first surface and the second surface, the first side surface comprises a first sub-surface and a second sub-surface, and the first sub-surface and the second sub-surface are not parallel; a signal line comprising a first wire segment and a second wire segment connected with each other, the first wire segment is located on the first sub-surface, and the second wire segment is located on the second sub-surface; and a pad layer located between the first sub-surface and the first wire segment. According to the display panel and the display device provided by the application, the stability of the side wire connection can be improved, and the yield can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and display device. Background Technology

[0002] To improve the display effect of display devices, narrow bezels or even bezel-less displays are gradually becoming one of the development directions of display technology. To reduce the width of the bezel, some display panels use side wiring technology, so that part of the wiring is located on the front, part on the side, and part on the back of the display panel. However, side wiring is prone to breakage. Summary of the Invention

[0003] This application provides a display panel and display device that can improve the stability of side wiring connections and increase yield.

[0004] In a first aspect, embodiments of this application provide a display panel, comprising: a substrate, including a first surface and a second surface disposed opposite to each other, and a first side surface connecting the first surface and the second surface, the first side surface including a first sub-surface and a second sub-surface, the first sub-surface and the second sub-surface being non-parallel; a signal line, including a first trace segment and a second trace segment connected to each other, the first trace segment being located on the first sub-surface and the second trace segment being located on the second sub-surface; and a pad layer located between the first sub-surface and the first trace segment.

[0005] Based on the same inventive concept, in a second aspect, embodiments of this application also provide a display device, including a display panel as described in the first aspect embodiment.

[0006] The first sub-surface is more parallel to the first plane than the second sub-surface. During signal line fabrication, the first trace segment is prone to necking, leading to a risk of breakage. According to the display panel and display device provided in this application, a padding layer is added between the first trace segment and the first sub-surface. This padding layer provides a buffering effect, mitigating the necking problem caused by uneven stress during the fabrication of the first trace segment, thus reducing the risk of breakage and improving yield.

[0007] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0008] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0009] Figure 1 This illustration shows a cross-sectional structural diagram of a display panel provided in an embodiment of this application;

[0010] Figure 2a for Figure 1 A partial enlarged view of the Q1 region of the display panel provided in the embodiment of this application;

[0011] Figure 2b for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiment of this application;

[0012] Figure 3 for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiment of this application;

[0013] Figure 4 This diagram illustrates a partial structural diagram of a side view of a display panel provided in an embodiment of this application.

[0014] Figure 5 Show Figure 2a A partial structural diagram of a side of a display panel provided in an embodiment of this application;

[0015] Figure 6 for Figure 5 A partial enlarged view of the Q2 region of the display panel provided in the embodiment of this application;

[0016] Figure 7 for Figure 2a A partial enlarged view of the Q3 region of the display panel provided in the embodiment of this application;

[0017] Figure 8 Show Figure 2a A partial structural diagram of another side of the display panel provided in an embodiment of this application;

[0018] Figure 9 Show Figure 3 A partial structural diagram of a side of a display panel provided in an embodiment of this application;

[0019] Figure 10 for Figure 3 A partial enlarged view of the Q4 region of the display panel provided in the embodiment of this application;

[0020] Figure 11 for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiment of this application;

[0021] Figure 12 for Figure 11Another enlarged view of the Q5 region of the display panel provided in the embodiment of this application;

[0022] Figure 13 for Figure 11 A schematic diagram of an unfolded structure of a portion of the conductive units of a display panel provided in an embodiment of this application;

[0023] Figure 14 for Figure 11 A schematic diagram of another unfolded structure of some conductive units of the display panel provided in the embodiments of this application;

[0024] Figure 15 for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiment of this application;

[0025] Figure 16 This is a schematic diagram of a display device provided in an embodiment of this application.

[0026] Explanation of reference numerals in the attached figures:

[0027] 100. Display panel;

[0028] 1. Substrate;

[0029] S1, First surface; S2, Second surface; S3, First side surface; S31, First sub-surface; S32, Second sub-surface; S31a, First Jiazi surface; S31b, First Yizi surface; S31c, First Bingzi surface; S31d, First Dingzi surface;

[0030] S43, third surface; S44, fourth surface;

[0031] 2. Signal line; 21. First wiring segment; 22. Second wiring segment;

[0032] 3. Pad layer; 31. Conductive unit; 311. First conductive part; 312. Second conductive part; 313. Third conductive part; 31c. Conductive unit C; 31d. Conductive unit D;

[0033] 4. Light-emitting element;

[0034] 5. Solder pads;

[0035] 6. Backside wiring;

[0036] 7. Connecting wires;

[0037] 1000. Display device. Detailed Implementation

[0038] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0039] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0040] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0041] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0042] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0043] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0044] Before describing the technical solutions provided in the embodiments of this application, in order to facilitate understanding of the embodiments of this application, this application first specifically explains the problems existing in the related technologies:

[0045] Micro LED seamless splicing technology requires the development of a double-sided side metal routing process, where the side metal routing leads the lines on the front of the display panel through the side of the panel to the back. Currently, the mainstream solutions in the industry are laser direct engraving and pad printing. Laser engraving faces challenges such as low efficiency and the risk of damaging the circuitry; pad printing, mainly used to form side routing, faces the problem of front-back alignment misalignment, and due to material deformation, it is impossible to achieve small line widths and spacing for the overall side routing. To address this issue, the inventors of this application propose a pattern transfer resist (PTR) solution that integrates side and back routing, solving the difficulties in back patterning and back alignment bottlenecks.

[0046] However, the inventors also discovered through research that in the PTR solution, uneven force and film stretching during the pressing process can easily lead to necking of the side traces, which can cause the side traces to break.

[0047] In view of the above-mentioned technical problems, this application proposes a display panel and a display device. The display panel includes a substrate, signal lines, and a pad. The substrate includes a first surface and a second surface disposed opposite to each other, and a first side surface connecting the first surface and the second surface. The first side surface includes a first sub-surface and a second sub-surface, which are not parallel. The signal lines include a first trace segment and a second trace segment connected to each other, the first trace segment located on the first sub-surface, and the second trace segment located on the second sub-surface; the pad is located between the first sub-surface and the first trace segment. For example, the first sub-surface is more parallel to a first plane than the second sub-surface. The first plane is equivalent to the plane on which the display panel is located, and the first surface and the second surface can be equivalent to being parallel to the first plane. During signal line fabrication, the first trace segment is prone to necking, leading to a risk of breakage. In this application embodiment, a pad is added between the first trace segment and the first sub-surface. The pad can provide a certain buffering effect, improving the compression deformation of the first trace segment due to uneven stress during fabrication, thereby improving the necking problem, reducing the risk of breakage, and increasing yield.

[0048] Figure 1 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 2a for Figure 1 A partial enlarged view of the Q1 region of the display panel provided in the embodiments of this application. Figure 2b for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiment of this application. Figure 3 for Figure 1 Another enlarged view of the Q1 region of the display panel provided in the embodiments of this application.

[0049] Please refer to Figures 1 to 3 This application provides a display panel including a substrate 1, signal lines 2, and a pad layer 3.

[0050] The substrate 1 includes a first surface S1 and a second surface S2 disposed opposite to each other, and a first side surface S3 connecting the first surface S1 and the second surface S2. The first side surface S3 includes a first sub-surface S31 and a second sub-surface S32, which are not parallel. The first surface S1 can be understood as the front side, and the second surface S2 can be understood as the back side. One side of the second surface S2 can be used to place a driver chip. The first sub-surface S31 is more parallel to the first plane than the second sub-surface S32. The first plane is equivalent to the plane on which the display panel is located, and the first surface S1 and the second surface S2 can be parallel to the first plane. The signal line 2 includes a first trace segment 21 and a second trace segment 22 connected to each other. The first trace segment 21 is located on the first sub-surface S31, and the second trace segment 22 is located on the second sub-surface S32. The pad layer 3 is located between the first sub-surface S31 and the first trace segment 21. The pad layer 3 is in contact with both the first sub-surface S31 and the first trace segment 21.

[0051] The first sub-face is more parallel to the first plane than the second sub-face. During signal line fabrication, the first trace segment is prone to necking, which can lead to breakage. In this embodiment, a padding layer is added between the first trace segment and the first sub-face. The padding layer can play a certain buffering role, which can improve the compression deformation of the first trace segment due to uneven stress during fabrication, thereby improving the necking problem, reducing the risk of breakage, and improving the yield.

[0052] For example, substrate 11 may be formed of polymeric materials such as glass, polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyaryl compounds (PAR), or glass fiber reinforced plastic (FRP). Substrate 11 may be transparent, translucent, or opaque.

[0053] The substrate 1 may be an array substrate, and the substrate 1 may include pixel circuits.

[0054] The display panel also includes a light-emitting element 4, pads 5, and a back trace 6. The light-emitting element 4 is located on the first surface S1 and is coupled to the pixel circuitry of the substrate 1. The pads 5 are located on the first surface S1 and are coupled to the pixel circuitry of the substrate 1, and are also connected to the signal line 2. The pads 5 can be connected to the signal line 2 via a connecting line 7, which is located on the first surface S1 and overlaps with the pads 5. The back trace 6 is located on the second surface S2 and is connected to the signal line 2.

[0055] The light-emitting element 4 can be a micro-LED or a mini-LED. For ease of explanation, this embodiment will be described using a flip-chip micro-LED as an example.

[0056] The pixel circuit is used to control and drive the light-emitting element 4. The pixel circuit may include a thin-film transistor (TFT). Multiple pads 5 are coupled to the pixel circuit.

[0057] One end of the back trace 6 is connected to the driver chip, and the other end is connected to the signal line 2. The back trace 6 is used to transmit the drive signal from the driver chip to the signal line 2, and the signal line 2 is used to transmit the drive signal to the pixel circuit. The pixel circuit is used to drive the light-emitting element 4 to emit light according to the drive signal.

[0058] Fan-out trace 6 and signal line 2 can be integrally formed. For example, a PTR process can be used to integrally form back trace 6 and signal line 2. Understandably, since back trace 6 and signal line 2 are integrally formed, there is no need to align back trace 6 and signal line 2, which solves the alignment bottleneck problem of side traces and back traces.

[0059] For example, the first sub-surface S31 is a chamfered surface, and the second sub-surface S32 is an end face. The chamfered surface connects the end face and the first surface S1, and / or, the chamfered surface connects the end face and the second surface S2. As an example, the connections between the first surface S1 and the end face, and between the second surface S2 and the end face, are both chamfered surfaces.

[0060] The chamfered surface can be a bevel (i.e., an inclined plane) or a curved surface. When the chamfered surface is a bevel, the bevel height and width can be set according to actual needs, and this application does not limit this. When the chamfered surface is a curved surface, the chamfered surface protrudes outward relative to the substrate. For example, the chamfered surface can be an arc surface; similarly, the arc radius of the chamfered surface can be set according to actual needs, and this application does not limit this.

[0061] The end face is a plane, and the end face can be perpendicular to the first surface S1 and the second surface S2.

[0062] During the fabrication of signal line 2, the chamfered surface and the end face experience different forces. The chamfered surface is prone to deformation due to uneven force, leading to necking in the first trace segment and increasing the risk of breakage. In this embodiment, a padding layer is added to the chamfered surface. This padding layer provides a buffering effect, mitigating the deformation caused by uneven force during the fabrication of the first trace segment, thus reducing necking, lowering the risk of breakage, and improving yield.

[0063] In some embodiments, such as Figure 4 As shown, multiple first trace segments 21 are arranged along the first direction X. Along the first direction X, the width of the signal line 2 at the plane intersection is less than the width of the signal line 2 at least part of the non-intersection.

[0064] The inventors discovered that necking tends to occur at the intersection of two planes. Therefore, the width of signal line 2 at the intersection of two planes is smaller than the width at the non-intersection.

[0065] It should be noted that, Figure 4 The subbase layer 3 is hidden in the drawing.

[0066] For example, with Figure 4For example, both the first sub-surface S31 and the second sub-surface S32 are planes, and the first sub-surface S31 and the second sub-surface S32 are not parallel. The line width of signal line 2 at the intersection of the first sub-surface S31 and the second sub-surface S32 is relatively small, and the line width at the non-intersection of the first sub-surface S31 and the second sub-surface S32 is relatively large.

[0067] For example, the first surface S1 is a plane, and the first sub-surface S31 is not parallel to the first surface S1. The line width of signal line 2 is relatively small at the junction of the first sub-surface S31 and the first surface S1, and relatively large at the non-junction of the first sub-surface S31 and the first surface S1.

[0068] The above methods can improve the reliability of the side wiring structure.

[0069] The following are some examples illustrating the structure of the padding layer.

[0070] In some embodiments, the pad 3 may be conductive. For example... Figure 5 As shown, the padding layer 3 includes multiple conductive units 31 spaced apart from each other, with each conductive unit 31 corresponding to a first trace segment 21. In other words, a first trace segment 21 can be contacted with one of the conductive units 31, while a first trace segment 21 is insulated from other conductive units 31. This ensures that different signal lines 2 are mutually insulated, avoiding signal crosstalk between different signal lines 2. Furthermore, since the conductive units 31 are conductive, even if the placement of the conductive units 31 cannot reduce necking, it still ensures that the continuity of the first trace segment 21 is not affected. That is, the conductive unit 31 and the first trace segment 21 as a whole can still conduct normally as a single trace, thereby reducing the risk of wire breakage due to necking.

[0071] For example, each conductive unit 31 may be made of a metallic conductive material.

[0072] For example, the conductive unit 31 can be prepared using a vapor deposition process, and the morphology of the gold conductive unit 31 follows the morphology of the first sub-surface S31. For example, if the first sub-surface S31 is planar, the surface of the gold conductive unit 31 facing away from the first sub-surface S31 is also planar. Or, for another example, if the first sub-surface S31 is an arc surface, the surface of the gold conductive unit 31 facing away from the first sub-surface S31 is also an arc surface.

[0073] As an example, such as Figure 2b As shown, the first sub-face S31 may have a groove K, which is used to accommodate at least a portion of the conductive unit 31. In this way, while improving the above-mentioned problems, the structural stability of the conductive unit can also be improved, and cracks such as those caused by chamfered traces at step differences can be avoided.

[0074] In some embodiments, please refer to the reference Figure 5 and Figure 6 Multiple first trace segments 21 are arranged along the first direction X. Along the first direction X, the maximum width of the conductive unit 31 is D1, and the maximum width of the first trace segment 21 is D2, where D1 ≥ D2. That is to say, the line width of the conductive unit 31 is greater than or equal to the line width of the first trace segment 21.

[0075] The conductive unit 31 and the first trace segment 21 are manufactured using two separate processes. Therefore, when aligning the conductive unit 31 and the first trace segment 21, there may be a positioning error along the first direction X. However, the conductive unit 31 and the first trace segment 21 have a width difference, and the extra portion along the first direction can form redundant space when connecting the conductive unit 31 and the first trace segment 21. When there is a positioning error between the conductive unit 31 and the first trace segment 21 in the first direction, due to the existence of redundant space, the width of the actual overlapping area of ​​the conductive unit 31 and the first trace segment 21 can still meet the connection requirements of the conductive unit 31 and the first trace segment 21. This ensures that the connection between the conductive unit 31 and the first trace segment 21 has good physical and electrical connection stability, thereby improving the yield of the display panel.

[0076] In some embodiments, please refer to the reference Figure 2a and Figure 7 The first line segment 21 extends along the second direction Y, the length of the first sub-surface S31 is L1, the length of the conductive unit 31 is L2, and L1≥L2.

[0077] In the fabrication process of the display panel, conductive units 31 can be fabricated first on the first sub-surface S31 of the substrate, followed by signal lines 2 (signal lines 2 include a first trace segment 21 and a second trace segment 22), and then the light-emitting element 4 can be transferred to the first surface S1 of the substrate 1. If L2 > L1, the traces are prone to forming protrusions on the planar portion, which increases the difficulty of transferring the light-emitting element 4. In the embodiments of this application, when L1 ≥ L2, the risk of the traces forming protrusions on the planar portion can be reduced, thereby avoiding increasing the difficulty of transferring the light-emitting element 4.

[0078] In some embodiments, such as Figure 7 As shown, the conductive unit 31 includes a first conductive portion 311, a second conductive portion 312, and a third conductive portion 313 that are interconnected. The second conductive portion 312 is located between the first conductive portion 311 and the third conductive portion 313, and the third conductive portion 313 is connected to the second trace segment 22. The thicknesses of the first conductive portion 311, the second conductive portion 312, and the third conductive portion 313 are equal.

[0079] The second conductive part 312 is the middle part of the conductive unit 31, and the first conductive part 311 and the third conductive part 313 are the two ends of the conductive unit 31.

[0080] The thickness of the first conductive part 311, the second conductive part 312, and the third conductive part 313 is the distance between the surface of the conductive part facing away from the first sub-surface S31 and the first sub-surface S31.

[0081] Conductive units can be prepared using vapor deposition equipment. Compared to vapor deposition equipment, the area of ​​conductive units is very small. Therefore, the thickness of each part of conductive unit 31 will not be significantly different. Thus, the thicknesses of the first conductive part 311, the second conductive part 312, and the third conductive part 313 can be equal.

[0082] Of course, in some alternative embodiments, such as Figure 3 or Figure 10 As shown, different portions of the padding layer 3 can have different thicknesses along its extension direction. For example, the thickness at both ends of the padding layer 3 may be less than the thickness in the middle. Alternatively, the thickness of different portions of the padding layer can be set according to other requirements.

[0083] It should be noted that the two or more parameter indicators defined in the various embodiments of this application are equal, and a certain error is allowed. For example, if the error is allowed, the two or more parameter indicators can be approximately equal.

[0084] In some embodiments, the surface of the conductive unit 31 facing away from the first sub-surface S31 may be parallel to the first sub-surface S31. That is, the thickness of each part of the conductive unit 31 is equal.

[0085] In some embodiments, such as Figure 8 As shown, the line width of at least a portion of the first trace segment 21 can be gradually varied. For example, the first end of the first trace segment 21 is the end that connects to the second trace segment 22, and the line width of the first end of the first trace segment 21 can gradually decrease in a direction parallel to the extension direction of the first trace segment 21 and away from the second trace segment 22.

[0086] Adding conductive units 31 may not change the necking shape of the signal line; therefore, the line width of at least a portion of the first trace segment 21 can vary gradually. The trend of line width variation in at least a portion of the first trace segment 21 can be determined according to the actual situation.

[0087] The above describes some exemplary structures where the padding layer is conductive. It should be noted that although the above embodiments are described using conductive units as examples, such as describing dimensions, thickness, or other parameters, the above embodiments are also applicable to padding layers made of elastic materials.

[0088] In other embodiments, please refer to the references. Figure 3 and Figure 9The pad 3 is insulating and overlaps with multiple first trace segments 21. That is to say, the pad 3 is non-conductive, and multiple first trace segments 21 can share one pad 3.

[0089] In some embodiments, the insulating pad 3 may be elastic. For example, the pad 3 may be made of an elastic insulating material, such as PI, epoxy, acrylic, siloxane system, etc.

[0090] The elastic pad 3 can be regarded as an elastomer, which is equivalent to adding an elastic buffer to the first trace segment 21. In this way, the elastic deformation characteristics of the elastic pad 3 can be used to buffer the deformation of the first trace segment on the first sub-surface due to uneven force during the pressing process, which can reduce necking and reduce the necking effect. This can increase the trace width at the plane intersection, make the trace width of each part of the signal line consistent, and improve the risk of line breakage caused by necking.

[0091] In some embodiments, such as Figure 10 As shown, the pad 3 includes a third surface S43 and a fourth surface S44 that are connected to each other. The third surface S43 is parallel to the first surface S1, and the fourth surface S44 is parallel to the second sub-surface S32.

[0092] The first surface S1 is a plane, the second sub-surface S32 is a plane, and the third surface S43 and the fourth surface S44 are also planes. The included angle between the third surface S43 and the fourth surface S44 is 90°.

[0093] As an example, the step difference between the third surface S43 and the first surface S1 is 0; the step difference between the fourth surface S44 and the second sub-surface S32 is 0. This can be understood as the padding layer 3 being embedded in the first surface S1 and the second sub-surface S32. The padding layer 3 is an elastomer planarization layer. In this embodiment, the elastic padding layer 3 is used to fill the gap in the substrate 1, which can better mitigate the risk of wire breakage caused by necking.

[0094] In some embodiments, such as Figure 9 As shown, multiple first routing segments are arranged along the first direction X. Along the first direction X, the maximum width of the first routing segment 21 is D2, and the maximum width of the second routing segment 22 is D3, where D2≤D3.

[0095] The inventors discovered that even when using an elastic padding layer 3 for leveling, necking may not be completely avoided. Therefore, the maximum width of the first trace 21 may be less than or equal to the maximum width of the second trace 22. Understandably, using an elastic padding layer 3 for leveling increases the likelihood that the first trace 21 and the second trace 22 will have the same width.

[0096] The above describes some exemplary structures in which the padding layer has insulating properties.

[0097] In some embodiments, such as Figure 2a or Figure 3 As shown, the first side surface S3 includes two first sub-surfaces S31 and one second sub-surface S32, with the second sub-surface S32 connected between the two first sub-surfaces S31. For ease of explanation, one of the first sub-surfaces is designated as first sub-surface S31a, and the other is designated as first sub-surface S31b. First sub-surface S31a connects the second sub-surface S32 and the first surface S1, while first sub-surface S31b connects the second sub-surface S32 and the second surface S2. It is understood that a signal line 2 may include two first trace segments 21 and one second trace segment 22, with the second trace segment 22 connected between the two first trace segments 21. One first trace segment 21 is located on the first sub-surface S31a, and the other first trace segment 21 is located on the first sub-surface S31b. Both the first sub-surface S31a and the first sub-surface S31b are provided with a padding layer 3.

[0098] The first plane corresponds to the plane where the display panel is located. The first surface S1 and the second surface S2 can be parallel to the first plane. The first sub-surface S31a and the first sub-surface S31b are more parallel to the first plane than the second sub-surface S32. The first trace segment 21 of the first sub-surface S31a and the first sub-surface S31b are prone to necking problems, which can lead to the risk of line breakage. In the embodiments of this application, a padding layer is added to both the first sub-surface S31a and the first sub-surface S31b. The padding layer can play a certain buffering role, which can improve the compression deformation of the first trace segment on the first sub-surface S31a and the first sub-surface S31b due to uneven stress during manufacturing, thereby improving the necking problem, reducing the risk of line breakage, and improving the yield.

[0099] The structure of the pad 3 on the first A-side S31a and the pad 3 on the first B-side S31b may be the same or different. It is understood that the conductive or insulating pad structure described in the above example is applicable to both the pad 3 on the first A-side S31a and the pad 3 on the first B-side S31b.

[0100] The examples above illustrate how the side surface of the substrate is connected to the top or bottom surface of the substrate through a chamfered surface. In other examples, the side surface of the substrate may also be connected to the top or bottom surface of the substrate through at least two chamfered surfaces.

[0101] As an example, please refer to the reference. Figure 11 and Figure 12The first sub-surface S31 includes a first C-surface S31c and a first T-surface S31d. The first T-surface S31d connects the first C-surface S31c and the second sub-surface S32. The first C-surface S31c is connected to the first surface S1, or the first C-surface S31c is connected to the second surface S2. The angle between the first C-surface S31c and the second sub-surface S32 is θ1, and the angle between the first T-surface S31d and the second sub-surface S32 is θ2, where θ2 < θ1 < 90°.

[0102] It should be noted that the angle between the first sub-plane S31c and the second sub-plane S32 consists of two complementary angles. In this embodiment, for example... Figure 12 As shown, angle θ1 refers to the angle between the first sub-surface S31c and the second sub-surface S32 on the outer side of the substrate 1; similarly, angle θ2 refers to the angle between the first sub-surface S31d and the second sub-surface S32 on the outer side of the substrate 1.

[0103] The first C1 surface S31c and the first D1 surface S31d are equivalent to two transitional chamfered surfaces. By setting two transitional chamfered surfaces, the transition between the first line segment 21 and the second line segment 22 can be gradual, which is beneficial to improving the necking effect.

[0104] In some embodiments, please refer to the reference Figure 11 and Figure 12 At least the first C-side S31c and the first T-side S31d are provided with a padding layer 3.

[0105] During the lamination process to form traces, lamination can be performed first on the side of the substrate, and then on the upper and lower surfaces of the substrate. Therefore, signal lines on the first terrestrial surface S31c near the upper or lower surface are more prone to uneven stress. At least when the first terrestrial surface S31c is provided with a pad layer 3, the area more prone to uneven stress can be improved, thereby increasing the yield.

[0106] In some embodiments, please refer to the reference Figure 11 , Figure 12 and Figure 13 The pad 3 is conductive and includes a plurality of conductive units 31 arranged at intervals along the first direction X. The conductive units 31 are arranged in a one-to-one correspondence with the first trace segment 21.

[0107] The conductive unit 31 includes a C conductive unit 31c and a D conductive unit 31d. The conductive unit provided on the first C surface S31c is the C conductive unit 31c, and the conductive unit provided on the first D surface S31d is the D conductive unit 31d.

[0108] In the extending direction of the conductive unit and in the direction Z extending towards the second sub-face, the width of conductive unit 31c gradually decreases, and the width of conductive unit 31d gradually decreases. For example, as... Figure 12 and Figure 13 The direction of extension from the first end of the conductive unit 31 to its second end is direction Z. The first end of the conductive unit 31 is close to the first surface S1 or the second surface S2, and the first end of the conductive unit 31 is close to the second sub-surface S32.

[0109] For example, conductive unit C 31c and conductive unit D 31d can be configured as a trapezoid. Here, the trapezoid can be understood as the orthographic projection of conductive unit C 31c and conductive unit D 31d onto the first surface S1, the second surface S2, or the second sub-surface S32 being a trapezoid.

[0110] From the perspective of manufacturing process, the graded structure of conductive unit 31c (C-type) and conductive unit 31d (D-type) in this example reduces the difficulty of the process.

[0111] In other embodiments, please refer to the references. Figure 11 and Figure 14 The pad 3 is conductive and includes a plurality of conductive units 31 arranged at intervals along the first direction X. The conductive units 31 are arranged in a one-to-one correspondence with the first trace segment 21.

[0112] The conductive unit set on the first C-surface S31c is the C-conductive unit 31c, and the conductive unit set on the first D-surface S31d is the D-conductive unit 31d. In the direction Z extending toward the second sub-surface, the width of the C-conductive unit 31c first increases and then decreases, while the width of the D-conductive unit 31d gradually decreases.

[0113] For example, conductive unit C 31c and conductive unit D 31d can collectively form a hammer-shaped structure. Here, the hammer-shaped structure can be understood as follows: the orthographic projection of conductive unit C 31c and conductive unit D 31d onto the first surface S1, the second surface S2, or the second sub-surface S32 is a hammer-shaped structure.

[0114] This example can prevent the effects of laser bonding thermal effects and avoid bulging caused by excessive metal density.

[0115] When the side surface of a substrate is connected to its upper or lower surface via at least two chamfered surfaces, the chamfered surfaces can also be filled using a pad of insulating elastomer. For example, as Figure 15 As shown, the first C-side S31c and the first T-side S31d are provided with a padding layer 3, which can have insulation and elasticity, thereby filling the chamfer.

[0116] It should be noted that, Figure 5 , Figure 8 , Figure 9 , Figure 13 as well as Figure 14 In the middle, dashed lines indicate the boundaries between different surfaces. Figure 5 For example, the boundary between the first sub-face S31 and the second sub-face S32 is indicated by a dashed line.

[0117] Based on the same inventive concept, this application also provides a display device, including the display panel provided in this application. Please refer to... Figure 16 , Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 16 The provided display device 1000 includes the display panel 100 provided in any of the above embodiments of this application. Figure 16 This embodiment uses a mobile phone as an example to illustrate the display device 1000. It is understood that the display device provided in this application embodiment can be any other display device with display function, such as a tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. This application does not impose specific limitations on this. The display device provided in this application embodiment has the beneficial effects of the display panel provided in this application embodiment. For details, please refer to the specific descriptions of the display panel in the above embodiments; these will not be repeated here.

[0118] Furthermore, the display device 1000 is a splicing display device, which includes at least two display panels 100, and both display panels can be the display panels described in the foregoing embodiments of this application.

[0119] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, include: The substrate includes a first surface and a second surface disposed opposite to each other, and a first side surface connecting the first surface and the second surface. The first side surface includes a first sub-surface and a second sub-surface. The first sub-surface and the second sub-surface are not parallel. The first sub-surface is a chamfered surface, and the second sub-surface is an end face. The chamfered surface connects the end face and the first surface, and / or the chamfered surface connects the end face and the second surface. The signal line includes a first trace segment and a second trace segment that are connected to each other. The first trace segment is located on the first sub-plane, and the second trace segment is located on the second sub-plane. A padding layer is located between the first sub-surface and the first trace segment, and the padding layer does not overlap with the first surface, the second surface, or the second sub-surface. The back trace is located on the second surface and is integrally formed with the signal line. Multiple first trace segments are arranged along a first direction, and along the first direction, the width of the signal line at the plane intersection is less than the width of the signal line at least partially at the non-intersection.

2. The display panel according to claim 1, characterized in that, The padding layer is conductive and includes a plurality of conductive units spaced apart from each other, with each conductive unit corresponding to one of the first trace segments.

3. The display panel according to claim 2, characterized in that, Multiple first trace segments are arranged along a first direction. Along the first direction, the maximum width of the conductive unit is D1, and the maximum width of the first trace segment is D2, where D1 ≥ D2.

4. The display panel according to claim 2, characterized in that, The first trace extends along the second direction, the length of the first sub-surface is L1, the length of the conductive unit is L2, and L1≥L2.

5. The display panel according to claim 2, characterized in that, The conductive unit includes a first conductive part, a second conductive part, and a third conductive part that are connected to each other. The second conductive part is located between the first conductive part and the third conductive part, and the third conductive part is connected to the second trace segment. The thicknesses of the first conductive part, the second conductive part, and the third conductive part are equal.

6. The display panel according to claim 2, characterized in that, The surface of the conductive unit facing away from the first sub-face is parallel to the first sub-face.

7. The display panel according to claim 2, characterized in that, The line width of at least a portion of the first trace segment gradually changes.

8. The display panel according to claim 1, characterized in that, The padding layer is insulating and overlaps with a plurality of the first trace segments.

9. The display panel according to claim 8, characterized in that, The padding layer is elastic.

10. The display panel according to claim 8, characterized in that, The padding layer includes a third surface and a fourth surface that are connected to each other, the third surface being parallel to the first surface and the fourth surface being parallel to the second sub-surface.

11. The display panel according to claim 10, characterized in that, The step difference between the third surface and the first surface is 0; the step difference between the fourth surface and the second sub-surface is 0.

12. The display panel according to claim 8, characterized in that, Multiple first routing segments are arranged along a first direction. Along the first direction, the maximum width of the first routing segment is D2, and the maximum width of the second routing segment is D3, where D2 ≤ D3.

13. The display panel according to claim 1, characterized in that, The first sub-surface includes a first sub-surface A and a first sub-surface B. The first sub-surface A is connected between the second sub-surface B and the first surface, and the first sub-surface B is connected between the second sub-surface B and the second surface. Both the first Jiazi surface and the first Yizi surface are provided with the padding layer.

14. The display panel according to claim 1, characterized in that, The first sub-surface includes a first C-surface and a first T-surface, the first T-surface being connected between the first C-surface and the second sub-surface, the first C-surface being connected to the first surface, or the first C-surface being connected to the second surface; The angle between the first C-plane and the second C-plane is φ1, and the angle between the first D-plane and the second C-plane is φ2, where φ2 < φ1 < 90°.

15. The display panel according to claim 14, characterized in that, The padding layer is provided on at least the first C-side and the first D-side.

16. The display panel according to claim 14, characterized in that, The padding layer is conductive and includes a plurality of conductive units spaced apart from each other and arranged along a first direction. Each conductive unit corresponds to one of the first trace segments. The conductive unit provided on the first C-side is a C-type conductive unit, and the conductive unit provided on the first D-side is a D-type conductive unit. In the direction extending toward the second sub-face, the width of the C conductive unit gradually decreases, and the width of the D conductive unit gradually decreases.

17. The display panel according to claim 14, characterized in that, The padding layer is conductive and includes a plurality of conductive units spaced apart from each other and arranged along a first direction. Each conductive unit corresponds to one of the first trace segments. The conductive unit provided on the first C-side is a C-type conductive unit, and the conductive unit provided on the first D-side is a D-type conductive unit. In the direction extending toward the second sub-surface, the width of the C conductive unit first increases and then decreases, while the width of the D conductive unit gradually decreases.

18. The display panel according to claim 1, characterized in that, The display panel also includes: A light-emitting element is located on the first surface and coupled to the pixel circuit of the substrate; A pad is located on the first surface and coupled to the pixel circuit of the substrate, and the pad is connected to the signal line.

19. A display device, characterized in that, Includes the display panel as described in any one of claims 1-18.

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