Reverse charging method and electronic device

Abstract

The present application discloses a reverse charging method and electronic device, which relates to the field of electronic technology and is used to improve the output power and charging efficiency of reverse charging, thereby improving the user experience. It includes: obtaining first voltage information and second voltage information, the first voltage information is used to indicate the first battery voltage of the first terminal device, and the second voltage information is used to indicate the second battery voltage of the second terminal device; when the difference between the first battery voltage and the second battery voltage is greater than the threshold voltage, the first charging voltage is output to the second terminal device through the first charging and discharging circuit, and the first charging voltage is used to charge the second terminal device; when the difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage, the second charging voltage is output to the second terminal device through the second charging and discharging circuit, and the second charging voltage is used to charge the second terminal device, and the second charging voltage is less than the first charging voltage.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a reverse charging method and electronic equipment. Background Art

[0002] With the rapid development of electronic applications, more and more electronic devices with reverse charging function have emerged. Reverse charging means that one electronic device (such as a mobile phone) charges another electronic device (such as a tablet) through a data cable. The electronic device that serves as the power supply can be called the host device, and the electronic device being charged can be called the slave device.

[0003] In the prior art, when a master device charges a slave device through a data line, the actual charging current output by the master device can only reach a maximum of 1.2A (amperes) due to the current derating requirements of the load inductor in the master device, and the output power and charging efficiency are relatively low.

[0004] Based on this, how to improve the output power and charging efficiency of reverse charging, thereby improving user experience, has become a technical problem that needs to be solved urgently. Summary of the invention

[0005] The embodiments of the present application provide a reverse charging method and an electronic device for improving the output power and charging efficiency of reverse charging, thereby improving the user experience.

[0006] In order to achieve the above objectives, this application adopts the following technical solutions:

[0007] In a first aspect, a reverse charging method is provided, which is applied to a first terminal device, the first terminal device is connected to a second terminal device through a data line, the first terminal device includes a first charge and discharge circuit (for example, an LVC charge and discharge circuit) and a second charge and discharge circuit (for example, a boost charge and discharge circuit), the method including: obtaining first voltage information and second voltage information, the first voltage information is used to indicate a first battery voltage of the first terminal device, and the second voltage information is used to indicate a second battery voltage of the second terminal device; when the difference between the first battery voltage and the second battery voltage is greater than a threshold voltage, outputting a first charging voltage to the second terminal device through the first charge and discharge circuit, the first charging voltage is used to charge the second terminal device; when the difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage, outputting a second charging voltage to the second terminal device through the second charge and discharge circuit, the second charging voltage is used to charge the second terminal device, and the second charging voltage is less than the first charging voltage.

[0008] In the case of adopting the above technical solution, after obtaining the first battery voltage of the first terminal device and the second battery voltage of the second terminal device, the first terminal device can determine the voltage difference between the first battery voltage and the second battery voltage. When the voltage difference is greater than the threshold voltage, the second terminal device can be charged through the first charge and discharge circuit. When the voltage difference is less than or equal to the threshold voltage, the second terminal device can be charged through the second charge and discharge circuit. In this way, when the first battery voltage is high, the first battery voltage can be directly charged to the second terminal device without boosting, and the first charging voltage is greater than the second charging voltage, and the output power of the first charge and discharge circuit is higher and the charging efficiency is also higher; when the first battery voltage is low, the first battery voltage can be boosted by the boost charge and discharge circuit, and then the second terminal device can be charged with the second charging voltage after the boosting process, which improves the output power and charging efficiency of the second charge and discharge circuit to a certain extent.

[0009] In a possible implementation of the first aspect, the method further includes: when the first charging voltage is output to the second terminal device through the first charging and discharging circuit, adjusting the first charging voltage, and the absolute value of the difference between the adjusted first charging voltage and the second battery voltage is less than a preset value. In the above possible implementation, the first charging voltage can be adjusted by the auxiliary signal CC1 and / or CC2 between the first terminal device and the second terminal device to reduce the first charging voltage, so that the first charging voltage can be closer to the second battery voltage, avoiding the problem of energy loss during the charging process due to the excessive voltage difference between the first charging voltage and the second battery voltage, thereby improving the output power and charging efficiency to a certain extent.

[0010] In a possible implementation of the first aspect, the method further includes: when the first charge and discharge circuit outputs the first charging voltage, adjusting the charging current corresponding to the first charge and discharge circuit. In the above possible implementation, the output current of the first charge and discharge circuit can be adjusted by the auxiliary signal CC1 and / or CC2 between the first terminal device and the second terminal device, and the charging current can be increased to improve the output power and charging efficiency when the current that the second terminal device can receive is large, or the charging current can be reduced to meet the current requirement that the second terminal device can receive when the current that the second terminal device can receive is small, so as to avoid overcurrent.

[0011] In a possible implementation of the first aspect, the second charge and discharge circuit includes a first boost circuit and a second boost circuit, the first boost circuit and the second boost circuit are respectively connected in parallel with the battery of the first terminal device, and the second charging voltage includes a first boost voltage and a second boost voltage; outputting the second charging voltage to the second terminal device through the second charge and discharge circuit includes: outputting the first boost voltage through the first boost circuit, outputting the second boost voltage through the second boost circuit, and outputting the voltage after the first boost voltage and the second boost voltage are combined to the second terminal device. In the above possible implementation, the first boost circuit can be a boost circuit already existing in the charge and discharge architecture, the second boost circuit can be a boost circuit additionally integrated in the charge and discharge architecture, or can be a boost circuit already existing in other architectures of the first terminal device, such as a motor boost circuit; in this way, the charging efficiency and output power of the second charge and discharge circuit can be improved without significantly increasing the circuit complexity of the first terminal device.

[0012] In a possible implementation of the first aspect, the second charge and discharge circuit further includes a first switch and a second switch, the first switch is connected in series with the first boost circuit, and the second boost circuit is connected in series with the second switch; when the second charging voltage is output to the second terminal device through the second charge and discharge circuit, the first switch and the second switch are both in an on state. In the above possible implementation, by controlling the first switch and the second switch to be turned on, the first boost voltage and the second boost voltage can be output through the power pin, which can improve the charging efficiency and output power of the second charge and discharge circuit without significantly increasing the circuit complexity of the first terminal device; by controlling the first switch and the second switch to be turned off, the problem of leakage caused by the reverse output voltage can be prevented.

[0013] In a possible implementation manner of the first aspect, the first boost circuit includes a first transistor, a second transistor, and a first inductor, and the second boost circuit includes a third transistor, a fourth transistor, and a second inductor, wherein: a first end of the first transistor is connected to the second end of the first switch, a second end of the first transistor is respectively connected to the first end of the second transistor and the first end of the first inductor, a second end of the second transistor is connected to a negative electrode of a battery of the first terminal device, and a second end of the first inductor is connected to a positive electrode of a battery of the first terminal device; a first end of the third transistor is connected to the first end of the first switch through the second switch, a second end of the third transistor is respectively connected to the first end of the fourth transistor and the first end of the second inductor, a second end of the fourth transistor is connected to the negative electrode of the battery of the first terminal device, and a second end of the second inductor is connected to the positive electrode of the battery of the first terminal device; when the first transistor is in an on state and / or the third transistor is in an on state, the second transistor and the fourth transistor are both in an off state; when the second transistor is in an on state and / or the fourth transistor is in an on state, the first transistor and the third transistor are both in an off state. In the above possible implementation, the first transistor and the third transistor can be controlled by the same pulse width modulation signal, and the second transistor and the fourth transistor can be controlled by an inverted signal of the pulse width modulation signal. In this way, the problem of short circuit caused by direct connection between the positive electrode of the battery and the ground terminal, which in turn causes overcurrent protection, can be avoided.

[0014] In a possible implementation of the first aspect, the first charging and discharging circuit includes a voltage regulating device and a conversion circuit, the first end of the voltage regulating device is used to output the first charging voltage, the second end of the voltage regulating device is connected to the first end of the conversion circuit, the second end of the conversion circuit is connected to the positive electrode of the battery of the first terminal device, and the third end of the conversion circuit is connected to the negative electrode of the battery of the first terminal device; outputting the first charging voltage to the second terminal device through the first charging and discharging circuit includes: outputting the first charging voltage through the conversion circuit, adjusting the first charging voltage through the voltage regulating device, and outputting the adjusted first charging voltage to the second terminal device. In the above possible implementation, the voltage regulating device is a voltage regulating transistor, the conversion circuit converts the first battery voltage into a first charging voltage, the control end of the voltage regulating transistor is also controlled by the auxiliary signal CC1 and / or CC2, and the auxiliary signal CC1 and / or CC2 can adjust the output voltage of the voltage regulating transistor, and the voltage of the control end of the voltage regulating transistor is controlled to reduce the first charging voltage, so that the first charging voltage can be closer to the second battery voltage, thereby avoiding the problem of energy loss during the charging process due to the excessive voltage difference between the first charging voltage and the second battery voltage, thereby improving the output power and charging efficiency to a certain extent.

[0015] In a second aspect, a reverse charging method is provided, which is applied to a second terminal device, and the second terminal device is connected to the first terminal device through a data line, the method comprising: sending second voltage information, the second voltage information is used to indicate the second battery voltage of the second terminal device; receiving a charging voltage, the charging voltage is used to charge the second terminal device; wherein the charging voltage comprises a first charging voltage or a second charging voltage, the first charging voltage is output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is greater than a threshold voltage, the second charging voltage is output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is less than or equal to the threshold voltage, and the second charging voltage is lower than the first charging voltage.

[0016] In a possible implementation manner of the second aspect, the method further includes: when the first charging voltage is received, adjusting the first charging voltage according to the second battery voltage, and an absolute value of a difference between the adjusted first charging voltage and the second battery voltage is less than a preset value.

[0017] In a possible implementation manner of the second aspect, the method further includes: adjusting a charging current corresponding to the charging voltage.

[0018] In a third aspect, an electronic device is provided, which includes a processor and a memory, wherein the memory stores instructions, and when the processor executes the instructions, the reverse charging method described in the first aspect and any possible implementation of the first aspect is executed, or the reverse charging method described in the second aspect and any possible implementation of the second aspect is executed.

[0019] In a fourth aspect, a computer-readable storage medium is provided, comprising instructions, which, when executed on an electronic device, enable the electronic device to execute the reverse charging method as described in the first aspect and any possible implementation of the first aspect.

[0020] In a fifth aspect, a computer program product comprising instructions is provided. When the instructions are executed on the electronic device, the electronic device executes the reverse charging method as described in the first aspect and any possible implementation of the first aspect.

[0021] Among them, the technical effects of the second to fifth aspects can refer to the technical effects brought about by the first aspect or any possible implementation method of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of a connection between a first terminal device and a second terminal device provided in an embodiment of the present application;

[0023] Figure 2 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0024] Figure 3 A schematic diagram of a reverse charging method provided in an embodiment of the present application;

[0025] Figure 4 A schematic diagram of a charging and discharging structure of a first terminal device provided in an embodiment of the present application;

[0026] Figure 5 A schematic diagram of a circuit topology of a first charging and discharging circuit provided in an embodiment of the present application;

[0027] Figure 6 A circuit topology diagram of a second charging and discharging circuit provided in an embodiment of the present application;

[0028] Figure 7 A schematic diagram of a circuit topology of a second switch provided in an embodiment of the present application;

[0029] Figure 8 A schematic diagram of another circuit topology of a second switch provided in an embodiment of the present application;

[0030] Fig. 9 A schematic flow chart of another reverse charging method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will discuss the making and use of each embodiment in detail. However, it should be understood that many applicable inventive concepts provided by this application can be implemented in a variety of specific environments. The specific embodiments discussed are only illustrative of the specific ways to implement and use this application and this technology, and do not limit the scope of this application.

[0032] Unless defined otherwise, all technical and scientific terms used herein have the same meanings as commonly understood by one of ordinary skill in the art.

[0033] Various circuits or other components may be described or referred to as being "configured to" perform one or more tasks. In this case, "configured to" is used to imply structure by indicating that the circuit / component includes structure (e.g., circuitry) that performs the one or more tasks during operation. Thus, even when the specified circuit / component is not currently operational (e.g., not turned on), the circuit / component may be referred to as being configured to perform the task. Circuits / components used with the wording "configured to" include hardware, such as circuits that perform an operation, etc.

[0034] The technical solution in the embodiment of the present application will be described below in conjunction with the drawings in the embodiment of the present application. In the present application, "at least one" means one or more, and "multiple" means two or more. "And / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can represent: a, b, c, a and b, a and c, b and c, a, b and c; where a, b and c can be single or multiple.

[0035] The embodiments of the present application use words such as "first" and "second" to distinguish objects with similar names, functions or effects. Those skilled in the art will understand that words such as "first" and "second" do not limit the quantity and execution order. The term "coupled" is used to indicate electrical connection, including direct connection through wires or connection terminals or indirect connection through other devices. Therefore, "coupled" should be regarded as a broad electronic communication connection.

[0036] It should be noted that, in this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0037] Before introducing the embodiments of the present application, the application scenarios involved in the present application are first introduced and explained.

[0038] The technical solution of the present application can be applied to various electronic devices with reverse charging function. Reverse charging means that one electronic device acts as a power source (such as a mobile phone) to charge another electronic device (such as a tablet computer) through a data line. The electronic device acting as the power source can be called a host device, and the electronic device being charged can be called a slave device. The data line can be an on the go (OTG) data line. Figure 1As shown, the interface of the first terminal device 110 is connected to the interface of the second terminal device 120 through the data line 130. The interface of the first terminal device 110 and the interface of the second terminal device 120 can be any of a variety of interfaces of the universal serial bus (USB), for example, a Type-C interface, a Type-A interface, a Type-B interface, etc., which is not specifically limited in the embodiment of the present application. Exemplarily, taking the interface of the first terminal device 110 and the interface of the second terminal device 120 as an example, the data line 130 connected between the first terminal device 110 and the second terminal device 120 can be a Type-C to Type-C connection line, which can also be called a CTC cable. For another example, when the interface of the first terminal device 110 is a Type-A interface and the interface of the second terminal device 120 is a Type-B interface, the data line 130 connected between the first terminal device 110 and the second terminal device 120 can be a Type-A to Type-B connection line, which can also be called an ATB cable. When the first terminal device 110 is connected to the second terminal device 120 via the data line 130, it can be considered that the first terminal device 110 and the second terminal device 120 are in OTG mode. The first terminal device 110 and the second terminal device 120 can be the same electronic device, or different electronic devices, which is not specifically limited in the embodiments of the present application.

[0039] In the embodiment of the present application, the first terminal device 110 is a master device and the second terminal device 120 is a slave device. When the first terminal device 110 charges the second terminal device 120 through the data line 130, the actual charging current output by the first terminal device 110 can only reach 1.2A at most, and the output power and charging efficiency are relatively low.

[0040] In view of this, an embodiment of the present application provides a reverse charging method, which can be applied to various electronic devices with a reverse charging function, and is used to improve the output power and charging efficiency of the reverse charging of the electronic device, thereby improving the user experience.

[0041] Optionally, the electronic device may include, but is not limited to: a mobile phone, a tablet computer, a laptop computer, a PDA, a mobile internet device (MID), a camera, a wearable device (such as a smart watch, a smart bracelet, a pedometer, etc.), an audio device, an audio and video player, a set-top box, a game console, a printer, a mouse, a keyboard, a vehicle-mounted device (such as a car, an airplane, a ship, a train, a high-speed train, etc.), a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a smart home device (such as a refrigerator, a television, an air conditioner, an electric meter, etc.), an intelligent robot, a workshop equipment, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, or a wireless terminal in a smart home, a flying device (such as an intelligent robot, a hot air balloon, a drone, an airplane), etc.

[0042] The following uses a mobile phone as an example to illustrate the structure of the electronic device. Figure 2 As shown, the electronic device may include components such as a radio frequency (RF) circuit 210 , a memory 220 , an input unit 230 , a display unit 240 , a sensor 250 , an audio circuit 260 , a processor 270 , and a power supply 280 .

[0043] The RF circuit 210 can be used to send and receive information, or receive or send signals during a call. In particular, after receiving the downlink information of the base station, it is sent to the processor 270 for processing; in addition, the uplink data is sent to the base station. Generally, the RF circuit 210 includes but is not limited to an antenna, at least one amplifier, a transceiver, a coupler, a duplexer, etc. In addition, the RF circuit 210 can also communicate with the network and other devices through wireless communication.

[0044] The memory 220 can be used to store data, software programs and modules; it mainly includes a program storage area and a data storage area, wherein the program storage area can store an operating system and at least one application required for a function, such as a sound playback function, an image playback function, etc.; the data storage area can store data created according to the use of the electronic device, such as audio data, image data, phone book, etc. In addition, the electronic device may include a high-speed random access memory and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0045] The input unit 230 can be used to receive input digital or character information, and generate signal input related to the user settings and function control of the electronic device. Specifically, the input unit 230 may include a touch screen 231 and other input devices 232. The touch screen 231 can collect user touch operations on or near it (such as operations performed by the user using any suitable object or accessory such as a finger, stylus, etc. on or near the touch screen), and drive the corresponding connection device according to a pre-set program. Optionally, other input devices 232 may include but are not limited to one or more of a physical keyboard, function keys (such as a volume control button, a power switch button, etc.), a trackball, a mouse, a joystick, etc.

[0046] The display unit 240 may be used to display information input by the user or information provided to the user, as well as various menus of the electronic device. In one example, the display unit 240 may include a display screen 241, and the display screen 241 may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like. Further, the touch screen 231 may cover the display screen 241, and when the touch screen 231 detects a touch operation on or near it, it is transmitted to the processor 270 to determine the type of touch event, and then the processor 270 provides a corresponding visual output on the display screen 241 according to the type of touch event. Although in Figure 2 In the embodiment, the touch screen 231 and the display screen 241 are used as two independent components to implement the input and output functions of the electronic device, but in some embodiments, the touch screen 231 and the display screen 241 can be integrated to implement the input and output functions of the electronic device.

[0047] The sensor 250 may include one or more sensors for providing various aspects of status assessment for the electronic device. The sensor 250 may include a light sensor, which may be used in imaging applications, i.e., a component of a camera or a camera head. In addition, the sensor 250 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor, through which the acceleration / deceleration, orientation, open / closed state, relative positioning of components, or temperature changes of the electronic device, etc., may be detected.

[0048] The audio circuit 260, the speaker and the microphone can provide an audio interface between the user and the electronic device. The audio circuit 260 can transmit the received audio data to the speaker after converting the received audio data into an electrical signal, which is then converted into a sound signal for output; on the other hand, the microphone converts the collected sound signal into an electrical signal, which is then received by the audio circuit 260 and converted into audio data, which is then output to the RF circuit 210 to be sent to, for example, another mobile phone, or the audio data is output to the memory 220 for further processing.

[0049] The processor 270 is the control center of the electronic device, and uses various interfaces and lines to connect various parts of the entire electronic device. By running or executing the software program and / or module stored in the memory 220, and calling the data stored in the memory 220, the processor 270 performs various functions of the electronic device and processes data, thereby monitoring the electronic device as a whole. Optionally, the processor 270 may include one or more processing units, which may include but are not limited to: a central processing unit (CPU), a network processing unit (NPU), a graphics processing unit (GPU), an image signal processor (ISP), a tensor processing unit (TPU), a data processing unit (DPU), a digital signal processor (DSP), a microcontroller or a microprocessor, etc. Further, the processor 270 may also include other hardware circuits or accelerators, such as an application specific integrated circuit (ASIC), a complex programmable logic device (CPLD) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. Optionally, the processor 270 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, etc.

[0050] The electronic device may also include a power supply 280 (e.g., a battery) for supplying power to each component. The power supply 280 may be logically connected to the processor 270 through a power management system, so that functions such as charging, discharging, and power consumption management are managed through the power management system. Optionally, the power management system may support both fast charging technology and non-fast charging technology. In actual applications, the power management system may charge the battery in the power supply 280 through fast charging technology, or may charge the battery in the power supply 280 through non-fast charging technology. Exemplarily, when the electronic device is a master device, the reverse charging described in the embodiment of the present application is to use the power supply 280 of the master device to charge the power supply of the slave device.

[0051] Although not shown, the electronic device may also include a wireless fidelity module, a Bluetooth module, etc., which will not be described in detail in the present embodiment. Those skilled in the art will understand that Figure 2The electronic device structure shown in the figure does not constitute a limitation on the electronic device, and may include Figure 2 More or fewer components, or combinations of certain components, or different arrangements of components.

[0052] Figure 3 A flow chart of a reverse charging method provided in an embodiment of the present application, the method includes S301-S303. The reverse charging method can be applied to a first terminal device, and the first terminal device is connected to a second terminal device via a data line. In the embodiment of the present application, the interface of the first terminal device and the interface of the second terminal device are both Type-C interfaces for illustration.

[0053] Exemplarily, the USB Type-C interface includes an auxiliary channel for transmitting auxiliary signals, and the interface may include multiple auxiliary channels, such as a first auxiliary channel and a second auxiliary channel, which may be represented by auxiliary signals CC1 and CC2 transmitted respectively, and the auxiliary signals may be used to implement device plug-in detection, forward and reverse plug-in detection and other auxiliary functions. When the USB Type-C interface of the first terminal device is connected to the USB Type-C interface of the second terminal device, the first terminal device can recognize that the CTC cable has been inserted through the auxiliary signals CC1 and / or CC2. At this time, the first terminal device can be set to reverse charging mode, that is, the battery of the first terminal device is used to charge the second terminal device.

[0054] Optionally, the charging and discharging architecture of the first terminal device is as follows: Figure 4As shown. The first terminal device may include a first charge and discharge circuit 401, a second charge and discharge circuit 402, a first interface 403 and a battery 404. Wherein, taking the first interface 403 as a Type-C interface as an example, the first charge and discharge circuit 401 can be connected to the auxiliary channel of the Type-C interface for receiving or sending CC1 / CC2, and the power pin Vbus of the Type-C interface is respectively connected to the first charge and discharge circuit 401 and the second charge and discharge circuit 402, and the first charge and discharge circuit 401 and the second charge and discharge circuit 402 are also respectively connected to the battery pin Vbat of the battery 404 of the first terminal device; when the first terminal device is connected to the second terminal device and the first terminal device is set to the reverse charging mode, the battery 404 of the first terminal device can charge the battery of the second terminal device through the first charge and discharge circuit 401 or the second charge and discharge circuit 402. Exemplarily, the first charge and discharge circuit 401 may be a low voltage CMOS (low voltage CMOS technology, LVC) charge and discharge circuit, where CMOS stands for complementary metal oxide semiconductor; and the second charge and discharge circuit 402 may be a boost charge and discharge circuit.

[0055] Further, such as Figure 4 As shown, the first terminal device also includes a power meter 406, which is connected between the battery 404 of the first terminal device and the ground terminal, and is used to measure the power of the battery 404 of the first terminal device to determine the remaining power in the battery 404 of the first terminal device and related parameters such as the continuous power supply time of the battery 404.

[0056] Further, such as Figure 4 As shown, the first terminal device further includes a processing circuit 405, which is connected to the power meter 406, the first charge and discharge circuit 401, and the second charge and discharge circuit 402. Optionally, the processing circuit 405 can be connected to the first charge and discharge circuit 401 through a universal serial bus (inter-integrated circuit, I 2 C) or a serial peripheral management interface (SPMI) is connected to the power meter 406, the first charge and discharge circuit 401 and the second charge and discharge circuit 402 respectively. Exemplarily, the processing circuit 405 can be connected to the power meter 406, the first charge and discharge circuit 401 and the second charge and discharge circuit 402 through the first serial bus I 2 C1 is connected to the first charging and discharging circuit 401 through the second serial bus I 2C2 is connected to the electricity meter 406 and connected to the second charge and discharge circuit 402 via SPMI. In practical applications, the processing circuit 405 may not be integrated in Figure 4 In the charging and discharging architecture shown, other processors or controllers are reused. For example, the processing circuit 405 can be the processor 270 in the above-mentioned electronic device embodiment, and the embodiment of the present application does not make specific limitations on this.

[0057] Further, such as Figure 4 As shown, the first terminal device may further include a system load 407, and the second charge and discharge circuit 402 is connected to the system load 407 via a system power supply pin Vsys.

[0058] Exemplarily, the structure of the second terminal device may be the same as the structure of the first terminal device described above, or the structure of the second terminal device may be different from the structure of the first terminal device, which is not specifically limited in the embodiments of the present application.

[0059] Below Figure 4 Taking the charging and discharging architecture of the first terminal device shown in as an example, the steps of the reverse charging method are described in detail.

[0060] S301: Acquire first voltage information and second voltage information, where the first voltage information is used to indicate a first battery voltage of the first terminal device, and the second voltage information is used to indicate a second battery voltage of the second terminal device.

[0061] The first voltage information may be used to indicate the battery voltage in the first terminal device, and the battery voltage in the first terminal device may also be referred to as the first battery voltage. The second voltage information may be used to indicate the battery voltage in the second terminal device, and the battery voltage in the second terminal device may also be referred to as the second battery voltage. After acquiring the first voltage information and the second voltage information, the processing circuit 405 in the first terminal device may determine the difference between the first battery voltage and the second battery voltage based on the first voltage information and the second voltage information.

[0062] Exemplarily, when the first voltage information indicates that the first battery voltage is 4V and the second voltage information indicates that the second battery voltage is 3.5V, the difference between the first battery voltage and the second battery voltage is 4V-3.5V=0.5V; when the first voltage information indicates that the first battery voltage is 3.5V and the second voltage information indicates that the second battery voltage is 4V, the difference between the first battery voltage and the second battery voltage is 3.5V-4V=-0.5V.

[0063] In one example, if Figure 4As shown, in the case where the first terminal device includes a power meter 406, the first voltage information can be directly acquired by the processing circuit 405 through the power meter 406. In this case, the first voltage information can also be used to indicate the remaining power of the battery 404 in the first terminal device and / or the battery life of the battery 404, so as to determine the charging time for the second terminal device according to the remaining power of the battery 404 in the first terminal device and / or the battery life of the battery 404, so as to charge the second terminal device without affecting the normal use of the first terminal device.

[0064] In another example, when the first terminal device does not include the fuel meter 406, the first voltage information can be acquired by the processing circuit 405 through other voltage detection circuits and / or current detection circuits to determine the battery voltage in the first terminal device.

[0065] Similarly, when the second terminal device also includes a power meter, the second voltage information can be directly obtained by the processor in the second terminal device through the power meter; when the second terminal device does not include a power meter, the processor in the second terminal device can also obtain the second voltage information through other voltage detection circuits and / or current detection circuits. The embodiments of the present application do not specifically limit this.

[0066] Furthermore, after acquiring the second voltage information, the processor in the second terminal device transmits the second voltage information to the processing circuit 405 in the first terminal device through the CTC cable, so that the processing circuit 405 determines the difference between the first battery voltage and the second battery voltage based on the first voltage information and the second voltage information.

[0067] After determining the difference between the first battery voltage and the second battery voltage, the processing circuit 405 compares the difference with the threshold voltage V1 to obtain a comparison result, and then selects the first charge and discharge circuit 401 or the second charge and discharge circuit 402 to charge the second terminal device according to the comparison result. When the difference between the first battery voltage and the second battery voltage is greater than the threshold voltage V1, step S302 is executed, and when the difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage V1, step S303 is executed. Among them, the threshold voltage V1 can be preset, for example, set by the first terminal device or manually set, and can be set according to the voltage difference between the first battery voltage and the second battery voltage, or according to the charging efficiency of the first charge and discharge circuit and the charging efficiency of the second charge and discharge circuit, and can also be set according to the rated charging voltage of the electronic device, and the embodiment of the present application does not make specific restrictions on this.

[0068] S302: When the difference between the first battery voltage and the second battery voltage is greater than the threshold voltage V1, the first charging and discharging circuit 401 outputs a first charging voltage to the second terminal device, and the first charging voltage is used to charge the second terminal device.

[0069] S303: When the difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage V1, a second charging voltage is output to the second terminal device through the second charge and discharge circuit 402, and the second charging voltage is used to charge the second terminal device. The second charging voltage is lower than the first charging voltage.

[0070] Among them, the difference between the first battery voltage and the second battery voltage is greater than the threshold voltage V1, indicating that the difference between the battery voltage of the first terminal device and the battery voltage of the second terminal device is large. In this case, the first battery voltage can charge the second terminal device without boosting, so the first terminal device can charge the second terminal device through the LVC charge and discharge circuit. Compared with the boost charge and discharge circuit, the LVC charge and discharge circuit has a higher output power and a higher charging efficiency.

[0071] The difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage V1, indicating that the battery voltage of the first terminal device is less than or equal to the battery voltage of the second terminal device, or the difference between the battery voltage of the first terminal device and the battery voltage of the second terminal device is small. In this case, the first battery voltage cannot be directly charged to the second terminal device, and a voltage boosting process is required. Therefore, the first terminal device can charge the second terminal device after a voltage boosting process is performed by the second charge and discharge circuit 402.

[0072] In one example, the minimum value V1 of the threshold voltage V1 is min Can be 0V, maximum value V1 max It can be 1.05V.

[0073] For example, when the threshold voltage V1=V1 min =0V: if the difference between the first battery voltage and the second battery voltage is greater than 0V, for example, the difference between the first battery voltage and the second battery voltage is 0.5V, the second terminal device can be charged through the first charge and discharge circuit 401; if the difference between the first battery voltage and the second battery voltage is less than or equal to 0V, for example, the difference between the first battery voltage and the second battery voltage is -0.5V, the second terminal device can be charged through the second charge and discharge circuit 402.

[0074] Exemplarily, when the threshold voltage V1=0.5V: if the difference between the first battery voltage and the second battery voltage is greater than 0.5V, for example, the difference between the first battery voltage and the second battery voltage is 0.8V, the second terminal device can be charged through the first charge and discharge circuit 401; if the difference between the first battery voltage and the second battery voltage is less than or equal to 0.5V, for example, the difference between the first battery voltage and the second battery voltage is 0.5V, the second terminal device can be charged through the second charge and discharge circuit 402.

[0075] For example, when the threshold voltage V1=V1 max =1.05V: if the difference between the first battery voltage and the second battery voltage is greater than 1.05V, for example, the difference between the first battery voltage and the second battery voltage is 1.08V, the second terminal device can be charged through the first charge and discharge circuit 401; if the difference between the first battery voltage and the second battery voltage is less than or equal to 1.05V, for example, the difference between the first battery voltage and the second battery voltage is 0.5V, the second terminal device can be charged through the second charge and discharge circuit 402.

[0076] In a possible embodiment, when the first charging voltage is output to the second terminal device through the first charging and discharging circuit 401, the first charging voltage can be adjusted, and the absolute value of the difference between the adjusted first charging voltage and the second battery voltage is less than a preset value. The preset value can be set in advance so that when the absolute value of the difference between the first charging voltage and the second battery voltage is within the preset value range, a better charging efficiency can be achieved. For example, if the second battery voltage is 3.8V, when the preset value is set to 0.3V, the interval of the adjusted first charging voltage can be 3.5V-4.1V.

[0077] Exemplarily, the charging voltage information required by the second terminal device or the rated charging voltage information of the second terminal device can be obtained through the auxiliary signals CC1 and / or CC2 transmitted through the auxiliary channel, so that the first charging voltage is adjusted according to the voltage information indicated by the auxiliary signals CC1 and / or CC2 to reduce the first charging voltage so that the first charging voltage can be closer to the second battery voltage, thereby avoiding the problem of energy loss during the charging process due to excessive voltage difference between the first charging voltage and the second battery voltage, thereby improving the output power and charging efficiency to a certain extent.

[0078] For example, when the first battery voltage is 4.5V, the second battery voltage is 3.8V, and the threshold voltage V1 is 0.5V, the difference between the first battery voltage and the second battery voltage is 4.5-3.8=0.7V, which is greater than the threshold voltage V1=0.5V, and the second terminal device can be charged through the first charge and discharge circuit 401. Since the second battery voltage is 3.8V, the first charging voltage can be adjusted to the range of 3.5V-4.1V through the auxiliary signal CC1 and / or CC2, thereby improving the charging efficiency.

[0079] Optionally, when the first charge and discharge circuit 401 outputs the first charging voltage, the charging current corresponding to the first charge and discharge circuit 401 may also be adjusted. Exemplarily, the charging current information required by the second terminal device or the rated charging current information of the second terminal device may be obtained through the auxiliary signal CC1 and / or CC2, so that the output current of the first charge and discharge circuit 401 may be adjusted according to the current information indicated by the auxiliary signal CC1 and / or CC2, and the charging current may be increased to improve the output power and charging efficiency, or the charging current may be reduced to meet the current requirement that the second terminal device can receive, so as to avoid overcurrent.

[0080] Figure 5 A topological diagram of the first charge-discharge circuit is illustrated. In a possible embodiment, Figure 5 As shown, the first charge and discharge circuit 401 may include a voltage regulating device 4011 and a conversion circuit 4012, the first end of the voltage regulating device 4011 is used to output the first charging voltage, the second end of the voltage regulating device 4011 is connected to the first end of the conversion circuit 4012, the second end of the conversion circuit 4012 is connected to the positive electrode of the battery 404 of the first terminal device, and the third end of the conversion circuit 4012 is connected to the negative electrode of the battery 404 of the first terminal device; outputting the first charging voltage to the second terminal device through the first charge and discharge circuit 401 includes: outputting the first charging voltage through the conversion circuit 4012, adjusting the first charging voltage through the voltage regulating device 4011, and outputting the adjusted first charging voltage to the second terminal device.

[0081] Exemplarily, the voltage regulator device 4011 is a voltage regulator transistor QVBUS, and the conversion circuit 4012 may include a plurality of transistors (Q1, Q2, Q3, Q4, Q5, Q6, Q7, and Q8). The connection relationship of the plurality of transistors (Q1 to Q8) is as follows: Figure 5As shown. The voltage regulating transistor QVBUS and the transistors (Q1 to Q8) can both be Nmos tubes, and the control end of the voltage regulating transistor QVBUS and the control end of the transistors (Q1 to Q8) are connected to the aforementioned processing circuit 405, and are used to receive the control signal output by the processing circuit 405, and the control signal is used to control the on-off state (on state or off state) of the voltage regulating transistor QVBUS and the transistors (Q1 to Q8). Further, when the second terminal device transmits voltage information to the first terminal device through the auxiliary signal CC1 and / or CC2, the gate voltage of the voltage regulating transistor QVBUS can be changed according to the voltage information indicated by the auxiliary signal CC1 and / or CC2, thereby changing the output voltage of the voltage regulating transistor, and achieving the purpose of adjusting the first charging voltage. Optionally, the voltage regulating transistor QVBUS and the transistors (Q1 to Q8) may also be other types of transistors. For example, the voltage regulating transistor QVBUS and the transistors (Q1 to Q8) may all be Pmos transistors, or some of the transistors may be Pmos transistors and some of the transistors may be Nmos transistors. This embodiment of the present application does not specifically limit this.

[0082] When the battery 404 outputs the first charging voltage through the first charging and discharging circuit 401 , the voltage regulating transistor QVBUS and the transistors ( Q1 , Q2 , Q7 and Q8 ) are all in the on state, and the transistors ( Q3 , Q4 , Q5 and Q6 ) are all in the off state.

[0083] Further, the first charge and discharge circuit 401 also includes a transistor QOVP, which is used to implement overvoltage protection and can also be called an overvoltage protection transistor. Optionally, the transistor QOVP can be an Nmos tube or a Pmos tube. The first end of the transistor QOVP is connected to the power pin Vbus for outputting the regulated first charging voltage. The second end of the transistor QOVP is connected to the first end of the voltage regulating transistor QVBUS. The control end of the transistor QOVP is connected to the processing circuit 405 for receiving the control signal output by the processing circuit 405. It can be understood that when the battery 404 outputs the first charging voltage to the first charge and discharge circuit 401, the transistor QOVP is in the on state.

[0084] Furthermore, the first charge and discharge circuit 401 further includes a capacitor C1, which is connected in parallel to both ends of the battery 404, and is used to stabilize the output voltage of the battery 404 and filter the noise contained in the output voltage.

[0085] In a possible embodiment, Figure 6As shown, the second charge and discharge circuit 402 includes a first boost circuit 4021 and a second boost circuit 4022, the first boost circuit 4021 and the second boost circuit 4022 are respectively connected in parallel with the battery 404 of the first terminal device, and the second charging voltage includes a first boost voltage and a second boost voltage; the second charging voltage is output to the second terminal device through the second charge and discharge circuit 402, including: outputting the first boost voltage through the first boost circuit 4021, outputting the second boost voltage through the second boost circuit 4022, and outputting the voltage after the first boost voltage and the second boost voltage are combined to the second terminal device.

[0086] Optionally, the first end of the first boost circuit 4021 is connected to the power pin Vbus of the first interface 403, the second end of the first boost circuit 4021 is connected to the positive pole of the battery 404, and the third end of the second boost circuit 4022 is connected to the negative pole of the battery 404; the first end of the second boost circuit 4022 is connected to the motor boost circuit (BST / HSP) in the first terminal device, where BST stands for boost and HSP stands for Horsepower, the second end of the second boost circuit 4022 is connected to the positive pole of the battery 404, and the third end of the second boost circuit 4022 is connected to the negative pole of the battery 404. In practical applications, the first boost circuit 4021 may be an existing boost circuit in the charge and discharge architecture, the second boost circuit 4022 may be an additional boost circuit integrated in the charge and discharge architecture, or may be an existing boost circuit in other architectures in the first terminal device, such as a motor boost circuit; in this way, the charging efficiency and output power of the second charge and discharge circuit 402 may be improved without significantly increasing the circuit complexity of the first terminal device.

[0087] Exemplarily, when the processing circuit 405 controls the battery 404 to charge the second terminal device through the second charge and discharge circuit 402, the battery 404 can be controlled to output the first boost voltage through the first boost circuit 4021, and the battery 404 can be controlled to output the second boost voltage through the second boost circuit 4022. The first boost voltage and the second boost voltage are combined to output the second charging voltage. Compared with charging through only one of the boost circuits, charging using both the first boost circuit 4021 and the second boost circuit 4022 is more efficient and has a higher output power.

[0088] In a possible embodiment, Figure 6As shown, the second charge and discharge circuit 402 also includes a first switch 4023 and a second switch 4024. The second boost circuit 4022 is connected to the first end of the first switch 4023 through the second switch 4024, and the second end of the first switch 4023 is connected to the first end of the first boost circuit 4021; when the second charging voltage is output to the second terminal device through the second charge and discharge circuit 402, the first switch 4023 and the second switch 4024 are both in the on state.

[0089] Exemplarily, the on and off of the first switch 4023 and the second switch 4024 can be controlled by the processing circuit 405. When the second charging voltage is output to the second terminal device through the second charging and discharging circuit 402, the processing circuit 405 can control the first switch 4023 and the second switch 4024 to be in the on state. When the second charging voltage is not output to the second terminal device through the second charging and discharging circuit 402, the processing circuit 405 can control the first switch 4023 and the second switch 4024 to be in the off state to prevent leakage caused by the reverse output voltage. In this way, by controlling the first switch 4023 and the second switch 4024 to be turned on, the first boosted voltage and the second boosted voltage can be output through the power pin Vbus, thereby improving the charging efficiency and output power of the second charge and discharge circuit 402 without significantly increasing the circuit complexity of the first terminal device; by controlling the first switch 4023 and the second switch 4024 to be turned off, the problem of leakage caused by the reverse output voltage can be prevented.

[0090] Further, such as Figure 6 As shown, the first boost circuit 4021 includes a first transistor M1, a second transistor M2 and a first inductor L1, and the second boost circuit 4022 includes a third transistor M3, a fourth transistor M4 and a second inductor L2, wherein: the first end of the first transistor M1 is connected to the second end of the first switch 4023, the second end of the first transistor M1 is respectively connected to the first end of the second transistor M2 and the first end of the first inductor L1, the second end of the second transistor M2 is connected to the negative electrode of the battery 404 of the first terminal device, and the second end of the first inductor L1 is connected to the positive electrode of the battery 404 of the first terminal device; the first end of the third transistor M3 is connected to the first end of the first switch 4023 through the second switch 4024, the second end of the third transistor M3 is respectively connected to the first end of the fourth transistor M4 and the first end of the second inductor L2, the second end of the fourth transistor M4 is connected to the negative electrode of the battery 404 of the first terminal device, and the second end of the second inductor L2 is connected to the positive electrode of the battery 404 of the first terminal device.

[0091] Exemplarily, the first transistor M1 and the third transistor M3 can be controlled by the same pulse width modulation signal, and the control terminals of the second transistor M2 and the fourth transistor M4 can be controlled by the inverted signal of the pulse width modulation signal. When the first transistor M1 is in the on state and / or the third transistor M3 is in the on state, the second transistor M2 and the fourth transistor M4 can both be in the off state; when the second transistor M2 is in the on state and / or the fourth transistor M4 is in the on state, the first transistor M1 and the third transistor M3 can both be in the off state. In this way, the problem of short circuit caused by direct connection between the positive electrode of the battery 404 and the ground terminal, which in turn causes overcurrent protection, can be avoided.

[0092] Further, such as Figure 6 As shown, the second charge and discharge circuit 402 further includes a fifth transistor M5, which is connected between the battery pin Vbat of the battery 404 and the system power supply pin Vsys, and is used to improve the reverse blocking capability of the battery 404. When the fifth transistor M5 is turned on, the battery 404 can supply power to the second terminal device through the power supply pin Vbus, or supply power to the subsequent system load 407 through the system power supply pin Vsys; when the fifth transistor M5 is turned off, the battery 404 can stop supplying power.

[0093] Figure 7 and Figure 8 Two circuit topologies of the second switch 4024 are respectively illustrated.

[0094] In one example, if Figure 7 As shown, the second switch 4024 includes a first diode D1, a first resistor R1, a second capacitor C2 and a transistor N1. The anode of the first diode D1 is connected to the general purpose input / output (GPIO) interface of the processing circuit 405, and is used to receive the control signal output by the processing circuit 405; the cathode of the first diode D1 is respectively connected to the first end of the first resistor R1, the first end of the second capacitor C2 and the gate of the transistor N1; the second end of the first resistor R1 is grounded; the second end of the second capacitor C2 and the source of the transistor N1 are connected to the power supply pin Vbus; the drain of the transistor N1 is connected to the BST / HSP terminal.

[0095] Specifically, when the power supply pin Vbus is at a low level and the GPIO output is at a high level, the gate-source voltage Vgs of the transistor N1 meets the conduction requirement, and the transistor N1 is turned on. When the power supply pin Vbus is at a high level, the gate of the transistor N1 requires a higher voltage, and the second capacitor C2 can prevent a sudden change in voltage, and the connection method of the second capacitor C2 and the transistor N1 can form a bootstrap circuit, which can maintain the transistor N1 in a conducting state. The first diode D1 can prevent current from being fed back to the GPIO.

[0096] In this example, whether the power supply pin Vbus is at a high level or a low level, it does not affect the conduction state of the transistor N1, and the first boost circuit 4021 and the second boost circuit 4022 can normally charge the second terminal device through the power supply pin Vbus. Optionally, the above-mentioned transistor N1 can be an Nmos tube or a Pmos tube. In the embodiment of the present application, the transistor N1 is an Nmos tube as an example for explanation. When the transistor N1 is a Pmos tube, the corresponding connection mode and the level of the GPIO output will also change, and the embodiment of the present application will not be elaborated in detail here.

[0097] In another example, Figure 8 As shown, the second switch 4024 includes a transistor N2, a second resistor R2, a transistor P1, a third capacitor C3, a fourth capacitor C4, a third resistor R3 and a second diode D2. Wherein: the gate of the transistor N2 is connected to the GPIO interface, the source of the transistor N2 is grounded, the drain of the transistor N2 is connected to the gate of the transistor P1 through the second resistor R2, the gate of the transistor P1 is also connected to the first end of the third resistor R3 and the first end of the third capacitor C3, the drain of the transistor P1, the second end of the third capacitor C3 and the cathode of the second diode D2 are all connected to the power supply pin Vbus, the source of the transistor P1, the second end of the third resistor R3, the first end of the fourth capacitor C4 and the anode of the second diode D2 are all connected to the BST / HSP terminal, and the second end of the fourth capacitor C4 is grounded.

[0098] Specifically, if the GPIO output is high, the gate-source voltage of the transistor N2 meets the conduction requirement, the transistor N2 is turned on, and the drain of the transistor N2 is set to a low level. At this time, when the power supply pin Vbus is at a low level, the body diode (second diode D2) of the transistor P1 transmits the voltage at the BST / HSP terminal from the drain of the transistor P1 to the source, increasing the source voltage of the transistor P1, the gate-source voltage of the transistor P1 meets the conduction requirement, and the transistor P1 can be turned on; when the power supply pin Vbus is at a high level, the gate-source voltage of the transistor P1 meets the conduction requirement, and the transistor P1 can be turned on.

[0099] In this example, whether the power supply pin Vbus is at a high level or a low level, it does not affect the conduction state of the transistor P1, and the first boost circuit 4021 and the second boost circuit 4022 can charge the second terminal device normally through the power supply pin Vbus. Optionally, the above transistor N2 and transistor P1 can be Nmos tubes or Pmos tubes. In the embodiment of the present application, the transistor N2 is an Nmos tube and the transistor P1 is a Pmos tube. When the transistor N2 and the transistor P1 change the type of transistor, the corresponding connection method and the level of the GPIO output will also change, and the embodiment of the present application will not be elaborated in detail here.

[0100] In the embodiment of the present application, after obtaining the first battery voltage of the first terminal device and the second battery voltage of the second terminal device, the first terminal device can determine the voltage difference between the first battery voltage and the second battery voltage. When the voltage difference is greater than the threshold voltage, the second terminal device can be charged through the first charge and discharge circuit 401. When the voltage difference is less than or equal to the threshold voltage, the second terminal device can be charged through the second charge and discharge circuit 402. In this way, when the first battery voltage is high, the first battery voltage can be directly charged to the second terminal device without boosting, and the first charging voltage is greater than the second charging voltage, and the output power of the first charge and discharge circuit 401 is higher and the charging efficiency is also higher; when the first battery voltage is low, the first battery voltage can be boosted twice by the first boost circuit 4021 and the second boost circuit 4022, and then the second terminal device can be charged with the second charging voltage, which improves the output power and charging efficiency of the second charge and discharge circuit 402 to a certain extent.

[0101] In another aspect of the present application, an embodiment of the present invention further provides a reverse charging method, which can be applied to a second terminal device, and the structure of the second terminal device can refer to the description of the first terminal device above. The second terminal device is connected to the first terminal device via a data line. Fig. 9 As shown, the method includes:

[0102] S501: Send second voltage information, where the second voltage information is used to indicate a second battery voltage of the second terminal device;

[0103] S502: Receive a charging voltage, which is used to charge the second terminal device; wherein the charging voltage includes a first charging voltage or a second charging voltage, the first charging voltage is output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is greater than a threshold voltage, the second charging voltage is output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is less than or equal to the threshold voltage, and the second charging voltage is lower than the first charging voltage.

[0104] In a possible embodiment, the method further includes: when receiving the first charging voltage, adjusting the first charging voltage according to the second battery voltage, and the absolute value of the difference between the adjusted first charging voltage and the second battery voltage is less than a preset value. In practical applications, when the first charging voltage has been adjusted when output by the first terminal device, the second terminal device does not need to adjust the first charging voltage again, and when the first terminal device does not adjust when outputting the first charging voltage, the second terminal device can adjust the first charging voltage according to the second battery voltage.

[0105] Optionally, the method also includes: adjusting a charging current corresponding to the charging voltage.

[0106] It can be understood that all relevant contents involved in the method embodiment of the above-mentioned second terminal device can be referred to in the method embodiment of the above-mentioned first terminal device, and the embodiments of the present application will not be repeated here.

[0107] An embodiment of the present application also provides an electronic device, which includes a processor and a memory, wherein instructions are stored in the memory, and when the instructions are executed by the processor, the electronic device executes steps S301-S303, or S501-S502 in the above method embodiment.

[0108] An embodiment of the present application also provides a computer-readable storage medium, which includes instructions. When the instructions are executed on the above-mentioned electronic device, the electronic device executes each step in the above-mentioned method embodiment.

[0109] The embodiment of the present application also provides a computer program product including instructions, and when the instructions are executed on the above electronic device, the electronic device executes each step in the above method embodiment.

[0110] It is understandable that all relevant contents involved in the above method embodiments can be referred to in the embodiments of the above electronic device computer-readable storage medium and computer program product, and the embodiments of the present application are not repeated here. In addition, the technical effects of the electronic device, computer-readable storage medium, and computer program product can refer to the technical effects of the above method embodiments.

[0111] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0112] Those of ordinary skill in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0113] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0114] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0115] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one device or distributed on multiple devices. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0116] In addition, each functional module in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0117] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A reverse charging method, characterized in that: Applied in a first terminal device, the first terminal device is connected to a second terminal device via a data line, the first terminal device includes a first charging and discharging circuit and a second charging and discharging circuit, and the method includes: Acquire first voltage information and second voltage information, wherein the first voltage information is used to indicate a first battery voltage of the first terminal device, and the second voltage information is used to indicate a second battery voltage of the second terminal device; When the difference between the first battery voltage and the second battery voltage is greater than a threshold voltage, a first charging voltage is output to the second terminal device through the first charging and discharging circuit, and the first charging voltage is used to charge the second terminal device; When the difference between the first battery voltage and the second battery voltage is less than or equal to the threshold voltage, outputting a second charging voltage to the second terminal device through the second charging and discharging circuit, the second charging voltage is used to charge the second terminal device, and the second charging voltage is less than the first charging voltage; When the first charging voltage is output to the second terminal device through the first charging and discharging circuit, the first charging voltage is adjusted, and the absolute value of the difference between the adjusted first charging voltage and the second battery voltage is less than a preset value.

2. The method according to claim 1, characterized in that The method further comprises: When the first charge and discharge circuit outputs the first charge voltage, a charge current corresponding to the first charge and discharge circuit is adjusted.

3. The method according to claim 1, characterized in that The second charge and discharge circuit includes a first boost circuit and a second boost circuit, the first boost circuit and the second boost circuit are respectively connected in parallel to the battery of the first terminal device, and the second charging voltage includes a first boost voltage and a second boost voltage; The outputting the second charging voltage to the second terminal device through the second charging and discharging circuit includes: The first boosted voltage is outputted through the first boost circuit, the second boosted voltage is outputted through the second boost circuit, and a voltage obtained by combining the first boosted voltage and the second boosted voltage is outputted to the second terminal device.

4. The method according to claim 3, characterized in that The second charge and discharge circuit further includes a first switch and a second switch, the first switch is connected in series with the first boost circuit, and the second boost circuit is connected in series with the second switch; When the second charging voltage is output to the second terminal device through the second charging and discharging circuit, both the first switch and the second switch are in an on state.

5. The method according to claim 4, characterized in that The first boost circuit includes a first transistor, a second transistor and a first inductor, and the second boost circuit includes a third transistor, a fourth transistor and a second inductor, wherein: The first end of the first transistor is connected to the second end of the first switch, the second end of the first transistor is connected to the first end of the second transistor and the first end of the first inductor respectively, the second end of the second transistor is connected to the negative electrode of the battery of the first terminal device, and the second end of the first inductor is connected to the positive electrode of the battery of the first terminal device; The first end of the third transistor is connected to the first end of the first switch through the second switch, the second end of the third transistor is connected to the first end of the fourth transistor and the first end of the second inductor respectively, the second end of the fourth transistor is connected to the negative electrode of the battery of the first terminal device, and the second end of the second inductor is connected to the positive electrode of the battery of the first terminal device; When the first transistor is in an on state and / or the third transistor is in an on state, the second transistor and the fourth transistor are both in an off state; When the second transistor is in an on state and / or the fourth transistor is in an on state, the first transistor and the third transistor are both in an off state.

6. The method according to claim 1, characterized in that The first charge and discharge circuit includes a voltage regulator and a conversion circuit, wherein the first end of the voltage regulator is used to output the first charging voltage, the second end of the voltage regulator is connected to the first end of the conversion circuit, the second end of the conversion circuit is connected to the positive electrode of the battery of the first terminal device, and the third end of the conversion circuit is connected to the negative electrode of the battery of the first terminal device; The outputting the first charging voltage to the second terminal device through the first charging and discharging circuit includes: The first charging voltage is outputted through the conversion circuit, the first charging voltage is adjusted through the voltage regulating device, and the adjusted first charging voltage is outputted to the second terminal device.

7. A reverse charging method, characterized in that: Applied in a second terminal device, the second terminal device is connected to the first terminal device via a data line, and the method includes: Sending second voltage information, where the second voltage information is used to indicate a second battery voltage of the second terminal device; receiving a charging voltage, the charging voltage being used to charge the second terminal device; wherein the charging voltage includes a first charging voltage or a second charging voltage, the first charging voltage being output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is greater than a threshold voltage, the second charging voltage being output by the first terminal device when the difference between the first battery voltage and the second battery voltage of the first terminal device is less than or equal to the threshold voltage, and the second charging voltage being lower than the first charging voltage; When the first charging voltage is received, the first charging voltage is adjusted according to the second battery voltage, and an absolute value of a difference between the adjusted first charging voltage and the second battery voltage is smaller than a preset value.

8. An electronic device, characterized in that: The electronic device includes a processor and a memory, wherein instructions are stored in the memory. When the processor executes the instructions, the electronic device executes the reverse charging method according to any one of claims 1 to 7.

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